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2f4cf5e4 AG |
1 | /* |
2 | * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. | |
3 | * | |
4 | * Authors: | |
5 | * Alexander Graf <agraf@suse.de> | |
6 | * Kevin Wolf <mail@kevin-wolf.de> | |
7 | * | |
8 | * Description: | |
9 | * This file is derived from arch/powerpc/kvm/44x.c, | |
10 | * by Hollis Blanchard <hollisb@us.ibm.com>. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License, version 2, as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | ||
17 | #include <linux/kvm_host.h> | |
18 | #include <linux/err.h> | |
66b15db6 | 19 | #include <linux/export.h> |
329d20ba | 20 | #include <linux/slab.h> |
398a76c6 AG |
21 | #include <linux/module.h> |
22 | #include <linux/miscdevice.h> | |
2f4cf5e4 AG |
23 | |
24 | #include <asm/reg.h> | |
25 | #include <asm/cputable.h> | |
26 | #include <asm/cacheflush.h> | |
27 | #include <asm/tlbflush.h> | |
28 | #include <asm/uaccess.h> | |
29 | #include <asm/io.h> | |
30 | #include <asm/kvm_ppc.h> | |
31 | #include <asm/kvm_book3s.h> | |
32 | #include <asm/mmu_context.h> | |
149dbdb1 | 33 | #include <asm/page.h> |
5a0e3ad6 | 34 | #include <linux/gfp.h> |
2f4cf5e4 AG |
35 | #include <linux/sched.h> |
36 | #include <linux/vmalloc.h> | |
9fb244a2 | 37 | #include <linux/highmem.h> |
2f4cf5e4 | 38 | |
cbbc58d4 | 39 | #include "book3s.h" |
c4befc58 PM |
40 | #include "trace.h" |
41 | ||
2f4cf5e4 AG |
42 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU |
43 | ||
44 | /* #define EXIT_DEBUG */ | |
07b0907d | 45 | |
2f4cf5e4 AG |
46 | struct kvm_stats_debugfs_item debugfs_entries[] = { |
47 | { "exits", VCPU_STAT(sum_exits) }, | |
48 | { "mmio", VCPU_STAT(mmio_exits) }, | |
49 | { "sig", VCPU_STAT(signal_exits) }, | |
50 | { "sysc", VCPU_STAT(syscall_exits) }, | |
51 | { "inst_emu", VCPU_STAT(emulated_inst_exits) }, | |
52 | { "dec", VCPU_STAT(dec_exits) }, | |
53 | { "ext_intr", VCPU_STAT(ext_intr_exits) }, | |
54 | { "queue_intr", VCPU_STAT(queue_intr) }, | |
55 | { "halt_wakeup", VCPU_STAT(halt_wakeup) }, | |
56 | { "pf_storage", VCPU_STAT(pf_storage) }, | |
57 | { "sp_storage", VCPU_STAT(sp_storage) }, | |
58 | { "pf_instruc", VCPU_STAT(pf_instruc) }, | |
59 | { "sp_instruc", VCPU_STAT(sp_instruc) }, | |
60 | { "ld", VCPU_STAT(ld) }, | |
61 | { "ld_slow", VCPU_STAT(ld_slow) }, | |
62 | { "st", VCPU_STAT(st) }, | |
63 | { "st_slow", VCPU_STAT(st_slow) }, | |
64 | { NULL } | |
65 | }; | |
66 | ||
67 | void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu) | |
68 | { | |
69 | } | |
70 | ||
71 | void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu) | |
72 | { | |
73 | } | |
74 | ||
699cc876 AK |
75 | static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu) |
76 | { | |
a78b55d1 | 77 | if (!is_kvmppc_hv_enabled(vcpu->kvm)) |
699cc876 AK |
78 | return to_book3s(vcpu)->hior; |
79 | return 0; | |
80 | } | |
81 | ||
82 | static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, | |
83 | unsigned long pending_now, unsigned long old_pending) | |
84 | { | |
a78b55d1 | 85 | if (is_kvmppc_hv_enabled(vcpu->kvm)) |
699cc876 AK |
86 | return; |
87 | if (pending_now) | |
5deb8e7a | 88 | kvmppc_set_int_pending(vcpu, 1); |
699cc876 | 89 | else if (old_pending) |
5deb8e7a | 90 | kvmppc_set_int_pending(vcpu, 0); |
699cc876 AK |
91 | } |
92 | ||
93 | static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) | |
94 | { | |
95 | ulong crit_raw; | |
96 | ulong crit_r1; | |
97 | bool crit; | |
98 | ||
a78b55d1 | 99 | if (is_kvmppc_hv_enabled(vcpu->kvm)) |
699cc876 AK |
100 | return false; |
101 | ||
5deb8e7a | 102 | crit_raw = kvmppc_get_critical(vcpu); |
699cc876 AK |
103 | crit_r1 = kvmppc_get_gpr(vcpu, 1); |
104 | ||
105 | /* Truncate crit indicators in 32 bit mode */ | |
5deb8e7a | 106 | if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { |
699cc876 AK |
107 | crit_raw &= 0xffffffff; |
108 | crit_r1 &= 0xffffffff; | |
109 | } | |
110 | ||
111 | /* Critical section when crit == r1 */ | |
112 | crit = (crit_raw == crit_r1); | |
113 | /* ... and we're in supervisor mode */ | |
5deb8e7a | 114 | crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); |
699cc876 AK |
115 | |
116 | return crit; | |
117 | } | |
118 | ||
2f4cf5e4 AG |
119 | void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) |
120 | { | |
5deb8e7a AG |
121 | kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu)); |
122 | kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags); | |
f05ed4d5 | 123 | kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec); |
2f4cf5e4 AG |
124 | vcpu->arch.mmu.reset_msr(vcpu); |
125 | } | |
126 | ||
583617b7 | 127 | static int kvmppc_book3s_vec2irqprio(unsigned int vec) |
2f4cf5e4 AG |
128 | { |
129 | unsigned int prio; | |
130 | ||
2f4cf5e4 AG |
131 | switch (vec) { |
132 | case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; | |
133 | case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; | |
134 | case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; | |
135 | case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; | |
136 | case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; | |
137 | case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; | |
138 | case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; | |
17bd1580 | 139 | case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break; |
2f4cf5e4 AG |
140 | case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; |
141 | case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; | |
142 | case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; | |
143 | case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; | |
144 | case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; | |
145 | case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; | |
146 | case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; | |
147 | case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; | |
616dff86 | 148 | case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; |
2f4cf5e4 AG |
149 | default: prio = BOOK3S_IRQPRIO_MAX; break; |
150 | } | |
151 | ||
583617b7 AG |
152 | return prio; |
153 | } | |
154 | ||
bc5ad3f3 | 155 | void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, |
7706664d AG |
156 | unsigned int vec) |
157 | { | |
f05ed4d5 PM |
158 | unsigned long old_pending = vcpu->arch.pending_exceptions; |
159 | ||
7706664d AG |
160 | clear_bit(kvmppc_book3s_vec2irqprio(vec), |
161 | &vcpu->arch.pending_exceptions); | |
9ee18b1e | 162 | |
f05ed4d5 PM |
163 | kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, |
164 | old_pending); | |
7706664d AG |
165 | } |
166 | ||
583617b7 AG |
167 | void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) |
168 | { | |
169 | vcpu->stat.queue_intr++; | |
170 | ||
171 | set_bit(kvmppc_book3s_vec2irqprio(vec), | |
172 | &vcpu->arch.pending_exceptions); | |
2f4cf5e4 AG |
173 | #ifdef EXIT_DEBUG |
174 | printk(KERN_INFO "Queueing interrupt %x\n", vec); | |
175 | #endif | |
176 | } | |
2ba9f0d8 | 177 | EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); |
2f4cf5e4 | 178 | |
25a8a02d | 179 | void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) |
2f4cf5e4 | 180 | { |
3cf658b6 PM |
181 | /* might as well deliver this straight away */ |
182 | kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); | |
2f4cf5e4 | 183 | } |
2ba9f0d8 | 184 | EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); |
2f4cf5e4 AG |
185 | |
186 | void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) | |
187 | { | |
188 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); | |
189 | } | |
2ba9f0d8 | 190 | EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); |
2f4cf5e4 AG |
191 | |
192 | int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) | |
193 | { | |
44075d95 | 194 | return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); |
2f4cf5e4 | 195 | } |
2ba9f0d8 | 196 | EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); |
2f4cf5e4 | 197 | |
7706664d AG |
198 | void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) |
199 | { | |
200 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); | |
201 | } | |
2ba9f0d8 | 202 | EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); |
7706664d | 203 | |
2f4cf5e4 AG |
204 | void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, |
205 | struct kvm_interrupt *irq) | |
206 | { | |
17bd1580 AG |
207 | unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL; |
208 | ||
209 | if (irq->irq == KVM_INTERRUPT_SET_LEVEL) | |
210 | vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL; | |
211 | ||
212 | kvmppc_book3s_queue_irqprio(vcpu, vec); | |
2f4cf5e4 AG |
213 | } |
214 | ||
4fe27d2a | 215 | void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) |
18978768 AG |
216 | { |
217 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); | |
17bd1580 | 218 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL); |
18978768 AG |
219 | } |
220 | ||
2f4cf5e4 AG |
221 | int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority) |
222 | { | |
223 | int deliver = 1; | |
224 | int vec = 0; | |
f05ed4d5 | 225 | bool crit = kvmppc_critical_section(vcpu); |
2f4cf5e4 AG |
226 | |
227 | switch (priority) { | |
228 | case BOOK3S_IRQPRIO_DECREMENTER: | |
5deb8e7a | 229 | deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; |
2f4cf5e4 AG |
230 | vec = BOOK3S_INTERRUPT_DECREMENTER; |
231 | break; | |
232 | case BOOK3S_IRQPRIO_EXTERNAL: | |
17bd1580 | 233 | case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: |
5deb8e7a | 234 | deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; |
2f4cf5e4 AG |
235 | vec = BOOK3S_INTERRUPT_EXTERNAL; |
236 | break; | |
237 | case BOOK3S_IRQPRIO_SYSTEM_RESET: | |
238 | vec = BOOK3S_INTERRUPT_SYSTEM_RESET; | |
239 | break; | |
240 | case BOOK3S_IRQPRIO_MACHINE_CHECK: | |
241 | vec = BOOK3S_INTERRUPT_MACHINE_CHECK; | |
242 | break; | |
243 | case BOOK3S_IRQPRIO_DATA_STORAGE: | |
244 | vec = BOOK3S_INTERRUPT_DATA_STORAGE; | |
245 | break; | |
246 | case BOOK3S_IRQPRIO_INST_STORAGE: | |
247 | vec = BOOK3S_INTERRUPT_INST_STORAGE; | |
248 | break; | |
249 | case BOOK3S_IRQPRIO_DATA_SEGMENT: | |
250 | vec = BOOK3S_INTERRUPT_DATA_SEGMENT; | |
251 | break; | |
252 | case BOOK3S_IRQPRIO_INST_SEGMENT: | |
253 | vec = BOOK3S_INTERRUPT_INST_SEGMENT; | |
254 | break; | |
255 | case BOOK3S_IRQPRIO_ALIGNMENT: | |
256 | vec = BOOK3S_INTERRUPT_ALIGNMENT; | |
257 | break; | |
258 | case BOOK3S_IRQPRIO_PROGRAM: | |
259 | vec = BOOK3S_INTERRUPT_PROGRAM; | |
260 | break; | |
261 | case BOOK3S_IRQPRIO_VSX: | |
262 | vec = BOOK3S_INTERRUPT_VSX; | |
263 | break; | |
264 | case BOOK3S_IRQPRIO_ALTIVEC: | |
265 | vec = BOOK3S_INTERRUPT_ALTIVEC; | |
266 | break; | |
267 | case BOOK3S_IRQPRIO_FP_UNAVAIL: | |
268 | vec = BOOK3S_INTERRUPT_FP_UNAVAIL; | |
269 | break; | |
270 | case BOOK3S_IRQPRIO_SYSCALL: | |
271 | vec = BOOK3S_INTERRUPT_SYSCALL; | |
272 | break; | |
273 | case BOOK3S_IRQPRIO_DEBUG: | |
274 | vec = BOOK3S_INTERRUPT_TRACE; | |
275 | break; | |
276 | case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: | |
277 | vec = BOOK3S_INTERRUPT_PERFMON; | |
278 | break; | |
616dff86 AG |
279 | case BOOK3S_IRQPRIO_FAC_UNAVAIL: |
280 | vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; | |
281 | break; | |
2f4cf5e4 AG |
282 | default: |
283 | deliver = 0; | |
284 | printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); | |
285 | break; | |
286 | } | |
287 | ||
288 | #if 0 | |
289 | printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); | |
290 | #endif | |
291 | ||
292 | if (deliver) | |
3cf658b6 | 293 | kvmppc_inject_interrupt(vcpu, vec, 0); |
2f4cf5e4 AG |
294 | |
295 | return deliver; | |
296 | } | |
297 | ||
17bd1580 AG |
298 | /* |
299 | * This function determines if an irqprio should be cleared once issued. | |
300 | */ | |
301 | static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) | |
302 | { | |
303 | switch (priority) { | |
304 | case BOOK3S_IRQPRIO_DECREMENTER: | |
305 | /* DEC interrupts get cleared by mtdec */ | |
306 | return false; | |
307 | case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: | |
308 | /* External interrupts get cleared by userspace */ | |
309 | return false; | |
310 | } | |
311 | ||
312 | return true; | |
313 | } | |
314 | ||
a8e4ef84 | 315 | int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) |
2f4cf5e4 AG |
316 | { |
317 | unsigned long *pending = &vcpu->arch.pending_exceptions; | |
90bba358 | 318 | unsigned long old_pending = vcpu->arch.pending_exceptions; |
2f4cf5e4 AG |
319 | unsigned int priority; |
320 | ||
2f4cf5e4 AG |
321 | #ifdef EXIT_DEBUG |
322 | if (vcpu->arch.pending_exceptions) | |
323 | printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); | |
324 | #endif | |
325 | priority = __ffs(*pending); | |
ada7ba17 | 326 | while (priority < BOOK3S_IRQPRIO_MAX) { |
7706664d | 327 | if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && |
17bd1580 | 328 | clear_irqprio(vcpu, priority)) { |
2f4cf5e4 AG |
329 | clear_bit(priority, &vcpu->arch.pending_exceptions); |
330 | break; | |
331 | } | |
332 | ||
333 | priority = find_next_bit(pending, | |
334 | BITS_PER_BYTE * sizeof(*pending), | |
335 | priority + 1); | |
336 | } | |
90bba358 AG |
337 | |
338 | /* Tell the guest about our interrupt status */ | |
f05ed4d5 | 339 | kvmppc_update_int_pending(vcpu, *pending, old_pending); |
a8e4ef84 AG |
340 | |
341 | return 0; | |
2f4cf5e4 | 342 | } |
2ba9f0d8 | 343 | EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); |
2f4cf5e4 | 344 | |
93b159b4 PM |
345 | pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, bool writing, |
346 | bool *writable) | |
e8508940 AG |
347 | { |
348 | ulong mp_pa = vcpu->arch.magic_page_pa; | |
349 | ||
5deb8e7a | 350 | if (!(kvmppc_get_msr(vcpu) & MSR_SF)) |
bbcc9c06 BH |
351 | mp_pa = (uint32_t)mp_pa; |
352 | ||
e8508940 AG |
353 | /* Magic page override */ |
354 | if (unlikely(mp_pa) && | |
355 | unlikely(((gfn << PAGE_SHIFT) & KVM_PAM) == | |
356 | ((mp_pa & PAGE_MASK) & KVM_PAM))) { | |
357 | ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; | |
358 | pfn_t pfn; | |
359 | ||
360 | pfn = (pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; | |
361 | get_page(pfn_to_page(pfn)); | |
93b159b4 PM |
362 | if (writable) |
363 | *writable = true; | |
e8508940 AG |
364 | return pfn; |
365 | } | |
366 | ||
93b159b4 | 367 | return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); |
e8508940 | 368 | } |
2ba9f0d8 | 369 | EXPORT_SYMBOL_GPL(kvmppc_gfn_to_pfn); |
e8508940 | 370 | |
2f4cf5e4 | 371 | static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data, |
93b159b4 | 372 | bool iswrite, struct kvmppc_pte *pte) |
2f4cf5e4 | 373 | { |
5deb8e7a | 374 | int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); |
2f4cf5e4 AG |
375 | int r; |
376 | ||
377 | if (relocated) { | |
93b159b4 | 378 | r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); |
2f4cf5e4 AG |
379 | } else { |
380 | pte->eaddr = eaddr; | |
28e83b4f | 381 | pte->raddr = eaddr & KVM_PAM; |
3eeafd7d | 382 | pte->vpage = VSID_REAL | eaddr >> 12; |
2f4cf5e4 AG |
383 | pte->may_read = true; |
384 | pte->may_write = true; | |
385 | pte->may_execute = true; | |
386 | r = 0; | |
387 | } | |
388 | ||
389 | return r; | |
390 | } | |
391 | ||
392 | static hva_t kvmppc_bad_hva(void) | |
393 | { | |
394 | return PAGE_OFFSET; | |
395 | } | |
396 | ||
397 | static hva_t kvmppc_pte_to_hva(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte, | |
398 | bool read) | |
399 | { | |
400 | hva_t hpage; | |
401 | ||
402 | if (read && !pte->may_read) | |
403 | goto err; | |
404 | ||
405 | if (!read && !pte->may_write) | |
406 | goto err; | |
407 | ||
408 | hpage = gfn_to_hva(vcpu->kvm, pte->raddr >> PAGE_SHIFT); | |
409 | if (kvm_is_error_hva(hpage)) | |
410 | goto err; | |
411 | ||
412 | return hpage | (pte->raddr & ~PAGE_MASK); | |
413 | err: | |
414 | return kvmppc_bad_hva(); | |
415 | } | |
416 | ||
5467a97d AG |
417 | int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
418 | bool data) | |
2f4cf5e4 AG |
419 | { |
420 | struct kvmppc_pte pte; | |
2f4cf5e4 AG |
421 | |
422 | vcpu->stat.st++; | |
423 | ||
93b159b4 | 424 | if (kvmppc_xlate(vcpu, *eaddr, data, true, &pte)) |
9fb244a2 | 425 | return -ENOENT; |
5467a97d AG |
426 | |
427 | *eaddr = pte.raddr; | |
2f4cf5e4 | 428 | |
9fb244a2 AG |
429 | if (!pte.may_write) |
430 | return -EPERM; | |
2f4cf5e4 | 431 | |
9fb244a2 AG |
432 | if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) |
433 | return EMULATE_DO_MMIO; | |
2f4cf5e4 | 434 | |
5467a97d | 435 | return EMULATE_DONE; |
2f4cf5e4 | 436 | } |
2ba9f0d8 | 437 | EXPORT_SYMBOL_GPL(kvmppc_st); |
2f4cf5e4 | 438 | |
5467a97d | 439 | int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
2f4cf5e4 AG |
440 | bool data) |
441 | { | |
442 | struct kvmppc_pte pte; | |
5467a97d | 443 | hva_t hva = *eaddr; |
2f4cf5e4 AG |
444 | |
445 | vcpu->stat.ld++; | |
446 | ||
93b159b4 | 447 | if (kvmppc_xlate(vcpu, *eaddr, data, false, &pte)) |
5467a97d AG |
448 | goto nopte; |
449 | ||
450 | *eaddr = pte.raddr; | |
2f4cf5e4 AG |
451 | |
452 | hva = kvmppc_pte_to_hva(vcpu, &pte, true); | |
453 | if (kvm_is_error_hva(hva)) | |
5467a97d | 454 | goto mmio; |
2f4cf5e4 AG |
455 | |
456 | if (copy_from_user(ptr, (void __user *)hva, size)) { | |
457 | printk(KERN_INFO "kvmppc_ld at 0x%lx failed\n", hva); | |
5467a97d | 458 | goto mmio; |
2f4cf5e4 AG |
459 | } |
460 | ||
5467a97d | 461 | return EMULATE_DONE; |
2f4cf5e4 | 462 | |
5467a97d | 463 | nopte: |
2f4cf5e4 | 464 | return -ENOENT; |
5467a97d AG |
465 | mmio: |
466 | return EMULATE_DO_MMIO; | |
2f4cf5e4 | 467 | } |
2ba9f0d8 | 468 | EXPORT_SYMBOL_GPL(kvmppc_ld); |
2f4cf5e4 | 469 | |
2f4cf5e4 AG |
470 | int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) |
471 | { | |
472 | return 0; | |
473 | } | |
474 | ||
f61c94bb BB |
475 | int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) |
476 | { | |
477 | return 0; | |
478 | } | |
479 | ||
480 | void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) | |
481 | { | |
482 | } | |
483 | ||
3a167bea AK |
484 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, |
485 | struct kvm_sregs *sregs) | |
486 | { | |
cbbc58d4 | 487 | return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); |
3a167bea AK |
488 | } |
489 | ||
490 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
491 | struct kvm_sregs *sregs) | |
492 | { | |
cbbc58d4 | 493 | return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); |
3a167bea AK |
494 | } |
495 | ||
2f4cf5e4 AG |
496 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) |
497 | { | |
498 | int i; | |
499 | ||
c7f38f46 | 500 | regs->pc = kvmppc_get_pc(vcpu); |
992b5b29 | 501 | regs->cr = kvmppc_get_cr(vcpu); |
c7f38f46 AG |
502 | regs->ctr = kvmppc_get_ctr(vcpu); |
503 | regs->lr = kvmppc_get_lr(vcpu); | |
992b5b29 | 504 | regs->xer = kvmppc_get_xer(vcpu); |
5deb8e7a AG |
505 | regs->msr = kvmppc_get_msr(vcpu); |
506 | regs->srr0 = kvmppc_get_srr0(vcpu); | |
507 | regs->srr1 = kvmppc_get_srr1(vcpu); | |
2f4cf5e4 | 508 | regs->pid = vcpu->arch.pid; |
5deb8e7a AG |
509 | regs->sprg0 = kvmppc_get_sprg0(vcpu); |
510 | regs->sprg1 = kvmppc_get_sprg1(vcpu); | |
511 | regs->sprg2 = kvmppc_get_sprg2(vcpu); | |
512 | regs->sprg3 = kvmppc_get_sprg3(vcpu); | |
513 | regs->sprg4 = kvmppc_get_sprg4(vcpu); | |
514 | regs->sprg5 = kvmppc_get_sprg5(vcpu); | |
515 | regs->sprg6 = kvmppc_get_sprg6(vcpu); | |
516 | regs->sprg7 = kvmppc_get_sprg7(vcpu); | |
2f4cf5e4 AG |
517 | |
518 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | |
8e5b26b5 | 519 | regs->gpr[i] = kvmppc_get_gpr(vcpu, i); |
2f4cf5e4 AG |
520 | |
521 | return 0; | |
522 | } | |
523 | ||
524 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
525 | { | |
526 | int i; | |
527 | ||
c7f38f46 | 528 | kvmppc_set_pc(vcpu, regs->pc); |
992b5b29 | 529 | kvmppc_set_cr(vcpu, regs->cr); |
c7f38f46 AG |
530 | kvmppc_set_ctr(vcpu, regs->ctr); |
531 | kvmppc_set_lr(vcpu, regs->lr); | |
992b5b29 | 532 | kvmppc_set_xer(vcpu, regs->xer); |
2f4cf5e4 | 533 | kvmppc_set_msr(vcpu, regs->msr); |
5deb8e7a AG |
534 | kvmppc_set_srr0(vcpu, regs->srr0); |
535 | kvmppc_set_srr1(vcpu, regs->srr1); | |
536 | kvmppc_set_sprg0(vcpu, regs->sprg0); | |
537 | kvmppc_set_sprg1(vcpu, regs->sprg1); | |
538 | kvmppc_set_sprg2(vcpu, regs->sprg2); | |
539 | kvmppc_set_sprg3(vcpu, regs->sprg3); | |
540 | kvmppc_set_sprg4(vcpu, regs->sprg4); | |
541 | kvmppc_set_sprg5(vcpu, regs->sprg5); | |
542 | kvmppc_set_sprg6(vcpu, regs->sprg6); | |
543 | kvmppc_set_sprg7(vcpu, regs->sprg7); | |
2f4cf5e4 | 544 | |
8e5b26b5 AG |
545 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
546 | kvmppc_set_gpr(vcpu, i, regs->gpr[i]); | |
2f4cf5e4 AG |
547 | |
548 | return 0; | |
549 | } | |
550 | ||
2f4cf5e4 AG |
551 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) |
552 | { | |
553 | return -ENOTSUPP; | |
554 | } | |
555 | ||
556 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
557 | { | |
558 | return -ENOTSUPP; | |
559 | } | |
560 | ||
a136a8bd PM |
561 | int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) |
562 | { | |
563 | int r; | |
564 | union kvmppc_one_reg val; | |
565 | int size; | |
a8bd19ef | 566 | long int i; |
a136a8bd PM |
567 | |
568 | size = one_reg_size(reg->id); | |
569 | if (size > sizeof(val)) | |
570 | return -EINVAL; | |
571 | ||
cbbc58d4 | 572 | r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, reg->id, &val); |
a136a8bd PM |
573 | if (r == -EINVAL) { |
574 | r = 0; | |
575 | switch (reg->id) { | |
576 | case KVM_REG_PPC_DAR: | |
5deb8e7a | 577 | val = get_reg_val(reg->id, kvmppc_get_dar(vcpu)); |
a136a8bd PM |
578 | break; |
579 | case KVM_REG_PPC_DSISR: | |
5deb8e7a | 580 | val = get_reg_val(reg->id, kvmppc_get_dsisr(vcpu)); |
a136a8bd | 581 | break; |
a8bd19ef PM |
582 | case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: |
583 | i = reg->id - KVM_REG_PPC_FPR0; | |
efff1912 | 584 | val = get_reg_val(reg->id, VCPU_FPR(vcpu, i)); |
a8bd19ef PM |
585 | break; |
586 | case KVM_REG_PPC_FPSCR: | |
efff1912 | 587 | val = get_reg_val(reg->id, vcpu->arch.fp.fpscr); |
a8bd19ef PM |
588 | break; |
589 | #ifdef CONFIG_ALTIVEC | |
590 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: | |
591 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
592 | r = -ENXIO; | |
593 | break; | |
594 | } | |
efff1912 | 595 | val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0]; |
a8bd19ef PM |
596 | break; |
597 | case KVM_REG_PPC_VSCR: | |
598 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
599 | r = -ENXIO; | |
600 | break; | |
601 | } | |
efff1912 | 602 | val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]); |
a8bd19ef | 603 | break; |
c0867fd5 PM |
604 | case KVM_REG_PPC_VRSAVE: |
605 | val = get_reg_val(reg->id, vcpu->arch.vrsave); | |
606 | break; | |
a8bd19ef | 607 | #endif /* CONFIG_ALTIVEC */ |
efff1912 PM |
608 | #ifdef CONFIG_VSX |
609 | case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: | |
610 | if (cpu_has_feature(CPU_FTR_VSX)) { | |
611 | long int i = reg->id - KVM_REG_PPC_VSR0; | |
612 | val.vsxval[0] = vcpu->arch.fp.fpr[i][0]; | |
613 | val.vsxval[1] = vcpu->arch.fp.fpr[i][1]; | |
614 | } else { | |
615 | r = -ENXIO; | |
616 | } | |
617 | break; | |
618 | #endif /* CONFIG_VSX */ | |
8c32a2ea BB |
619 | case KVM_REG_PPC_DEBUG_INST: { |
620 | u32 opcode = INS_TW; | |
621 | r = copy_to_user((u32 __user *)(long)reg->addr, | |
622 | &opcode, sizeof(u32)); | |
623 | break; | |
624 | } | |
8b78645c PM |
625 | #ifdef CONFIG_KVM_XICS |
626 | case KVM_REG_PPC_ICP_STATE: | |
627 | if (!vcpu->arch.icp) { | |
628 | r = -ENXIO; | |
629 | break; | |
630 | } | |
631 | val = get_reg_val(reg->id, kvmppc_xics_get_icp(vcpu)); | |
632 | break; | |
633 | #endif /* CONFIG_KVM_XICS */ | |
616dff86 AG |
634 | case KVM_REG_PPC_FSCR: |
635 | val = get_reg_val(reg->id, vcpu->arch.fscr); | |
636 | break; | |
e14e7a1e AG |
637 | case KVM_REG_PPC_TAR: |
638 | val = get_reg_val(reg->id, vcpu->arch.tar); | |
639 | break; | |
a136a8bd PM |
640 | default: |
641 | r = -EINVAL; | |
642 | break; | |
643 | } | |
644 | } | |
645 | if (r) | |
646 | return r; | |
647 | ||
648 | if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) | |
649 | r = -EFAULT; | |
650 | ||
651 | return r; | |
652 | } | |
653 | ||
654 | int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) | |
655 | { | |
656 | int r; | |
657 | union kvmppc_one_reg val; | |
658 | int size; | |
a8bd19ef | 659 | long int i; |
a136a8bd PM |
660 | |
661 | size = one_reg_size(reg->id); | |
662 | if (size > sizeof(val)) | |
663 | return -EINVAL; | |
664 | ||
665 | if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) | |
666 | return -EFAULT; | |
667 | ||
cbbc58d4 | 668 | r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, reg->id, &val); |
a136a8bd PM |
669 | if (r == -EINVAL) { |
670 | r = 0; | |
671 | switch (reg->id) { | |
672 | case KVM_REG_PPC_DAR: | |
5deb8e7a | 673 | kvmppc_set_dar(vcpu, set_reg_val(reg->id, val)); |
a136a8bd PM |
674 | break; |
675 | case KVM_REG_PPC_DSISR: | |
5deb8e7a | 676 | kvmppc_set_dsisr(vcpu, set_reg_val(reg->id, val)); |
a136a8bd | 677 | break; |
a8bd19ef PM |
678 | case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: |
679 | i = reg->id - KVM_REG_PPC_FPR0; | |
efff1912 | 680 | VCPU_FPR(vcpu, i) = set_reg_val(reg->id, val); |
a8bd19ef PM |
681 | break; |
682 | case KVM_REG_PPC_FPSCR: | |
efff1912 | 683 | vcpu->arch.fp.fpscr = set_reg_val(reg->id, val); |
a8bd19ef PM |
684 | break; |
685 | #ifdef CONFIG_ALTIVEC | |
686 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: | |
687 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
688 | r = -ENXIO; | |
689 | break; | |
690 | } | |
efff1912 | 691 | vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval; |
a8bd19ef PM |
692 | break; |
693 | case KVM_REG_PPC_VSCR: | |
694 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
695 | r = -ENXIO; | |
696 | break; | |
697 | } | |
efff1912 | 698 | vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val); |
a8bd19ef | 699 | break; |
c0867fd5 PM |
700 | case KVM_REG_PPC_VRSAVE: |
701 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
702 | r = -ENXIO; | |
703 | break; | |
704 | } | |
705 | vcpu->arch.vrsave = set_reg_val(reg->id, val); | |
706 | break; | |
a8bd19ef | 707 | #endif /* CONFIG_ALTIVEC */ |
efff1912 PM |
708 | #ifdef CONFIG_VSX |
709 | case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: | |
710 | if (cpu_has_feature(CPU_FTR_VSX)) { | |
711 | long int i = reg->id - KVM_REG_PPC_VSR0; | |
712 | vcpu->arch.fp.fpr[i][0] = val.vsxval[0]; | |
713 | vcpu->arch.fp.fpr[i][1] = val.vsxval[1]; | |
714 | } else { | |
715 | r = -ENXIO; | |
716 | } | |
717 | break; | |
718 | #endif /* CONFIG_VSX */ | |
8b78645c PM |
719 | #ifdef CONFIG_KVM_XICS |
720 | case KVM_REG_PPC_ICP_STATE: | |
721 | if (!vcpu->arch.icp) { | |
722 | r = -ENXIO; | |
723 | break; | |
724 | } | |
725 | r = kvmppc_xics_set_icp(vcpu, | |
726 | set_reg_val(reg->id, val)); | |
727 | break; | |
728 | #endif /* CONFIG_KVM_XICS */ | |
616dff86 AG |
729 | case KVM_REG_PPC_FSCR: |
730 | vcpu->arch.fscr = set_reg_val(reg->id, val); | |
731 | break; | |
e14e7a1e AG |
732 | case KVM_REG_PPC_TAR: |
733 | vcpu->arch.tar = set_reg_val(reg->id, val); | |
734 | break; | |
a136a8bd PM |
735 | default: |
736 | r = -EINVAL; | |
737 | break; | |
738 | } | |
739 | } | |
740 | ||
741 | return r; | |
742 | } | |
743 | ||
3a167bea AK |
744 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
745 | { | |
cbbc58d4 | 746 | vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); |
3a167bea AK |
747 | } |
748 | ||
749 | void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) | |
750 | { | |
cbbc58d4 | 751 | vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); |
3a167bea AK |
752 | } |
753 | ||
754 | void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) | |
755 | { | |
cbbc58d4 | 756 | vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); |
3a167bea | 757 | } |
2ba9f0d8 | 758 | EXPORT_SYMBOL_GPL(kvmppc_set_msr); |
3a167bea AK |
759 | |
760 | int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) | |
761 | { | |
cbbc58d4 | 762 | return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu); |
3a167bea AK |
763 | } |
764 | ||
2f4cf5e4 AG |
765 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, |
766 | struct kvm_translation *tr) | |
767 | { | |
768 | return 0; | |
769 | } | |
770 | ||
092d62ee BB |
771 | int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, |
772 | struct kvm_guest_debug *dbg) | |
773 | { | |
774 | return -EINVAL; | |
775 | } | |
776 | ||
dfd4d47e SW |
777 | void kvmppc_decrementer_func(unsigned long data) |
778 | { | |
779 | struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; | |
780 | ||
781 | kvmppc_core_queue_dec(vcpu); | |
782 | kvm_vcpu_kick(vcpu); | |
783 | } | |
3a167bea AK |
784 | |
785 | struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) | |
786 | { | |
cbbc58d4 | 787 | return kvm->arch.kvm_ops->vcpu_create(kvm, id); |
3a167bea AK |
788 | } |
789 | ||
790 | void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) | |
791 | { | |
cbbc58d4 | 792 | vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); |
3a167bea AK |
793 | } |
794 | ||
795 | int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) | |
796 | { | |
cbbc58d4 | 797 | return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); |
3a167bea AK |
798 | } |
799 | ||
800 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) | |
801 | { | |
cbbc58d4 | 802 | return kvm->arch.kvm_ops->get_dirty_log(kvm, log); |
3a167bea AK |
803 | } |
804 | ||
5587027c | 805 | void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, |
3a167bea AK |
806 | struct kvm_memory_slot *dont) |
807 | { | |
cbbc58d4 | 808 | kvm->arch.kvm_ops->free_memslot(free, dont); |
3a167bea AK |
809 | } |
810 | ||
5587027c | 811 | int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, |
3a167bea AK |
812 | unsigned long npages) |
813 | { | |
cbbc58d4 | 814 | return kvm->arch.kvm_ops->create_memslot(slot, npages); |
3a167bea AK |
815 | } |
816 | ||
817 | void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) | |
818 | { | |
cbbc58d4 | 819 | kvm->arch.kvm_ops->flush_memslot(kvm, memslot); |
3a167bea AK |
820 | } |
821 | ||
822 | int kvmppc_core_prepare_memory_region(struct kvm *kvm, | |
823 | struct kvm_memory_slot *memslot, | |
824 | struct kvm_userspace_memory_region *mem) | |
825 | { | |
cbbc58d4 | 826 | return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem); |
3a167bea AK |
827 | } |
828 | ||
829 | void kvmppc_core_commit_memory_region(struct kvm *kvm, | |
830 | struct kvm_userspace_memory_region *mem, | |
831 | const struct kvm_memory_slot *old) | |
832 | { | |
cbbc58d4 | 833 | kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old); |
3a167bea AK |
834 | } |
835 | ||
836 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
837 | { | |
cbbc58d4 | 838 | return kvm->arch.kvm_ops->unmap_hva(kvm, hva); |
3a167bea | 839 | } |
2ba9f0d8 | 840 | EXPORT_SYMBOL_GPL(kvm_unmap_hva); |
3a167bea AK |
841 | |
842 | int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) | |
843 | { | |
cbbc58d4 | 844 | return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end); |
3a167bea AK |
845 | } |
846 | ||
847 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
848 | { | |
cbbc58d4 | 849 | return kvm->arch.kvm_ops->age_hva(kvm, hva); |
3a167bea AK |
850 | } |
851 | ||
852 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) | |
853 | { | |
cbbc58d4 | 854 | return kvm->arch.kvm_ops->test_age_hva(kvm, hva); |
3a167bea AK |
855 | } |
856 | ||
857 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
858 | { | |
cbbc58d4 | 859 | kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte); |
3a167bea AK |
860 | } |
861 | ||
862 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) | |
863 | { | |
cbbc58d4 | 864 | vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); |
3a167bea AK |
865 | } |
866 | ||
867 | int kvmppc_core_init_vm(struct kvm *kvm) | |
868 | { | |
869 | ||
870 | #ifdef CONFIG_PPC64 | |
871 | INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables); | |
872 | INIT_LIST_HEAD(&kvm->arch.rtas_tokens); | |
873 | #endif | |
874 | ||
cbbc58d4 | 875 | return kvm->arch.kvm_ops->init_vm(kvm); |
3a167bea AK |
876 | } |
877 | ||
878 | void kvmppc_core_destroy_vm(struct kvm *kvm) | |
879 | { | |
cbbc58d4 | 880 | kvm->arch.kvm_ops->destroy_vm(kvm); |
3a167bea AK |
881 | |
882 | #ifdef CONFIG_PPC64 | |
883 | kvmppc_rtas_tokens_free(kvm); | |
884 | WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); | |
885 | #endif | |
886 | } | |
887 | ||
888 | int kvmppc_core_check_processor_compat(void) | |
889 | { | |
cbbc58d4 AK |
890 | /* |
891 | * We always return 0 for book3s. We check | |
892 | * for compatability while loading the HV | |
893 | * or PR module | |
894 | */ | |
895 | return 0; | |
896 | } | |
897 | ||
898 | static int kvmppc_book3s_init(void) | |
899 | { | |
900 | int r; | |
901 | ||
902 | r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); | |
903 | if (r) | |
904 | return r; | |
905 | #ifdef CONFIG_KVM_BOOK3S_32 | |
906 | r = kvmppc_book3s_init_pr(); | |
907 | #endif | |
908 | return r; | |
909 | ||
910 | } | |
911 | ||
912 | static void kvmppc_book3s_exit(void) | |
913 | { | |
914 | #ifdef CONFIG_KVM_BOOK3S_32 | |
915 | kvmppc_book3s_exit_pr(); | |
916 | #endif | |
917 | kvm_exit(); | |
3a167bea | 918 | } |
cbbc58d4 AK |
919 | |
920 | module_init(kvmppc_book3s_init); | |
921 | module_exit(kvmppc_book3s_exit); | |
398a76c6 AG |
922 | |
923 | /* On 32bit this is our one and only kernel module */ | |
924 | #ifdef CONFIG_KVM_BOOK3S_32 | |
925 | MODULE_ALIAS_MISCDEV(KVM_MINOR); | |
926 | MODULE_ALIAS("devname:kvm"); | |
927 | #endif |