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UBUNTU: Ubuntu-4.15.0-96.97
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / book3s_hv.c
CommitLineData
de56a948
PM		 1/*
2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4 *
5 * Authors:
6 * Paul Mackerras <paulus@au1.ibm.com>
7 * Alexander Graf <agraf@suse.de>
8 * Kevin Wolf <mail@kevin-wolf.de>
9 *
10 * Description: KVM functions specific to running on Book 3S
11 * processors in hypervisor mode (specifically POWER7 and later).
12 *
13 * This file is derived from arch/powerpc/kvm/book3s.c,
14 * by Alexander Graf <agraf@suse.de>.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License, version 2, as
18 * published by the Free Software Foundation.
19 */
20
21#include <linux/kvm_host.h>
4bb817ed 22#include <linux/kernel.h>
de56a948
PM		 23#include <linux/err.h>
24#include <linux/slab.h>
25#include <linux/preempt.h>
174cd4b1 26#include <linux/sched/signal.h>
03441a34 27#include <linux/sched/stat.h>
de56a948 28#include <linux/delay.h>
66b15db6 29#include <linux/export.h>
de56a948
PM		 30#include <linux/fs.h>
31#include <linux/anon_inodes.h>
07f8ab25 32#include <linux/cpu.h>
de56a948 33#include <linux/cpumask.h>
aa04b4cc
PM		 34#include <linux/spinlock.h>
35#include <linux/page-flags.h>
2c9097e4 36#include <linux/srcu.h>
398a76c6 37#include <linux/miscdevice.h>
e23a808b 38#include <linux/debugfs.h>
d3989143
BH		 39#include <linux/gfp.h>
40#include <linux/vmalloc.h>
41#include <linux/highmem.h>
42#include <linux/hugetlb.h>
43#include <linux/kvm_irqfd.h>
44#include <linux/irqbypass.h>
45#include <linux/module.h>
46#include <linux/compiler.h>
47#include <linux/of.h>
de56a948 48
54a88107 49#include <asm/ftrace.h>
de56a948 50#include <asm/reg.h>
57900694 51#include <asm/ppc-opcode.h>
6de6638b 52#include <asm/asm-prototypes.h>
57900694 53#include <asm/disassemble.h>
de56a948
PM		 54#include <asm/cputable.h>
55#include <asm/cacheflush.h>
56#include <asm/tlbflush.h>
7c0f6ba6 57#include <linux/uaccess.h>
de56a948
PM		 58#include <asm/io.h>
59#include <asm/kvm_ppc.h>
60#include <asm/kvm_book3s.h>
61#include <asm/mmu_context.h>
62#include <asm/lppaca.h>
63#include <asm/processor.h>
371fefd6 64#include <asm/cputhreads.h>
aa04b4cc 65#include <asm/page.h>
de1d9248 66#include <asm/hvcall.h>
ae3a197e 67#include <asm/switch_to.h>
512691d4 68#include <asm/smp.h>
66feed61 69#include <asm/dbell.h>
fd7bacbc 70#include <asm/hmi.h>
c57875f5 71#include <asm/pnv-pci.h>
7a84084c 72#include <asm/mmu.h>
f725758b
PM		 73#include <asm/opal.h>
74#include <asm/xics.h>
5af50993 75#include <asm/xive.h>
de56a948 76
3a167bea
AK		 77#include "book3s.h"
78
3c78f78a
SW		 79#define CREATE_TRACE_POINTS
80#include "trace_hv.h"
81
de56a948
PM		 82/* #define EXIT_DEBUG */
83/* #define EXIT_DEBUG_SIMPLE */
84/* #define EXIT_DEBUG_INT */
85
913d3ff9
PM		 86/* Used to indicate that a guest page fault needs to be handled */
87#define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1)
f7af5209
SW		 88/* Used to indicate that a guest passthrough interrupt needs to be handled */
89#define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2)
913d3ff9 90
c7b67670
PM		 91/* Used as a "null" value for timebase values */
92#define TB_NIL (~(u64)0)
93
699a0ea0
PM		 94static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
95
b4deba5c
PM		 96static int dynamic_mt_modes = 6;
97module_param(dynamic_mt_modes, int, S_IRUGO | S_IWUSR);
98MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
ec257165
PM		 99static int target_smt_mode;
100module_param(target_smt_mode, int, S_IRUGO | S_IWUSR);
101MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)");
9678cdaa 102
516f7898
PM		 103static bool indep_threads_mode = true;
104module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR);
105MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)");
106
cd96036f
PM		 107static bool one_vm_per_core;
108module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR);
109MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)");
110
520fe9c6
SW		 111#ifdef CONFIG_KVM_XICS
112static struct kernel_param_ops module_param_ops = {
113 .set = param_set_int,
114 .get = param_get_int,
115};
116
644abbb2
SW		 117module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass,
118 S_IRUGO | S_IWUSR);
119MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
120
520fe9c6
SW		 121module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect,
122 S_IRUGO | S_IWUSR);
123MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
124#endif
125
49620ad4
PM		 126/* If set, the threads on each CPU core have to be in the same MMU mode */
127static bool no_mixing_hpt_and_radix;
128
19ccb76a 129static void kvmppc_end_cede(struct kvm_vcpu *vcpu);
32fad281 130static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu);
19ccb76a 131
7b5f8272
SJS		 132static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc,
133 int *ip)
134{
135 int i = *ip;
136 struct kvm_vcpu *vcpu;
137
138 while (++i < MAX_SMT_THREADS) {
139 vcpu = READ_ONCE(vc->runnable_threads[i]);
140 if (vcpu) {
141 *ip = i;
142 return vcpu;
143 }
144 }
145 return NULL;
146}
147
148/* Used to traverse the list of runnable threads for a given vcore */
149#define for_each_runnable_thread(i, vcpu, vc) \
150 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); )
151
66feed61
PM		 152static bool kvmppc_ipi_thread(int cpu)
153{
1704a81c
PM		 154 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
155
156 /* On POWER9 we can use msgsnd to IPI any cpu */
157 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
158 msg |= get_hard_smp_processor_id(cpu);
159 smp_mb();
160 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
161 return true;
162 }
163
66feed61
PM		 164 /* On POWER8 for IPIs to threads in the same core, use msgsnd */
165 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
166 preempt_disable();
167 if (cpu_first_thread_sibling(cpu) ==
168 cpu_first_thread_sibling(smp_processor_id())) {
66feed61
PM		 169 msg |= cpu_thread_in_core(cpu);
170 smp_mb();
171 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
172 preempt_enable();
173 return true;
174 }
175 preempt_enable();
176 }
177
178#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
f725758b
PM		 179 if (cpu >= 0 && cpu < nr_cpu_ids) {
180 if (paca[cpu].kvm_hstate.xics_phys) {
181 xics_wake_cpu(cpu);
182 return true;
183 }
184 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);
66feed61
PM		 185 return true;
186 }
187#endif
188
189 return false;
190}
191
3a167bea 192static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
54695c30 193{
ec257165 194 int cpu;
8577370f 195 struct swait_queue_head *wqp;
54695c30
BH		 196
197 wqp = kvm_arch_vcpu_wq(vcpu);
267ad7bc 198 if (swq_has_sleeper(wqp)) {
8577370f 199 swake_up(wqp);
54695c30
BH		 200 ++vcpu->stat.halt_wakeup;
201 }
202
3deda5e5
PM		 203 cpu = READ_ONCE(vcpu->arch.thread_cpu);
204 if (cpu >= 0 && kvmppc_ipi_thread(cpu))
66feed61 205 return;
54695c30
BH		 206
207 /* CPU points to the first thread of the core */
ec257165 208 cpu = vcpu->cpu;
66feed61
PM		 209 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu))
210 smp_send_reschedule(cpu);
54695c30
BH		 211}
212
c7b67670
PM		 213/*
214 * We use the vcpu_load/put functions to measure stolen time.
215 * Stolen time is counted as time when either the vcpu is able to
216 * run as part of a virtual core, but the task running the vcore
217 * is preempted or sleeping, or when the vcpu needs something done
218 * in the kernel by the task running the vcpu, but that task is
219 * preempted or sleeping. Those two things have to be counted
220 * separately, since one of the vcpu tasks will take on the job
221 * of running the core, and the other vcpu tasks in the vcore will
222 * sleep waiting for it to do that, but that sleep shouldn't count
223 * as stolen time.
224 *
225 * Hence we accumulate stolen time when the vcpu can run as part of
226 * a vcore using vc->stolen_tb, and the stolen time when the vcpu
227 * needs its task to do other things in the kernel (for example,
228 * service a page fault) in busy_stolen. We don't accumulate
229 * stolen time for a vcore when it is inactive, or for a vcpu
230 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of
231 * a misnomer; it means that the vcpu task is not executing in
232 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in
233 * the kernel. We don't have any way of dividing up that time
234 * between time that the vcpu is genuinely stopped, time that
235 * the task is actively working on behalf of the vcpu, and time
236 * that the task is preempted, so we don't count any of it as
237 * stolen.
238 *
239 * Updates to busy_stolen are protected by arch.tbacct_lock;
2711e248
PM		 240 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
241 * lock. The stolen times are measured in units of timebase ticks.
242 * (Note that the != TB_NIL checks below are purely defensive;
243 * they should never fail.)
c7b67670
PM		 244 */
245
ec257165
PM		 246static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc)
247{
248 unsigned long flags;
249
250 spin_lock_irqsave(&vc->stoltb_lock, flags);
251 vc->preempt_tb = mftb();
252 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
253}
254
255static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc)
256{
257 unsigned long flags;
258
259 spin_lock_irqsave(&vc->stoltb_lock, flags);
260 if (vc->preempt_tb != TB_NIL) {
261 vc->stolen_tb += mftb() - vc->preempt_tb;
262 vc->preempt_tb = TB_NIL;
263 }
264 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
265}
266
3a167bea 267static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
de56a948 268{
0456ec4f 269 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 270 unsigned long flags;
0456ec4f 271
2711e248
PM		 272 /*
273 * We can test vc->runner without taking the vcore lock,
274 * because only this task ever sets vc->runner to this
275 * vcpu, and once it is set to this vcpu, only this task
276 * ever sets it to NULL.
277 */
ec257165
PM		 278 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
279 kvmppc_core_end_stolen(vc);
280
2711e248 281 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 282 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
283 vcpu->arch.busy_preempt != TB_NIL) {
284 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
285 vcpu->arch.busy_preempt = TB_NIL;
286 }
bf3d32e1 287 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
de56a948
PM		 288}
289
3a167bea 290static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
de56a948 291{
0456ec4f 292 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 293 unsigned long flags;
0456ec4f 294
ec257165
PM		 295 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
296 kvmppc_core_start_stolen(vc);
297
2711e248 298 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 299 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
300 vcpu->arch.busy_preempt = mftb();
bf3d32e1 301 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
de56a948
PM		 302}
303
3a167bea 304static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
de56a948 305{
c20875a3
PM		 306 /*
307 * Check for illegal transactional state bit combination
308 * and if we find it, force the TS field to a safe state.
309 */
310 if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
311 msr &= ~MSR_TS_MASK;
de56a948 312 vcpu->arch.shregs.msr = msr;
19ccb76a 313 kvmppc_end_cede(vcpu);
de56a948
PM		 314}
315
5358a963 316static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr)
de56a948
PM		 317{
318 vcpu->arch.pvr = pvr;
319}
320
2ee13be3
SJS		 321/* Dummy value used in computing PCR value below */
322#define PCR_ARCH_300 (PCR_ARCH_207 << 1)
323
5358a963 324static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
388cc6e1 325{
2ee13be3 326 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
388cc6e1
PM		 327 struct kvmppc_vcore *vc = vcpu->arch.vcore;
328
2ee13be3
SJS		 329 /* We can (emulate) our own architecture version and anything older */
330 if (cpu_has_feature(CPU_FTR_ARCH_300))
331 host_pcr_bit = PCR_ARCH_300;
332 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
333 host_pcr_bit = PCR_ARCH_207;
334 else if (cpu_has_feature(CPU_FTR_ARCH_206))
335 host_pcr_bit = PCR_ARCH_206;
336 else
337 host_pcr_bit = PCR_ARCH_205;
338
339 /* Determine lowest PCR bit needed to run guest in given PVR level */
340 guest_pcr_bit = host_pcr_bit;
388cc6e1 341 if (arch_compat) {
388cc6e1
PM		 342 switch (arch_compat) {
343 case PVR_ARCH_205:
2ee13be3 344 guest_pcr_bit = PCR_ARCH_205;
388cc6e1
PM		 345 break;
346 case PVR_ARCH_206:
347 case PVR_ARCH_206p:
2ee13be3 348 guest_pcr_bit = PCR_ARCH_206;
5557ae0e
PM		 349 break;
350 case PVR_ARCH_207:
2ee13be3
SJS		 351 guest_pcr_bit = PCR_ARCH_207;
352 break;
353 case PVR_ARCH_300:
354 guest_pcr_bit = PCR_ARCH_300;
388cc6e1
PM		 355 break;
356 default:
357 return -EINVAL;
358 }
359 }
360
2ee13be3
SJS		 361 /* Check requested PCR bits don't exceed our capabilities */
362 if (guest_pcr_bit > host_pcr_bit)
363 return -EINVAL;
364
388cc6e1
PM		 365 spin_lock(&vc->lock);
366 vc->arch_compat = arch_compat;
2ee13be3
SJS		 367 /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */
368 vc->pcr = host_pcr_bit - guest_pcr_bit;
388cc6e1
PM		 369 spin_unlock(&vc->lock);
370
371 return 0;
372}
373
5358a963 374static void kvmppc_dump_regs(struct kvm_vcpu *vcpu)
de56a948
PM		 375{
376 int r;
377
378 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id);
379 pr_err("pc = %.16lx msr = %.16llx trap = %x\n",
380 vcpu->arch.pc, vcpu->arch.shregs.msr, vcpu->arch.trap);
381 for (r = 0; r < 16; ++r)
382 pr_err("r%2d = %.16lx r%d = %.16lx\n",
383 r, kvmppc_get_gpr(vcpu, r),
384 r+16, kvmppc_get_gpr(vcpu, r+16));
385 pr_err("ctr = %.16lx lr = %.16lx\n",
386 vcpu->arch.ctr, vcpu->arch.lr);
387 pr_err("srr0 = %.16llx srr1 = %.16llx\n",
388 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1);
389 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n",
390 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1);
391 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n",
392 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3);
393 pr_err("cr = %.8x xer = %.16lx dsisr = %.8x\n",
394 vcpu->arch.cr, vcpu->arch.xer, vcpu->arch.shregs.dsisr);
395 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
396 pr_err("fault dar = %.16lx dsisr = %.8x\n",
397 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
398 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max);
399 for (r = 0; r < vcpu->arch.slb_max; ++r)
400 pr_err(" ESID = %.16llx VSID = %.16llx\n",
401 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv);
402 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n",
a0144e2a 403 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1,
de56a948
PM		 404 vcpu->arch.last_inst);
405}
406
5358a963 407static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
a8606e20 408{
22163292 409 return kvm_get_vcpu_by_id(kvm, id);
a8606e20
PM		 410}
411
412static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
413{
f13c13a0 414 vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
02407552 415 vpa->yield_count = cpu_to_be32(1);
a8606e20
PM		 416}
417
55b665b0
PM		 418static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v,
419 unsigned long addr, unsigned long len)
420{
421 /* check address is cacheline aligned */
422 if (addr & (L1_CACHE_BYTES - 1))
423 return -EINVAL;
424 spin_lock(&vcpu->arch.vpa_update_lock);
425 if (v->next_gpa != addr || v->len != len) {
426 v->next_gpa = addr;
427 v->len = addr ? len : 0;
428 v->update_pending = 1;
429 }
430 spin_unlock(&vcpu->arch.vpa_update_lock);
431 return 0;
432}
433
2e25aa5f
PM		 434/* Length for a per-processor buffer is passed in at offset 4 in the buffer */
435struct reg_vpa {
436 u32 dummy;
437 union {
02407552
AG		 438 __be16 hword;
439 __be32 word;
2e25aa5f
PM		 440 } length;
441};
442
443static int vpa_is_registered(struct kvmppc_vpa *vpap)
444{
445 if (vpap->update_pending)
446 return vpap->next_gpa != 0;
447 return vpap->pinned_addr != NULL;
448}
449
a8606e20
PM		 450static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
451 unsigned long flags,
452 unsigned long vcpuid, unsigned long vpa)
453{
454 struct kvm *kvm = vcpu->kvm;
93e60249 455 unsigned long len, nb;
a8606e20
PM		 456 void *va;
457 struct kvm_vcpu *tvcpu;
2e25aa5f
PM		 458 int err;
459 int subfunc;
460 struct kvmppc_vpa *vpap;
a8606e20
PM		 461
462 tvcpu = kvmppc_find_vcpu(kvm, vcpuid);
463 if (!tvcpu)
464 return H_PARAMETER;
465
2e25aa5f
PM		 466 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK;
467 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||
468 subfunc == H_VPA_REG_SLB) {
469 /* Registering new area - address must be cache-line aligned */
470 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa)
a8606e20 471 return H_PARAMETER;
2e25aa5f
PM		 472
473 /* convert logical addr to kernel addr and read length */
93e60249
PM		 474 va = kvmppc_pin_guest_page(kvm, vpa, &nb);
475 if (va == NULL)
b2b2f165 476 return H_PARAMETER;
2e25aa5f 477 if (subfunc == H_VPA_REG_VPA)
02407552 478 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword);
a8606e20 479 else
02407552 480 len = be32_to_cpu(((struct reg_vpa *)va)->length.word);
c35635ef 481 kvmppc_unpin_guest_page(kvm, va, vpa, false);
2e25aa5f
PM		 482
483 /* Check length */
484 if (len > nb || len < sizeof(struct reg_vpa))
485 return H_PARAMETER;
486 } else {
487 vpa = 0;
488 len = 0;
489 }
490
491 err = H_PARAMETER;
492 vpap = NULL;
493 spin_lock(&tvcpu->arch.vpa_update_lock);
494
495 switch (subfunc) {
496 case H_VPA_REG_VPA: /* register VPA */
eaac112e
NP		 497 /*
498 * The size of our lppaca is 1kB because of the way we align
499 * it for the guest to avoid crossing a 4kB boundary. We only
500 * use 640 bytes of the structure though, so we should accept
501 * clients that set a size of 640.
502 */
503 if (len < 640)
a8606e20 504 break;
2e25aa5f
PM		 505 vpap = &tvcpu->arch.vpa;
506 err = 0;
507 break;
508
509 case H_VPA_REG_DTL: /* register DTL */
510 if (len < sizeof(struct dtl_entry))
a8606e20 511 break;
2e25aa5f
PM		 512 len -= len % sizeof(struct dtl_entry);
513
514 /* Check that they have previously registered a VPA */
515 err = H_RESOURCE;
516 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 517 break;
2e25aa5f
PM		 518
519 vpap = &tvcpu->arch.dtl;
520 err = 0;
521 break;
522
523 case H_VPA_REG_SLB: /* register SLB shadow buffer */
524 /* Check that they have previously registered a VPA */
525 err = H_RESOURCE;
526 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 527 break;
2e25aa5f
PM		 528
529 vpap = &tvcpu->arch.slb_shadow;
530 err = 0;
531 break;
532
533 case H_VPA_DEREG_VPA: /* deregister VPA */
534 /* Check they don't still have a DTL or SLB buf registered */
535 err = H_RESOURCE;
536 if (vpa_is_registered(&tvcpu->arch.dtl) ||
537 vpa_is_registered(&tvcpu->arch.slb_shadow))
a8606e20 538 break;
2e25aa5f
PM		 539
540 vpap = &tvcpu->arch.vpa;
541 err = 0;
542 break;
543
544 case H_VPA_DEREG_DTL: /* deregister DTL */
545 vpap = &tvcpu->arch.dtl;
546 err = 0;
547 break;
548
549 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */
550 vpap = &tvcpu->arch.slb_shadow;
551 err = 0;
552 break;
553 }
554
555 if (vpap) {
556 vpap->next_gpa = vpa;
557 vpap->len = len;
558 vpap->update_pending = 1;
a8606e20 559 }
93e60249 560
2e25aa5f
PM		 561 spin_unlock(&tvcpu->arch.vpa_update_lock);
562
93e60249 563 return err;
a8606e20
PM		 564}
565
081f323b 566static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
2e25aa5f 567{
081f323b 568 struct kvm *kvm = vcpu->kvm;
2e25aa5f
PM		 569 void *va;
570 unsigned long nb;
081f323b 571 unsigned long gpa;
2e25aa5f 572
081f323b
PM		 573 /*
574 * We need to pin the page pointed to by vpap->next_gpa,
575 * but we can't call kvmppc_pin_guest_page under the lock
576 * as it does get_user_pages() and down_read(). So we
577 * have to drop the lock, pin the page, then get the lock
578 * again and check that a new area didn't get registered
579 * in the meantime.
580 */
581 for (;;) {
582 gpa = vpap->next_gpa;
583 spin_unlock(&vcpu->arch.vpa_update_lock);
584 va = NULL;
585 nb = 0;
586 if (gpa)
c35635ef 587 va = kvmppc_pin_guest_page(kvm, gpa, &nb);
081f323b
PM		 588 spin_lock(&vcpu->arch.vpa_update_lock);
589 if (gpa == vpap->next_gpa)
590 break;
591 /* sigh... unpin that one and try again */
592 if (va)
c35635ef 593 kvmppc_unpin_guest_page(kvm, va, gpa, false);
081f323b
PM		 594 }
595
596 vpap->update_pending = 0;
597 if (va && nb < vpap->len) {
598 /*
599 * If it's now too short, it must be that userspace
600 * has changed the mappings underlying guest memory,
601 * so unregister the region.
602 */
c35635ef 603 kvmppc_unpin_guest_page(kvm, va, gpa, false);
081f323b 604 va = NULL;
2e25aa5f
PM		 605 }
606 if (vpap->pinned_addr)
c35635ef
PM		 607 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa,
608 vpap->dirty);
609 vpap->gpa = gpa;
2e25aa5f 610 vpap->pinned_addr = va;
c35635ef 611 vpap->dirty = false;
2e25aa5f
PM		 612 if (va)
613 vpap->pinned_end = va + vpap->len;
614}
615
616static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
617{
2f12f034
PM		 618 if (!(vcpu->arch.vpa.update_pending ||
619 vcpu->arch.slb_shadow.update_pending ||
620 vcpu->arch.dtl.update_pending))
621 return;
622
2e25aa5f
PM		 623 spin_lock(&vcpu->arch.vpa_update_lock);
624 if (vcpu->arch.vpa.update_pending) {
081f323b 625 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
55b665b0
PM		 626 if (vcpu->arch.vpa.pinned_addr)
627 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
2e25aa5f
PM		 628 }
629 if (vcpu->arch.dtl.update_pending) {
081f323b 630 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
2e25aa5f
PM		 631 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
632 vcpu->arch.dtl_index = 0;
633 }
634 if (vcpu->arch.slb_shadow.update_pending)
081f323b 635 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
2e25aa5f
PM		 636 spin_unlock(&vcpu->arch.vpa_update_lock);
637}
638
c7b67670
PM		 639/*
640 * Return the accumulated stolen time for the vcore up until `now'.
641 * The caller should hold the vcore lock.
642 */
643static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
644{
645 u64 p;
2711e248 646 unsigned long flags;
c7b67670 647
2711e248
PM		 648 spin_lock_irqsave(&vc->stoltb_lock, flags);
649 p = vc->stolen_tb;
c7b67670 650 if (vc->vcore_state != VCORE_INACTIVE &&
2711e248
PM		 651 vc->preempt_tb != TB_NIL)
652 p += now - vc->preempt_tb;
653 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
c7b67670
PM		 654 return p;
655}
656
0456ec4f
PM		 657static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
658 struct kvmppc_vcore *vc)
659{
660 struct dtl_entry *dt;
661 struct lppaca *vpa;
c7b67670
PM		 662 unsigned long stolen;
663 unsigned long core_stolen;
664 u64 now;
8b24e69f 665 unsigned long flags;
0456ec4f
PM		 666
667 dt = vcpu->arch.dtl_ptr;
668 vpa = vcpu->arch.vpa.pinned_addr;
c7b67670
PM		 669 now = mftb();
670 core_stolen = vcore_stolen_time(vc, now);
671 stolen = core_stolen - vcpu->arch.stolen_logged;
672 vcpu->arch.stolen_logged = core_stolen;
8b24e69f 673 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 674 stolen += vcpu->arch.busy_stolen;
675 vcpu->arch.busy_stolen = 0;
8b24e69f 676 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
0456ec4f
PM		 677 if (!dt || !vpa)
678 return;
679 memset(dt, 0, sizeof(struct dtl_entry));
680 dt->dispatch_reason = 7;
02407552
AG		 681 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid);
682 dt->timebase = cpu_to_be64(now + vc->tb_offset);
683 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen);
684 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu));
685 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
0456ec4f
PM		 686 ++dt;
687 if (dt == vcpu->arch.dtl.pinned_end)
688 dt = vcpu->arch.dtl.pinned_addr;
689 vcpu->arch.dtl_ptr = dt;
690 /* order writing *dt vs. writing vpa->dtl_idx */
691 smp_wmb();
02407552 692 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index);
c35635ef 693 vcpu->arch.dtl.dirty = true;
0456ec4f
PM		 694}
695
1da4e2f4
PM		 696/* See if there is a doorbell interrupt pending for a vcpu */
697static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu)
698{
699 int thr;
700 struct kvmppc_vcore *vc;
701
57900694
PM		 702 if (vcpu->arch.doorbell_request)
703 return true;
704 /*
705 * Ensure that the read of vcore->dpdes comes after the read
706 * of vcpu->doorbell_request. This barrier matches the
707 * lwsync in book3s_hv_rmhandlers.S just before the
708 * fast_guest_return label.
709 */
710 smp_rmb();
1da4e2f4
PM		 711 vc = vcpu->arch.vcore;
712 thr = vcpu->vcpu_id - vc->first_vcpuid;
713 return !!(vc->dpdes & (1 << thr));
714}
715
9642382e
MN		 716static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu)
717{
718 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207)
719 return true;
720 if ((!vcpu->arch.vcore->arch_compat) &&
721 cpu_has_feature(CPU_FTR_ARCH_207S))
722 return true;
723 return false;
724}
725
726static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
727 unsigned long resource, unsigned long value1,
728 unsigned long value2)
729{
730 switch (resource) {
731 case H_SET_MODE_RESOURCE_SET_CIABR:
732 if (!kvmppc_power8_compatible(vcpu))
733 return H_P2;
734 if (value2)
735 return H_P4;
736 if (mflags)
737 return H_UNSUPPORTED_FLAG_START;
738 /* Guests can't breakpoint the hypervisor */
739 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER)
740 return H_P3;
741 vcpu->arch.ciabr = value1;
742 return H_SUCCESS;
743 case H_SET_MODE_RESOURCE_SET_DAWR:
744 if (!kvmppc_power8_compatible(vcpu))
745 return H_P2;
746 if (mflags)
747 return H_UNSUPPORTED_FLAG_START;
748 if (value2 & DABRX_HYP)
749 return H_P4;
750 vcpu->arch.dawr = value1;
751 vcpu->arch.dawrx = value2;
752 return H_SUCCESS;
753 default:
754 return H_TOO_HARD;
755 }
756}
757
90fd09f8
SB		 758static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
759{
760 struct kvmppc_vcore *vcore = target->arch.vcore;
761
762 /*
763 * We expect to have been called by the real mode handler
764 * (kvmppc_rm_h_confer()) which would have directly returned
765 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
766 * have useful work to do and should not confer) so we don't
767 * recheck that here.
768 */
769
770 spin_lock(&vcore->lock);
771 if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
ec257165
PM		 772 vcore->vcore_state != VCORE_INACTIVE &&
773 vcore->runner)
90fd09f8
SB		 774 target = vcore->runner;
775 spin_unlock(&vcore->lock);
776
777 return kvm_vcpu_yield_to(target);
778}
779
780static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
781{
782 int yield_count = 0;
783 struct lppaca *lppaca;
784
785 spin_lock(&vcpu->arch.vpa_update_lock);
786 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
787 if (lppaca)
ecb6d618 788 yield_count = be32_to_cpu(lppaca->yield_count);
90fd09f8
SB		 789 spin_unlock(&vcpu->arch.vpa_update_lock);
790 return yield_count;
791}
792
a8606e20
PM		 793int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
794{
795 unsigned long req = kvmppc_get_gpr(vcpu, 3);
796 unsigned long target, ret = H_SUCCESS;
90fd09f8 797 int yield_count;
a8606e20 798 struct kvm_vcpu *tvcpu;
8e591cb7 799 int idx, rc;
a8606e20 800
699a0ea0
PM		 801 if (req <= MAX_HCALL_OPCODE &&
802 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls))
803 return RESUME_HOST;
804
a8606e20
PM		 805 switch (req) {
806 case H_CEDE:
a8606e20
PM		 807 break;
808 case H_PROD:
809 target = kvmppc_get_gpr(vcpu, 4);
810 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
811 if (!tvcpu) {
812 ret = H_PARAMETER;
813 break;
814 }
815 tvcpu->arch.prodded = 1;
816 smp_mb();
8464c884
PM		 817 if (tvcpu->arch.ceded)
818 kvmppc_fast_vcpu_kick_hv(tvcpu);
a8606e20
PM		 819 break;
820 case H_CONFER:
42d7604d
PM		 821 target = kvmppc_get_gpr(vcpu, 4);
822 if (target == -1)
823 break;
824 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
825 if (!tvcpu) {
826 ret = H_PARAMETER;
827 break;
828 }
90fd09f8
SB		 829 yield_count = kvmppc_get_gpr(vcpu, 5);
830 if (kvmppc_get_yield_count(tvcpu) != yield_count)
831 break;
832 kvm_arch_vcpu_yield_to(tvcpu);
a8606e20
PM		 833 break;
834 case H_REGISTER_VPA:
835 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
836 kvmppc_get_gpr(vcpu, 5),
837 kvmppc_get_gpr(vcpu, 6));
838 break;
8e591cb7
ME		 839 case H_RTAS:
840 if (list_empty(&vcpu->kvm->arch.rtas_tokens))
841 return RESUME_HOST;
842
c9438092 843 idx = srcu_read_lock(&vcpu->kvm->srcu);
8e591cb7 844 rc = kvmppc_rtas_hcall(vcpu);
c9438092 845 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8e591cb7
ME		 846
847 if (rc == -ENOENT)
848 return RESUME_HOST;
849 else if (rc == 0)
850 break;
851
852 /* Send the error out to userspace via KVM_RUN */
853 return rc;
99342cf8
DG		 854 case H_LOGICAL_CI_LOAD:
855 ret = kvmppc_h_logical_ci_load(vcpu);
856 if (ret == H_TOO_HARD)
857 return RESUME_HOST;
858 break;
859 case H_LOGICAL_CI_STORE:
860 ret = kvmppc_h_logical_ci_store(vcpu);
861 if (ret == H_TOO_HARD)
862 return RESUME_HOST;
863 break;
9642382e
MN		 864 case H_SET_MODE:
865 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
866 kvmppc_get_gpr(vcpu, 5),
867 kvmppc_get_gpr(vcpu, 6),
868 kvmppc_get_gpr(vcpu, 7));
869 if (ret == H_TOO_HARD)
870 return RESUME_HOST;
871 break;
bc5ad3f3
BH		 872 case H_XIRR:
873 case H_CPPR:
874 case H_EOI:
875 case H_IPI:
8e44ddc3
PM		 876 case H_IPOLL:
877 case H_XIRR_X:
bc5ad3f3 878 if (kvmppc_xics_enabled(vcpu)) {
5af50993
BH		 879 if (xive_enabled()) {
880 ret = H_NOT_AVAILABLE;
881 return RESUME_GUEST;
882 }
bc5ad3f3
BH		 883 ret = kvmppc_xics_hcall(vcpu, req);
884 break;
d3695aa4
AK		 885 }
886 return RESUME_HOST;
887 case H_PUT_TCE:
888 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
889 kvmppc_get_gpr(vcpu, 5),
890 kvmppc_get_gpr(vcpu, 6));
891 if (ret == H_TOO_HARD)
892 return RESUME_HOST;
893 break;
894 case H_PUT_TCE_INDIRECT:
895 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4),
896 kvmppc_get_gpr(vcpu, 5),
897 kvmppc_get_gpr(vcpu, 6),
898 kvmppc_get_gpr(vcpu, 7));
899 if (ret == H_TOO_HARD)
900 return RESUME_HOST;
901 break;
902 case H_STUFF_TCE:
903 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
904 kvmppc_get_gpr(vcpu, 5),
905 kvmppc_get_gpr(vcpu, 6),
906 kvmppc_get_gpr(vcpu, 7));
907 if (ret == H_TOO_HARD)
908 return RESUME_HOST;
909 break;
a8606e20
PM		 910 default:
911 return RESUME_HOST;
912 }
913 kvmppc_set_gpr(vcpu, 3, ret);
914 vcpu->arch.hcall_needed = 0;
915 return RESUME_GUEST;
916}
917
ae2113a4
PM		 918static int kvmppc_hcall_impl_hv(unsigned long cmd)
919{
920 switch (cmd) {
921 case H_CEDE:
922 case H_PROD:
923 case H_CONFER:
924 case H_REGISTER_VPA:
9642382e 925 case H_SET_MODE:
99342cf8
DG		 926 case H_LOGICAL_CI_LOAD:
927 case H_LOGICAL_CI_STORE:
ae2113a4
PM		 928#ifdef CONFIG_KVM_XICS
929 case H_XIRR:
930 case H_CPPR:
931 case H_EOI:
932 case H_IPI:
933 case H_IPOLL:
934 case H_XIRR_X:
935#endif
936 return 1;
937 }
938
939 /* See if it's in the real-mode table */
940 return kvmppc_hcall_impl_hv_realmode(cmd);
941}
942
a59c1d9e
MS		 943static int kvmppc_emulate_debug_inst(struct kvm_run *run,
944 struct kvm_vcpu *vcpu)
945{
946 u32 last_inst;
947
948 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) !=
949 EMULATE_DONE) {
950 /*
951 * Fetch failed, so return to guest and
952 * try executing it again.
953 */
954 return RESUME_GUEST;
955 }
956
957 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
958 run->exit_reason = KVM_EXIT_DEBUG;
959 run->debug.arch.address = kvmppc_get_pc(vcpu);
960 return RESUME_HOST;
961 } else {
962 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
963 return RESUME_GUEST;
964 }
965}
966
57900694
PM		 967static void do_nothing(void *x)
968{
969}
970
971static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu)
972{
973 int thr, cpu, pcpu, nthreads;
974 struct kvm_vcpu *v;
975 unsigned long dpdes;
976
977 nthreads = vcpu->kvm->arch.emul_smt_mode;
978 dpdes = 0;
979 cpu = vcpu->vcpu_id & ~(nthreads - 1);
980 for (thr = 0; thr < nthreads; ++thr, ++cpu) {
981 v = kvmppc_find_vcpu(vcpu->kvm, cpu);
982 if (!v)
983 continue;
984 /*
985 * If the vcpu is currently running on a physical cpu thread,
986 * interrupt it in order to pull it out of the guest briefly,
987 * which will update its vcore->dpdes value.
988 */
989 pcpu = READ_ONCE(v->cpu);
990 if (pcpu >= 0)
991 smp_call_function_single(pcpu, do_nothing, NULL, 1);
992 if (kvmppc_doorbell_pending(v))
993 dpdes |= 1 << thr;
994 }
995 return dpdes;
996}
997
998/*
999 * On POWER9, emulate doorbell-related instructions in order to
1000 * give the guest the illusion of running on a multi-threaded core.
1001 * The instructions emulated are msgsndp, msgclrp, mfspr TIR,
1002 * and mfspr DPDES.
1003 */
1004static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu)
1005{
1006 u32 inst, rb, thr;
1007 unsigned long arg;
1008 struct kvm *kvm = vcpu->kvm;
1009 struct kvm_vcpu *tvcpu;
1010
57900694
PM		 1011 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE)
1012 return RESUME_GUEST;
1013 if (get_op(inst) != 31)
1014 return EMULATE_FAIL;
1015 rb = get_rb(inst);
1016 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1);
1017 switch (get_xop(inst)) {
1018 case OP_31_XOP_MSGSNDP:
1019 arg = kvmppc_get_gpr(vcpu, rb);
1020 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1021 break;
1022 arg &= 0x3f;
1023 if (arg >= kvm->arch.emul_smt_mode)
1024 break;
1025 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg);
1026 if (!tvcpu)
1027 break;
1028 if (!tvcpu->arch.doorbell_request) {
1029 tvcpu->arch.doorbell_request = 1;
1030 kvmppc_fast_vcpu_kick_hv(tvcpu);
1031 }
1032 break;
1033 case OP_31_XOP_MSGCLRP:
1034 arg = kvmppc_get_gpr(vcpu, rb);
1035 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1036 break;
1037 vcpu->arch.vcore->dpdes = 0;
1038 vcpu->arch.doorbell_request = 0;
1039 break;
1040 case OP_31_XOP_MFSPR:
1041 switch (get_sprn(inst)) {
1042 case SPRN_TIR:
1043 arg = thr;
1044 break;
1045 case SPRN_DPDES:
1046 arg = kvmppc_read_dpdes(vcpu);
1047 break;
1048 default:
1049 return EMULATE_FAIL;
1050 }
1051 kvmppc_set_gpr(vcpu, get_rt(inst), arg);
1052 break;
1053 default:
1054 return EMULATE_FAIL;
1055 }
1056 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
1057 return RESUME_GUEST;
1058}
1059
d3e4c964 1060/* Called with vcpu->arch.vcore->lock held */
3a167bea
AK		 1061static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
1062 struct task_struct *tsk)
de56a948
PM		 1063{
1064 int r = RESUME_HOST;
1065
1066 vcpu->stat.sum_exits++;
1067
1c9e3d51
PM		 1068 /*
1069 * This can happen if an interrupt occurs in the last stages
1070 * of guest entry or the first stages of guest exit (i.e. after
1071 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1072 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1073 * That can happen due to a bug, or due to a machine check
1074 * occurring at just the wrong time.
1075 */
1076 if (vcpu->arch.shregs.msr & MSR_HV) {
1077 printk(KERN_EMERG "KVM trap in HV mode!\n");
1078 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1079 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1080 vcpu->arch.shregs.msr);
1081 kvmppc_dump_regs(vcpu);
1082 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1083 run->hw.hardware_exit_reason = vcpu->arch.trap;
1084 return RESUME_HOST;
1085 }
de56a948
PM		 1086 run->exit_reason = KVM_EXIT_UNKNOWN;
1087 run->ready_for_interrupt_injection = 1;
1088 switch (vcpu->arch.trap) {
1089 /* We're good on these - the host merely wanted to get our attention */
1090 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1091 vcpu->stat.dec_exits++;
1092 r = RESUME_GUEST;
1093 break;
1094 case BOOK3S_INTERRUPT_EXTERNAL:
5d00f66b 1095 case BOOK3S_INTERRUPT_H_DOORBELL:
84f7139c 1096 case BOOK3S_INTERRUPT_H_VIRT:
de56a948
PM		 1097 vcpu->stat.ext_intr_exits++;
1098 r = RESUME_GUEST;
1099 break;
6de6638b 1100 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
dee6f24c 1101 case BOOK3S_INTERRUPT_HMI:
de56a948 1102 case BOOK3S_INTERRUPT_PERFMON:
6de6638b 1103 case BOOK3S_INTERRUPT_SYSTEM_RESET:
de56a948
PM		 1104 r = RESUME_GUEST;
1105 break;
b4072df4 1106 case BOOK3S_INTERRUPT_MACHINE_CHECK:
e20bbd3d
AP		 1107 /* Exit to guest with KVM_EXIT_NMI as exit reason */
1108 run->exit_reason = KVM_EXIT_NMI;
1109 run->hw.hardware_exit_reason = vcpu->arch.trap;
1110 /* Clear out the old NMI status from run->flags */
1111 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK;
1112 /* Now set the NMI status */
1113 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED)
1114 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV;
1115 else
1116 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV;
1117
1118 r = RESUME_HOST;
1119 /* Print the MCE event to host console. */
1120 machine_check_print_event_info(&vcpu->arch.mce_evt, false);
b4072df4 1121 break;
de56a948
PM		 1122 case BOOK3S_INTERRUPT_PROGRAM:
1123 {
1124 ulong flags;
1125 /*
1126 * Normally program interrupts are delivered directly
1127 * to the guest by the hardware, but we can get here
1128 * as a result of a hypervisor emulation interrupt
1129 * (e40) getting turned into a 700 by BML RTAS.
1130 */
1131 flags = vcpu->arch.shregs.msr & 0x1f0000ull;
1132 kvmppc_core_queue_program(vcpu, flags);
1133 r = RESUME_GUEST;
1134 break;
1135 }
1136 case BOOK3S_INTERRUPT_SYSCALL:
1137 {
1138 /* hcall - punt to userspace */
1139 int i;
1140
27025a60
LPF		 1141 /* hypercall with MSR_PR has already been handled in rmode,
1142 * and never reaches here.
1143 */
1144
de56a948
PM		 1145 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3);
1146 for (i = 0; i < 9; ++i)
1147 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i);
1148 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1149 vcpu->arch.hcall_needed = 1;
1150 r = RESUME_HOST;
1151 break;
1152 }
1153 /*
342d3db7
PM		 1154 * We get these next two if the guest accesses a page which it thinks
1155 * it has mapped but which is not actually present, either because
1156 * it is for an emulated I/O device or because the corresonding
1157 * host page has been paged out. Any other HDSI/HISI interrupts
1158 * have been handled already.
de56a948
PM		 1159 */
1160 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
913d3ff9 1161 r = RESUME_PAGE_FAULT;
de56a948
PM		 1162 break;
1163 case BOOK3S_INTERRUPT_H_INST_STORAGE:
913d3ff9
PM		 1164 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1165 vcpu->arch.fault_dsisr = 0;
1166 r = RESUME_PAGE_FAULT;
de56a948
PM		 1167 break;
1168 /*
1169 * This occurs if the guest executes an illegal instruction.
a59c1d9e
MS		 1170 * If the guest debug is disabled, generate a program interrupt
1171 * to the guest. If guest debug is enabled, we need to check
1172 * whether the instruction is a software breakpoint instruction.
1173 * Accordingly return to Guest or Host.
de56a948
PM		 1174 */
1175 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
4a157d61
PM		 1176 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
1177 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
1178 swab32(vcpu->arch.emul_inst) :
1179 vcpu->arch.emul_inst;
a59c1d9e 1180 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
d3e4c964
PM		 1181 /* Need vcore unlocked to call kvmppc_get_last_inst */
1182 spin_unlock(&vcpu->arch.vcore->lock);
a59c1d9e 1183 r = kvmppc_emulate_debug_inst(run, vcpu);
d3e4c964 1184 spin_lock(&vcpu->arch.vcore->lock);
a59c1d9e
MS		 1185 } else {
1186 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1187 r = RESUME_GUEST;
1188 }
bd3048b8
ME		 1189 break;
1190 /*
1191 * This occurs if the guest (kernel or userspace), does something that
57900694
PM		 1192 * is prohibited by HFSCR.
1193 * On POWER9, this could be a doorbell instruction that we need
1194 * to emulate.
1195 * Otherwise, we just generate a program interrupt to the guest.
bd3048b8
ME		 1196 */
1197 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:
57900694 1198 r = EMULATE_FAIL;
d3e4c964
PM		 1199 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) &&
1200 cpu_has_feature(CPU_FTR_ARCH_300)) {
1201 /* Need vcore unlocked to call kvmppc_get_last_inst */
1202 spin_unlock(&vcpu->arch.vcore->lock);
57900694 1203 r = kvmppc_emulate_doorbell_instr(vcpu);
d3e4c964
PM		 1204 spin_lock(&vcpu->arch.vcore->lock);
1205 }
57900694
PM		 1206 if (r == EMULATE_FAIL) {
1207 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1208 r = RESUME_GUEST;
1209 }
de56a948 1210 break;
f175c5ce
PM		 1211
1212#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1213 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1214 /*
1215 * This occurs for various TM-related instructions that
1216 * we need to emulate on POWER9 DD2.2. We have already
1217 * handled the cases where the guest was in real-suspend
1218 * mode and was transitioning to transactional state.
1219 */
1220 r = kvmhv_p9_tm_emulation(vcpu);
1221 break;
1222#endif
1223
f7af5209
SW		 1224 case BOOK3S_INTERRUPT_HV_RM_HARD:
1225 r = RESUME_PASSTHROUGH;
1226 break;
de56a948
PM		 1227 default:
1228 kvmppc_dump_regs(vcpu);
1229 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1230 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1231 vcpu->arch.shregs.msr);
f3271d4c 1232 run->hw.hardware_exit_reason = vcpu->arch.trap;
de56a948 1233 r = RESUME_HOST;
de56a948
PM		 1234 break;
1235 }
1236
de56a948
PM		 1237 return r;
1238}
1239
3a167bea
AK		 1240static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu,
1241 struct kvm_sregs *sregs)
de56a948
PM		 1242{
1243 int i;
1244
de56a948 1245 memset(sregs, 0, sizeof(struct kvm_sregs));
87916442 1246 sregs->pvr = vcpu->arch.pvr;
de56a948
PM		 1247 for (i = 0; i < vcpu->arch.slb_max; i++) {
1248 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige;
1249 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1250 }
1251
1252 return 0;
1253}
1254
3a167bea
AK		 1255static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu,
1256 struct kvm_sregs *sregs)
de56a948
PM		 1257{
1258 int i, j;
1259
9333e6c4
PM		 1260 /* Only accept the same PVR as the host's, since we can't spoof it */
1261 if (sregs->pvr != vcpu->arch.pvr)
1262 return -EINVAL;
de56a948
PM		 1263
1264 j = 0;
1265 for (i = 0; i < vcpu->arch.slb_nr; i++) {
1266 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) {
1267 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe;
1268 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv;
1269 ++j;
1270 }
1271 }
1272 vcpu->arch.slb_max = j;
1273
1274 return 0;
1275}
1276
a0840240
AK		 1277static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
1278 bool preserve_top32)
a0144e2a 1279{
8f902b00 1280 struct kvm *kvm = vcpu->kvm;
a0144e2a
PM		 1281 struct kvmppc_vcore *vc = vcpu->arch.vcore;
1282 u64 mask;
1283
1284 spin_lock(&vc->lock);
d682916a
AB		 1285 /*
1286 * If ILE (interrupt little-endian) has changed, update the
1287 * MSR_LE bit in the intr_msr for each vcpu in this vcore.
1288 */
1289 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
d682916a
AB		 1290 struct kvm_vcpu *vcpu;
1291 int i;
1292
d682916a
AB		 1293 kvm_for_each_vcpu(i, vcpu, kvm) {
1294 if (vcpu->arch.vcore != vc)
1295 continue;
1296 if (new_lpcr & LPCR_ILE)
1297 vcpu->arch.intr_msr |= MSR_LE;
1298 else
1299 vcpu->arch.intr_msr &= ~MSR_LE;
1300 }
d682916a
AB		 1301 }
1302
a0144e2a
PM		 1303 /*
1304 * Userspace can only modify DPFD (default prefetch depth),
1305 * ILE (interrupt little-endian) and TC (translation control).
8cf4ecc0 1306 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
a0144e2a
PM		 1307 */
1308 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
e0622bd9
PM		 1309 if (cpu_has_feature(CPU_FTR_ARCH_207S))
1310 mask |= LPCR_AIL;
1bc3fe81
PM		 1311 /*
1312 * On POWER9, allow userspace to enable large decrementer for the
1313 * guest, whether or not the host has it enabled.
1314 */
1315 if (cpu_has_feature(CPU_FTR_ARCH_300))
1316 mask |= LPCR_LD;
a0840240
AK		 1317
1318 /* Broken 32-bit version of LPCR must not clear top bits */
1319 if (preserve_top32)
1320 mask &= 0xFFFFFFFF;
a0144e2a
PM		 1321 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
1322 spin_unlock(&vc->lock);
1323}
1324
3a167bea
AK		 1325static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1326 union kvmppc_one_reg *val)
31f3438e 1327{
a136a8bd
PM		 1328 int r = 0;
1329 long int i;
31f3438e 1330
a136a8bd 1331 switch (id) {
a59c1d9e
MS		 1332 case KVM_REG_PPC_DEBUG_INST:
1333 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1334 break;
31f3438e 1335 case KVM_REG_PPC_HIOR:
a136a8bd
PM		 1336 *val = get_reg_val(id, 0);
1337 break;
1338 case KVM_REG_PPC_DABR:
1339 *val = get_reg_val(id, vcpu->arch.dabr);
1340 break;
8563bf52
PM		 1341 case KVM_REG_PPC_DABRX:
1342 *val = get_reg_val(id, vcpu->arch.dabrx);
1343 break;
a136a8bd
PM		 1344 case KVM_REG_PPC_DSCR:
1345 *val = get_reg_val(id, vcpu->arch.dscr);
1346 break;
1347 case KVM_REG_PPC_PURR:
1348 *val = get_reg_val(id, vcpu->arch.purr);
1349 break;
1350 case KVM_REG_PPC_SPURR:
1351 *val = get_reg_val(id, vcpu->arch.spurr);
1352 break;
1353 case KVM_REG_PPC_AMR:
1354 *val = get_reg_val(id, vcpu->arch.amr);
1355 break;
1356 case KVM_REG_PPC_UAMOR:
1357 *val = get_reg_val(id, vcpu->arch.uamor);
1358 break;
b005255e 1359 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM		 1360 i = id - KVM_REG_PPC_MMCR0;
1361 *val = get_reg_val(id, vcpu->arch.mmcr[i]);
1362 break;
1363 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1364 i = id - KVM_REG_PPC_PMC1;
1365 *val = get_reg_val(id, vcpu->arch.pmc[i]);
31f3438e 1366 break;
b005255e
MN		 1367 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1368 i = id - KVM_REG_PPC_SPMC1;
1369 *val = get_reg_val(id, vcpu->arch.spmc[i]);
1370 break;
14941789
PM		 1371 case KVM_REG_PPC_SIAR:
1372 *val = get_reg_val(id, vcpu->arch.siar);
1373 break;
1374 case KVM_REG_PPC_SDAR:
1375 *val = get_reg_val(id, vcpu->arch.sdar);
1376 break;
b005255e
MN		 1377 case KVM_REG_PPC_SIER:
1378 *val = get_reg_val(id, vcpu->arch.sier);
a8bd19ef 1379 break;
b005255e
MN		 1380 case KVM_REG_PPC_IAMR:
1381 *val = get_reg_val(id, vcpu->arch.iamr);
1382 break;
b005255e
MN		 1383 case KVM_REG_PPC_PSPB:
1384 *val = get_reg_val(id, vcpu->arch.pspb);
1385 break;
b005255e 1386 case KVM_REG_PPC_DPDES:
7b0a99ac
PM		 1387 /*
1388 * On POWER9, where we are emulating msgsndp etc.,
1389 * we return 1 bit for each vcpu, which can come from
1390 * either vcore->dpdes or doorbell_request.
1391 * On POWER8, doorbell_request is 0.
1392 */
1393 *val = get_reg_val(id, vcpu->arch.vcore->dpdes |
1394 vcpu->arch.doorbell_request);
b005255e 1395 break;
88b02cf9
PM		 1396 case KVM_REG_PPC_VTB:
1397 *val = get_reg_val(id, vcpu->arch.vcore->vtb);
1398 break;
b005255e
MN		 1399 case KVM_REG_PPC_DAWR:
1400 *val = get_reg_val(id, vcpu->arch.dawr);
1401 break;
1402 case KVM_REG_PPC_DAWRX:
1403 *val = get_reg_val(id, vcpu->arch.dawrx);
1404 break;
1405 case KVM_REG_PPC_CIABR:
1406 *val = get_reg_val(id, vcpu->arch.ciabr);
1407 break;
b005255e
MN		 1408 case KVM_REG_PPC_CSIGR:
1409 *val = get_reg_val(id, vcpu->arch.csigr);
1410 break;
1411 case KVM_REG_PPC_TACR:
1412 *val = get_reg_val(id, vcpu->arch.tacr);
1413 break;
1414 case KVM_REG_PPC_TCSCR:
1415 *val = get_reg_val(id, vcpu->arch.tcscr);
1416 break;
1417 case KVM_REG_PPC_PID:
1418 *val = get_reg_val(id, vcpu->arch.pid);
1419 break;
1420 case KVM_REG_PPC_ACOP:
1421 *val = get_reg_val(id, vcpu->arch.acop);
1422 break;
1423 case KVM_REG_PPC_WORT:
1424 *val = get_reg_val(id, vcpu->arch.wort);
a8bd19ef 1425 break;
e9cf1e08
PM		 1426 case KVM_REG_PPC_TIDR:
1427 *val = get_reg_val(id, vcpu->arch.tid);
1428 break;
1429 case KVM_REG_PPC_PSSCR:
1430 *val = get_reg_val(id, vcpu->arch.psscr);
1431 break;
55b665b0
PM		 1432 case KVM_REG_PPC_VPA_ADDR:
1433 spin_lock(&vcpu->arch.vpa_update_lock);
1434 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
1435 spin_unlock(&vcpu->arch.vpa_update_lock);
1436 break;
1437 case KVM_REG_PPC_VPA_SLB:
1438 spin_lock(&vcpu->arch.vpa_update_lock);
1439 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa;
1440 val->vpaval.length = vcpu->arch.slb_shadow.len;
1441 spin_unlock(&vcpu->arch.vpa_update_lock);
1442 break;
1443 case KVM_REG_PPC_VPA_DTL:
1444 spin_lock(&vcpu->arch.vpa_update_lock);
1445 val->vpaval.addr = vcpu->arch.dtl.next_gpa;
1446 val->vpaval.length = vcpu->arch.dtl.len;
1447 spin_unlock(&vcpu->arch.vpa_update_lock);
1448 break;
93b0f4dc
PM		 1449 case KVM_REG_PPC_TB_OFFSET:
1450 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset);
1451 break;
a0144e2a 1452 case KVM_REG_PPC_LPCR:
a0840240 1453 case KVM_REG_PPC_LPCR_64:
a0144e2a
PM		 1454 *val = get_reg_val(id, vcpu->arch.vcore->lpcr);
1455 break;
4b8473c9
PM		 1456 case KVM_REG_PPC_PPR:
1457 *val = get_reg_val(id, vcpu->arch.ppr);
1458 break;
a7d80d01
MN		 1459#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1460 case KVM_REG_PPC_TFHAR:
1461 *val = get_reg_val(id, vcpu->arch.tfhar);
1462 break;
1463 case KVM_REG_PPC_TFIAR:
1464 *val = get_reg_val(id, vcpu->arch.tfiar);
1465 break;
1466 case KVM_REG_PPC_TEXASR:
1467 *val = get_reg_val(id, vcpu->arch.texasr);
1468 break;
1469 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1470 i = id - KVM_REG_PPC_TM_GPR0;
1471 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]);
1472 break;
1473 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1474 {
1475 int j;
1476 i = id - KVM_REG_PPC_TM_VSR0;
1477 if (i < 32)
1478 for (j = 0; j < TS_FPRWIDTH; j++)
1479 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1480 else {
1481 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1482 val->vval = vcpu->arch.vr_tm.vr[i-32];
1483 else
1484 r = -ENXIO;
1485 }
1486 break;
1487 }
1488 case KVM_REG_PPC_TM_CR:
1489 *val = get_reg_val(id, vcpu->arch.cr_tm);
1490 break;
0d808df0
PM		 1491 case KVM_REG_PPC_TM_XER:
1492 *val = get_reg_val(id, vcpu->arch.xer_tm);
1493 break;
a7d80d01
MN		 1494 case KVM_REG_PPC_TM_LR:
1495 *val = get_reg_val(id, vcpu->arch.lr_tm);
1496 break;
1497 case KVM_REG_PPC_TM_CTR:
1498 *val = get_reg_val(id, vcpu->arch.ctr_tm);
1499 break;
1500 case KVM_REG_PPC_TM_FPSCR:
1501 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1502 break;
1503 case KVM_REG_PPC_TM_AMR:
1504 *val = get_reg_val(id, vcpu->arch.amr_tm);
1505 break;
1506 case KVM_REG_PPC_TM_PPR:
1507 *val = get_reg_val(id, vcpu->arch.ppr_tm);
1508 break;
1509 case KVM_REG_PPC_TM_VRSAVE:
1510 *val = get_reg_val(id, vcpu->arch.vrsave_tm);
1511 break;
1512 case KVM_REG_PPC_TM_VSCR:
1513 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1514 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1515 else
1516 r = -ENXIO;
1517 break;
1518 case KVM_REG_PPC_TM_DSCR:
1519 *val = get_reg_val(id, vcpu->arch.dscr_tm);
1520 break;
1521 case KVM_REG_PPC_TM_TAR:
1522 *val = get_reg_val(id, vcpu->arch.tar_tm);
1523 break;
1524#endif
388cc6e1
PM		 1525 case KVM_REG_PPC_ARCH_COMPAT:
1526 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat);
1527 break;
cc560695
PM		 1528 case KVM_REG_PPC_DEC_EXPIRY:
1529 *val = get_reg_val(id, vcpu->arch.dec_expires +
1530 vcpu->arch.vcore->tb_offset);
1531 break;
31f3438e 1532 default:
a136a8bd 1533 r = -EINVAL;
31f3438e
PM		 1534 break;
1535 }
1536
1537 return r;
1538}
1539
3a167bea
AK		 1540static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1541 union kvmppc_one_reg *val)
31f3438e 1542{
a136a8bd
PM		 1543 int r = 0;
1544 long int i;
55b665b0 1545 unsigned long addr, len;
31f3438e 1546
a136a8bd 1547 switch (id) {
31f3438e 1548 case KVM_REG_PPC_HIOR:
31f3438e 1549 /* Only allow this to be set to zero */
a136a8bd 1550 if (set_reg_val(id, *val))
31f3438e
PM		 1551 r = -EINVAL;
1552 break;
a136a8bd
PM		 1553 case KVM_REG_PPC_DABR:
1554 vcpu->arch.dabr = set_reg_val(id, *val);
1555 break;
8563bf52
PM		 1556 case KVM_REG_PPC_DABRX:
1557 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP;
1558 break;
a136a8bd
PM		 1559 case KVM_REG_PPC_DSCR:
1560 vcpu->arch.dscr = set_reg_val(id, *val);
1561 break;
1562 case KVM_REG_PPC_PURR:
1563 vcpu->arch.purr = set_reg_val(id, *val);
1564 break;
1565 case KVM_REG_PPC_SPURR:
1566 vcpu->arch.spurr = set_reg_val(id, *val);
1567 break;
1568 case KVM_REG_PPC_AMR:
1569 vcpu->arch.amr = set_reg_val(id, *val);
1570 break;
1571 case KVM_REG_PPC_UAMOR:
1572 vcpu->arch.uamor = set_reg_val(id, *val);
1573 break;
b005255e 1574 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM		 1575 i = id - KVM_REG_PPC_MMCR0;
1576 vcpu->arch.mmcr[i] = set_reg_val(id, *val);
1577 break;
1578 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1579 i = id - KVM_REG_PPC_PMC1;
1580 vcpu->arch.pmc[i] = set_reg_val(id, *val);
1581 break;
b005255e
MN		 1582 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1583 i = id - KVM_REG_PPC_SPMC1;
1584 vcpu->arch.spmc[i] = set_reg_val(id, *val);
1585 break;
14941789
PM		 1586 case KVM_REG_PPC_SIAR:
1587 vcpu->arch.siar = set_reg_val(id, *val);
1588 break;
1589 case KVM_REG_PPC_SDAR:
1590 vcpu->arch.sdar = set_reg_val(id, *val);
1591 break;
b005255e
MN		 1592 case KVM_REG_PPC_SIER:
1593 vcpu->arch.sier = set_reg_val(id, *val);
a8bd19ef 1594 break;
b005255e
MN		 1595 case KVM_REG_PPC_IAMR:
1596 vcpu->arch.iamr = set_reg_val(id, *val);
1597 break;
b005255e
MN		 1598 case KVM_REG_PPC_PSPB:
1599 vcpu->arch.pspb = set_reg_val(id, *val);
1600 break;
b005255e
MN		 1601 case KVM_REG_PPC_DPDES:
1602 vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1603 break;
88b02cf9
PM		 1604 case KVM_REG_PPC_VTB:
1605 vcpu->arch.vcore->vtb = set_reg_val(id, *val);
1606 break;
b005255e
MN		 1607 case KVM_REG_PPC_DAWR:
1608 vcpu->arch.dawr = set_reg_val(id, *val);
1609 break;
1610 case KVM_REG_PPC_DAWRX:
1611 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1612 break;
1613 case KVM_REG_PPC_CIABR:
1614 vcpu->arch.ciabr = set_reg_val(id, *val);
1615 /* Don't allow setting breakpoints in hypervisor code */
1616 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1617 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */
1618 break;
b005255e
MN		 1619 case KVM_REG_PPC_CSIGR:
1620 vcpu->arch.csigr = set_reg_val(id, *val);
1621 break;
1622 case KVM_REG_PPC_TACR:
1623 vcpu->arch.tacr = set_reg_val(id, *val);
1624 break;
1625 case KVM_REG_PPC_TCSCR:
1626 vcpu->arch.tcscr = set_reg_val(id, *val);
1627 break;
1628 case KVM_REG_PPC_PID:
1629 vcpu->arch.pid = set_reg_val(id, *val);
1630 break;
1631 case KVM_REG_PPC_ACOP:
1632 vcpu->arch.acop = set_reg_val(id, *val);
1633 break;
1634 case KVM_REG_PPC_WORT:
1635 vcpu->arch.wort = set_reg_val(id, *val);
a8bd19ef 1636 break;
e9cf1e08
PM		 1637 case KVM_REG_PPC_TIDR:
1638 vcpu->arch.tid = set_reg_val(id, *val);
1639 break;
1640 case KVM_REG_PPC_PSSCR:
1641 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS;
1642 break;
55b665b0
PM		 1643 case KVM_REG_PPC_VPA_ADDR:
1644 addr = set_reg_val(id, *val);
1645 r = -EINVAL;
1646 if (!addr && (vcpu->arch.slb_shadow.next_gpa ||
1647 vcpu->arch.dtl.next_gpa))
1648 break;
1649 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca));
1650 break;
1651 case KVM_REG_PPC_VPA_SLB:
1652 addr = val->vpaval.addr;
1653 len = val->vpaval.length;
1654 r = -EINVAL;
1655 if (addr && !vcpu->arch.vpa.next_gpa)
1656 break;
1657 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len);
1658 break;
1659 case KVM_REG_PPC_VPA_DTL:
1660 addr = val->vpaval.addr;
1661 len = val->vpaval.length;
1662 r = -EINVAL;
9f8c8c78
PM		 1663 if (addr && (len < sizeof(struct dtl_entry) ||
1664 !vcpu->arch.vpa.next_gpa))
55b665b0
PM		 1665 break;
1666 len -= len % sizeof(struct dtl_entry);
1667 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
1668 break;
93b0f4dc 1669 case KVM_REG_PPC_TB_OFFSET:
3d3efb68
PM		 1670 /*
1671 * POWER9 DD1 has an erratum where writing TBU40 causes
1672 * the timebase to lose ticks. So we don't let the
1673 * timebase offset be changed on P9 DD1. (It is
1674 * initialized to zero.)
1675 */
1676 if (cpu_has_feature(CPU_FTR_POWER9_DD1))
1677 break;
93b0f4dc
PM		 1678 /* round up to multiple of 2^24 */
1679 vcpu->arch.vcore->tb_offset =
1680 ALIGN(set_reg_val(id, *val), 1UL << 24);
1681 break;
a0144e2a 1682 case KVM_REG_PPC_LPCR:
a0840240
AK		 1683 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true);
1684 break;
1685 case KVM_REG_PPC_LPCR_64:
1686 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false);
a0144e2a 1687 break;
4b8473c9
PM		 1688 case KVM_REG_PPC_PPR:
1689 vcpu->arch.ppr = set_reg_val(id, *val);
1690 break;
a7d80d01
MN		 1691#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1692 case KVM_REG_PPC_TFHAR:
1693 vcpu->arch.tfhar = set_reg_val(id, *val);
1694 break;
1695 case KVM_REG_PPC_TFIAR:
1696 vcpu->arch.tfiar = set_reg_val(id, *val);
1697 break;
1698 case KVM_REG_PPC_TEXASR:
1699 vcpu->arch.texasr = set_reg_val(id, *val);
1700 break;
1701 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1702 i = id - KVM_REG_PPC_TM_GPR0;
1703 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val);
1704 break;
1705 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1706 {
1707 int j;
1708 i = id - KVM_REG_PPC_TM_VSR0;
1709 if (i < 32)
1710 for (j = 0; j < TS_FPRWIDTH; j++)
1711 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
1712 else
1713 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1714 vcpu->arch.vr_tm.vr[i-32] = val->vval;
1715 else
1716 r = -ENXIO;
1717 break;
1718 }
1719 case KVM_REG_PPC_TM_CR:
1720 vcpu->arch.cr_tm = set_reg_val(id, *val);
1721 break;
0d808df0
PM		 1722 case KVM_REG_PPC_TM_XER:
1723 vcpu->arch.xer_tm = set_reg_val(id, *val);
1724 break;
a7d80d01
MN		 1725 case KVM_REG_PPC_TM_LR:
1726 vcpu->arch.lr_tm = set_reg_val(id, *val);
1727 break;
1728 case KVM_REG_PPC_TM_CTR:
1729 vcpu->arch.ctr_tm = set_reg_val(id, *val);
1730 break;
1731 case KVM_REG_PPC_TM_FPSCR:
1732 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
1733 break;
1734 case KVM_REG_PPC_TM_AMR:
1735 vcpu->arch.amr_tm = set_reg_val(id, *val);
1736 break;
1737 case KVM_REG_PPC_TM_PPR:
1738 vcpu->arch.ppr_tm = set_reg_val(id, *val);
1739 break;
1740 case KVM_REG_PPC_TM_VRSAVE:
1741 vcpu->arch.vrsave_tm = set_reg_val(id, *val);
1742 break;
1743 case KVM_REG_PPC_TM_VSCR:
1744 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1745 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
1746 else
1747 r = - ENXIO;
1748 break;
1749 case KVM_REG_PPC_TM_DSCR:
1750 vcpu->arch.dscr_tm = set_reg_val(id, *val);
1751 break;
1752 case KVM_REG_PPC_TM_TAR:
1753 vcpu->arch.tar_tm = set_reg_val(id, *val);
1754 break;
1755#endif
388cc6e1
PM		 1756 case KVM_REG_PPC_ARCH_COMPAT:
1757 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val));
1758 break;
cc560695
PM		 1759 case KVM_REG_PPC_DEC_EXPIRY:
1760 vcpu->arch.dec_expires = set_reg_val(id, *val) -
1761 vcpu->arch.vcore->tb_offset;
1762 break;
31f3438e 1763 default:
a136a8bd 1764 r = -EINVAL;
31f3438e
PM		 1765 break;
1766 }
1767
1768 return r;
1769}
1770
45c940ba
PM		 1771/*
1772 * On POWER9, threads are independent and can be in different partitions.
1773 * Therefore we consider each thread to be a subcore.
1774 * There is a restriction that all threads have to be in the same
1775 * MMU mode (radix or HPT), unfortunately, but since we only support
1776 * HPT guests on a HPT host so far, that isn't an impediment yet.
1777 */
516f7898 1778static int threads_per_vcore(struct kvm *kvm)
45c940ba 1779{
516f7898 1780 if (kvm->arch.threads_indep)
45c940ba
PM		 1781 return 1;
1782 return threads_per_subcore;
1783}
1784
de9bdd1a
SS		 1785static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int core)
1786{
1787 struct kvmppc_vcore *vcore;
1788
1789 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL);
1790
1791 if (vcore == NULL)
1792 return NULL;
1793
de9bdd1a 1794 spin_lock_init(&vcore->lock);
2711e248 1795 spin_lock_init(&vcore->stoltb_lock);
8577370f 1796 init_swait_queue_head(&vcore->wq);
de9bdd1a
SS		 1797 vcore->preempt_tb = TB_NIL;
1798 vcore->lpcr = kvm->arch.lpcr;
3c313524 1799 vcore->first_vcpuid = core * kvm->arch.smt_mode;
de9bdd1a 1800 vcore->kvm = kvm;
ec257165 1801 INIT_LIST_HEAD(&vcore->preempt_list);
de9bdd1a
SS		 1802
1803 return vcore;
1804}
1805
b6c295df
PM		 1806#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
1807static struct debugfs_timings_element {
1808 const char *name;
1809 size_t offset;
1810} timings[] = {
1811 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)},
1812 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)},
1813 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)},
1814 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)},
1815 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)},
1816};
1817
4bb817ed 1818#define N_TIMINGS (ARRAY_SIZE(timings))
b6c295df
PM		 1819
1820struct debugfs_timings_state {
1821 struct kvm_vcpu *vcpu;
1822 unsigned int buflen;
1823 char buf[N_TIMINGS * 100];
1824};
1825
1826static int debugfs_timings_open(struct inode *inode, struct file *file)
1827{
1828 struct kvm_vcpu *vcpu = inode->i_private;
1829 struct debugfs_timings_state *p;
1830
1831 p = kzalloc(sizeof(*p), GFP_KERNEL);
1832 if (!p)
1833 return -ENOMEM;
1834
1835 kvm_get_kvm(vcpu->kvm);
1836 p->vcpu = vcpu;
1837 file->private_data = p;
1838
1839 return nonseekable_open(inode, file);
1840}
1841
1842static int debugfs_timings_release(struct inode *inode, struct file *file)
1843{
1844 struct debugfs_timings_state *p = file->private_data;
1845
1846 kvm_put_kvm(p->vcpu->kvm);
1847 kfree(p);
1848 return 0;
1849}
1850
1851static ssize_t debugfs_timings_read(struct file *file, char __user *buf,
1852 size_t len, loff_t *ppos)
1853{
1854 struct debugfs_timings_state *p = file->private_data;
1855 struct kvm_vcpu *vcpu = p->vcpu;
1856 char *s, *buf_end;
1857 struct kvmhv_tb_accumulator tb;
1858 u64 count;
1859 loff_t pos;
1860 ssize_t n;
1861 int i, loops;
1862 bool ok;
1863
1864 if (!p->buflen) {
1865 s = p->buf;
1866 buf_end = s + sizeof(p->buf);
1867 for (i = 0; i < N_TIMINGS; ++i) {
1868 struct kvmhv_tb_accumulator *acc;
1869
1870 acc = (struct kvmhv_tb_accumulator *)
1871 ((unsigned long)vcpu + timings[i].offset);
1872 ok = false;
1873 for (loops = 0; loops < 1000; ++loops) {
1874 count = acc->seqcount;
1875 if (!(count & 1)) {
1876 smp_rmb();
1877 tb = *acc;
1878 smp_rmb();
1879 if (count == acc->seqcount) {
1880 ok = true;
1881 break;
1882 }
1883 }
1884 udelay(1);
1885 }
1886 if (!ok)
1887 snprintf(s, buf_end - s, "%s: stuck\n",
1888 timings[i].name);
1889 else
1890 snprintf(s, buf_end - s,
1891 "%s: %llu %llu %llu %llu\n",
1892 timings[i].name, count / 2,
1893 tb_to_ns(tb.tb_total),
1894 tb_to_ns(tb.tb_min),
1895 tb_to_ns(tb.tb_max));
1896 s += strlen(s);
1897 }
1898 p->buflen = s - p->buf;
1899 }
1900
1901 pos = *ppos;
1902 if (pos >= p->buflen)
1903 return 0;
1904 if (len > p->buflen - pos)
1905 len = p->buflen - pos;
1906 n = copy_to_user(buf, p->buf + pos, len);
1907 if (n) {
1908 if (n == len)
1909 return -EFAULT;
1910 len -= n;
1911 }
1912 *ppos = pos + len;
1913 return len;
1914}
1915
1916static ssize_t debugfs_timings_write(struct file *file, const char __user *buf,
1917 size_t len, loff_t *ppos)
1918{
1919 return -EACCES;
1920}
1921
1922static const struct file_operations debugfs_timings_ops = {
1923 .owner = THIS_MODULE,
1924 .open = debugfs_timings_open,
1925 .release = debugfs_timings_release,
1926 .read = debugfs_timings_read,
1927 .write = debugfs_timings_write,
1928 .llseek = generic_file_llseek,
1929};
1930
1931/* Create a debugfs directory for the vcpu */
1932static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
1933{
1934 char buf[16];
1935 struct kvm *kvm = vcpu->kvm;
1936
1937 snprintf(buf, sizeof(buf), "vcpu%u", id);
1938 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
1939 return;
1940 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir);
1941 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir))
1942 return;
1943 vcpu->arch.debugfs_timings =
1944 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir,
1945 vcpu, &debugfs_timings_ops);
1946}
1947
1948#else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
1949static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
1950{
1951}
1952#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
1953
3a167bea
AK		 1954static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
1955 unsigned int id)
de56a948
PM		 1956{
1957 struct kvm_vcpu *vcpu;
3c313524 1958 int err;
371fefd6
PM		 1959 int core;
1960 struct kvmppc_vcore *vcore;
de56a948 1961
371fefd6 1962 err = -ENOMEM;
6b75e6bf 1963 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
de56a948
PM		 1964 if (!vcpu)
1965 goto out;
1966
1967 err = kvm_vcpu_init(vcpu, kvm, id);
1968 if (err)
1969 goto free_vcpu;
1970
1971 vcpu->arch.shared = &vcpu->arch.shregs;
5deb8e7a
AG		 1972#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
1973 /*
1974 * The shared struct is never shared on HV,
1975 * so we can always use host endianness
1976 */
1977#ifdef __BIG_ENDIAN__
1978 vcpu->arch.shared_big_endian = true;
1979#else
1980 vcpu->arch.shared_big_endian = false;
1981#endif
1982#endif
de56a948
PM		 1983 vcpu->arch.mmcr[0] = MMCR0_FC;
1984 vcpu->arch.ctrl = CTRL_RUNLATCH;
1985 /* default to host PVR, since we can't spoof it */
3a167bea 1986 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR));
2e25aa5f 1987 spin_lock_init(&vcpu->arch.vpa_update_lock);
c7b67670
PM		 1988 spin_lock_init(&vcpu->arch.tbacct_lock);
1989 vcpu->arch.busy_preempt = TB_NIL;
d682916a 1990 vcpu->arch.intr_msr = MSR_SF | MSR_ME;
de56a948 1991
769377f7
PM		 1992 /*
1993 * Set the default HFSCR for the guest from the host value.
1994 * This value is only used on POWER9.
1995 * On POWER9 DD1, TM doesn't work, so we make sure to
1996 * prevent the guest from using it.
57900694
PM		 1997 * On POWER9, we want to virtualize the doorbell facility, so we
1998 * turn off the HFSCR bit, which causes those instructions to trap.
769377f7
PM		 1999 */
2000 vcpu->arch.hfscr = mfspr(SPRN_HFSCR);
f175c5ce
PM		 2001 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
2002 vcpu->arch.hfscr |= HFSCR_TM;
2003 else if (!cpu_has_feature(CPU_FTR_TM_COMP))
769377f7 2004 vcpu->arch.hfscr &= ~HFSCR_TM;
57900694
PM		 2005 if (cpu_has_feature(CPU_FTR_ARCH_300))
2006 vcpu->arch.hfscr &= ~HFSCR_MSGP;
769377f7 2007
de56a948
PM		 2008 kvmppc_mmu_book3s_hv_init(vcpu);
2009
8455d79e 2010 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
371fefd6
PM		 2011
2012 init_waitqueue_head(&vcpu->arch.cpu_run);
2013
2014 mutex_lock(&kvm->lock);
3c313524
PM		 2015 vcore = NULL;
2016 err = -EINVAL;
2017 core = id / kvm->arch.smt_mode;
2018 if (core < KVM_MAX_VCORES) {
2019 vcore = kvm->arch.vcores[core];
2020 if (!vcore) {
2021 err = -ENOMEM;
2022 vcore = kvmppc_vcore_create(kvm, core);
2023 kvm->arch.vcores[core] = vcore;
2024 kvm->arch.online_vcores++;
2025 }
371fefd6
PM		 2026 }
2027 mutex_unlock(&kvm->lock);
2028
2029 if (!vcore)
da2bdd7e 2030 goto uninit_vcpu;
371fefd6
PM		 2031
2032 spin_lock(&vcore->lock);
2033 ++vcore->num_threads;
371fefd6
PM		 2034 spin_unlock(&vcore->lock);
2035 vcpu->arch.vcore = vcore;
e0b7ec05 2036 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid;
ec257165 2037 vcpu->arch.thread_cpu = -1;
a29ebeaf 2038 vcpu->arch.prev_cpu = -1;
371fefd6 2039
af8f38b3
AG		 2040 vcpu->arch.cpu_type = KVM_CPU_3S_64;
2041 kvmppc_sanity_check(vcpu);
2042
b6c295df
PM		 2043 debugfs_vcpu_init(vcpu, id);
2044
de56a948
PM		 2045 return vcpu;
2046
da2bdd7e
SC		 2047uninit_vcpu:
2048 kvm_vcpu_uninit(vcpu);
de56a948 2049free_vcpu:
6b75e6bf 2050 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM		 2051out:
2052 return ERR_PTR(err);
2053}
2054
3c313524
PM		 2055static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode,
2056 unsigned long flags)
2057{
2058 int err;
57900694 2059 int esmt = 0;
3c313524
PM		 2060
2061 if (flags)
2062 return -EINVAL;
2063 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode))
2064 return -EINVAL;
2065 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
2066 /*
2067 * On POWER8 (or POWER7), the threading mode is "strict",
2068 * so we pack smt_mode vcpus per vcore.
2069 */
2070 if (smt_mode > threads_per_subcore)
2071 return -EINVAL;
2072 } else {
2073 /*
2074 * On POWER9, the threading mode is "loose",
2075 * so each vcpu gets its own vcore.
2076 */
57900694 2077 esmt = smt_mode;
3c313524
PM		 2078 smt_mode = 1;
2079 }
2080 mutex_lock(&kvm->lock);
2081 err = -EBUSY;
2082 if (!kvm->arch.online_vcores) {
2083 kvm->arch.smt_mode = smt_mode;
57900694 2084 kvm->arch.emul_smt_mode = esmt;
3c313524
PM		 2085 err = 0;
2086 }
2087 mutex_unlock(&kvm->lock);
2088
2089 return err;
2090}
2091
c35635ef
PM		 2092static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa)
2093{
2094 if (vpa->pinned_addr)
2095 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa,
2096 vpa->dirty);
2097}
2098
3a167bea 2099static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu)
de56a948 2100{
2e25aa5f 2101 spin_lock(&vcpu->arch.vpa_update_lock);
c35635ef
PM		 2102 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl);
2103 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow);
2104 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa);
2e25aa5f 2105 spin_unlock(&vcpu->arch.vpa_update_lock);
de56a948 2106 kvm_vcpu_uninit(vcpu);
6b75e6bf 2107 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM		 2108}
2109
3a167bea
AK		 2110static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu)
2111{
2112 /* Indicate we want to get back into the guest */
2113 return 1;
2114}
2115
19ccb76a 2116static void kvmppc_set_timer(struct kvm_vcpu *vcpu)
371fefd6 2117{
19ccb76a 2118 unsigned long dec_nsec, now;
371fefd6 2119
19ccb76a
PM		 2120 now = get_tb();
2121 if (now > vcpu->arch.dec_expires) {
2122 /* decrementer has already gone negative */
2123 kvmppc_core_queue_dec(vcpu);
7e28e60e 2124 kvmppc_core_prepare_to_enter(vcpu);
19ccb76a 2125 return;
371fefd6 2126 }
19ccb76a
PM		 2127 dec_nsec = (vcpu->arch.dec_expires - now) * NSEC_PER_SEC
2128 / tb_ticks_per_sec;
8b0e1953 2129 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL);
19ccb76a 2130 vcpu->arch.timer_running = 1;
371fefd6
PM		 2131}
2132
19ccb76a 2133static void kvmppc_end_cede(struct kvm_vcpu *vcpu)
371fefd6 2134{
19ccb76a
PM		 2135 vcpu->arch.ceded = 0;
2136 if (vcpu->arch.timer_running) {
2137 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2138 vcpu->arch.timer_running = 0;
2139 }
371fefd6
PM		 2140}
2141
8b24e69f 2142extern int __kvmppc_vcore_entry(void);
de56a948 2143
371fefd6
PM		 2144static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,
2145 struct kvm_vcpu *vcpu)
de56a948 2146{
c7b67670
PM		 2147 u64 now;
2148
371fefd6
PM		 2149 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
2150 return;
bf3d32e1 2151 spin_lock_irq(&vcpu->arch.tbacct_lock);
c7b67670
PM		 2152 now = mftb();
2153 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
2154 vcpu->arch.stolen_logged;
2155 vcpu->arch.busy_preempt = now;
2156 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
bf3d32e1 2157 spin_unlock_irq(&vcpu->arch.tbacct_lock);
371fefd6 2158 --vc->n_runnable;
7b5f8272 2159 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL);
371fefd6
PM		 2160}
2161
f0888f70
PM		 2162static int kvmppc_grab_hwthread(int cpu)
2163{
2164 struct paca_struct *tpaca;
b754c739 2165 long timeout = 10000;
f0888f70
PM		 2166
2167 tpaca = &paca[cpu];
2168
2169 /* Ensure the thread won't go into the kernel if it wakes */
7b444c67 2170 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c 2171 tpaca->kvm_hstate.kvm_vcore = NULL;
5d5b99cd
PM		 2172 tpaca->kvm_hstate.napping = 0;
2173 smp_wmb();
2174 tpaca->kvm_hstate.hwthread_req = 1;
f0888f70
PM		 2175
2176 /*
2177 * If the thread is already executing in the kernel (e.g. handling
2178 * a stray interrupt), wait for it to get back to nap mode.
2179 * The smp_mb() is to ensure that our setting of hwthread_req
2180 * is visible before we look at hwthread_state, so if this
2181 * races with the code at system_reset_pSeries and the thread
2182 * misses our setting of hwthread_req, we are sure to see its
2183 * setting of hwthread_state, and vice versa.
2184 */
2185 smp_mb();
2186 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {
2187 if (--timeout <= 0) {
2188 pr_err("KVM: couldn't grab cpu %d\n", cpu);
2189 return -EBUSY;
2190 }
2191 udelay(1);
2192 }
2193 return 0;
2194}
2195
2196static void kvmppc_release_hwthread(int cpu)
2197{
2198 struct paca_struct *tpaca;
2199
2200 tpaca = &paca[cpu];
31a4d448 2201 tpaca->kvm_hstate.hwthread_req = 0;
f0888f70 2202 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c
PM		 2203 tpaca->kvm_hstate.kvm_vcore = NULL;
2204 tpaca->kvm_hstate.kvm_split_mode = NULL;
f0888f70
PM		 2205}
2206
a29ebeaf
PM		 2207static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu)
2208{
2209 int i;
2210
2211 cpu = cpu_first_thread_sibling(cpu);
2212 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush);
2213 /*
2214 * Make sure setting of bit in need_tlb_flush precedes
2215 * testing of cpu_in_guest bits. The matching barrier on
2216 * the other side is the first smp_mb() in kvmppc_run_core().
2217 */
2218 smp_mb();
2219 for (i = 0; i < threads_per_core; ++i)
2220 if (cpumask_test_cpu(cpu + i, &kvm->arch.cpu_in_guest))
2221 smp_call_function_single(cpu + i, do_nothing, NULL, 1);
2222}
2223
8b24e69f
PM		 2224static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu)
2225{
2226 struct kvm *kvm = vcpu->kvm;
2227
2228 /*
2229 * With radix, the guest can do TLB invalidations itself,
2230 * and it could choose to use the local form (tlbiel) if
2231 * it is invalidating a translation that has only ever been
2232 * used on one vcpu. However, that doesn't mean it has
2233 * only ever been used on one physical cpu, since vcpus
2234 * can move around between pcpus. To cope with this, when
2235 * a vcpu moves from one pcpu to another, we need to tell
2236 * any vcpus running on the same core as this vcpu previously
2237 * ran to flush the TLB. The TLB is shared between threads,
2238 * so we use a single bit in .need_tlb_flush for all 4 threads.
2239 */
2240 if (vcpu->arch.prev_cpu != pcpu) {
2241 if (vcpu->arch.prev_cpu >= 0 &&
2242 cpu_first_thread_sibling(vcpu->arch.prev_cpu) !=
2243 cpu_first_thread_sibling(pcpu))
2244 radix_flush_cpu(kvm, vcpu->arch.prev_cpu, vcpu);
2245 vcpu->arch.prev_cpu = pcpu;
2246 }
2247}
2248
b4deba5c 2249static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc)
371fefd6
PM		 2250{
2251 int cpu;
2252 struct paca_struct *tpaca;
a29ebeaf 2253 struct kvm *kvm = vc->kvm;
371fefd6 2254
b4deba5c
PM		 2255 cpu = vc->pcpu;
2256 if (vcpu) {
2257 if (vcpu->arch.timer_running) {
2258 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2259 vcpu->arch.timer_running = 0;
2260 }
2261 cpu += vcpu->arch.ptid;
898b25b2 2262 vcpu->cpu = vc->pcpu;
b4deba5c 2263 vcpu->arch.thread_cpu = cpu;
a29ebeaf 2264 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest);
19ccb76a 2265 }
371fefd6 2266 tpaca = &paca[cpu];
5d5b99cd 2267 tpaca->kvm_hstate.kvm_vcpu = vcpu;
898b25b2 2268 tpaca->kvm_hstate.ptid = cpu - vc->pcpu;
f175c5ce 2269 tpaca->kvm_hstate.fake_suspend = 0;
ec257165 2270 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */
371fefd6 2271 smp_wmb();
898b25b2 2272 tpaca->kvm_hstate.kvm_vcore = vc;
5d5b99cd 2273 if (cpu != smp_processor_id())
66feed61 2274 kvmppc_ipi_thread(cpu);
371fefd6 2275}
de56a948 2276
516f7898 2277static void kvmppc_wait_for_nap(int n_threads)
371fefd6 2278{
5d5b99cd
PM		 2279 int cpu = smp_processor_id();
2280 int i, loops;
371fefd6 2281
45c940ba
PM		 2282 if (n_threads <= 1)
2283 return;
5d5b99cd
PM		 2284 for (loops = 0; loops < 1000000; ++loops) {
2285 /*
2286 * Check if all threads are finished.
b4deba5c 2287 * We set the vcore pointer when starting a thread
5d5b99cd 2288 * and the thread clears it when finished, so we look
b4deba5c 2289 * for any threads that still have a non-NULL vcore ptr.
5d5b99cd 2290 */
45c940ba 2291 for (i = 1; i < n_threads; ++i)
b4deba5c 2292 if (paca[cpu + i].kvm_hstate.kvm_vcore)
5d5b99cd 2293 break;
45c940ba 2294 if (i == n_threads) {
5d5b99cd
PM		 2295 HMT_medium();
2296 return;
371fefd6 2297 }
5d5b99cd 2298 HMT_low();
371fefd6
PM		 2299 }
2300 HMT_medium();
45c940ba 2301 for (i = 1; i < n_threads; ++i)
b4deba5c 2302 if (paca[cpu + i].kvm_hstate.kvm_vcore)
5d5b99cd 2303 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i);
371fefd6
PM		 2304}
2305
2306/*
2307 * Check that we are on thread 0 and that any other threads in
7b444c67
PM		 2308 * this core are off-line. Then grab the threads so they can't
2309 * enter the kernel.
371fefd6
PM		 2310 */
2311static int on_primary_thread(void)
2312{
2313 int cpu = smp_processor_id();
3102f784 2314 int thr;
371fefd6 2315
3102f784
ME		 2316 /* Are we on a primary subcore? */
2317 if (cpu_thread_in_subcore(cpu))
371fefd6 2318 return 0;
3102f784
ME		 2319
2320 thr = 0;
2321 while (++thr < threads_per_subcore)
371fefd6
PM		 2322 if (cpu_online(cpu + thr))
2323 return 0;
7b444c67
PM		 2324
2325 /* Grab all hw threads so they can't go into the kernel */
3102f784 2326 for (thr = 1; thr < threads_per_subcore; ++thr) {
7b444c67
PM		 2327 if (kvmppc_grab_hwthread(cpu + thr)) {
2328 /* Couldn't grab one; let the others go */
2329 do {
2330 kvmppc_release_hwthread(cpu + thr);
2331 } while (--thr > 0);
2332 return 0;
2333 }
2334 }
371fefd6
PM		 2335 return 1;
2336}
2337
ec257165
PM		 2338/*
2339 * A list of virtual cores for each physical CPU.
2340 * These are vcores that could run but their runner VCPU tasks are
2341 * (or may be) preempted.
2342 */
2343struct preempted_vcore_list {
2344 struct list_head list;
2345 spinlock_t lock;
2346};
2347
2348static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores);
2349
2350static void init_vcore_lists(void)
2351{
2352 int cpu;
2353
2354 for_each_possible_cpu(cpu) {
2355 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu);
2356 spin_lock_init(&lp->lock);
2357 INIT_LIST_HEAD(&lp->list);
2358 }
2359}
2360
2361static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc)
2362{
2363 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2364
2365 vc->vcore_state = VCORE_PREEMPT;
2366 vc->pcpu = smp_processor_id();
516f7898 2367 if (vc->num_threads < threads_per_vcore(vc->kvm)) {
ec257165
PM		 2368 spin_lock(&lp->lock);
2369 list_add_tail(&vc->preempt_list, &lp->list);
2370 spin_unlock(&lp->lock);
2371 }
2372
2373 /* Start accumulating stolen time */
2374 kvmppc_core_start_stolen(vc);
2375}
2376
2377static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc)
2378{
402813fe 2379 struct preempted_vcore_list *lp;
ec257165
PM		 2380
2381 kvmppc_core_end_stolen(vc);
2382 if (!list_empty(&vc->preempt_list)) {
402813fe 2383 lp = &per_cpu(preempted_vcores, vc->pcpu);
ec257165
PM		 2384 spin_lock(&lp->lock);
2385 list_del_init(&vc->preempt_list);
2386 spin_unlock(&lp->lock);
2387 }
2388 vc->vcore_state = VCORE_INACTIVE;
2389}
2390
b4deba5c
PM		 2391/*
2392 * This stores information about the virtual cores currently
2393 * assigned to a physical core.
2394 */
ec257165 2395struct core_info {
b4deba5c
PM		 2396 int n_subcores;
2397 int max_subcore_threads;
ec257165 2398 int total_threads;
b4deba5c 2399 int subcore_threads[MAX_SUBCORES];
898b25b2 2400 struct kvmppc_vcore *vc[MAX_SUBCORES];
ec257165
PM		 2401};
2402
b4deba5c
PM		 2403/*
2404 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7
516f7898 2405 * respectively in 2-way micro-threading (split-core) mode on POWER8.
b4deba5c
PM		 2406 */
2407static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 };
2408
ec257165
PM		 2409static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc)
2410{
2411 memset(cip, 0, sizeof(*cip));
b4deba5c
PM		 2412 cip->n_subcores = 1;
2413 cip->max_subcore_threads = vc->num_threads;
ec257165 2414 cip->total_threads = vc->num_threads;
b4deba5c 2415 cip->subcore_threads[0] = vc->num_threads;
898b25b2 2416 cip->vc[0] = vc;
b4deba5c
PM		 2417}
2418
2419static bool subcore_config_ok(int n_subcores, int n_threads)
2420{
516f7898 2421 /*
49620ad4
PM		 2422 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way
2423 * split-core mode, with one thread per subcore.
516f7898
PM		 2424 */
2425 if (cpu_has_feature(CPU_FTR_ARCH_300))
2426 return n_subcores <= 4 && n_threads == 1;
2427
2428 /* On POWER8, can only dynamically split if unsplit to begin with */
b4deba5c
PM		 2429 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS)
2430 return false;
2431 if (n_subcores > MAX_SUBCORES)
2432 return false;
2433 if (n_subcores > 1) {
2434 if (!(dynamic_mt_modes & 2))
2435 n_subcores = 4;
2436 if (n_subcores > 2 && !(dynamic_mt_modes & 4))
2437 return false;
2438 }
2439
2440 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS;
ec257165
PM		 2441}
2442
898b25b2 2443static void init_vcore_to_run(struct kvmppc_vcore *vc)
ec257165 2444{
ec257165
PM		 2445 vc->entry_exit_map = 0;
2446 vc->in_guest = 0;
2447 vc->napping_threads = 0;
2448 vc->conferring_threads = 0;
2449}
2450
b4deba5c
PM		 2451static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip)
2452{
2453 int n_threads = vc->num_threads;
2454 int sub;
2455
2456 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2457 return false;
2458
cd96036f
PM		 2459 /* In one_vm_per_core mode, require all vcores to be from the same vm */
2460 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm)
2461 return false;
2462
49620ad4
PM		 2463 /* Some POWER9 chips require all threads to be in the same MMU mode */
2464 if (no_mixing_hpt_and_radix &&
c0101509
PM		 2465 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm))
2466 return false;
2467
b4deba5c
PM		 2468 if (n_threads < cip->max_subcore_threads)
2469 n_threads = cip->max_subcore_threads;
b009031f 2470 if (!subcore_config_ok(cip->n_subcores + 1, n_threads))
b4deba5c 2471 return false;
b009031f 2472 cip->max_subcore_threads = n_threads;
b4deba5c
PM		 2473
2474 sub = cip->n_subcores;
2475 ++cip->n_subcores;
2476 cip->total_threads += vc->num_threads;
2477 cip->subcore_threads[sub] = vc->num_threads;
898b25b2
PM		 2478 cip->vc[sub] = vc;
2479 init_vcore_to_run(vc);
2480 list_del_init(&vc->preempt_list);
b4deba5c
PM		 2481
2482 return true;
2483}
2484
b4deba5c
PM		 2485/*
2486 * Work out whether it is possible to piggyback the execution of
2487 * vcore *pvc onto the execution of the other vcores described in *cip.
2488 */
2489static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip,
2490 int target_threads)
2491{
b4deba5c
PM		 2492 if (cip->total_threads + pvc->num_threads > target_threads)
2493 return false;
b4deba5c 2494
b009031f 2495 return can_dynamic_split(pvc, cip);
b4deba5c
PM		 2496}
2497
d911f0be
PM		 2498static void prepare_threads(struct kvmppc_vcore *vc)
2499{
7b5f8272
SJS		 2500 int i;
2501 struct kvm_vcpu *vcpu;
d911f0be 2502
7b5f8272 2503 for_each_runnable_thread(i, vcpu, vc) {
d911f0be
PM		 2504 if (signal_pending(vcpu->arch.run_task))
2505 vcpu->arch.ret = -EINTR;
2506 else if (vcpu->arch.vpa.update_pending ||
2507 vcpu->arch.slb_shadow.update_pending ||
2508 vcpu->arch.dtl.update_pending)
2509 vcpu->arch.ret = RESUME_GUEST;
2510 else
2511 continue;
2512 kvmppc_remove_runnable(vc, vcpu);
2513 wake_up(&vcpu->arch.cpu_run);
2514 }
2515}
2516
ec257165
PM		 2517static void collect_piggybacks(struct core_info *cip, int target_threads)
2518{
2519 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2520 struct kvmppc_vcore *pvc, *vcnext;
2521
2522 spin_lock(&lp->lock);
2523 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) {
2524 if (!spin_trylock(&pvc->lock))
2525 continue;
2526 prepare_threads(pvc);
3a5ef4b1 2527 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) {
ec257165
PM		 2528 list_del_init(&pvc->preempt_list);
2529 if (pvc->runner == NULL) {
2530 pvc->vcore_state = VCORE_INACTIVE;
2531 kvmppc_core_end_stolen(pvc);
2532 }
2533 spin_unlock(&pvc->lock);
2534 continue;
2535 }
2536 if (!can_piggyback(pvc, cip, target_threads)) {
2537 spin_unlock(&pvc->lock);
2538 continue;
2539 }
2540 kvmppc_core_end_stolen(pvc);
2541 pvc->vcore_state = VCORE_PIGGYBACK;
2542 if (cip->total_threads >= target_threads)
2543 break;
2544 }
2545 spin_unlock(&lp->lock);
2546}
2547
3a5ef4b1 2548static bool recheck_signals_and_mmu(struct core_info *cip)
8b24e69f
PM		 2549{
2550 int sub, i;
2551 struct kvm_vcpu *vcpu;
3a5ef4b1 2552 struct kvmppc_vcore *vc;
8b24e69f 2553
3a5ef4b1
PM		 2554 for (sub = 0; sub < cip->n_subcores; ++sub) {
2555 vc = cip->vc[sub];
2556 if (!vc->kvm->arch.mmu_ready)
2557 return true;
2558 for_each_runnable_thread(i, vcpu, vc)
8b24e69f
PM		 2559 if (signal_pending(vcpu->arch.run_task))
2560 return true;
3a5ef4b1 2561 }
8b24e69f
PM		 2562 return false;
2563}
2564
ec257165 2565static void post_guest_process(struct kvmppc_vcore *vc, bool is_master)
25fedfca 2566{
7b5f8272 2567 int still_running = 0, i;
25fedfca
PM		 2568 u64 now;
2569 long ret;
7b5f8272 2570 struct kvm_vcpu *vcpu;
25fedfca 2571
ec257165 2572 spin_lock(&vc->lock);
25fedfca 2573 now = get_tb();
7b5f8272 2574 for_each_runnable_thread(i, vcpu, vc) {
25fedfca
PM		 2575 /* cancel pending dec exception if dec is positive */
2576 if (now < vcpu->arch.dec_expires &&
2577 kvmppc_core_pending_dec(vcpu))
2578 kvmppc_core_dequeue_dec(vcpu);
2579
2580 trace_kvm_guest_exit(vcpu);
2581
2582 ret = RESUME_GUEST;
2583 if (vcpu->arch.trap)
2584 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
2585 vcpu->arch.run_task);
2586
2587 vcpu->arch.ret = ret;
2588 vcpu->arch.trap = 0;
2589
ec257165
PM		 2590 if (is_kvmppc_resume_guest(vcpu->arch.ret)) {
2591 if (vcpu->arch.pending_exceptions)
2592 kvmppc_core_prepare_to_enter(vcpu);
2593 if (vcpu->arch.ceded)
25fedfca 2594 kvmppc_set_timer(vcpu);
ec257165
PM		 2595 else
2596 ++still_running;
2597 } else {
25fedfca
PM		 2598 kvmppc_remove_runnable(vc, vcpu);
2599 wake_up(&vcpu->arch.cpu_run);
2600 }
2601 }
ec257165 2602 if (!is_master) {
563a1e93 2603 if (still_running > 0) {
ec257165 2604 kvmppc_vcore_preempt(vc);
563a1e93
PM		 2605 } else if (vc->runner) {
2606 vc->vcore_state = VCORE_PREEMPT;
2607 kvmppc_core_start_stolen(vc);
2608 } else {
2609 vc->vcore_state = VCORE_INACTIVE;
2610 }
ec257165
PM		 2611 if (vc->n_runnable > 0 && vc->runner == NULL) {
2612 /* make sure there's a candidate runner awake */
7b5f8272
SJS		 2613 i = -1;
2614 vcpu = next_runnable_thread(vc, &i);
ec257165
PM		 2615 wake_up(&vcpu->arch.cpu_run);
2616 }
2617 }
2618 spin_unlock(&vc->lock);
25fedfca
PM		 2619}
2620
b8e6a87c
SW		 2621/*
2622 * Clear core from the list of active host cores as we are about to
2623 * enter the guest. Only do this if it is the primary thread of the
2624 * core (not if a subcore) that is entering the guest.
2625 */
3f7cd919 2626static inline int kvmppc_clear_host_core(unsigned int cpu)
b8e6a87c
SW		 2627{
2628 int core;
2629
2630 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2631 return 0;
b8e6a87c
SW		 2632 /*
2633 * Memory barrier can be omitted here as we will do a smp_wmb()
2634 * later in kvmppc_start_thread and we need ensure that state is
2635 * visible to other CPUs only after we enter guest.
2636 */
2637 core = cpu >> threads_shift;
2638 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0;
3f7cd919 2639 return 0;
b8e6a87c
SW		 2640}
2641
2642/*
2643 * Advertise this core as an active host core since we exited the guest
2644 * Only need to do this if it is the primary thread of the core that is
2645 * exiting.
2646 */
3f7cd919 2647static inline int kvmppc_set_host_core(unsigned int cpu)
b8e6a87c
SW		 2648{
2649 int core;
2650
2651 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2652 return 0;
b8e6a87c
SW		 2653
2654 /*
2655 * Memory barrier can be omitted here because we do a spin_unlock
2656 * immediately after this which provides the memory barrier.
2657 */
2658 core = cpu >> threads_shift;
2659 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1;
3f7cd919 2660 return 0;
b8e6a87c
SW		 2661}
2662
8b24e69f
PM		 2663static void set_irq_happened(int trap)
2664{
2665 switch (trap) {
2666 case BOOK3S_INTERRUPT_EXTERNAL:
2667 local_paca->irq_happened |= PACA_IRQ_EE;
2668 break;
2669 case BOOK3S_INTERRUPT_H_DOORBELL:
2670 local_paca->irq_happened |= PACA_IRQ_DBELL;
2671 break;
2672 case BOOK3S_INTERRUPT_HMI:
2673 local_paca->irq_happened |= PACA_IRQ_HMI;
2674 break;
6de6638b
NP		 2675 case BOOK3S_INTERRUPT_SYSTEM_RESET:
2676 replay_system_reset();
2677 break;
8b24e69f
PM		 2678 }
2679}
2680
371fefd6
PM		 2681/*
2682 * Run a set of guest threads on a physical core.
2683 * Called with vc->lock held.
2684 */
66feed61 2685static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
371fefd6 2686{
7b5f8272 2687 struct kvm_vcpu *vcpu;
d911f0be 2688 int i;
2c9097e4 2689 int srcu_idx;
ec257165 2690 struct core_info core_info;
898b25b2 2691 struct kvmppc_vcore *pvc;
b4deba5c
PM		 2692 struct kvm_split_mode split_info, *sip;
2693 int split, subcore_size, active;
2694 int sub;
2695 bool thr0_done;
2696 unsigned long cmd_bit, stat_bit;
ec257165
PM		 2697 int pcpu, thr;
2698 int target_threads;
45c940ba 2699 int controlled_threads;
8b24e69f 2700 int trap;
516f7898 2701 bool is_power8;
c0101509 2702 bool hpt_on_radix;
371fefd6 2703
d911f0be
PM		 2704 /*
2705 * Remove from the list any threads that have a signal pending
2706 * or need a VPA update done
2707 */
2708 prepare_threads(vc);
2709
2710 /* if the runner is no longer runnable, let the caller pick a new one */
2711 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE)
2712 return;
081f323b
PM		 2713
2714 /*
d911f0be 2715 * Initialize *vc.
081f323b 2716 */
898b25b2 2717 init_vcore_to_run(vc);
2711e248 2718 vc->preempt_tb = TB_NIL;
081f323b 2719
45c940ba
PM		 2720 /*
2721 * Number of threads that we will be controlling: the same as
2722 * the number of threads per subcore, except on POWER9,
2723 * where it's 1 because the threads are (mostly) independent.
2724 */
516f7898 2725 controlled_threads = threads_per_vcore(vc->kvm);
45c940ba 2726
7b444c67 2727 /*
3102f784
ME		 2728 * Make sure we are running on primary threads, and that secondary
2729 * threads are offline. Also check if the number of threads in this
2730 * guest are greater than the current system threads per guest.
c0101509 2731 * On POWER9, we need to be not in independent-threads mode if
49620ad4
PM		 2732 * this is a HPT guest on a radix host machine where the
2733 * CPU threads may not be in different MMU modes.
7b444c67 2734 */
49620ad4
PM		 2735 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() &&
2736 !kvm_is_radix(vc->kvm);
c0101509
PM		 2737 if (((controlled_threads > 1) &&
2738 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) ||
2739 (hpt_on_radix && vc->kvm->arch.threads_indep)) {
7b5f8272 2740 for_each_runnable_thread(i, vcpu, vc) {
7b444c67 2741 vcpu->arch.ret = -EBUSY;
25fedfca
PM		 2742 kvmppc_remove_runnable(vc, vcpu);
2743 wake_up(&vcpu->arch.cpu_run);
2744 }
7b444c67
PM		 2745 goto out;
2746 }
2747
ec257165
PM		 2748 /*
2749 * See if we could run any other vcores on the physical core
2750 * along with this one.
2751 */
2752 init_core_info(&core_info, vc);
2753 pcpu = smp_processor_id();
45c940ba 2754 target_threads = controlled_threads;
ec257165
PM		 2755 if (target_smt_mode && target_smt_mode < target_threads)
2756 target_threads = target_smt_mode;
2757 if (vc->num_threads < target_threads)
2758 collect_piggybacks(&core_info, target_threads);
3102f784 2759
8b24e69f
PM		 2760 /*
2761 * On radix, arrange for TLB flushing if necessary.
2762 * This has to be done before disabling interrupts since
2763 * it uses smp_call_function().
2764 */
2765 pcpu = smp_processor_id();
2766 if (kvm_is_radix(vc->kvm)) {
2767 for (sub = 0; sub < core_info.n_subcores; ++sub)
2768 for_each_runnable_thread(i, vcpu, core_info.vc[sub])
2769 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
2770 }
2771
2772 /*
2773 * Hard-disable interrupts, and check resched flag and signals.
2774 * If we need to reschedule or deliver a signal, clean up
2775 * and return without going into the guest(s).
072df813 2776 * If the mmu_ready flag has been cleared, don't go into the
38c53af8 2777 * guest because that means a HPT resize operation is in progress.
8b24e69f
PM		 2778 */
2779 local_irq_disable();
2780 hard_irq_disable();
2781 if (lazy_irq_pending() || need_resched() ||
3a5ef4b1 2782 recheck_signals_and_mmu(&core_info)) {
8b24e69f
PM		 2783 local_irq_enable();
2784 vc->vcore_state = VCORE_INACTIVE;
2785 /* Unlock all except the primary vcore */
2786 for (sub = 1; sub < core_info.n_subcores; ++sub) {
2787 pvc = core_info.vc[sub];
2788 /* Put back on to the preempted vcores list */
2789 kvmppc_vcore_preempt(pvc);
2790 spin_unlock(&pvc->lock);
2791 }
2792 for (i = 0; i < controlled_threads; ++i)
2793 kvmppc_release_hwthread(pcpu + i);
2794 return;
2795 }
2796
2797 kvmppc_clear_host_core(pcpu);
2798
b4deba5c
PM		 2799 /* Decide on micro-threading (split-core) mode */
2800 subcore_size = threads_per_subcore;
2801 cmd_bit = stat_bit = 0;
2802 split = core_info.n_subcores;
2803 sip = NULL;
516f7898
PM		 2804 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S)
2805 && !cpu_has_feature(CPU_FTR_ARCH_300);
2806
c0101509 2807 if (split > 1 || hpt_on_radix) {
b4deba5c
PM		 2808 sip = &split_info;
2809 memset(&split_info, 0, sizeof(split_info));
b4deba5c 2810 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 2811 split_info.vc[sub] = core_info.vc[sub];
516f7898
PM		 2812
2813 if (is_power8) {
2814 if (split == 2 && (dynamic_mt_modes & 2)) {
2815 cmd_bit = HID0_POWER8_1TO2LPAR;
2816 stat_bit = HID0_POWER8_2LPARMODE;
2817 } else {
2818 split = 4;
2819 cmd_bit = HID0_POWER8_1TO4LPAR;
2820 stat_bit = HID0_POWER8_4LPARMODE;
2821 }
2822 subcore_size = MAX_SMT_THREADS / split;
2823 split_info.rpr = mfspr(SPRN_RPR);
2824 split_info.pmmar = mfspr(SPRN_PMMAR);
2825 split_info.ldbar = mfspr(SPRN_LDBAR);
2826 split_info.subcore_size = subcore_size;
2827 } else {
2828 split_info.subcore_size = 1;
c0101509
PM		 2829 if (hpt_on_radix) {
2830 /* Use the split_info for LPCR/LPIDR changes */
2831 split_info.lpcr_req = vc->lpcr;
2832 split_info.lpidr_req = vc->kvm->arch.lpid;
2833 split_info.host_lpcr = vc->kvm->arch.host_lpcr;
2834 split_info.do_set = 1;
2835 }
516f7898
PM		 2836 }
2837
b4deba5c
PM		 2838 /* order writes to split_info before kvm_split_mode pointer */
2839 smp_wmb();
2840 }
c0101509
PM		 2841
2842 for (thr = 0; thr < controlled_threads; ++thr) {
2843 paca[pcpu + thr].kvm_hstate.tid = thr;
2844 paca[pcpu + thr].kvm_hstate.napping = 0;
b4deba5c 2845 paca[pcpu + thr].kvm_hstate.kvm_split_mode = sip;
c0101509 2846 }
b4deba5c 2847
516f7898 2848 /* Initiate micro-threading (split-core) on POWER8 if required */
b4deba5c
PM		 2849 if (cmd_bit) {
2850 unsigned long hid0 = mfspr(SPRN_HID0);
2851
2852 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS;
2853 mb();
2854 mtspr(SPRN_HID0, hid0);
2855 isync();
2856 for (;;) {
2857 hid0 = mfspr(SPRN_HID0);
2858 if (hid0 & stat_bit)
2859 break;
2860 cpu_relax();
ec257165 2861 }
2e25aa5f 2862 }
3102f784 2863
b4deba5c
PM		 2864 /* Start all the threads */
2865 active = 0;
2866 for (sub = 0; sub < core_info.n_subcores; ++sub) {
516f7898 2867 thr = is_power8 ? subcore_thread_map[sub] : sub;
b4deba5c
PM		 2868 thr0_done = false;
2869 active |= 1 << thr;
898b25b2
PM		 2870 pvc = core_info.vc[sub];
2871 pvc->pcpu = pcpu + thr;
2872 for_each_runnable_thread(i, vcpu, pvc) {
2873 kvmppc_start_thread(vcpu, pvc);
2874 kvmppc_create_dtl_entry(vcpu, pvc);
2875 trace_kvm_guest_enter(vcpu);
2876 if (!vcpu->arch.ptid)
2877 thr0_done = true;
2878 active |= 1 << (thr + vcpu->arch.ptid);
b4deba5c 2879 }
898b25b2
PM		 2880 /*
2881 * We need to start the first thread of each subcore
2882 * even if it doesn't have a vcpu.
2883 */
2884 if (!thr0_done)
2885 kvmppc_start_thread(NULL, pvc);
2886 thr += pvc->num_threads;
2e25aa5f 2887 }
371fefd6 2888
7f235328
GS		 2889 /*
2890 * Ensure that split_info.do_nap is set after setting
2891 * the vcore pointer in the PACA of the secondaries.
2892 */
2893 smp_mb();
7f235328 2894
b4deba5c
PM		 2895 /*
2896 * When doing micro-threading, poke the inactive threads as well.
2897 * This gets them to the nap instruction after kvm_do_nap,
2898 * which reduces the time taken to unsplit later.
c0101509
PM		 2899 * For POWER9 HPT guest on radix host, we need all the secondary
2900 * threads woken up so they can do the LPCR/LPIDR change.
b4deba5c 2901 */
c0101509 2902 if (cmd_bit || hpt_on_radix) {
516f7898 2903 split_info.do_nap = 1; /* ask secondaries to nap when done */
b4deba5c
PM		 2904 for (thr = 1; thr < threads_per_subcore; ++thr)
2905 if (!(active & (1 << thr)))
2906 kvmppc_ipi_thread(pcpu + thr);
516f7898 2907 }
e0b7ec05 2908
2f12f034 2909 vc->vcore_state = VCORE_RUNNING;
19ccb76a 2910 preempt_disable();
3c78f78a
SW		 2911
2912 trace_kvmppc_run_core(vc, 0);
2913
b4deba5c 2914 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 2915 spin_unlock(&core_info.vc[sub]->lock);
de56a948 2916
172e4bba
AK		 2917 guest_enter_irqoff();
2918
2919 srcu_idx = srcu_read_lock(&vc->kvm->srcu);
2920
8b24e69f
PM		 2921 /*
2922 * Interrupts will be enabled once we get into the guest,
2923 * so tell lockdep that we're about to enable interrupts.
2924 */
2925 trace_hardirqs_on();
de56a948 2926
8b24e69f 2927 trap = __kvmppc_vcore_entry();
de56a948 2928
172e4bba
AK		 2929 trace_hardirqs_off();
2930
ec257165
PM		 2931 srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
2932
8b24e69f
PM		 2933 set_irq_happened(trap);
2934
ec257165 2935 spin_lock(&vc->lock);
371fefd6 2936 /* prevent other vcpu threads from doing kvmppc_start_thread() now */
19ccb76a 2937 vc->vcore_state = VCORE_EXITING;
371fefd6 2938
19ccb76a 2939 /* wait for secondary threads to finish writing their state to memory */
516f7898 2940 kvmppc_wait_for_nap(controlled_threads);
b4deba5c
PM		 2941
2942 /* Return to whole-core mode if we split the core earlier */
516f7898 2943 if (cmd_bit) {
b4deba5c
PM		 2944 unsigned long hid0 = mfspr(SPRN_HID0);
2945 unsigned long loops = 0;
2946
2947 hid0 &= ~HID0_POWER8_DYNLPARDIS;
2948 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE;
2949 mb();
2950 mtspr(SPRN_HID0, hid0);
2951 isync();
2952 for (;;) {
2953 hid0 = mfspr(SPRN_HID0);
2954 if (!(hid0 & stat_bit))
2955 break;
2956 cpu_relax();
2957 ++loops;
2958 }
c0101509
PM		 2959 } else if (hpt_on_radix) {
2960 /* Wait for all threads to have seen final sync */
2961 for (thr = 1; thr < controlled_threads; ++thr) {
2962 while (paca[pcpu + thr].kvm_hstate.kvm_split_mode) {
2963 HMT_low();
2964 barrier();
2965 }
2966 HMT_medium();
2967 }
b4deba5c 2968 }
c0101509 2969 split_info.do_nap = 0;
b4deba5c 2970
8b24e69f
PM		 2971 kvmppc_set_host_core(pcpu);
2972
2973 local_irq_enable();
b3a2b0c8 2974 guest_exit();
8b24e69f 2975
b4deba5c 2976 /* Let secondaries go back to the offline loop */
45c940ba 2977 for (i = 0; i < controlled_threads; ++i) {
b4deba5c
PM		 2978 kvmppc_release_hwthread(pcpu + i);
2979 if (sip && sip->napped[i])
2980 kvmppc_ipi_thread(pcpu + i);
a29ebeaf 2981 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest);
b4deba5c
PM		 2982 }
2983
371fefd6 2984 spin_unlock(&vc->lock);
2c9097e4 2985
371fefd6
PM		 2986 /* make sure updates to secondary vcpu structs are visible now */
2987 smp_mb();
de56a948 2988
d3e4c964
PM		 2989 preempt_enable();
2990
898b25b2
PM		 2991 for (sub = 0; sub < core_info.n_subcores; ++sub) {
2992 pvc = core_info.vc[sub];
2993 post_guest_process(pvc, pvc == vc);
2994 }
de56a948 2995
913d3ff9 2996 spin_lock(&vc->lock);
de56a948
PM		 2997
2998 out:
19ccb76a 2999 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 3000 trace_kvmppc_run_core(vc, 1);
371fefd6
PM		 3001}
3002
19ccb76a
PM		 3003/*
3004 * Wait for some other vcpu thread to execute us, and
3005 * wake us up when we need to handle something in the host.
3006 */
ec257165
PM		 3007static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc,
3008 struct kvm_vcpu *vcpu, int wait_state)
371fefd6 3009{
371fefd6
PM		 3010 DEFINE_WAIT(wait);
3011
19ccb76a 3012 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state);
ec257165
PM		 3013 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3014 spin_unlock(&vc->lock);
19ccb76a 3015 schedule();
ec257165
PM		 3016 spin_lock(&vc->lock);
3017 }
19ccb76a
PM		 3018 finish_wait(&vcpu->arch.cpu_run, &wait);
3019}
3020
0cda69dd
SJS		 3021static void grow_halt_poll_ns(struct kvmppc_vcore *vc)
3022{
3023 /* 10us base */
3024 if (vc->halt_poll_ns == 0 && halt_poll_ns_grow)
3025 vc->halt_poll_ns = 10000;
3026 else
3027 vc->halt_poll_ns *= halt_poll_ns_grow;
0cda69dd
SJS		 3028}
3029
3030static void shrink_halt_poll_ns(struct kvmppc_vcore *vc)
3031{
3032 if (halt_poll_ns_shrink == 0)
3033 vc->halt_poll_ns = 0;
3034 else
3035 vc->halt_poll_ns /= halt_poll_ns_shrink;
3036}
3037
ee3308a2
PM		 3038#ifdef CONFIG_KVM_XICS
3039static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3040{
3041 if (!xive_enabled())
3042 return false;
3043 return vcpu->arch.xive_saved_state.pipr <
3044 vcpu->arch.xive_saved_state.cppr;
3045}
3046#else
3047static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3048{
3049 return false;
3050}
3051#endif /* CONFIG_KVM_XICS */
3052
1da4e2f4
PM		 3053static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu)
3054{
3055 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded ||
ee3308a2 3056 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu))
1da4e2f4
PM		 3057 return true;
3058
3059 return false;
3060}
3061
908a0935
SJS		 3062/*
3063 * Check to see if any of the runnable vcpus on the vcore have pending
0cda69dd
SJS		 3064 * exceptions or are no longer ceded
3065 */
3066static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc)
3067{
3068 struct kvm_vcpu *vcpu;
3069 int i;
3070
3071 for_each_runnable_thread(i, vcpu, vc) {
1da4e2f4 3072 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu))
0cda69dd
SJS		 3073 return 1;
3074 }
3075
3076 return 0;
3077}
3078
19ccb76a
PM		 3079/*
3080 * All the vcpus in this vcore are idle, so wait for a decrementer
3081 * or external interrupt to one of the vcpus. vc->lock is held.
3082 */
3083static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc)
3084{
2a27f514 3085 ktime_t cur, start_poll, start_wait;
0cda69dd 3086 int do_sleep = 1;
0cda69dd 3087 u64 block_ns;
8577370f 3088 DECLARE_SWAITQUEUE(wait);
1bc5d59c 3089
0cda69dd 3090 /* Poll for pending exceptions and ceded state */
2a27f514 3091 cur = start_poll = ktime_get();
0cda69dd 3092 if (vc->halt_poll_ns) {
2a27f514
SJS		 3093 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns);
3094 ++vc->runner->stat.halt_attempted_poll;
1bc5d59c 3095
0cda69dd
SJS		 3096 vc->vcore_state = VCORE_POLLING;
3097 spin_unlock(&vc->lock);
3098
3099 do {
3100 if (kvmppc_vcore_check_block(vc)) {
3101 do_sleep = 0;
3102 break;
3103 }
3104 cur = ktime_get();
3105 } while (single_task_running() && ktime_before(cur, stop));
3106
3107 spin_lock(&vc->lock);
3108 vc->vcore_state = VCORE_INACTIVE;
3109
2a27f514
SJS		 3110 if (!do_sleep) {
3111 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3112 goto out;
2a27f514 3113 }
1bc5d59c
SW		 3114 }
3115
0cda69dd
SJS		 3116 prepare_to_swait(&vc->wq, &wait, TASK_INTERRUPTIBLE);
3117
3118 if (kvmppc_vcore_check_block(vc)) {
8577370f 3119 finish_swait(&vc->wq, &wait);
0cda69dd 3120 do_sleep = 0;
2a27f514
SJS		 3121 /* If we polled, count this as a successful poll */
3122 if (vc->halt_poll_ns)
3123 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3124 goto out;
1bc5d59c
SW		 3125 }
3126
2a27f514
SJS		 3127 start_wait = ktime_get();
3128
19ccb76a 3129 vc->vcore_state = VCORE_SLEEPING;
3c78f78a 3130 trace_kvmppc_vcore_blocked(vc, 0);
19ccb76a 3131 spin_unlock(&vc->lock);
913d3ff9 3132 schedule();
8577370f 3133 finish_swait(&vc->wq, &wait);
19ccb76a
PM		 3134 spin_lock(&vc->lock);
3135 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 3136 trace_kvmppc_vcore_blocked(vc, 1);
2a27f514 3137 ++vc->runner->stat.halt_successful_wait;
0cda69dd
SJS		 3138
3139 cur = ktime_get();
3140
3141out:
2a27f514
SJS		 3142 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll);
3143
3144 /* Attribute wait time */
3145 if (do_sleep) {
3146 vc->runner->stat.halt_wait_ns +=
3147 ktime_to_ns(cur) - ktime_to_ns(start_wait);
3148 /* Attribute failed poll time */
3149 if (vc->halt_poll_ns)
3150 vc->runner->stat.halt_poll_fail_ns +=
3151 ktime_to_ns(start_wait) -
3152 ktime_to_ns(start_poll);
3153 } else {
3154 /* Attribute successful poll time */
3155 if (vc->halt_poll_ns)
3156 vc->runner->stat.halt_poll_success_ns +=
3157 ktime_to_ns(cur) -
3158 ktime_to_ns(start_poll);
3159 }
0cda69dd
SJS		 3160
3161 /* Adjust poll time */
307d93e4 3162 if (halt_poll_ns) {
0cda69dd
SJS		 3163 if (block_ns <= vc->halt_poll_ns)
3164 ;
3165 /* We slept and blocked for longer than the max halt time */
307d93e4 3166 else if (vc->halt_poll_ns && block_ns > halt_poll_ns)
0cda69dd
SJS		 3167 shrink_halt_poll_ns(vc);
3168 /* We slept and our poll time is too small */
307d93e4
SJS		 3169 else if (vc->halt_poll_ns < halt_poll_ns &&
3170 block_ns < halt_poll_ns)
0cda69dd 3171 grow_halt_poll_ns(vc);
e03f3921
SJS		 3172 if (vc->halt_poll_ns > halt_poll_ns)
3173 vc->halt_poll_ns = halt_poll_ns;
0cda69dd
SJS		 3174 } else
3175 vc->halt_poll_ns = 0;
3176
3177 trace_kvmppc_vcore_wakeup(do_sleep, block_ns);
19ccb76a 3178}
371fefd6 3179
432953b4
PM		 3180static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu)
3181{
3182 int r = 0;
3183 struct kvm *kvm = vcpu->kvm;
3184
3185 mutex_lock(&kvm->lock);
3186 if (!kvm->arch.mmu_ready) {
3187 if (!kvm_is_radix(kvm))
3188 r = kvmppc_hv_setup_htab_rma(vcpu);
3189 if (!r) {
3190 if (cpu_has_feature(CPU_FTR_ARCH_300))
3191 kvmppc_setup_partition_table(kvm);
3192 kvm->arch.mmu_ready = 1;
3193 }
3194 }
3195 mutex_unlock(&kvm->lock);
3196 return r;
3197}
3198
19ccb76a
PM		 3199static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
3200{
38c53af8 3201 int n_ceded, i, r;
19ccb76a 3202 struct kvmppc_vcore *vc;
7b5f8272 3203 struct kvm_vcpu *v;
9e368f29 3204
3c78f78a
SW		 3205 trace_kvmppc_run_vcpu_enter(vcpu);
3206
371fefd6
PM		 3207 kvm_run->exit_reason = 0;
3208 vcpu->arch.ret = RESUME_GUEST;
3209 vcpu->arch.trap = 0;
2f12f034 3210 kvmppc_update_vpas(vcpu);
371fefd6 3211
371fefd6
PM		 3212 /*
3213 * Synchronize with other threads in this virtual core
3214 */
3215 vc = vcpu->arch.vcore;
3216 spin_lock(&vc->lock);
19ccb76a 3217 vcpu->arch.ceded = 0;
371fefd6
PM		 3218 vcpu->arch.run_task = current;
3219 vcpu->arch.kvm_run = kvm_run;
c7b67670 3220 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
19ccb76a 3221 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
c7b67670 3222 vcpu->arch.busy_preempt = TB_NIL;
7b5f8272 3223 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu);
371fefd6
PM		 3224 ++vc->n_runnable;
3225
19ccb76a
PM		 3226 /*
3227 * This happens the first time this is called for a vcpu.
3228 * If the vcore is already running, we may be able to start
3229 * this thread straight away and have it join in.
3230 */
8455d79e 3231 if (!signal_pending(current)) {
ec257165 3232 if (vc->vcore_state == VCORE_PIGGYBACK) {
898b25b2
PM		 3233 if (spin_trylock(&vc->lock)) {
3234 if (vc->vcore_state == VCORE_RUNNING &&
3235 !VCORE_IS_EXITING(vc)) {
ec257165 3236 kvmppc_create_dtl_entry(vcpu, vc);
b4deba5c 3237 kvmppc_start_thread(vcpu, vc);
ec257165
PM		 3238 trace_kvm_guest_enter(vcpu);
3239 }
898b25b2 3240 spin_unlock(&vc->lock);
ec257165
PM		 3241 }
3242 } else if (vc->vcore_state == VCORE_RUNNING &&
3243 !VCORE_IS_EXITING(vc)) {
2f12f034 3244 kvmppc_create_dtl_entry(vcpu, vc);
b4deba5c 3245 kvmppc_start_thread(vcpu, vc);
3c78f78a 3246 trace_kvm_guest_enter(vcpu);
8455d79e 3247 } else if (vc->vcore_state == VCORE_SLEEPING) {
8577370f 3248 swake_up(&vc->wq);
371fefd6
PM		 3249 }
3250
8455d79e 3251 }
371fefd6 3252
19ccb76a
PM		 3253 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3254 !signal_pending(current)) {
072df813
PM		 3255 /* See if the MMU is ready to go */
3256 if (!vcpu->kvm->arch.mmu_ready) {
38c53af8 3257 spin_unlock(&vc->lock);
432953b4 3258 r = kvmhv_setup_mmu(vcpu);
38c53af8
PM		 3259 spin_lock(&vc->lock);
3260 if (r) {
3261 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
432953b4
PM		 3262 kvm_run->fail_entry.
3263 hardware_entry_failure_reason = 0;
38c53af8
PM		 3264 vcpu->arch.ret = r;
3265 break;
3266 }
3267 }
3268
ec257165
PM		 3269 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3270 kvmppc_vcore_end_preempt(vc);
3271
8455d79e 3272 if (vc->vcore_state != VCORE_INACTIVE) {
ec257165 3273 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE);
19ccb76a
PM		 3274 continue;
3275 }
7b5f8272 3276 for_each_runnable_thread(i, v, vc) {
7e28e60e 3277 kvmppc_core_prepare_to_enter(v);
19ccb76a
PM		 3278 if (signal_pending(v->arch.run_task)) {
3279 kvmppc_remove_runnable(vc, v);
3280 v->stat.signal_exits++;
3281 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR;
3282 v->arch.ret = -EINTR;
3283 wake_up(&v->arch.cpu_run);
3284 }
3285 }
8455d79e
PM		 3286 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
3287 break;
8455d79e 3288 n_ceded = 0;
7b5f8272 3289 for_each_runnable_thread(i, v, vc) {
1da4e2f4 3290 if (!kvmppc_vcpu_woken(v))
8455d79e 3291 n_ceded += v->arch.ceded;
4619ac88
PM		 3292 else
3293 v->arch.ceded = 0;
3294 }
25fedfca
PM		 3295 vc->runner = vcpu;
3296 if (n_ceded == vc->n_runnable) {
8455d79e 3297 kvmppc_vcore_blocked(vc);
c56dadf3 3298 } else if (need_resched()) {
ec257165 3299 kvmppc_vcore_preempt(vc);
25fedfca
PM		 3300 /* Let something else run */
3301 cond_resched_lock(&vc->lock);
ec257165
PM		 3302 if (vc->vcore_state == VCORE_PREEMPT)
3303 kvmppc_vcore_end_preempt(vc);
25fedfca 3304 } else {
8455d79e 3305 kvmppc_run_core(vc);
25fedfca 3306 }
0456ec4f 3307 vc->runner = NULL;
19ccb76a 3308 }
371fefd6 3309
8455d79e
PM		 3310 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3311 (vc->vcore_state == VCORE_RUNNING ||
5fc3e64f
PM		 3312 vc->vcore_state == VCORE_EXITING ||
3313 vc->vcore_state == VCORE_PIGGYBACK))
ec257165 3314 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE);
8455d79e 3315
5fc3e64f
PM		 3316 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3317 kvmppc_vcore_end_preempt(vc);
3318
8455d79e
PM		 3319 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3320 kvmppc_remove_runnable(vc, vcpu);
3321 vcpu->stat.signal_exits++;
3322 kvm_run->exit_reason = KVM_EXIT_INTR;
3323 vcpu->arch.ret = -EINTR;
3324 }
3325
3326 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) {
3327 /* Wake up some vcpu to run the core */
7b5f8272
SJS		 3328 i = -1;
3329 v = next_runnable_thread(vc, &i);
8455d79e 3330 wake_up(&v->arch.cpu_run);
371fefd6
PM		 3331 }
3332
3c78f78a 3333 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
371fefd6 3334 spin_unlock(&vc->lock);
371fefd6 3335 return vcpu->arch.ret;
de56a948
PM		 3336}
3337
3a167bea 3338static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
a8606e20
PM		 3339{
3340 int r;
913d3ff9 3341 int srcu_idx;
ca8efa1d 3342 unsigned long ebb_regs[3] = {}; /* shut up GCC */
4c3bb4cc
PM		 3343 unsigned long user_tar = 0;
3344 unsigned int user_vrsave;
1b151ce4 3345 struct kvm *kvm;
a8606e20 3346
af8f38b3
AG		 3347 if (!vcpu->arch.sane) {
3348 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3349 return -EINVAL;
3350 }
3351
46a704f8
PM		 3352 /*
3353 * Don't allow entry with a suspended transaction, because
3354 * the guest entry/exit code will lose it.
3355 * If the guest has TM enabled, save away their TM-related SPRs
3356 * (they will get restored by the TM unavailable interrupt).
3357 */
3358#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
3359 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
3360 (current->thread.regs->msr & MSR_TM)) {
3361 if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
3362 run->exit_reason = KVM_EXIT_FAIL_ENTRY;
3363 run->fail_entry.hardware_entry_failure_reason = 0;
3364 return -EINVAL;
3365 }
e4705715
PM		 3366 /* Enable TM so we can read the TM SPRs */
3367 mtmsr(mfmsr() | MSR_TM);
46a704f8
PM		 3368 current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
3369 current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
3370 current->thread.tm_texasr = mfspr(SPRN_TEXASR);
3371 current->thread.regs->msr &= ~MSR_TM;
3372 }
3373#endif
3374
25051b5a
SW		 3375 kvmppc_core_prepare_to_enter(vcpu);
3376
19ccb76a
PM		 3377 /* No need to go into the guest when all we'll do is come back out */
3378 if (signal_pending(current)) {
3379 run->exit_reason = KVM_EXIT_INTR;
3380 return -EINTR;
3381 }
3382
1b151ce4
PM		 3383 kvm = vcpu->kvm;
3384 atomic_inc(&kvm->arch.vcpus_running);
3385 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */
32fad281
PM		 3386 smp_mb();
3387
579e633e
AB		 3388 flush_all_to_thread(current);
3389
4c3bb4cc 3390 /* Save userspace EBB and other register values */
ca8efa1d
PM		 3391 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
3392 ebb_regs[0] = mfspr(SPRN_EBBHR);
3393 ebb_regs[1] = mfspr(SPRN_EBBRR);
3394 ebb_regs[2] = mfspr(SPRN_BESCR);
4c3bb4cc 3395 user_tar = mfspr(SPRN_TAR);
ca8efa1d 3396 }
4c3bb4cc 3397 user_vrsave = mfspr(SPRN_VRSAVE);
ca8efa1d 3398
19ccb76a 3399 vcpu->arch.wqp = &vcpu->arch.vcore->wq;
342d3db7 3400 vcpu->arch.pgdir = current->mm->pgd;
c7b67670 3401 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
19ccb76a 3402
a8606e20
PM		 3403 do {
3404 r = kvmppc_run_vcpu(run, vcpu);
3405
3406 if (run->exit_reason == KVM_EXIT_PAPR_HCALL &&
3407 !(vcpu->arch.shregs.msr & MSR_PR)) {
3c78f78a 3408 trace_kvm_hcall_enter(vcpu);
a8606e20 3409 r = kvmppc_pseries_do_hcall(vcpu);
3c78f78a 3410 trace_kvm_hcall_exit(vcpu, r);
7e28e60e 3411 kvmppc_core_prepare_to_enter(vcpu);
913d3ff9 3412 } else if (r == RESUME_PAGE_FAULT) {
432953b4 3413 srcu_idx = srcu_read_lock(&kvm->srcu);
913d3ff9
PM		 3414 r = kvmppc_book3s_hv_page_fault(run, vcpu,
3415 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
432953b4 3416 srcu_read_unlock(&kvm->srcu, srcu_idx);
5af50993
BH		 3417 } else if (r == RESUME_PASSTHROUGH) {
3418 if (WARN_ON(xive_enabled()))
3419 r = H_SUCCESS;
3420 else
3421 r = kvmppc_xics_rm_complete(vcpu, 0);
3422 }
e59d24e6 3423 } while (is_kvmppc_resume_guest(r));
32fad281 3424
4c3bb4cc 3425 /* Restore userspace EBB and other register values */
ca8efa1d
PM		 3426 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
3427 mtspr(SPRN_EBBHR, ebb_regs[0]);
3428 mtspr(SPRN_EBBRR, ebb_regs[1]);
3429 mtspr(SPRN_BESCR, ebb_regs[2]);
4c3bb4cc
PM		 3430 mtspr(SPRN_TAR, user_tar);
3431 mtspr(SPRN_FSCR, current->thread.fscr);
ca8efa1d 3432 }
4c3bb4cc 3433 mtspr(SPRN_VRSAVE, user_vrsave);
ca8efa1d 3434
c7b67670 3435 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
432953b4 3436 atomic_dec(&kvm->arch.vcpus_running);
a8606e20
PM		 3437 return r;
3438}
3439
5b74716e 3440static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,
8dc6cca5 3441 int shift, int sllp)
5b74716e 3442{
8dc6cca5
PM		 3443 (*sps)->page_shift = shift;
3444 (*sps)->slb_enc = sllp;
3445 (*sps)->enc[0].page_shift = shift;
3446 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift);
1f365bb0 3447 /*
8dc6cca5 3448 * Add 16MB MPSS support (may get filtered out by userspace)
1f365bb0 3449 */
8dc6cca5
PM		 3450 if (shift != 24) {
3451 int penc = kvmppc_pgsize_lp_encoding(shift, 24);
3452 if (penc != -1) {
3453 (*sps)->enc[1].page_shift = 24;
3454 (*sps)->enc[1].pte_enc = penc;
3455 }
1f365bb0 3456 }
5b74716e
BH		 3457 (*sps)++;
3458}
3459
3a167bea
AK		 3460static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm,
3461 struct kvm_ppc_smmu_info *info)
5b74716e
BH		 3462{
3463 struct kvm_ppc_one_seg_page_size *sps;
3464
e3bfed1d
PM		 3465 /*
3466 * POWER7, POWER8 and POWER9 all support 32 storage keys for data.
3467 * POWER7 doesn't support keys for instruction accesses,
3468 * POWER8 and POWER9 do.
3469 */
3470 info->data_keys = 32;
3471 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0;
3472
8dc6cca5
PM		 3473 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */
3474 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS;
3475 info->slb_size = 32;
5b74716e
BH		 3476
3477 /* We only support these sizes for now, and no muti-size segments */
3478 sps = &info->sps[0];
8dc6cca5
PM		 3479 kvmppc_add_seg_page_size(&sps, 12, 0);
3480 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01);
3481 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L);
5b74716e
BH		 3482
3483 return 0;
3484}
3485
82ed3616
PM		 3486/*
3487 * Get (and clear) the dirty memory log for a memory slot.
3488 */
3a167bea
AK		 3489static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,
3490 struct kvm_dirty_log *log)
82ed3616 3491{
9f6b8029 3492 struct kvm_memslots *slots;
82ed3616 3493 struct kvm_memory_slot *memslot;
8f7b79b8 3494 int i, r;
82ed3616 3495 unsigned long n;
e641a317 3496 unsigned long *buf, *p;
8f7b79b8 3497 struct kvm_vcpu *vcpu;
82ed3616
PM		 3498
3499 mutex_lock(&kvm->slots_lock);
3500
3501 r = -EINVAL;
bbacc0c1 3502 if (log->slot >= KVM_USER_MEM_SLOTS)
82ed3616
PM		 3503 goto out;
3504
9f6b8029
PB		 3505 slots = kvm_memslots(kvm);
3506 memslot = id_to_memslot(slots, log->slot);
82ed3616
PM		 3507 r = -ENOENT;
3508 if (!memslot->dirty_bitmap)
3509 goto out;
3510
8f7b79b8 3511 /*
e641a317
PM		 3512 * Use second half of bitmap area because both HPT and radix
3513 * accumulate bits in the first half.
8f7b79b8 3514 */
82ed3616 3515 n = kvm_dirty_bitmap_bytes(memslot);
8f7b79b8
PM		 3516 buf = memslot->dirty_bitmap + n / sizeof(long);
3517 memset(buf, 0, n);
82ed3616 3518
8f7b79b8
PM		 3519 if (kvm_is_radix(kvm))
3520 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf);
3521 else
3522 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf);
82ed3616
PM		 3523 if (r)
3524 goto out;
3525
e641a317
PM		 3526 /*
3527 * We accumulate dirty bits in the first half of the
3528 * memslot's dirty_bitmap area, for when pages are paged
3529 * out or modified by the host directly. Pick up these
3530 * bits and add them to the map.
3531 */
3532 p = memslot->dirty_bitmap;
3533 for (i = 0; i < n / sizeof(long); ++i)
3534 buf[i] |= xchg(&p[i], 0);
3535
8f7b79b8
PM		 3536 /* Harvest dirty bits from VPA and DTL updates */
3537 /* Note: we never modify the SLB shadow buffer areas */
3538 kvm_for_each_vcpu(i, vcpu, kvm) {
3539 spin_lock(&vcpu->arch.vpa_update_lock);
3540 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf);
3541 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf);
3542 spin_unlock(&vcpu->arch.vpa_update_lock);
3543 }
3544
82ed3616 3545 r = -EFAULT;
8f7b79b8 3546 if (copy_to_user(log->dirty_bitmap, buf, n))
82ed3616
PM		 3547 goto out;
3548
3549 r = 0;
3550out:
3551 mutex_unlock(&kvm->slots_lock);
3552 return r;
3553}
3554
3a167bea
AK		 3555static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
3556 struct kvm_memory_slot *dont)
a66b48c3
PM		 3557{
3558 if (!dont || free->arch.rmap != dont->arch.rmap) {
3559 vfree(free->arch.rmap);
3560 free->arch.rmap = NULL;
b2b2f165 3561 }
a66b48c3
PM		 3562}
3563
3a167bea
AK		 3564static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
3565 unsigned long npages)
a66b48c3
PM		 3566{
3567 slot->arch.rmap = vzalloc(npages * sizeof(*slot->arch.rmap));
3568 if (!slot->arch.rmap)
3569 return -ENOMEM;
aa04b4cc 3570
c77162de
PM		 3571 return 0;
3572}
aa04b4cc 3573
3a167bea
AK		 3574static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,
3575 struct kvm_memory_slot *memslot,
09170a49 3576 const struct kvm_userspace_memory_region *mem)
c77162de 3577{
a66b48c3 3578 return 0;
c77162de
PM		 3579}
3580
3a167bea 3581static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,
09170a49 3582 const struct kvm_userspace_memory_region *mem,
f36f3f28
PB		 3583 const struct kvm_memory_slot *old,
3584 const struct kvm_memory_slot *new)
c77162de 3585{
dfe49dbd 3586 unsigned long npages = mem->memory_size >> PAGE_SHIFT;
dfe49dbd 3587
a56ee9f8
YX		 3588 /*
3589 * If we are making a new memslot, it might make
3590 * some address that was previously cached as emulated
3591 * MMIO be no longer emulated MMIO, so invalidate
3592 * all the caches of emulated MMIO translations.
3593 */
3594 if (npages)
3595 atomic64_inc(&kvm->arch.mmio_update);
c77162de
PM		 3596}
3597
a0144e2a
PM		 3598/*
3599 * Update LPCR values in kvm->arch and in vcores.
3600 * Caller must hold kvm->lock.
3601 */
3602void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask)
3603{
3604 long int i;
3605 u32 cores_done = 0;
3606
3607 if ((kvm->arch.lpcr & mask) == lpcr)
3608 return;
3609
3610 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr;
3611
3612 for (i = 0; i < KVM_MAX_VCORES; ++i) {
3613 struct kvmppc_vcore *vc = kvm->arch.vcores[i];
3614 if (!vc)
3615 continue;
3616 spin_lock(&vc->lock);
3617 vc->lpcr = (vc->lpcr & ~mask) | lpcr;
3618 spin_unlock(&vc->lock);
3619 if (++cores_done >= kvm->arch.online_vcores)
3620 break;
3621 }
3622}
3623
3a167bea
AK		 3624static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu)
3625{
3626 return;
3627}
3628
ded13fc1 3629void kvmppc_setup_partition_table(struct kvm *kvm)
7a84084c
PM		 3630{
3631 unsigned long dw0, dw1;
3632
8cf4ecc0
PM		 3633 if (!kvm_is_radix(kvm)) {
3634 /* PS field - page size for VRMA */
3635 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) |
3636 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1);
3637 /* HTABSIZE and HTABORG fields */
3638 dw0 |= kvm->arch.sdr1;
7a84084c 3639
8cf4ecc0
PM		 3640 /* Second dword as set by userspace */
3641 dw1 = kvm->arch.process_table;
3642 } else {
3643 dw0 = PATB_HR | radix__get_tree_size() |
3644 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE;
3645 dw1 = PATB_GR | kvm->arch.process_table;
3646 }
7a84084c
PM		 3647
3648 mmu_partition_table_set_entry(kvm->arch.lpid, dw0, dw1);
3649}
3650
1b151ce4
PM		 3651/*
3652 * Set up HPT (hashed page table) and RMA (real-mode area).
3653 * Must be called with kvm->lock held.
3654 */
32fad281 3655static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
c77162de
PM		 3656{
3657 int err = 0;
3658 struct kvm *kvm = vcpu->kvm;
c77162de
PM		 3659 unsigned long hva;
3660 struct kvm_memory_slot *memslot;
3661 struct vm_area_struct *vma;
a0144e2a 3662 unsigned long lpcr = 0, senc;
c77162de 3663 unsigned long psize, porder;
2c9097e4 3664 int srcu_idx;
c77162de 3665
32fad281 3666 /* Allocate hashed page table (if not done already) and reset it */
3f9d4f5a 3667 if (!kvm->arch.hpt.virt) {
aae0777f
DG		 3668 int order = KVM_DEFAULT_HPT_ORDER;
3669 struct kvm_hpt_info info;
3670
3671 err = kvmppc_allocate_hpt(&info, order);
3672 /* If we get here, it means userspace didn't specify a
3673 * size explicitly. So, try successively smaller
3674 * sizes if the default failed. */
3675 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER)
3676 err = kvmppc_allocate_hpt(&info, order);
3677
3678 if (err < 0) {
32fad281
PM		 3679 pr_err("KVM: Couldn't alloc HPT\n");
3680 goto out;
3681 }
aae0777f
DG		 3682
3683 kvmppc_set_hpt(kvm, &info);
32fad281
PM		 3684 }
3685
c77162de 3686 /* Look up the memslot for guest physical address 0 */
2c9097e4 3687 srcu_idx = srcu_read_lock(&kvm->srcu);
c77162de 3688 memslot = gfn_to_memslot(kvm, 0);
aa04b4cc 3689
c77162de
PM		 3690 /* We must have some memory at 0 by now */
3691 err = -EINVAL;
3692 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
2c9097e4 3693 goto out_srcu;
c77162de
PM		 3694
3695 /* Look up the VMA for the start of this memory slot */
3696 hva = memslot->userspace_addr;
3697 down_read(&current->mm->mmap_sem);
3698 vma = find_vma(current->mm, hva);
3699 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO))
3700 goto up_out;
3701
3702 psize = vma_kernel_pagesize(vma);
c77162de 3703
c77162de
PM		 3704 up_read(&current->mm->mmap_sem);
3705
c17b98cf 3706 /* We can handle 4k, 64k or 16M pages in the VRMA */
f2d9dbf8
PM		 3707 if (psize >= 0x1000000)
3708 psize = 0x1000000;
3709 else if (psize >= 0x10000)
3710 psize = 0x10000;
3711 else
3712 psize = 0x1000;
3713 porder = __ilog2(psize);
c77162de 3714
c17b98cf
PM		 3715 senc = slb_pgsize_encoding(psize);
3716 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
3717 (VRMA_VSID << SLB_VSID_SHIFT_1T);
c17b98cf
PM		 3718 /* Create HPTEs in the hash page table for the VRMA */
3719 kvmppc_map_vrma(vcpu, memslot, porder);
aa04b4cc 3720
7a84084c
PM		 3721 /* Update VRMASD field in the LPCR */
3722 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
3723 /* the -4 is to account for senc values starting at 0x10 */
3724 lpcr = senc << (LPCR_VRMASD_SH - 4);
3725 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
7a84084c 3726 }
a0144e2a 3727
1b151ce4 3728 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */
c77162de 3729 smp_wmb();
c77162de 3730 err = 0;
2c9097e4
PM		 3731 out_srcu:
3732 srcu_read_unlock(&kvm->srcu, srcu_idx);
c77162de 3733 out:
c77162de 3734 return err;
b2b2f165 3735
c77162de
PM		 3736 up_out:
3737 up_read(&current->mm->mmap_sem);
505d6421 3738 goto out_srcu;
de56a948
PM		 3739}
3740
18c3640c
PM		 3741/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
3742int kvmppc_switch_mmu_to_hpt(struct kvm *kvm)
3743{
a8a55175
PM		 3744 kvmppc_rmap_reset(kvm);
3745 kvm->arch.process_table = 0;
3746 /* Mutual exclusion with kvm_unmap_hva_range etc. */
3747 spin_lock(&kvm->mmu_lock);
3748 kvm->arch.radix = 0;
3749 spin_unlock(&kvm->mmu_lock);
18c3640c
PM		 3750 kvmppc_free_radix(kvm);
3751 kvmppc_update_lpcr(kvm, LPCR_VPM1,
3752 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
18c3640c
PM		 3753 return 0;
3754}
3755
3756/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
3757int kvmppc_switch_mmu_to_radix(struct kvm *kvm)
3758{
3759 int err;
3760
3761 err = kvmppc_init_vm_radix(kvm);
3762 if (err)
3763 return err;
3764
a8a55175
PM		 3765 kvmppc_rmap_reset(kvm);
3766 /* Mutual exclusion with kvm_unmap_hva_range etc. */
3767 spin_lock(&kvm->mmu_lock);
3768 kvm->arch.radix = 1;
3769 spin_unlock(&kvm->mmu_lock);
18c3640c
PM		 3770 kvmppc_free_hpt(&kvm->arch.hpt);
3771 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR,
3772 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
18c3640c
PM		 3773 return 0;
3774}
3775
79b6c247
SW		 3776#ifdef CONFIG_KVM_XICS
3777/*
3778 * Allocate a per-core structure for managing state about which cores are
3779 * running in the host versus the guest and for exchanging data between
3780 * real mode KVM and CPU running in the host.
3781 * This is only done for the first VM.
3782 * The allocated structure stays even if all VMs have stopped.
3783 * It is only freed when the kvm-hv module is unloaded.
3784 * It's OK for this routine to fail, we just don't support host
3785 * core operations like redirecting H_IPI wakeups.
3786 */
3787void kvmppc_alloc_host_rm_ops(void)
3788{
3789 struct kvmppc_host_rm_ops *ops;
3790 unsigned long l_ops;
3791 int cpu, core;
3792 int size;
3793
3794 /* Not the first time here ? */
3795 if (kvmppc_host_rm_ops_hv != NULL)
3796 return;
3797
3798 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL);
3799 if (!ops)
3800 return;
3801
3802 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core);
3803 ops->rm_core = kzalloc(size, GFP_KERNEL);
3804
3805 if (!ops->rm_core) {
3806 kfree(ops);
3807 return;
3808 }
3809
419af25f 3810 cpus_read_lock();
6f3bb809 3811
79b6c247
SW		 3812 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) {
3813 if (!cpu_online(cpu))
3814 continue;
3815
3816 core = cpu >> threads_shift;
3817 ops->rm_core[core].rm_state.in_host = 1;
3818 }
3819
0c2a6606
SW		 3820 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv;
3821
79b6c247
SW		 3822 /*
3823 * Make the contents of the kvmppc_host_rm_ops structure visible
3824 * to other CPUs before we assign it to the global variable.
3825 * Do an atomic assignment (no locks used here), but if someone
3826 * beats us to it, just free our copy and return.
3827 */
3828 smp_wmb();
3829 l_ops = (unsigned long) ops;
3830
3831 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) {
419af25f 3832 cpus_read_unlock();
79b6c247
SW		 3833 kfree(ops->rm_core);
3834 kfree(ops);
6f3bb809 3835 return;
79b6c247 3836 }
6f3bb809 3837
419af25f
SAS		 3838 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE,
3839 "ppc/kvm_book3s:prepare",
3840 kvmppc_set_host_core,
3841 kvmppc_clear_host_core);
3842 cpus_read_unlock();
79b6c247
SW		 3843}
3844
3845void kvmppc_free_host_rm_ops(void)
3846{
3847 if (kvmppc_host_rm_ops_hv) {
3f7cd919 3848 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE);
79b6c247
SW		 3849 kfree(kvmppc_host_rm_ops_hv->rm_core);
3850 kfree(kvmppc_host_rm_ops_hv);
3851 kvmppc_host_rm_ops_hv = NULL;
3852 }
3853}
3854#endif
3855
3a167bea 3856static int kvmppc_core_init_vm_hv(struct kvm *kvm)
de56a948 3857{
32fad281 3858 unsigned long lpcr, lpid;
e23a808b 3859 char buf[32];
8cf4ecc0 3860 int ret;
de56a948 3861
32fad281
PM		 3862 /* Allocate the guest's logical partition ID */
3863
3864 lpid = kvmppc_alloc_lpid();
5d226ae5 3865 if ((long)lpid < 0)
32fad281
PM		 3866 return -ENOMEM;
3867 kvm->arch.lpid = lpid;
de56a948 3868
79b6c247
SW		 3869 kvmppc_alloc_host_rm_ops();
3870
1b400ba0
PM		 3871 /*
3872 * Since we don't flush the TLB when tearing down a VM,
3873 * and this lpid might have previously been used,
3874 * make sure we flush on each core before running the new VM.
7c5b06ca
PM		 3875 * On POWER9, the tlbie in mmu_partition_table_set_entry()
3876 * does this flush for us.
1b400ba0 3877 */
7c5b06ca
PM		 3878 if (!cpu_has_feature(CPU_FTR_ARCH_300))
3879 cpumask_setall(&kvm->arch.need_tlb_flush);
1b400ba0 3880
699a0ea0
PM		 3881 /* Start out with the default set of hcalls enabled */
3882 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls,
3883 sizeof(kvm->arch.enabled_hcalls));
3884
7a84084c
PM		 3885 if (!cpu_has_feature(CPU_FTR_ARCH_300))
3886 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
aa04b4cc 3887
c17b98cf
PM		 3888 /* Init LPCR for virtual RMA mode */
3889 kvm->arch.host_lpid = mfspr(SPRN_LPID);
3890 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
3891 lpcr &= LPCR_PECE | LPCR_LPES;
3892 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
3893 LPCR_VPM0 | LPCR_VPM1;
3894 kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
3895 (VRMA_VSID << SLB_VSID_SHIFT_1T);
3896 /* On POWER8 turn on online bit to enable PURR/SPURR */
3897 if (cpu_has_feature(CPU_FTR_ARCH_207S))
3898 lpcr |= LPCR_ONL;
84f7139c
PM		 3899 /*
3900 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed)
3901 * Set HVICE bit to enable hypervisor virtualization interrupts.
5af50993
BH		 3902 * Set HEIC to prevent OS interrupts to go to hypervisor (should
3903 * be unnecessary but better safe than sorry in case we re-enable
3904 * EE in HV mode with this LPCR still set)
84f7139c
PM		 3905 */
3906 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
7a84084c 3907 lpcr &= ~LPCR_VPM0;
5af50993
BH		 3908 lpcr |= LPCR_HVICE | LPCR_HEIC;
3909
3910 /*
3911 * If xive is enabled, we route 0x500 interrupts directly
3912 * to the guest.
3913 */
3914 if (xive_enabled())
3915 lpcr |= LPCR_LPES;
84f7139c
PM		 3916 }
3917
8cf4ecc0 3918 /*
18c3640c 3919 * If the host uses radix, the guest starts out as radix.
8cf4ecc0
PM		 3920 */
3921 if (radix_enabled()) {
3922 kvm->arch.radix = 1;
1b151ce4 3923 kvm->arch.mmu_ready = 1;
8cf4ecc0
PM		 3924 lpcr &= ~LPCR_VPM1;
3925 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
3926 ret = kvmppc_init_vm_radix(kvm);
3927 if (ret) {
3928 kvmppc_free_lpid(kvm->arch.lpid);
3929 return ret;
3930 }
3931 kvmppc_setup_partition_table(kvm);
3932 }
3933
9e368f29 3934 kvm->arch.lpcr = lpcr;
aa04b4cc 3935
5e985969
DG		 3936 /* Initialization for future HPT resizes */
3937 kvm->arch.resize_hpt = NULL;
3938
7c5b06ca
PM		 3939 /*
3940 * Work out how many sets the TLB has, for the use of
3941 * the TLB invalidation loop in book3s_hv_rmhandlers.S.
3942 */
18c3640c 3943 if (radix_enabled())
8cf4ecc0
PM		 3944 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */
3945 else if (cpu_has_feature(CPU_FTR_ARCH_300))
7c5b06ca
PM		 3946 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */
3947 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
3948 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */
3949 else
3950 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */
3951
512691d4 3952 /*
441c19c8
ME		 3953 * Track that we now have a HV mode VM active. This blocks secondary
3954 * CPU threads from coming online.
516f7898
PM		 3955 * On POWER9, we only need to do this if the "indep_threads_mode"
3956 * module parameter has been set to N.
512691d4 3957 */
516f7898
PM		 3958 if (cpu_has_feature(CPU_FTR_ARCH_300))
3959 kvm->arch.threads_indep = indep_threads_mode;
3960 if (!kvm->arch.threads_indep)
8cf4ecc0 3961 kvm_hv_vm_activated();
512691d4 3962
3c313524
PM		 3963 /*
3964 * Initialize smt_mode depending on processor.
3965 * POWER8 and earlier have to use "strict" threading, where
3966 * all vCPUs in a vcore have to run on the same (sub)core,
3967 * whereas on POWER9 the threads can each run a different
3968 * guest.
3969 */
3970 if (!cpu_has_feature(CPU_FTR_ARCH_300))
3971 kvm->arch.smt_mode = threads_per_subcore;
3972 else
3973 kvm->arch.smt_mode = 1;
57900694 3974 kvm->arch.emul_smt_mode = 1;
3c313524 3975
e23a808b
PM		 3976 /*
3977 * Create a debugfs directory for the VM
3978 */
3979 snprintf(buf, sizeof(buf), "vm%d", current->pid);
3980 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir);
3981 if (!IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
3982 kvmppc_mmu_debugfs_init(kvm);
3983
54738c09 3984 return 0;
de56a948
PM		 3985}
3986
f1378b1c
PM		 3987static void kvmppc_free_vcores(struct kvm *kvm)
3988{
3989 long int i;
3990
23316316 3991 for (i = 0; i < KVM_MAX_VCORES; ++i)
f1378b1c
PM		 3992 kfree(kvm->arch.vcores[i]);
3993 kvm->arch.online_vcores = 0;
3994}
3995
3a167bea 3996static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
de56a948 3997{
e23a808b
PM		 3998 debugfs_remove_recursive(kvm->arch.debugfs_dir);
3999
516f7898 4000 if (!kvm->arch.threads_indep)
8cf4ecc0 4001 kvm_hv_vm_deactivated();
512691d4 4002
f1378b1c 4003 kvmppc_free_vcores(kvm);
aa04b4cc 4004
8cf4ecc0
PM		 4005 kvmppc_free_lpid(kvm->arch.lpid);
4006
5a319350
PM		 4007 if (kvm_is_radix(kvm))
4008 kvmppc_free_radix(kvm);
4009 else
aae0777f 4010 kvmppc_free_hpt(&kvm->arch.hpt);
c57875f5
SW		 4011
4012 kvmppc_free_pimap(kvm);
de56a948
PM		 4013}
4014
3a167bea
AK		 4015/* We don't need to emulate any privileged instructions or dcbz */
4016static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
4017 unsigned int inst, int *advance)
de56a948 4018{
3a167bea 4019 return EMULATE_FAIL;
de56a948
PM		 4020}
4021
3a167bea
AK		 4022static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn,
4023 ulong spr_val)
de56a948
PM		 4024{
4025 return EMULATE_FAIL;
4026}
4027
3a167bea
AK		 4028static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn,
4029 ulong *spr_val)
de56a948
PM		 4030{
4031 return EMULATE_FAIL;
4032}
4033
3a167bea 4034static int kvmppc_core_check_processor_compat_hv(void)
de56a948 4035{
c17b98cf
PM		 4036 if (!cpu_has_feature(CPU_FTR_HVMODE) ||
4037 !cpu_has_feature(CPU_FTR_ARCH_206))
3a167bea 4038 return -EIO;
50de596d 4039
3a167bea 4040 return 0;
de56a948
PM		 4041}
4042
8daaafc8
SW		 4043#ifdef CONFIG_KVM_XICS
4044
4045void kvmppc_free_pimap(struct kvm *kvm)
4046{
4047 kfree(kvm->arch.pimap);
4048}
4049
c57875f5 4050static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void)
8daaafc8
SW		 4051{
4052 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL);
4053}
c57875f5
SW		 4054
4055static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4056{
4057 struct irq_desc *desc;
4058 struct kvmppc_irq_map *irq_map;
4059 struct kvmppc_passthru_irqmap *pimap;
4060 struct irq_chip *chip;
5af50993 4061 int i, rc = 0;
c57875f5 4062
644abbb2
SW		 4063 if (!kvm_irq_bypass)
4064 return 1;
4065
c57875f5
SW		 4066 desc = irq_to_desc(host_irq);
4067 if (!desc)
4068 return -EIO;
4069
4070 mutex_lock(&kvm->lock);
4071
4072 pimap = kvm->arch.pimap;
4073 if (pimap == NULL) {
4074 /* First call, allocate structure to hold IRQ map */
4075 pimap = kvmppc_alloc_pimap();
4076 if (pimap == NULL) {
4077 mutex_unlock(&kvm->lock);
4078 return -ENOMEM;
4079 }
4080 kvm->arch.pimap = pimap;
4081 }
4082
4083 /*
4084 * For now, we only support interrupts for which the EOI operation
4085 * is an OPAL call followed by a write to XIRR, since that's
5af50993 4086 * what our real-mode EOI code does, or a XIVE interrupt
c57875f5
SW		 4087 */
4088 chip = irq_data_get_irq_chip(&desc->irq_data);
5af50993 4089 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) {
c57875f5
SW		 4090 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n",
4091 host_irq, guest_gsi);
4092 mutex_unlock(&kvm->lock);
4093 return -ENOENT;
4094 }
4095
4096 /*
4097 * See if we already have an entry for this guest IRQ number.
4098 * If it's mapped to a hardware IRQ number, that's an error,
4099 * otherwise re-use this entry.
4100 */
4101 for (i = 0; i < pimap->n_mapped; i++) {
4102 if (guest_gsi == pimap->mapped[i].v_hwirq) {
4103 if (pimap->mapped[i].r_hwirq) {
4104 mutex_unlock(&kvm->lock);
4105 return -EINVAL;
4106 }
4107 break;
4108 }
4109 }
4110
4111 if (i == KVMPPC_PIRQ_MAPPED) {
4112 mutex_unlock(&kvm->lock);
4113 return -EAGAIN; /* table is full */
4114 }
4115
4116 irq_map = &pimap->mapped[i];
4117
4118 irq_map->v_hwirq = guest_gsi;
c57875f5
SW		 4119 irq_map->desc = desc;
4120
e3c13e56
SW		 4121 /*
4122 * Order the above two stores before the next to serialize with
4123 * the KVM real mode handler.
4124 */
4125 smp_wmb();
4126 irq_map->r_hwirq = desc->irq_data.hwirq;
4127
c57875f5
SW		 4128 if (i == pimap->n_mapped)
4129 pimap->n_mapped++;
4130
5af50993
BH		 4131 if (xive_enabled())
4132 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
4133 else
4134 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
4135 if (rc)
4136 irq_map->r_hwirq = 0;
5d375199 4137
c57875f5
SW		 4138 mutex_unlock(&kvm->lock);
4139
4140 return 0;
4141}
4142
4143static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4144{
4145 struct irq_desc *desc;
4146 struct kvmppc_passthru_irqmap *pimap;
5af50993 4147 int i, rc = 0;
c57875f5 4148
644abbb2
SW		 4149 if (!kvm_irq_bypass)
4150 return 0;
4151
c57875f5
SW		 4152 desc = irq_to_desc(host_irq);
4153 if (!desc)
4154 return -EIO;
4155
4156 mutex_lock(&kvm->lock);
a1c52e1c
ME		 4157 if (!kvm->arch.pimap)
4158 goto unlock;
c57875f5 4159
c57875f5
SW		 4160 pimap = kvm->arch.pimap;
4161
4162 for (i = 0; i < pimap->n_mapped; i++) {
4163 if (guest_gsi == pimap->mapped[i].v_hwirq)
4164 break;
4165 }
4166
4167 if (i == pimap->n_mapped) {
4168 mutex_unlock(&kvm->lock);
4169 return -ENODEV;
4170 }
4171
5af50993
BH		 4172 if (xive_enabled())
4173 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc);
4174 else
4175 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq);
5d375199 4176
5af50993 4177 /* invalidate the entry (what do do on error from the above ?) */
c57875f5
SW		 4178 pimap->mapped[i].r_hwirq = 0;
4179
4180 /*
4181 * We don't free this structure even when the count goes to
4182 * zero. The structure is freed when we destroy the VM.
4183 */
a1c52e1c 4184 unlock:
c57875f5 4185 mutex_unlock(&kvm->lock);
5af50993 4186 return rc;
c57875f5
SW		 4187}
4188
4189static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons,
4190 struct irq_bypass_producer *prod)
4191{
4192 int ret = 0;
4193 struct kvm_kernel_irqfd *irqfd =
4194 container_of(cons, struct kvm_kernel_irqfd, consumer);
4195
4196 irqfd->producer = prod;
4197
4198 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
4199 if (ret)
4200 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n",
4201 prod->irq, irqfd->gsi, ret);
4202
4203 return ret;
4204}
4205
4206static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons,
4207 struct irq_bypass_producer *prod)
4208{
4209 int ret;
4210 struct kvm_kernel_irqfd *irqfd =
4211 container_of(cons, struct kvm_kernel_irqfd, consumer);
4212
4213 irqfd->producer = NULL;
4214
4215 /*
4216 * When producer of consumer is unregistered, we change back to
4217 * default external interrupt handling mode - KVM real mode
4218 * will switch back to host.
4219 */
4220 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
4221 if (ret)
4222 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n",
4223 prod->irq, irqfd->gsi, ret);
4224}
8daaafc8
SW		 4225#endif
4226
3a167bea
AK		 4227static long kvm_arch_vm_ioctl_hv(struct file *filp,
4228 unsigned int ioctl, unsigned long arg)
4229{
4230 struct kvm *kvm __maybe_unused = filp->private_data;
4231 void __user *argp = (void __user *)arg;
4232 long r;
4233
4234 switch (ioctl) {
4235
3a167bea
AK		 4236 case KVM_PPC_ALLOCATE_HTAB: {
4237 u32 htab_order;
4238
4239 r = -EFAULT;
4240 if (get_user(htab_order, (u32 __user *)argp))
4241 break;
f98a8bf9 4242 r = kvmppc_alloc_reset_hpt(kvm, htab_order);
3a167bea
AK		 4243 if (r)
4244 break;
3a167bea
AK		 4245 r = 0;
4246 break;
4247 }
4248
4249 case KVM_PPC_GET_HTAB_FD: {
4250 struct kvm_get_htab_fd ghf;
4251
4252 r = -EFAULT;
4253 if (copy_from_user(&ghf, argp, sizeof(ghf)))
4254 break;
4255 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf);
4256 break;
4257 }
4258
5e985969
DG		 4259 case KVM_PPC_RESIZE_HPT_PREPARE: {
4260 struct kvm_ppc_resize_hpt rhpt;
4261
4262 r = -EFAULT;
4263 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
4264 break;
4265
4266 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt);
4267 break;
4268 }
4269
4270 case KVM_PPC_RESIZE_HPT_COMMIT: {
4271 struct kvm_ppc_resize_hpt rhpt;
4272
4273 r = -EFAULT;
4274 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
4275 break;
4276
4277 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt);
4278 break;
4279 }
4280
3a167bea
AK		 4281 default:
4282 r = -ENOTTY;
4283 }
4284
4285 return r;
4286}
4287
699a0ea0
PM		 4288/*
4289 * List of hcall numbers to enable by default.
4290 * For compatibility with old userspace, we enable by default
4291 * all hcalls that were implemented before the hcall-enabling
4292 * facility was added. Note this list should not include H_RTAS.
4293 */
4294static unsigned int default_hcall_list[] = {
4295 H_REMOVE,
4296 H_ENTER,
4297 H_READ,
4298 H_PROTECT,
4299 H_BULK_REMOVE,
4300 H_GET_TCE,
4301 H_PUT_TCE,
4302 H_SET_DABR,
4303 H_SET_XDABR,
4304 H_CEDE,
4305 H_PROD,
4306 H_CONFER,
4307 H_REGISTER_VPA,
4308#ifdef CONFIG_KVM_XICS
4309 H_EOI,
4310 H_CPPR,
4311 H_IPI,
4312 H_IPOLL,
4313 H_XIRR,
4314 H_XIRR_X,
4315#endif
4316 0
4317};
4318
4319static void init_default_hcalls(void)
4320{
4321 int i;
ae2113a4 4322 unsigned int hcall;
699a0ea0 4323
ae2113a4
PM		 4324 for (i = 0; default_hcall_list[i]; ++i) {
4325 hcall = default_hcall_list[i];
4326 WARN_ON(!kvmppc_hcall_impl_hv(hcall));
4327 __set_bit(hcall / 4, default_enabled_hcalls);
4328 }
699a0ea0
PM		 4329}
4330
c9270132
PM		 4331static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
4332{
468808bd 4333 unsigned long lpcr;
8cf4ecc0 4334 int radix;
18c3640c 4335 int err;
468808bd
PM		 4336
4337 /* If not on a POWER9, reject it */
4338 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4339 return -ENODEV;
4340
4341 /* If any unknown flags set, reject it */
4342 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE))
4343 return -EINVAL;
4344
468808bd 4345 /* GR (guest radix) bit in process_table field must match */
18c3640c 4346 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX);
8cf4ecc0 4347 if (!!(cfg->process_table & PATB_GR) != radix)
468808bd
PM		 4348 return -EINVAL;
4349
4350 /* Process table size field must be reasonable, i.e. <= 24 */
4351 if ((cfg->process_table & PRTS_MASK) > 24)
4352 return -EINVAL;
4353
18c3640c
PM		 4354 /* We can change a guest to/from radix now, if the host is radix */
4355 if (radix && !radix_enabled())
4356 return -EINVAL;
4357
cf5f6f31 4358 mutex_lock(&kvm->lock);
18c3640c
PM		 4359 if (radix != kvm_is_radix(kvm)) {
4360 if (kvm->arch.mmu_ready) {
4361 kvm->arch.mmu_ready = 0;
4362 /* order mmu_ready vs. vcpus_running */
4363 smp_mb();
4364 if (atomic_read(&kvm->arch.vcpus_running)) {
4365 kvm->arch.mmu_ready = 1;
4366 err = -EBUSY;
4367 goto out_unlock;
4368 }
4369 }
4370 if (radix)
4371 err = kvmppc_switch_mmu_to_radix(kvm);
4372 else
4373 err = kvmppc_switch_mmu_to_hpt(kvm);
4374 if (err)
4375 goto out_unlock;
4376 }
4377
468808bd
PM		 4378 kvm->arch.process_table = cfg->process_table;
4379 kvmppc_setup_partition_table(kvm);
4380
4381 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0;
4382 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE);
18c3640c 4383 err = 0;
468808bd 4384
18c3640c
PM		 4385 out_unlock:
4386 mutex_unlock(&kvm->lock);
4387 return err;
c9270132
PM		 4388}
4389
cbbc58d4 4390static struct kvmppc_ops kvm_ops_hv = {
3a167bea
AK		 4391 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
4392 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
4393 .get_one_reg = kvmppc_get_one_reg_hv,
4394 .set_one_reg = kvmppc_set_one_reg_hv,
4395 .vcpu_load = kvmppc_core_vcpu_load_hv,
4396 .vcpu_put = kvmppc_core_vcpu_put_hv,
4397 .set_msr = kvmppc_set_msr_hv,
4398 .vcpu_run = kvmppc_vcpu_run_hv,
4399 .vcpu_create = kvmppc_core_vcpu_create_hv,
4400 .vcpu_free = kvmppc_core_vcpu_free_hv,
4401 .check_requests = kvmppc_core_check_requests_hv,
4402 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv,
4403 .flush_memslot = kvmppc_core_flush_memslot_hv,
4404 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv,
4405 .commit_memory_region = kvmppc_core_commit_memory_region_hv,
4406 .unmap_hva = kvm_unmap_hva_hv,
4407 .unmap_hva_range = kvm_unmap_hva_range_hv,
4408 .age_hva = kvm_age_hva_hv,
4409 .test_age_hva = kvm_test_age_hva_hv,
4410 .set_spte_hva = kvm_set_spte_hva_hv,
4411 .mmu_destroy = kvmppc_mmu_destroy_hv,
4412 .free_memslot = kvmppc_core_free_memslot_hv,
4413 .create_memslot = kvmppc_core_create_memslot_hv,
4414 .init_vm = kvmppc_core_init_vm_hv,
4415 .destroy_vm = kvmppc_core_destroy_vm_hv,
3a167bea
AK		 4416 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv,
4417 .emulate_op = kvmppc_core_emulate_op_hv,
4418 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv,
4419 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv,
4420 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,
4421 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv,
ae2113a4 4422 .hcall_implemented = kvmppc_hcall_impl_hv,
c57875f5
SW		 4423#ifdef CONFIG_KVM_XICS
4424 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
4425 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
4426#endif
c9270132
PM		 4427 .configure_mmu = kvmhv_configure_mmu,
4428 .get_rmmu_info = kvmhv_get_rmmu_info,
3c313524 4429 .set_smt_mode = kvmhv_set_smt_mode,
3a167bea
AK		 4430};
4431
fd7bacbc
MS		 4432static int kvm_init_subcore_bitmap(void)
4433{
4434 int i, j;
4435 int nr_cores = cpu_nr_cores();
4436 struct sibling_subcore_state *sibling_subcore_state;
4437
4438 for (i = 0; i < nr_cores; i++) {
4439 int first_cpu = i * threads_per_core;
4440 int node = cpu_to_node(first_cpu);
4441
4442 /* Ignore if it is already allocated. */
4443 if (paca[first_cpu].sibling_subcore_state)
4444 continue;
4445
4446 sibling_subcore_state =
4447 kmalloc_node(sizeof(struct sibling_subcore_state),
4448 GFP_KERNEL, node);
4449 if (!sibling_subcore_state)
4450 return -ENOMEM;
4451
4452 memset(sibling_subcore_state, 0,
4453 sizeof(struct sibling_subcore_state));
4454
4455 for (j = 0; j < threads_per_core; j++) {
4456 int cpu = first_cpu + j;
4457
4458 paca[cpu].sibling_subcore_state = sibling_subcore_state;
4459 }
4460 }
4461 return 0;
4462}
4463
5a319350
PM		 4464static int kvmppc_radix_possible(void)
4465{
4466 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled();
4467}
4468
3a167bea 4469static int kvmppc_book3s_init_hv(void)
de56a948
PM		 4470{
4471 int r;
cbbc58d4
AK		 4472 /*
4473 * FIXME!! Do we need to check on all cpus ?
4474 */
4475 r = kvmppc_core_check_processor_compat_hv();
4476 if (r < 0)
739e2425 4477 return -ENODEV;
de56a948 4478
fd7bacbc
MS		 4479 r = kvm_init_subcore_bitmap();
4480 if (r)
4481 return r;
4482
f725758b
PM		 4483 /*
4484 * We need a way of accessing the XICS interrupt controller,
4485 * either directly, via paca[cpu].kvm_hstate.xics_phys, or
4486 * indirectly, via OPAL.
4487 */
4488#ifdef CONFIG_SMP
fb7dcf72 4489 if (!xive_enabled() && !local_paca->kvm_hstate.xics_phys) {
f725758b
PM		 4490 struct device_node *np;
4491
4492 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc");
4493 if (!np) {
4494 pr_err("KVM-HV: Cannot determine method for accessing XICS\n");
4495 return -ENODEV;
4496 }
42b09c97
NMG		 4497 /* presence of intc confirmed - node can be dropped again */
4498 of_node_put(np);
f725758b
PM		 4499 }
4500#endif
4501
cbbc58d4
AK		 4502 kvm_ops_hv.owner = THIS_MODULE;
4503 kvmppc_hv_ops = &kvm_ops_hv;
de56a948 4504
699a0ea0
PM		 4505 init_default_hcalls();
4506
ec257165
PM		 4507 init_vcore_lists();
4508
cbbc58d4 4509 r = kvmppc_mmu_hv_init();
5a319350
PM		 4510 if (r)
4511 return r;
4512
4513 if (kvmppc_radix_possible())
4514 r = kvmppc_radix_init();
49620ad4
PM		 4515
4516 /*
4517 * POWER9 chips before version 2.02 can't have some threads in
4518 * HPT mode and some in radix mode on the same core.
4519 */
4520 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4521 unsigned int pvr = mfspr(SPRN_PVR);
4522 if ((pvr >> 16) == PVR_POWER9 &&
4523 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) ||
4524 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101)))
4525 no_mixing_hpt_and_radix = true;
4526 }
4527
de56a948
PM		 4528 return r;
4529}
4530
3a167bea 4531static void kvmppc_book3s_exit_hv(void)
de56a948 4532{
79b6c247 4533 kvmppc_free_host_rm_ops();
5a319350
PM		 4534 if (kvmppc_radix_possible())
4535 kvmppc_radix_exit();
cbbc58d4 4536 kvmppc_hv_ops = NULL;
de56a948
PM		 4537}
4538
3a167bea
AK		 4539module_init(kvmppc_book3s_init_hv);
4540module_exit(kvmppc_book3s_exit_hv);
2ba9f0d8 4541MODULE_LICENSE("GPL");
398a76c6
AG		 4542MODULE_ALIAS_MISCDEV(KVM_MINOR);
4543MODULE_ALIAS("devname:kvm");
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