]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/powerpc/kvm/book3s_hv_builtin.c
KVM: PPC: Book3S HV: Enable IRQ bypass
[mirror_ubuntu-artful-kernel.git] / arch / powerpc / kvm / book3s_hv_builtin.c
CommitLineData
aa04b4cc
PM
1/*
2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2, as
6 * published by the Free Software Foundation.
7 */
8
441c19c8 9#include <linux/cpu.h>
aa04b4cc
PM
10#include <linux/kvm_host.h>
11#include <linux/preempt.h>
66b15db6 12#include <linux/export.h>
aa04b4cc
PM
13#include <linux/sched.h>
14#include <linux/spinlock.h>
aa04b4cc 15#include <linux/init.h>
fa61a4e3
AK
16#include <linux/memblock.h>
17#include <linux/sizes.h>
fc95ca72 18#include <linux/cma.h>
90fd09f8 19#include <linux/bitops.h>
aa04b4cc
PM
20
21#include <asm/cputable.h>
22#include <asm/kvm_ppc.h>
23#include <asm/kvm_book3s.h>
e928e9cb 24#include <asm/archrandom.h>
eddb60fb 25#include <asm/xics.h>
66feed61
PM
26#include <asm/dbell.h>
27#include <asm/cputhreads.h>
37f55d30 28#include <asm/io.h>
aa04b4cc 29
fc95ca72
JK
30#define KVM_CMA_CHUNK_ORDER 18
31
fa61a4e3
AK
32/*
33 * Hash page table alignment on newer cpus(CPU_FTR_ARCH_206)
34 * should be power of 2.
35 */
36#define HPT_ALIGN_PAGES ((1 << 18) >> PAGE_SHIFT) /* 256k */
37/*
38 * By default we reserve 5% of memory for hash pagetable allocation.
39 */
40static unsigned long kvm_cma_resv_ratio = 5;
aa04b4cc 41
fc95ca72
JK
42static struct cma *kvm_cma;
43
fa61a4e3 44static int __init early_parse_kvm_cma_resv(char *p)
d2a1b483 45{
fa61a4e3 46 pr_debug("%s(%s)\n", __func__, p);
d2a1b483 47 if (!p)
fa61a4e3
AK
48 return -EINVAL;
49 return kstrtoul(p, 0, &kvm_cma_resv_ratio);
d2a1b483 50}
fa61a4e3 51early_param("kvm_cma_resv_ratio", early_parse_kvm_cma_resv);
d2a1b483 52
fa61a4e3 53struct page *kvm_alloc_hpt(unsigned long nr_pages)
d2a1b483 54{
c04fa583 55 VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT);
fc95ca72 56
c17b98cf 57 return cma_alloc(kvm_cma, nr_pages, order_base_2(HPT_ALIGN_PAGES));
d2a1b483
AG
58}
59EXPORT_SYMBOL_GPL(kvm_alloc_hpt);
60
fa61a4e3 61void kvm_release_hpt(struct page *page, unsigned long nr_pages)
d2a1b483 62{
fc95ca72 63 cma_release(kvm_cma, page, nr_pages);
d2a1b483
AG
64}
65EXPORT_SYMBOL_GPL(kvm_release_hpt);
66
fa61a4e3
AK
67/**
68 * kvm_cma_reserve() - reserve area for kvm hash pagetable
69 *
70 * This function reserves memory from early allocator. It should be
14ed7409 71 * called by arch specific code once the memblock allocator
fa61a4e3
AK
72 * has been activated and all other subsystems have already allocated/reserved
73 * memory.
74 */
75void __init kvm_cma_reserve(void)
76{
77 unsigned long align_size;
78 struct memblock_region *reg;
79 phys_addr_t selected_size = 0;
cec26bc3
AK
80
81 /*
82 * We need CMA reservation only when we are in HV mode
83 */
84 if (!cpu_has_feature(CPU_FTR_HVMODE))
85 return;
fa61a4e3
AK
86 /*
87 * We cannot use memblock_phys_mem_size() here, because
88 * memblock_analyze() has not been called yet.
89 */
90 for_each_memblock(memory, reg)
91 selected_size += memblock_region_memory_end_pfn(reg) -
92 memblock_region_memory_base_pfn(reg);
93
94 selected_size = (selected_size * kvm_cma_resv_ratio / 100) << PAGE_SHIFT;
95 if (selected_size) {
96 pr_debug("%s: reserving %ld MiB for global area\n", __func__,
97 (unsigned long)selected_size / SZ_1M);
c17b98cf 98 align_size = HPT_ALIGN_PAGES << PAGE_SHIFT;
c1f733aa
JK
99 cma_declare_contiguous(0, selected_size, 0, align_size,
100 KVM_CMA_CHUNK_ORDER - PAGE_SHIFT, false, &kvm_cma);
fa61a4e3
AK
101 }
102}
441c19c8 103
90fd09f8
SB
104/*
105 * Real-mode H_CONFER implementation.
106 * We check if we are the only vcpu out of this virtual core
107 * still running in the guest and not ceded. If so, we pop up
108 * to the virtual-mode implementation; if not, just return to
109 * the guest.
110 */
111long int kvmppc_rm_h_confer(struct kvm_vcpu *vcpu, int target,
112 unsigned int yield_count)
113{
ec257165
PM
114 struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore;
115 int ptid = local_paca->kvm_hstate.ptid;
90fd09f8
SB
116 int threads_running;
117 int threads_ceded;
118 int threads_conferring;
119 u64 stop = get_tb() + 10 * tb_ticks_per_usec;
120 int rv = H_SUCCESS; /* => don't yield */
121
ec257165 122 set_bit(ptid, &vc->conferring_threads);
7d6c40da
PM
123 while ((get_tb() < stop) && !VCORE_IS_EXITING(vc)) {
124 threads_running = VCORE_ENTRY_MAP(vc);
125 threads_ceded = vc->napping_threads;
126 threads_conferring = vc->conferring_threads;
127 if ((threads_ceded | threads_conferring) == threads_running) {
90fd09f8
SB
128 rv = H_TOO_HARD; /* => do yield */
129 break;
130 }
131 }
ec257165 132 clear_bit(ptid, &vc->conferring_threads);
90fd09f8
SB
133 return rv;
134}
135
441c19c8
ME
136/*
137 * When running HV mode KVM we need to block certain operations while KVM VMs
138 * exist in the system. We use a counter of VMs to track this.
139 *
140 * One of the operations we need to block is onlining of secondaries, so we
141 * protect hv_vm_count with get/put_online_cpus().
142 */
143static atomic_t hv_vm_count;
144
145void kvm_hv_vm_activated(void)
146{
147 get_online_cpus();
148 atomic_inc(&hv_vm_count);
149 put_online_cpus();
150}
151EXPORT_SYMBOL_GPL(kvm_hv_vm_activated);
152
153void kvm_hv_vm_deactivated(void)
154{
155 get_online_cpus();
156 atomic_dec(&hv_vm_count);
157 put_online_cpus();
158}
159EXPORT_SYMBOL_GPL(kvm_hv_vm_deactivated);
160
161bool kvm_hv_mode_active(void)
162{
163 return atomic_read(&hv_vm_count) != 0;
164}
ae2113a4
PM
165
166extern int hcall_real_table[], hcall_real_table_end[];
167
168int kvmppc_hcall_impl_hv_realmode(unsigned long cmd)
169{
170 cmd /= 4;
171 if (cmd < hcall_real_table_end - hcall_real_table &&
172 hcall_real_table[cmd])
173 return 1;
174
175 return 0;
176}
177EXPORT_SYMBOL_GPL(kvmppc_hcall_impl_hv_realmode);
e928e9cb
ME
178
179int kvmppc_hwrng_present(void)
180{
181 return powernv_hwrng_present();
182}
183EXPORT_SYMBOL_GPL(kvmppc_hwrng_present);
184
185long kvmppc_h_random(struct kvm_vcpu *vcpu)
186{
187 if (powernv_get_random_real_mode(&vcpu->arch.gpr[4]))
188 return H_SUCCESS;
189
190 return H_HARDWARE;
191}
eddb60fb
PM
192
193static inline void rm_writeb(unsigned long paddr, u8 val)
194{
195 __asm__ __volatile__("stbcix %0,0,%1"
196 : : "r" (val), "r" (paddr) : "memory");
197}
198
199/*
66feed61 200 * Send an interrupt or message to another CPU.
eddb60fb
PM
201 * This can only be called in real mode.
202 * The caller needs to include any barrier needed to order writes
203 * to memory vs. the IPI/message.
204 */
205void kvmhv_rm_send_ipi(int cpu)
206{
207 unsigned long xics_phys;
208
66feed61
PM
209 /* On POWER8 for IPIs to threads in the same core, use msgsnd */
210 if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
211 cpu_first_thread_sibling(cpu) ==
212 cpu_first_thread_sibling(raw_smp_processor_id())) {
213 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
214 msg |= cpu_thread_in_core(cpu);
215 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
216 return;
217 }
218
219 /* Else poke the target with an IPI */
eddb60fb
PM
220 xics_phys = paca[cpu].kvm_hstate.xics_phys;
221 rm_writeb(xics_phys + XICS_MFRR, IPI_PRIORITY);
222}
223
224/*
225 * The following functions are called from the assembly code
226 * in book3s_hv_rmhandlers.S.
227 */
228static void kvmhv_interrupt_vcore(struct kvmppc_vcore *vc, int active)
229{
230 int cpu = vc->pcpu;
231
232 /* Order setting of exit map vs. msgsnd/IPI */
233 smp_mb();
234 for (; active; active >>= 1, ++cpu)
235 if (active & 1)
236 kvmhv_rm_send_ipi(cpu);
237}
238
239void kvmhv_commence_exit(int trap)
240{
241 struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore;
242 int ptid = local_paca->kvm_hstate.ptid;
b4deba5c
PM
243 struct kvm_split_mode *sip = local_paca->kvm_hstate.kvm_split_mode;
244 int me, ee, i;
eddb60fb
PM
245
246 /* Set our bit in the threads-exiting-guest map in the 0xff00
247 bits of vcore->entry_exit_map */
248 me = 0x100 << ptid;
249 do {
250 ee = vc->entry_exit_map;
251 } while (cmpxchg(&vc->entry_exit_map, ee, ee | me) != ee);
252
253 /* Are we the first here? */
254 if ((ee >> 8) != 0)
255 return;
256
257 /*
258 * Trigger the other threads in this vcore to exit the guest.
259 * If this is a hypervisor decrementer interrupt then they
260 * will be already on their way out of the guest.
261 */
262 if (trap != BOOK3S_INTERRUPT_HV_DECREMENTER)
263 kvmhv_interrupt_vcore(vc, ee & ~(1 << ptid));
b4deba5c
PM
264
265 /*
266 * If we are doing dynamic micro-threading, interrupt the other
267 * subcores to pull them out of their guests too.
268 */
269 if (!sip)
270 return;
271
272 for (i = 0; i < MAX_SUBCORES; ++i) {
273 vc = sip->master_vcs[i];
274 if (!vc)
275 break;
276 do {
277 ee = vc->entry_exit_map;
278 /* Already asked to exit? */
279 if ((ee >> 8) != 0)
280 break;
281 } while (cmpxchg(&vc->entry_exit_map, ee,
282 ee | VCORE_EXIT_REQ) != ee);
283 if ((ee >> 8) == 0)
284 kvmhv_interrupt_vcore(vc, ee);
285 }
eddb60fb 286}
79b6c247
SW
287
288struct kvmppc_host_rm_ops *kvmppc_host_rm_ops_hv;
289EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv);
37f55d30
SW
290
291/*
292 * Determine what sort of external interrupt is pending (if any).
293 * Returns:
294 * 0 if no interrupt is pending
295 * 1 if an interrupt is pending that needs to be handled by the host
296 * -1 if there was a guest wakeup IPI (which has now been cleared)
297 */
298
299long kvmppc_read_intr(void)
300{
301 unsigned long xics_phys;
302 u32 h_xirr;
303 __be32 xirr;
304 u32 xisr;
305 u8 host_ipi;
306
307 /* see if a host IPI is pending */
308 host_ipi = local_paca->kvm_hstate.host_ipi;
309 if (host_ipi)
310 return 1;
311
312 /* Now read the interrupt from the ICP */
313 xics_phys = local_paca->kvm_hstate.xics_phys;
314 if (unlikely(!xics_phys))
315 return 1;
316
317 /*
318 * Save XIRR for later. Since we get control in reverse endian
319 * on LE systems, save it byte reversed and fetch it back in
320 * host endian. Note that xirr is the value read from the
321 * XIRR register, while h_xirr is the host endian version.
322 */
323 xirr = _lwzcix(xics_phys + XICS_XIRR);
324 h_xirr = be32_to_cpu(xirr);
325 local_paca->kvm_hstate.saved_xirr = h_xirr;
326 xisr = h_xirr & 0xffffff;
327 /*
328 * Ensure that the store/load complete to guarantee all side
329 * effects of loading from XIRR has completed
330 */
331 smp_mb();
332
333 /* if nothing pending in the ICP */
334 if (!xisr)
335 return 0;
336
337 /* We found something in the ICP...
338 *
339 * If it is an IPI, clear the MFRR and EOI it.
340 */
341 if (xisr == XICS_IPI) {
342 _stbcix(xics_phys + XICS_MFRR, 0xff);
343 _stwcix(xics_phys + XICS_XIRR, xirr);
344 /*
345 * Need to ensure side effects of above stores
346 * complete before proceeding.
347 */
348 smp_mb();
349
350 /*
351 * We need to re-check host IPI now in case it got set in the
352 * meantime. If it's clear, we bounce the interrupt to the
353 * guest
354 */
355 host_ipi = local_paca->kvm_hstate.host_ipi;
356 if (unlikely(host_ipi != 0)) {
357 /* We raced with the host,
358 * we need to resend that IPI, bummer
359 */
360 _stbcix(xics_phys + XICS_MFRR, IPI_PRIORITY);
361 /* Let side effects complete */
362 smp_mb();
363 return 1;
364 }
365
366 /* OK, it's an IPI for us */
367 local_paca->kvm_hstate.saved_xirr = 0;
368 return -1;
369 }
370
371 return 1;
372}