]>
Commit | Line | Data |
---|---|---|
bc5ad3f3 BH |
1 | /* |
2 | * Copyright 2012 Michael Ellerman, IBM Corporation. | |
3 | * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License, version 2, as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/kvm_host.h> | |
12 | #include <linux/err.h> | |
13 | #include <linux/gfp.h> | |
14 | ||
15 | #include <asm/uaccess.h> | |
16 | #include <asm/kvm_book3s.h> | |
17 | #include <asm/kvm_ppc.h> | |
18 | #include <asm/hvcall.h> | |
19 | #include <asm/xics.h> | |
20 | #include <asm/debug.h> | |
21 | ||
22 | #include <linux/debugfs.h> | |
23 | #include <linux/seq_file.h> | |
24 | ||
25 | #include "book3s_xics.h" | |
26 | ||
27 | #if 1 | |
28 | #define XICS_DBG(fmt...) do { } while (0) | |
29 | #else | |
30 | #define XICS_DBG(fmt...) trace_printk(fmt) | |
31 | #endif | |
32 | ||
33 | /* | |
34 | * LOCKING | |
35 | * ======= | |
36 | * | |
37 | * Each ICS has a mutex protecting the information about the IRQ | |
38 | * sources and avoiding simultaneous deliveries if the same interrupt. | |
39 | * | |
40 | * ICP operations are done via a single compare & swap transaction | |
41 | * (most ICP state fits in the union kvmppc_icp_state) | |
42 | */ | |
43 | ||
44 | /* | |
45 | * TODO | |
46 | * ==== | |
47 | * | |
48 | * - To speed up resends, keep a bitmap of "resend" set bits in the | |
49 | * ICS | |
50 | * | |
51 | * - Speed up server# -> ICP lookup (array ? hash table ?) | |
52 | * | |
53 | * - Make ICS lockless as well, or at least a per-interrupt lock or hashed | |
54 | * locks array to improve scalability | |
55 | * | |
56 | * - ioctl's to save/restore the entire state for snapshot & migration | |
57 | */ | |
58 | ||
59 | /* -- ICS routines -- */ | |
60 | ||
61 | static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp, | |
62 | u32 new_irq); | |
63 | ||
64 | static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level) | |
65 | { | |
66 | struct ics_irq_state *state; | |
67 | struct kvmppc_ics *ics; | |
68 | u16 src; | |
69 | ||
70 | XICS_DBG("ics deliver %#x (level: %d)\n", irq, level); | |
71 | ||
72 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
73 | if (!ics) { | |
74 | XICS_DBG("ics_deliver_irq: IRQ 0x%06x not found !\n", irq); | |
75 | return -EINVAL; | |
76 | } | |
77 | state = &ics->irq_state[src]; | |
78 | if (!state->exists) | |
79 | return -EINVAL; | |
80 | ||
81 | /* | |
82 | * We set state->asserted locklessly. This should be fine as | |
83 | * we are the only setter, thus concurrent access is undefined | |
84 | * to begin with. | |
85 | */ | |
86 | if (level == KVM_INTERRUPT_SET_LEVEL) | |
87 | state->asserted = 1; | |
88 | else if (level == KVM_INTERRUPT_UNSET) { | |
89 | state->asserted = 0; | |
90 | return 0; | |
91 | } | |
92 | ||
93 | /* Attempt delivery */ | |
94 | icp_deliver_irq(xics, NULL, irq); | |
95 | ||
96 | return 0; | |
97 | } | |
98 | ||
99 | static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics, | |
100 | struct kvmppc_icp *icp) | |
101 | { | |
102 | int i; | |
103 | ||
104 | mutex_lock(&ics->lock); | |
105 | ||
106 | for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) { | |
107 | struct ics_irq_state *state = &ics->irq_state[i]; | |
108 | ||
109 | if (!state->resend) | |
110 | continue; | |
111 | ||
112 | XICS_DBG("resend %#x prio %#x\n", state->number, | |
113 | state->priority); | |
114 | ||
115 | mutex_unlock(&ics->lock); | |
116 | icp_deliver_irq(xics, icp, state->number); | |
117 | mutex_lock(&ics->lock); | |
118 | } | |
119 | ||
120 | mutex_unlock(&ics->lock); | |
121 | } | |
122 | ||
123 | int kvmppc_xics_set_xive(struct kvm *kvm, u32 irq, u32 server, u32 priority) | |
124 | { | |
125 | struct kvmppc_xics *xics = kvm->arch.xics; | |
126 | struct kvmppc_icp *icp; | |
127 | struct kvmppc_ics *ics; | |
128 | struct ics_irq_state *state; | |
129 | u16 src; | |
130 | bool deliver; | |
131 | ||
132 | if (!xics) | |
133 | return -ENODEV; | |
134 | ||
135 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
136 | if (!ics) | |
137 | return -EINVAL; | |
138 | state = &ics->irq_state[src]; | |
139 | ||
140 | icp = kvmppc_xics_find_server(kvm, server); | |
141 | if (!icp) | |
142 | return -EINVAL; | |
143 | ||
144 | mutex_lock(&ics->lock); | |
145 | ||
146 | XICS_DBG("set_xive %#x server %#x prio %#x MP:%d RS:%d\n", | |
147 | irq, server, priority, | |
148 | state->masked_pending, state->resend); | |
149 | ||
150 | state->server = server; | |
151 | state->priority = priority; | |
152 | deliver = false; | |
153 | if ((state->masked_pending || state->resend) && priority != MASKED) { | |
154 | state->masked_pending = 0; | |
155 | deliver = true; | |
156 | } | |
157 | ||
158 | mutex_unlock(&ics->lock); | |
159 | ||
160 | if (deliver) | |
161 | icp_deliver_irq(xics, icp, irq); | |
162 | ||
163 | return 0; | |
164 | } | |
165 | ||
166 | int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server, u32 *priority) | |
167 | { | |
168 | struct kvmppc_xics *xics = kvm->arch.xics; | |
169 | struct kvmppc_ics *ics; | |
170 | struct ics_irq_state *state; | |
171 | u16 src; | |
172 | ||
173 | if (!xics) | |
174 | return -ENODEV; | |
175 | ||
176 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
177 | if (!ics) | |
178 | return -EINVAL; | |
179 | state = &ics->irq_state[src]; | |
180 | ||
181 | mutex_lock(&ics->lock); | |
182 | *server = state->server; | |
183 | *priority = state->priority; | |
184 | mutex_unlock(&ics->lock); | |
185 | ||
186 | return 0; | |
187 | } | |
188 | ||
189 | /* -- ICP routines, including hcalls -- */ | |
190 | ||
191 | static inline bool icp_try_update(struct kvmppc_icp *icp, | |
192 | union kvmppc_icp_state old, | |
193 | union kvmppc_icp_state new, | |
194 | bool change_self) | |
195 | { | |
196 | bool success; | |
197 | ||
198 | /* Calculate new output value */ | |
199 | new.out_ee = (new.xisr && (new.pending_pri < new.cppr)); | |
200 | ||
201 | /* Attempt atomic update */ | |
202 | success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw; | |
203 | if (!success) | |
204 | goto bail; | |
205 | ||
206 | XICS_DBG("UPD [%04x] - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n", | |
207 | icp->server_num, | |
208 | old.cppr, old.mfrr, old.pending_pri, old.xisr, | |
209 | old.need_resend, old.out_ee); | |
210 | XICS_DBG("UPD - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n", | |
211 | new.cppr, new.mfrr, new.pending_pri, new.xisr, | |
212 | new.need_resend, new.out_ee); | |
213 | /* | |
214 | * Check for output state update | |
215 | * | |
216 | * Note that this is racy since another processor could be updating | |
217 | * the state already. This is why we never clear the interrupt output | |
218 | * here, we only ever set it. The clear only happens prior to doing | |
219 | * an update and only by the processor itself. Currently we do it | |
220 | * in Accept (H_XIRR) and Up_Cppr (H_XPPR). | |
221 | * | |
222 | * We also do not try to figure out whether the EE state has changed, | |
223 | * we unconditionally set it if the new state calls for it for the | |
224 | * same reason. | |
225 | */ | |
226 | if (new.out_ee) { | |
227 | kvmppc_book3s_queue_irqprio(icp->vcpu, | |
228 | BOOK3S_INTERRUPT_EXTERNAL_LEVEL); | |
229 | if (!change_self) | |
54695c30 | 230 | kvmppc_fast_vcpu_kick(icp->vcpu); |
bc5ad3f3 BH |
231 | } |
232 | bail: | |
233 | return success; | |
234 | } | |
235 | ||
236 | static void icp_check_resend(struct kvmppc_xics *xics, | |
237 | struct kvmppc_icp *icp) | |
238 | { | |
239 | u32 icsid; | |
240 | ||
241 | /* Order this load with the test for need_resend in the caller */ | |
242 | smp_rmb(); | |
243 | for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) { | |
244 | struct kvmppc_ics *ics = xics->ics[icsid]; | |
245 | ||
246 | if (!test_and_clear_bit(icsid, icp->resend_map)) | |
247 | continue; | |
248 | if (!ics) | |
249 | continue; | |
250 | ics_check_resend(xics, ics, icp); | |
251 | } | |
252 | } | |
253 | ||
254 | static bool icp_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority, | |
255 | u32 *reject) | |
256 | { | |
257 | union kvmppc_icp_state old_state, new_state; | |
258 | bool success; | |
259 | ||
260 | XICS_DBG("try deliver %#x(P:%#x) to server %#x\n", irq, priority, | |
261 | icp->server_num); | |
262 | ||
263 | do { | |
264 | old_state = new_state = ACCESS_ONCE(icp->state); | |
265 | ||
266 | *reject = 0; | |
267 | ||
268 | /* See if we can deliver */ | |
269 | success = new_state.cppr > priority && | |
270 | new_state.mfrr > priority && | |
271 | new_state.pending_pri > priority; | |
272 | ||
273 | /* | |
274 | * If we can, check for a rejection and perform the | |
275 | * delivery | |
276 | */ | |
277 | if (success) { | |
278 | *reject = new_state.xisr; | |
279 | new_state.xisr = irq; | |
280 | new_state.pending_pri = priority; | |
281 | } else { | |
282 | /* | |
283 | * If we failed to deliver we set need_resend | |
284 | * so a subsequent CPPR state change causes us | |
285 | * to try a new delivery. | |
286 | */ | |
287 | new_state.need_resend = true; | |
288 | } | |
289 | ||
290 | } while (!icp_try_update(icp, old_state, new_state, false)); | |
291 | ||
292 | return success; | |
293 | } | |
294 | ||
295 | static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp, | |
296 | u32 new_irq) | |
297 | { | |
298 | struct ics_irq_state *state; | |
299 | struct kvmppc_ics *ics; | |
300 | u32 reject; | |
301 | u16 src; | |
302 | ||
303 | /* | |
304 | * This is used both for initial delivery of an interrupt and | |
305 | * for subsequent rejection. | |
306 | * | |
307 | * Rejection can be racy vs. resends. We have evaluated the | |
308 | * rejection in an atomic ICP transaction which is now complete, | |
309 | * so potentially the ICP can already accept the interrupt again. | |
310 | * | |
311 | * So we need to retry the delivery. Essentially the reject path | |
312 | * boils down to a failed delivery. Always. | |
313 | * | |
314 | * Now the interrupt could also have moved to a different target, | |
315 | * thus we may need to re-do the ICP lookup as well | |
316 | */ | |
317 | ||
318 | again: | |
319 | /* Get the ICS state and lock it */ | |
320 | ics = kvmppc_xics_find_ics(xics, new_irq, &src); | |
321 | if (!ics) { | |
322 | XICS_DBG("icp_deliver_irq: IRQ 0x%06x not found !\n", new_irq); | |
323 | return; | |
324 | } | |
325 | state = &ics->irq_state[src]; | |
326 | ||
327 | /* Get a lock on the ICS */ | |
328 | mutex_lock(&ics->lock); | |
329 | ||
330 | /* Get our server */ | |
331 | if (!icp || state->server != icp->server_num) { | |
332 | icp = kvmppc_xics_find_server(xics->kvm, state->server); | |
333 | if (!icp) { | |
334 | pr_warn("icp_deliver_irq: IRQ 0x%06x server 0x%x not found !\n", | |
335 | new_irq, state->server); | |
336 | goto out; | |
337 | } | |
338 | } | |
339 | ||
340 | /* Clear the resend bit of that interrupt */ | |
341 | state->resend = 0; | |
342 | ||
343 | /* | |
344 | * If masked, bail out | |
345 | * | |
346 | * Note: PAPR doesn't mention anything about masked pending | |
347 | * when doing a resend, only when doing a delivery. | |
348 | * | |
349 | * However that would have the effect of losing a masked | |
350 | * interrupt that was rejected and isn't consistent with | |
351 | * the whole masked_pending business which is about not | |
352 | * losing interrupts that occur while masked. | |
353 | * | |
354 | * I don't differenciate normal deliveries and resends, this | |
355 | * implementation will differ from PAPR and not lose such | |
356 | * interrupts. | |
357 | */ | |
358 | if (state->priority == MASKED) { | |
359 | XICS_DBG("irq %#x masked pending\n", new_irq); | |
360 | state->masked_pending = 1; | |
361 | goto out; | |
362 | } | |
363 | ||
364 | /* | |
365 | * Try the delivery, this will set the need_resend flag | |
366 | * in the ICP as part of the atomic transaction if the | |
367 | * delivery is not possible. | |
368 | * | |
369 | * Note that if successful, the new delivery might have itself | |
370 | * rejected an interrupt that was "delivered" before we took the | |
371 | * icp mutex. | |
372 | * | |
373 | * In this case we do the whole sequence all over again for the | |
374 | * new guy. We cannot assume that the rejected interrupt is less | |
375 | * favored than the new one, and thus doesn't need to be delivered, | |
376 | * because by the time we exit icp_try_to_deliver() the target | |
377 | * processor may well have alrady consumed & completed it, and thus | |
378 | * the rejected interrupt might actually be already acceptable. | |
379 | */ | |
380 | if (icp_try_to_deliver(icp, new_irq, state->priority, &reject)) { | |
381 | /* | |
382 | * Delivery was successful, did we reject somebody else ? | |
383 | */ | |
384 | if (reject && reject != XICS_IPI) { | |
385 | mutex_unlock(&ics->lock); | |
386 | new_irq = reject; | |
387 | goto again; | |
388 | } | |
389 | } else { | |
390 | /* | |
391 | * We failed to deliver the interrupt we need to set the | |
392 | * resend map bit and mark the ICS state as needing a resend | |
393 | */ | |
394 | set_bit(ics->icsid, icp->resend_map); | |
395 | state->resend = 1; | |
396 | ||
397 | /* | |
398 | * If the need_resend flag got cleared in the ICP some time | |
399 | * between icp_try_to_deliver() atomic update and now, then | |
400 | * we know it might have missed the resend_map bit. So we | |
401 | * retry | |
402 | */ | |
403 | smp_mb(); | |
404 | if (!icp->state.need_resend) { | |
405 | mutex_unlock(&ics->lock); | |
406 | goto again; | |
407 | } | |
408 | } | |
409 | out: | |
410 | mutex_unlock(&ics->lock); | |
411 | } | |
412 | ||
413 | static void icp_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp, | |
414 | u8 new_cppr) | |
415 | { | |
416 | union kvmppc_icp_state old_state, new_state; | |
417 | bool resend; | |
418 | ||
419 | /* | |
420 | * This handles several related states in one operation: | |
421 | * | |
422 | * ICP State: Down_CPPR | |
423 | * | |
424 | * Load CPPR with new value and if the XISR is 0 | |
425 | * then check for resends: | |
426 | * | |
427 | * ICP State: Resend | |
428 | * | |
429 | * If MFRR is more favored than CPPR, check for IPIs | |
430 | * and notify ICS of a potential resend. This is done | |
431 | * asynchronously (when used in real mode, we will have | |
432 | * to exit here). | |
433 | * | |
434 | * We do not handle the complete Check_IPI as documented | |
435 | * here. In the PAPR, this state will be used for both | |
436 | * Set_MFRR and Down_CPPR. However, we know that we aren't | |
437 | * changing the MFRR state here so we don't need to handle | |
438 | * the case of an MFRR causing a reject of a pending irq, | |
439 | * this will have been handled when the MFRR was set in the | |
440 | * first place. | |
441 | * | |
442 | * Thus we don't have to handle rejects, only resends. | |
443 | * | |
444 | * When implementing real mode for HV KVM, resend will lead to | |
445 | * a H_TOO_HARD return and the whole transaction will be handled | |
446 | * in virtual mode. | |
447 | */ | |
448 | do { | |
449 | old_state = new_state = ACCESS_ONCE(icp->state); | |
450 | ||
451 | /* Down_CPPR */ | |
452 | new_state.cppr = new_cppr; | |
453 | ||
454 | /* | |
455 | * Cut down Resend / Check_IPI / IPI | |
456 | * | |
457 | * The logic is that we cannot have a pending interrupt | |
458 | * trumped by an IPI at this point (see above), so we | |
459 | * know that either the pending interrupt is already an | |
460 | * IPI (in which case we don't care to override it) or | |
461 | * it's either more favored than us or non existent | |
462 | */ | |
463 | if (new_state.mfrr < new_cppr && | |
464 | new_state.mfrr <= new_state.pending_pri) { | |
465 | WARN_ON(new_state.xisr != XICS_IPI && | |
466 | new_state.xisr != 0); | |
467 | new_state.pending_pri = new_state.mfrr; | |
468 | new_state.xisr = XICS_IPI; | |
469 | } | |
470 | ||
471 | /* Latch/clear resend bit */ | |
472 | resend = new_state.need_resend; | |
473 | new_state.need_resend = 0; | |
474 | ||
475 | } while (!icp_try_update(icp, old_state, new_state, true)); | |
476 | ||
477 | /* | |
478 | * Now handle resend checks. Those are asynchronous to the ICP | |
479 | * state update in HW (ie bus transactions) so we can handle them | |
480 | * separately here too | |
481 | */ | |
482 | if (resend) | |
483 | icp_check_resend(xics, icp); | |
484 | } | |
485 | ||
486 | static noinline unsigned long h_xirr(struct kvm_vcpu *vcpu) | |
487 | { | |
488 | union kvmppc_icp_state old_state, new_state; | |
489 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
490 | u32 xirr; | |
491 | ||
492 | /* First, remove EE from the processor */ | |
493 | kvmppc_book3s_dequeue_irqprio(icp->vcpu, | |
494 | BOOK3S_INTERRUPT_EXTERNAL_LEVEL); | |
495 | ||
496 | /* | |
497 | * ICP State: Accept_Interrupt | |
498 | * | |
499 | * Return the pending interrupt (if any) along with the | |
500 | * current CPPR, then clear the XISR & set CPPR to the | |
501 | * pending priority | |
502 | */ | |
503 | do { | |
504 | old_state = new_state = ACCESS_ONCE(icp->state); | |
505 | ||
506 | xirr = old_state.xisr | (((u32)old_state.cppr) << 24); | |
507 | if (!old_state.xisr) | |
508 | break; | |
509 | new_state.cppr = new_state.pending_pri; | |
510 | new_state.pending_pri = 0xff; | |
511 | new_state.xisr = 0; | |
512 | ||
513 | } while (!icp_try_update(icp, old_state, new_state, true)); | |
514 | ||
515 | XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr); | |
516 | ||
517 | return xirr; | |
518 | } | |
519 | ||
520 | static noinline int h_ipi(struct kvm_vcpu *vcpu, unsigned long server, | |
521 | unsigned long mfrr) | |
522 | { | |
523 | union kvmppc_icp_state old_state, new_state; | |
524 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
525 | struct kvmppc_icp *icp; | |
526 | u32 reject; | |
527 | bool resend; | |
528 | bool local; | |
529 | ||
530 | XICS_DBG("h_ipi vcpu %d to server %lu mfrr %#lx\n", | |
531 | vcpu->vcpu_id, server, mfrr); | |
532 | ||
533 | icp = vcpu->arch.icp; | |
534 | local = icp->server_num == server; | |
535 | if (!local) { | |
536 | icp = kvmppc_xics_find_server(vcpu->kvm, server); | |
537 | if (!icp) | |
538 | return H_PARAMETER; | |
539 | } | |
540 | ||
541 | /* | |
542 | * ICP state: Set_MFRR | |
543 | * | |
544 | * If the CPPR is more favored than the new MFRR, then | |
545 | * nothing needs to be rejected as there can be no XISR to | |
546 | * reject. If the MFRR is being made less favored then | |
547 | * there might be a previously-rejected interrupt needing | |
548 | * to be resent. | |
549 | * | |
550 | * If the CPPR is less favored, then we might be replacing | |
551 | * an interrupt, and thus need to possibly reject it as in | |
552 | * | |
553 | * ICP state: Check_IPI | |
554 | */ | |
555 | do { | |
556 | old_state = new_state = ACCESS_ONCE(icp->state); | |
557 | ||
558 | /* Set_MFRR */ | |
559 | new_state.mfrr = mfrr; | |
560 | ||
561 | /* Check_IPI */ | |
562 | reject = 0; | |
563 | resend = false; | |
564 | if (mfrr < new_state.cppr) { | |
565 | /* Reject a pending interrupt if not an IPI */ | |
566 | if (mfrr <= new_state.pending_pri) | |
567 | reject = new_state.xisr; | |
568 | new_state.pending_pri = mfrr; | |
569 | new_state.xisr = XICS_IPI; | |
570 | } | |
571 | ||
572 | if (mfrr > old_state.mfrr && mfrr > new_state.cppr) { | |
573 | resend = new_state.need_resend; | |
574 | new_state.need_resend = 0; | |
575 | } | |
576 | } while (!icp_try_update(icp, old_state, new_state, local)); | |
577 | ||
578 | /* Handle reject */ | |
579 | if (reject && reject != XICS_IPI) | |
580 | icp_deliver_irq(xics, icp, reject); | |
581 | ||
582 | /* Handle resend */ | |
583 | if (resend) | |
584 | icp_check_resend(xics, icp); | |
585 | ||
586 | return H_SUCCESS; | |
587 | } | |
588 | ||
589 | static noinline void h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr) | |
590 | { | |
591 | union kvmppc_icp_state old_state, new_state; | |
592 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
593 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
594 | u32 reject; | |
595 | ||
596 | XICS_DBG("h_cppr vcpu %d cppr %#lx\n", vcpu->vcpu_id, cppr); | |
597 | ||
598 | /* | |
599 | * ICP State: Set_CPPR | |
600 | * | |
601 | * We can safely compare the new value with the current | |
602 | * value outside of the transaction as the CPPR is only | |
603 | * ever changed by the processor on itself | |
604 | */ | |
605 | if (cppr > icp->state.cppr) | |
606 | icp_down_cppr(xics, icp, cppr); | |
607 | else if (cppr == icp->state.cppr) | |
608 | return; | |
609 | ||
610 | /* | |
611 | * ICP State: Up_CPPR | |
612 | * | |
613 | * The processor is raising its priority, this can result | |
614 | * in a rejection of a pending interrupt: | |
615 | * | |
616 | * ICP State: Reject_Current | |
617 | * | |
618 | * We can remove EE from the current processor, the update | |
619 | * transaction will set it again if needed | |
620 | */ | |
621 | kvmppc_book3s_dequeue_irqprio(icp->vcpu, | |
622 | BOOK3S_INTERRUPT_EXTERNAL_LEVEL); | |
623 | ||
624 | do { | |
625 | old_state = new_state = ACCESS_ONCE(icp->state); | |
626 | ||
627 | reject = 0; | |
628 | new_state.cppr = cppr; | |
629 | ||
630 | if (cppr <= new_state.pending_pri) { | |
631 | reject = new_state.xisr; | |
632 | new_state.xisr = 0; | |
633 | new_state.pending_pri = 0xff; | |
634 | } | |
635 | ||
636 | } while (!icp_try_update(icp, old_state, new_state, true)); | |
637 | ||
638 | /* | |
639 | * Check for rejects. They are handled by doing a new delivery | |
640 | * attempt (see comments in icp_deliver_irq). | |
641 | */ | |
642 | if (reject && reject != XICS_IPI) | |
643 | icp_deliver_irq(xics, icp, reject); | |
644 | } | |
645 | ||
646 | static noinline int h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr) | |
647 | { | |
648 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
649 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
650 | struct kvmppc_ics *ics; | |
651 | struct ics_irq_state *state; | |
652 | u32 irq = xirr & 0x00ffffff; | |
653 | u16 src; | |
654 | ||
655 | XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr); | |
656 | ||
657 | /* | |
658 | * ICP State: EOI | |
659 | * | |
660 | * Note: If EOI is incorrectly used by SW to lower the CPPR | |
661 | * value (ie more favored), we do not check for rejection of | |
662 | * a pending interrupt, this is a SW error and PAPR sepcifies | |
663 | * that we don't have to deal with it. | |
664 | * | |
665 | * The sending of an EOI to the ICS is handled after the | |
666 | * CPPR update | |
667 | * | |
668 | * ICP State: Down_CPPR which we handle | |
669 | * in a separate function as it's shared with H_CPPR. | |
670 | */ | |
671 | icp_down_cppr(xics, icp, xirr >> 24); | |
672 | ||
673 | /* IPIs have no EOI */ | |
674 | if (irq == XICS_IPI) | |
675 | return H_SUCCESS; | |
676 | /* | |
677 | * EOI handling: If the interrupt is still asserted, we need to | |
678 | * resend it. We can take a lockless "peek" at the ICS state here. | |
679 | * | |
680 | * "Message" interrupts will never have "asserted" set | |
681 | */ | |
682 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
683 | if (!ics) { | |
684 | XICS_DBG("h_eoi: IRQ 0x%06x not found !\n", irq); | |
685 | return H_PARAMETER; | |
686 | } | |
687 | state = &ics->irq_state[src]; | |
688 | ||
689 | /* Still asserted, resend it */ | |
690 | if (state->asserted) | |
691 | icp_deliver_irq(xics, icp, irq); | |
692 | ||
693 | return H_SUCCESS; | |
694 | } | |
695 | ||
696 | int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req) | |
697 | { | |
698 | unsigned long res; | |
699 | int rc = H_SUCCESS; | |
700 | ||
701 | /* Check if we have an ICP */ | |
702 | if (!vcpu->arch.icp || !vcpu->kvm->arch.xics) | |
703 | return H_HARDWARE; | |
704 | ||
705 | switch (req) { | |
706 | case H_XIRR: | |
707 | res = h_xirr(vcpu); | |
708 | kvmppc_set_gpr(vcpu, 4, res); | |
709 | break; | |
710 | case H_CPPR: | |
711 | h_cppr(vcpu, kvmppc_get_gpr(vcpu, 4)); | |
712 | break; | |
713 | case H_EOI: | |
714 | rc = h_eoi(vcpu, kvmppc_get_gpr(vcpu, 4)); | |
715 | break; | |
716 | case H_IPI: | |
717 | rc = h_ipi(vcpu, kvmppc_get_gpr(vcpu, 4), | |
718 | kvmppc_get_gpr(vcpu, 5)); | |
719 | break; | |
720 | } | |
721 | ||
722 | return rc; | |
723 | } | |
724 | ||
725 | ||
726 | /* -- Initialisation code etc. -- */ | |
727 | ||
728 | static int xics_debug_show(struct seq_file *m, void *private) | |
729 | { | |
730 | struct kvmppc_xics *xics = m->private; | |
731 | struct kvm *kvm = xics->kvm; | |
732 | struct kvm_vcpu *vcpu; | |
733 | int icsid, i; | |
734 | ||
735 | if (!kvm) | |
736 | return 0; | |
737 | ||
738 | seq_printf(m, "=========\nICP state\n=========\n"); | |
739 | ||
740 | kvm_for_each_vcpu(i, vcpu, kvm) { | |
741 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
742 | union kvmppc_icp_state state; | |
743 | ||
744 | if (!icp) | |
745 | continue; | |
746 | ||
747 | state.raw = ACCESS_ONCE(icp->state.raw); | |
748 | seq_printf(m, "cpu server %#lx XIRR:%#x PPRI:%#x CPPR:%#x MFRR:%#x OUT:%d NR:%d\n", | |
749 | icp->server_num, state.xisr, | |
750 | state.pending_pri, state.cppr, state.mfrr, | |
751 | state.out_ee, state.need_resend); | |
752 | } | |
753 | ||
754 | for (icsid = 0; icsid <= KVMPPC_XICS_MAX_ICS_ID; icsid++) { | |
755 | struct kvmppc_ics *ics = xics->ics[icsid]; | |
756 | ||
757 | if (!ics) | |
758 | continue; | |
759 | ||
760 | seq_printf(m, "=========\nICS state for ICS 0x%x\n=========\n", | |
761 | icsid); | |
762 | ||
763 | mutex_lock(&ics->lock); | |
764 | ||
765 | for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) { | |
766 | struct ics_irq_state *irq = &ics->irq_state[i]; | |
767 | ||
768 | seq_printf(m, "irq 0x%06x: server %#x prio %#x save prio %#x asserted %d resend %d masked pending %d\n", | |
769 | irq->number, irq->server, irq->priority, | |
770 | irq->saved_priority, irq->asserted, | |
771 | irq->resend, irq->masked_pending); | |
772 | ||
773 | } | |
774 | mutex_unlock(&ics->lock); | |
775 | } | |
776 | return 0; | |
777 | } | |
778 | ||
779 | static int xics_debug_open(struct inode *inode, struct file *file) | |
780 | { | |
781 | return single_open(file, xics_debug_show, inode->i_private); | |
782 | } | |
783 | ||
784 | static const struct file_operations xics_debug_fops = { | |
785 | .open = xics_debug_open, | |
786 | .read = seq_read, | |
787 | .llseek = seq_lseek, | |
788 | .release = single_release, | |
789 | }; | |
790 | ||
791 | static void xics_debugfs_init(struct kvmppc_xics *xics) | |
792 | { | |
793 | char *name; | |
794 | ||
795 | name = kasprintf(GFP_KERNEL, "kvm-xics-%p", xics); | |
796 | if (!name) { | |
797 | pr_err("%s: no memory for name\n", __func__); | |
798 | return; | |
799 | } | |
800 | ||
801 | xics->dentry = debugfs_create_file(name, S_IRUGO, powerpc_debugfs_root, | |
802 | xics, &xics_debug_fops); | |
803 | ||
804 | pr_debug("%s: created %s\n", __func__, name); | |
805 | kfree(name); | |
806 | } | |
807 | ||
808 | struct kvmppc_ics *kvmppc_xics_create_ics(struct kvm *kvm, | |
809 | struct kvmppc_xics *xics, int irq) | |
810 | { | |
811 | struct kvmppc_ics *ics; | |
812 | int i, icsid; | |
813 | ||
814 | icsid = irq >> KVMPPC_XICS_ICS_SHIFT; | |
815 | ||
816 | mutex_lock(&kvm->lock); | |
817 | ||
818 | /* ICS already exists - somebody else got here first */ | |
819 | if (xics->ics[icsid]) | |
820 | goto out; | |
821 | ||
822 | /* Create the ICS */ | |
823 | ics = kzalloc(sizeof(struct kvmppc_ics), GFP_KERNEL); | |
824 | if (!ics) | |
825 | goto out; | |
826 | ||
827 | mutex_init(&ics->lock); | |
828 | ics->icsid = icsid; | |
829 | ||
830 | for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) { | |
831 | ics->irq_state[i].number = (icsid << KVMPPC_XICS_ICS_SHIFT) | i; | |
832 | ics->irq_state[i].priority = MASKED; | |
833 | ics->irq_state[i].saved_priority = MASKED; | |
834 | } | |
835 | smp_wmb(); | |
836 | xics->ics[icsid] = ics; | |
837 | ||
838 | if (icsid > xics->max_icsid) | |
839 | xics->max_icsid = icsid; | |
840 | ||
841 | out: | |
842 | mutex_unlock(&kvm->lock); | |
843 | return xics->ics[icsid]; | |
844 | } | |
845 | ||
846 | int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server_num) | |
847 | { | |
848 | struct kvmppc_icp *icp; | |
849 | ||
850 | if (!vcpu->kvm->arch.xics) | |
851 | return -ENODEV; | |
852 | ||
853 | if (kvmppc_xics_find_server(vcpu->kvm, server_num)) | |
854 | return -EEXIST; | |
855 | ||
856 | icp = kzalloc(sizeof(struct kvmppc_icp), GFP_KERNEL); | |
857 | if (!icp) | |
858 | return -ENOMEM; | |
859 | ||
860 | icp->vcpu = vcpu; | |
861 | icp->server_num = server_num; | |
862 | icp->state.mfrr = MASKED; | |
863 | icp->state.pending_pri = MASKED; | |
864 | vcpu->arch.icp = icp; | |
865 | ||
866 | XICS_DBG("created server for vcpu %d\n", vcpu->vcpu_id); | |
867 | ||
868 | return 0; | |
869 | } | |
870 | ||
871 | /* -- ioctls -- */ | |
872 | ||
873 | int kvm_vm_ioctl_xics_irq(struct kvm *kvm, struct kvm_irq_level *args) | |
874 | { | |
875 | struct kvmppc_xics *xics; | |
876 | int r; | |
877 | ||
878 | /* locking against multiple callers? */ | |
879 | ||
880 | xics = kvm->arch.xics; | |
881 | if (!xics) | |
882 | return -ENODEV; | |
883 | ||
884 | switch (args->level) { | |
885 | case KVM_INTERRUPT_SET: | |
886 | case KVM_INTERRUPT_SET_LEVEL: | |
887 | case KVM_INTERRUPT_UNSET: | |
888 | r = ics_deliver_irq(xics, args->irq, args->level); | |
889 | break; | |
890 | default: | |
891 | r = -EINVAL; | |
892 | } | |
893 | ||
894 | return r; | |
895 | } | |
896 | ||
897 | void kvmppc_xics_free(struct kvmppc_xics *xics) | |
898 | { | |
899 | int i; | |
900 | struct kvm *kvm = xics->kvm; | |
901 | ||
902 | debugfs_remove(xics->dentry); | |
903 | ||
904 | if (kvm) | |
905 | kvm->arch.xics = NULL; | |
906 | ||
907 | for (i = 0; i <= xics->max_icsid; i++) | |
908 | kfree(xics->ics[i]); | |
909 | kfree(xics); | |
910 | } | |
911 | ||
912 | int kvm_xics_create(struct kvm *kvm, u32 type) | |
913 | { | |
914 | struct kvmppc_xics *xics; | |
915 | int ret = 0; | |
916 | ||
917 | xics = kzalloc(sizeof(*xics), GFP_KERNEL); | |
918 | if (!xics) | |
919 | return -ENOMEM; | |
920 | ||
921 | xics->kvm = kvm; | |
922 | ||
923 | /* Already there ? */ | |
924 | mutex_lock(&kvm->lock); | |
925 | if (kvm->arch.xics) | |
926 | ret = -EEXIST; | |
927 | else | |
928 | kvm->arch.xics = xics; | |
929 | mutex_unlock(&kvm->lock); | |
930 | ||
931 | if (ret) | |
932 | return ret; | |
933 | ||
934 | xics_debugfs_init(xics); | |
935 | ||
936 | return 0; | |
937 | } | |
938 | ||
939 | void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu) | |
940 | { | |
941 | if (!vcpu->arch.icp) | |
942 | return; | |
943 | kfree(vcpu->arch.icp); | |
944 | vcpu->arch.icp = NULL; | |
945 | vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT; | |
946 | } |