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1 | /* |
2 | * Copyright 2012 Michael Ellerman, IBM Corporation. | |
3 | * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License, version 2, as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/kvm_host.h> | |
12 | #include <linux/err.h> | |
13 | #include <linux/gfp.h> | |
5975a2e0 | 14 | #include <linux/anon_inodes.h> |
bc5ad3f3 BH |
15 | |
16 | #include <asm/uaccess.h> | |
17 | #include <asm/kvm_book3s.h> | |
18 | #include <asm/kvm_ppc.h> | |
19 | #include <asm/hvcall.h> | |
20 | #include <asm/xics.h> | |
21 | #include <asm/debug.h> | |
7bfa9ad5 | 22 | #include <asm/time.h> |
bc5ad3f3 BH |
23 | |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
26 | ||
27 | #include "book3s_xics.h" | |
28 | ||
29 | #if 1 | |
30 | #define XICS_DBG(fmt...) do { } while (0) | |
31 | #else | |
32 | #define XICS_DBG(fmt...) trace_printk(fmt) | |
33 | #endif | |
34 | ||
e7d26f28 BH |
35 | #define ENABLE_REALMODE true |
36 | #define DEBUG_REALMODE false | |
37 | ||
bc5ad3f3 BH |
38 | /* |
39 | * LOCKING | |
40 | * ======= | |
41 | * | |
42 | * Each ICS has a mutex protecting the information about the IRQ | |
43 | * sources and avoiding simultaneous deliveries if the same interrupt. | |
44 | * | |
45 | * ICP operations are done via a single compare & swap transaction | |
46 | * (most ICP state fits in the union kvmppc_icp_state) | |
47 | */ | |
48 | ||
49 | /* | |
50 | * TODO | |
51 | * ==== | |
52 | * | |
53 | * - To speed up resends, keep a bitmap of "resend" set bits in the | |
54 | * ICS | |
55 | * | |
56 | * - Speed up server# -> ICP lookup (array ? hash table ?) | |
57 | * | |
58 | * - Make ICS lockless as well, or at least a per-interrupt lock or hashed | |
59 | * locks array to improve scalability | |
bc5ad3f3 BH |
60 | */ |
61 | ||
62 | /* -- ICS routines -- */ | |
63 | ||
64 | static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp, | |
65 | u32 new_irq); | |
66 | ||
25a2150b PM |
67 | /* |
68 | * Return value ideally indicates how the interrupt was handled, but no | |
69 | * callers look at it (given that we don't implement KVM_IRQ_LINE_STATUS), | |
70 | * so just return 0. | |
71 | */ | |
72 | static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level) | |
bc5ad3f3 BH |
73 | { |
74 | struct ics_irq_state *state; | |
75 | struct kvmppc_ics *ics; | |
76 | u16 src; | |
77 | ||
78 | XICS_DBG("ics deliver %#x (level: %d)\n", irq, level); | |
79 | ||
80 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
81 | if (!ics) { | |
82 | XICS_DBG("ics_deliver_irq: IRQ 0x%06x not found !\n", irq); | |
83 | return -EINVAL; | |
84 | } | |
85 | state = &ics->irq_state[src]; | |
86 | if (!state->exists) | |
87 | return -EINVAL; | |
88 | ||
89 | /* | |
90 | * We set state->asserted locklessly. This should be fine as | |
91 | * we are the only setter, thus concurrent access is undefined | |
92 | * to begin with. | |
93 | */ | |
25a2150b | 94 | if (level == 1 || level == KVM_INTERRUPT_SET_LEVEL) |
bc5ad3f3 | 95 | state->asserted = 1; |
25a2150b | 96 | else if (level == 0 || level == KVM_INTERRUPT_UNSET) { |
bc5ad3f3 BH |
97 | state->asserted = 0; |
98 | return 0; | |
99 | } | |
100 | ||
101 | /* Attempt delivery */ | |
102 | icp_deliver_irq(xics, NULL, irq); | |
103 | ||
25a2150b | 104 | return 0; |
bc5ad3f3 BH |
105 | } |
106 | ||
107 | static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics, | |
108 | struct kvmppc_icp *icp) | |
109 | { | |
110 | int i; | |
111 | ||
112 | mutex_lock(&ics->lock); | |
113 | ||
114 | for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) { | |
115 | struct ics_irq_state *state = &ics->irq_state[i]; | |
116 | ||
117 | if (!state->resend) | |
118 | continue; | |
119 | ||
120 | XICS_DBG("resend %#x prio %#x\n", state->number, | |
121 | state->priority); | |
122 | ||
123 | mutex_unlock(&ics->lock); | |
124 | icp_deliver_irq(xics, icp, state->number); | |
125 | mutex_lock(&ics->lock); | |
126 | } | |
127 | ||
128 | mutex_unlock(&ics->lock); | |
129 | } | |
130 | ||
d19bd862 PM |
131 | static bool write_xive(struct kvmppc_xics *xics, struct kvmppc_ics *ics, |
132 | struct ics_irq_state *state, | |
133 | u32 server, u32 priority, u32 saved_priority) | |
134 | { | |
135 | bool deliver; | |
136 | ||
137 | mutex_lock(&ics->lock); | |
138 | ||
139 | state->server = server; | |
140 | state->priority = priority; | |
141 | state->saved_priority = saved_priority; | |
142 | deliver = false; | |
143 | if ((state->masked_pending || state->resend) && priority != MASKED) { | |
144 | state->masked_pending = 0; | |
145 | deliver = true; | |
146 | } | |
147 | ||
148 | mutex_unlock(&ics->lock); | |
149 | ||
150 | return deliver; | |
151 | } | |
152 | ||
bc5ad3f3 BH |
153 | int kvmppc_xics_set_xive(struct kvm *kvm, u32 irq, u32 server, u32 priority) |
154 | { | |
155 | struct kvmppc_xics *xics = kvm->arch.xics; | |
156 | struct kvmppc_icp *icp; | |
157 | struct kvmppc_ics *ics; | |
158 | struct ics_irq_state *state; | |
159 | u16 src; | |
bc5ad3f3 BH |
160 | |
161 | if (!xics) | |
162 | return -ENODEV; | |
163 | ||
164 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
165 | if (!ics) | |
166 | return -EINVAL; | |
167 | state = &ics->irq_state[src]; | |
168 | ||
169 | icp = kvmppc_xics_find_server(kvm, server); | |
170 | if (!icp) | |
171 | return -EINVAL; | |
172 | ||
bc5ad3f3 BH |
173 | XICS_DBG("set_xive %#x server %#x prio %#x MP:%d RS:%d\n", |
174 | irq, server, priority, | |
175 | state->masked_pending, state->resend); | |
176 | ||
d19bd862 | 177 | if (write_xive(xics, ics, state, server, priority, priority)) |
bc5ad3f3 BH |
178 | icp_deliver_irq(xics, icp, irq); |
179 | ||
180 | return 0; | |
181 | } | |
182 | ||
183 | int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server, u32 *priority) | |
184 | { | |
185 | struct kvmppc_xics *xics = kvm->arch.xics; | |
186 | struct kvmppc_ics *ics; | |
187 | struct ics_irq_state *state; | |
188 | u16 src; | |
189 | ||
190 | if (!xics) | |
191 | return -ENODEV; | |
192 | ||
193 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
194 | if (!ics) | |
195 | return -EINVAL; | |
196 | state = &ics->irq_state[src]; | |
197 | ||
198 | mutex_lock(&ics->lock); | |
199 | *server = state->server; | |
200 | *priority = state->priority; | |
201 | mutex_unlock(&ics->lock); | |
202 | ||
203 | return 0; | |
204 | } | |
205 | ||
d19bd862 PM |
206 | int kvmppc_xics_int_on(struct kvm *kvm, u32 irq) |
207 | { | |
208 | struct kvmppc_xics *xics = kvm->arch.xics; | |
209 | struct kvmppc_icp *icp; | |
210 | struct kvmppc_ics *ics; | |
211 | struct ics_irq_state *state; | |
212 | u16 src; | |
213 | ||
214 | if (!xics) | |
215 | return -ENODEV; | |
216 | ||
217 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
218 | if (!ics) | |
219 | return -EINVAL; | |
220 | state = &ics->irq_state[src]; | |
221 | ||
222 | icp = kvmppc_xics_find_server(kvm, state->server); | |
223 | if (!icp) | |
224 | return -EINVAL; | |
225 | ||
226 | if (write_xive(xics, ics, state, state->server, state->saved_priority, | |
227 | state->saved_priority)) | |
228 | icp_deliver_irq(xics, icp, irq); | |
229 | ||
230 | return 0; | |
231 | } | |
232 | ||
233 | int kvmppc_xics_int_off(struct kvm *kvm, u32 irq) | |
234 | { | |
235 | struct kvmppc_xics *xics = kvm->arch.xics; | |
236 | struct kvmppc_ics *ics; | |
237 | struct ics_irq_state *state; | |
238 | u16 src; | |
239 | ||
240 | if (!xics) | |
241 | return -ENODEV; | |
242 | ||
243 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
244 | if (!ics) | |
245 | return -EINVAL; | |
246 | state = &ics->irq_state[src]; | |
247 | ||
248 | write_xive(xics, ics, state, state->server, MASKED, state->priority); | |
249 | ||
250 | return 0; | |
251 | } | |
252 | ||
bc5ad3f3 BH |
253 | /* -- ICP routines, including hcalls -- */ |
254 | ||
255 | static inline bool icp_try_update(struct kvmppc_icp *icp, | |
256 | union kvmppc_icp_state old, | |
257 | union kvmppc_icp_state new, | |
258 | bool change_self) | |
259 | { | |
260 | bool success; | |
261 | ||
262 | /* Calculate new output value */ | |
263 | new.out_ee = (new.xisr && (new.pending_pri < new.cppr)); | |
264 | ||
265 | /* Attempt atomic update */ | |
266 | success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw; | |
267 | if (!success) | |
268 | goto bail; | |
269 | ||
270 | XICS_DBG("UPD [%04x] - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n", | |
271 | icp->server_num, | |
272 | old.cppr, old.mfrr, old.pending_pri, old.xisr, | |
273 | old.need_resend, old.out_ee); | |
274 | XICS_DBG("UPD - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n", | |
275 | new.cppr, new.mfrr, new.pending_pri, new.xisr, | |
276 | new.need_resend, new.out_ee); | |
277 | /* | |
278 | * Check for output state update | |
279 | * | |
280 | * Note that this is racy since another processor could be updating | |
281 | * the state already. This is why we never clear the interrupt output | |
282 | * here, we only ever set it. The clear only happens prior to doing | |
283 | * an update and only by the processor itself. Currently we do it | |
284 | * in Accept (H_XIRR) and Up_Cppr (H_XPPR). | |
285 | * | |
286 | * We also do not try to figure out whether the EE state has changed, | |
e7d26f28 BH |
287 | * we unconditionally set it if the new state calls for it. The reason |
288 | * for that is that we opportunistically remove the pending interrupt | |
289 | * flag when raising CPPR, so we need to set it back here if an | |
290 | * interrupt is still pending. | |
bc5ad3f3 BH |
291 | */ |
292 | if (new.out_ee) { | |
293 | kvmppc_book3s_queue_irqprio(icp->vcpu, | |
294 | BOOK3S_INTERRUPT_EXTERNAL_LEVEL); | |
295 | if (!change_self) | |
54695c30 | 296 | kvmppc_fast_vcpu_kick(icp->vcpu); |
bc5ad3f3 BH |
297 | } |
298 | bail: | |
299 | return success; | |
300 | } | |
301 | ||
302 | static void icp_check_resend(struct kvmppc_xics *xics, | |
303 | struct kvmppc_icp *icp) | |
304 | { | |
305 | u32 icsid; | |
306 | ||
307 | /* Order this load with the test for need_resend in the caller */ | |
308 | smp_rmb(); | |
309 | for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) { | |
310 | struct kvmppc_ics *ics = xics->ics[icsid]; | |
311 | ||
312 | if (!test_and_clear_bit(icsid, icp->resend_map)) | |
313 | continue; | |
314 | if (!ics) | |
315 | continue; | |
316 | ics_check_resend(xics, ics, icp); | |
317 | } | |
318 | } | |
319 | ||
320 | static bool icp_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority, | |
321 | u32 *reject) | |
322 | { | |
323 | union kvmppc_icp_state old_state, new_state; | |
324 | bool success; | |
325 | ||
326 | XICS_DBG("try deliver %#x(P:%#x) to server %#x\n", irq, priority, | |
327 | icp->server_num); | |
328 | ||
329 | do { | |
330 | old_state = new_state = ACCESS_ONCE(icp->state); | |
331 | ||
332 | *reject = 0; | |
333 | ||
334 | /* See if we can deliver */ | |
335 | success = new_state.cppr > priority && | |
336 | new_state.mfrr > priority && | |
337 | new_state.pending_pri > priority; | |
338 | ||
339 | /* | |
340 | * If we can, check for a rejection and perform the | |
341 | * delivery | |
342 | */ | |
343 | if (success) { | |
344 | *reject = new_state.xisr; | |
345 | new_state.xisr = irq; | |
346 | new_state.pending_pri = priority; | |
347 | } else { | |
348 | /* | |
349 | * If we failed to deliver we set need_resend | |
350 | * so a subsequent CPPR state change causes us | |
351 | * to try a new delivery. | |
352 | */ | |
353 | new_state.need_resend = true; | |
354 | } | |
355 | ||
356 | } while (!icp_try_update(icp, old_state, new_state, false)); | |
357 | ||
358 | return success; | |
359 | } | |
360 | ||
361 | static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp, | |
362 | u32 new_irq) | |
363 | { | |
364 | struct ics_irq_state *state; | |
365 | struct kvmppc_ics *ics; | |
366 | u32 reject; | |
367 | u16 src; | |
368 | ||
369 | /* | |
370 | * This is used both for initial delivery of an interrupt and | |
371 | * for subsequent rejection. | |
372 | * | |
373 | * Rejection can be racy vs. resends. We have evaluated the | |
374 | * rejection in an atomic ICP transaction which is now complete, | |
375 | * so potentially the ICP can already accept the interrupt again. | |
376 | * | |
377 | * So we need to retry the delivery. Essentially the reject path | |
378 | * boils down to a failed delivery. Always. | |
379 | * | |
380 | * Now the interrupt could also have moved to a different target, | |
381 | * thus we may need to re-do the ICP lookup as well | |
382 | */ | |
383 | ||
384 | again: | |
385 | /* Get the ICS state and lock it */ | |
386 | ics = kvmppc_xics_find_ics(xics, new_irq, &src); | |
387 | if (!ics) { | |
388 | XICS_DBG("icp_deliver_irq: IRQ 0x%06x not found !\n", new_irq); | |
389 | return; | |
390 | } | |
391 | state = &ics->irq_state[src]; | |
392 | ||
393 | /* Get a lock on the ICS */ | |
394 | mutex_lock(&ics->lock); | |
395 | ||
396 | /* Get our server */ | |
397 | if (!icp || state->server != icp->server_num) { | |
398 | icp = kvmppc_xics_find_server(xics->kvm, state->server); | |
399 | if (!icp) { | |
400 | pr_warn("icp_deliver_irq: IRQ 0x%06x server 0x%x not found !\n", | |
401 | new_irq, state->server); | |
402 | goto out; | |
403 | } | |
404 | } | |
405 | ||
406 | /* Clear the resend bit of that interrupt */ | |
407 | state->resend = 0; | |
408 | ||
409 | /* | |
410 | * If masked, bail out | |
411 | * | |
412 | * Note: PAPR doesn't mention anything about masked pending | |
413 | * when doing a resend, only when doing a delivery. | |
414 | * | |
415 | * However that would have the effect of losing a masked | |
416 | * interrupt that was rejected and isn't consistent with | |
417 | * the whole masked_pending business which is about not | |
418 | * losing interrupts that occur while masked. | |
419 | * | |
420 | * I don't differenciate normal deliveries and resends, this | |
421 | * implementation will differ from PAPR and not lose such | |
422 | * interrupts. | |
423 | */ | |
424 | if (state->priority == MASKED) { | |
425 | XICS_DBG("irq %#x masked pending\n", new_irq); | |
426 | state->masked_pending = 1; | |
427 | goto out; | |
428 | } | |
429 | ||
430 | /* | |
431 | * Try the delivery, this will set the need_resend flag | |
432 | * in the ICP as part of the atomic transaction if the | |
433 | * delivery is not possible. | |
434 | * | |
435 | * Note that if successful, the new delivery might have itself | |
436 | * rejected an interrupt that was "delivered" before we took the | |
437 | * icp mutex. | |
438 | * | |
439 | * In this case we do the whole sequence all over again for the | |
440 | * new guy. We cannot assume that the rejected interrupt is less | |
441 | * favored than the new one, and thus doesn't need to be delivered, | |
442 | * because by the time we exit icp_try_to_deliver() the target | |
443 | * processor may well have alrady consumed & completed it, and thus | |
444 | * the rejected interrupt might actually be already acceptable. | |
445 | */ | |
446 | if (icp_try_to_deliver(icp, new_irq, state->priority, &reject)) { | |
447 | /* | |
448 | * Delivery was successful, did we reject somebody else ? | |
449 | */ | |
450 | if (reject && reject != XICS_IPI) { | |
451 | mutex_unlock(&ics->lock); | |
452 | new_irq = reject; | |
453 | goto again; | |
454 | } | |
455 | } else { | |
456 | /* | |
457 | * We failed to deliver the interrupt we need to set the | |
458 | * resend map bit and mark the ICS state as needing a resend | |
459 | */ | |
460 | set_bit(ics->icsid, icp->resend_map); | |
461 | state->resend = 1; | |
462 | ||
463 | /* | |
464 | * If the need_resend flag got cleared in the ICP some time | |
465 | * between icp_try_to_deliver() atomic update and now, then | |
466 | * we know it might have missed the resend_map bit. So we | |
467 | * retry | |
468 | */ | |
469 | smp_mb(); | |
470 | if (!icp->state.need_resend) { | |
471 | mutex_unlock(&ics->lock); | |
472 | goto again; | |
473 | } | |
474 | } | |
475 | out: | |
476 | mutex_unlock(&ics->lock); | |
477 | } | |
478 | ||
479 | static void icp_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp, | |
480 | u8 new_cppr) | |
481 | { | |
482 | union kvmppc_icp_state old_state, new_state; | |
483 | bool resend; | |
484 | ||
485 | /* | |
486 | * This handles several related states in one operation: | |
487 | * | |
488 | * ICP State: Down_CPPR | |
489 | * | |
490 | * Load CPPR with new value and if the XISR is 0 | |
491 | * then check for resends: | |
492 | * | |
493 | * ICP State: Resend | |
494 | * | |
495 | * If MFRR is more favored than CPPR, check for IPIs | |
496 | * and notify ICS of a potential resend. This is done | |
497 | * asynchronously (when used in real mode, we will have | |
498 | * to exit here). | |
499 | * | |
500 | * We do not handle the complete Check_IPI as documented | |
501 | * here. In the PAPR, this state will be used for both | |
502 | * Set_MFRR and Down_CPPR. However, we know that we aren't | |
503 | * changing the MFRR state here so we don't need to handle | |
504 | * the case of an MFRR causing a reject of a pending irq, | |
505 | * this will have been handled when the MFRR was set in the | |
506 | * first place. | |
507 | * | |
508 | * Thus we don't have to handle rejects, only resends. | |
509 | * | |
510 | * When implementing real mode for HV KVM, resend will lead to | |
511 | * a H_TOO_HARD return and the whole transaction will be handled | |
512 | * in virtual mode. | |
513 | */ | |
514 | do { | |
515 | old_state = new_state = ACCESS_ONCE(icp->state); | |
516 | ||
517 | /* Down_CPPR */ | |
518 | new_state.cppr = new_cppr; | |
519 | ||
520 | /* | |
521 | * Cut down Resend / Check_IPI / IPI | |
522 | * | |
523 | * The logic is that we cannot have a pending interrupt | |
524 | * trumped by an IPI at this point (see above), so we | |
525 | * know that either the pending interrupt is already an | |
526 | * IPI (in which case we don't care to override it) or | |
527 | * it's either more favored than us or non existent | |
528 | */ | |
529 | if (new_state.mfrr < new_cppr && | |
530 | new_state.mfrr <= new_state.pending_pri) { | |
531 | WARN_ON(new_state.xisr != XICS_IPI && | |
532 | new_state.xisr != 0); | |
533 | new_state.pending_pri = new_state.mfrr; | |
534 | new_state.xisr = XICS_IPI; | |
535 | } | |
536 | ||
537 | /* Latch/clear resend bit */ | |
538 | resend = new_state.need_resend; | |
539 | new_state.need_resend = 0; | |
540 | ||
541 | } while (!icp_try_update(icp, old_state, new_state, true)); | |
542 | ||
543 | /* | |
544 | * Now handle resend checks. Those are asynchronous to the ICP | |
545 | * state update in HW (ie bus transactions) so we can handle them | |
546 | * separately here too | |
547 | */ | |
548 | if (resend) | |
549 | icp_check_resend(xics, icp); | |
550 | } | |
551 | ||
e7d26f28 | 552 | static noinline unsigned long kvmppc_h_xirr(struct kvm_vcpu *vcpu) |
bc5ad3f3 BH |
553 | { |
554 | union kvmppc_icp_state old_state, new_state; | |
555 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
556 | u32 xirr; | |
557 | ||
558 | /* First, remove EE from the processor */ | |
559 | kvmppc_book3s_dequeue_irqprio(icp->vcpu, | |
560 | BOOK3S_INTERRUPT_EXTERNAL_LEVEL); | |
561 | ||
562 | /* | |
563 | * ICP State: Accept_Interrupt | |
564 | * | |
565 | * Return the pending interrupt (if any) along with the | |
566 | * current CPPR, then clear the XISR & set CPPR to the | |
567 | * pending priority | |
568 | */ | |
569 | do { | |
570 | old_state = new_state = ACCESS_ONCE(icp->state); | |
571 | ||
572 | xirr = old_state.xisr | (((u32)old_state.cppr) << 24); | |
573 | if (!old_state.xisr) | |
574 | break; | |
575 | new_state.cppr = new_state.pending_pri; | |
576 | new_state.pending_pri = 0xff; | |
577 | new_state.xisr = 0; | |
578 | ||
579 | } while (!icp_try_update(icp, old_state, new_state, true)); | |
580 | ||
581 | XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr); | |
582 | ||
583 | return xirr; | |
584 | } | |
585 | ||
e7d26f28 BH |
586 | static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server, |
587 | unsigned long mfrr) | |
bc5ad3f3 BH |
588 | { |
589 | union kvmppc_icp_state old_state, new_state; | |
590 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
591 | struct kvmppc_icp *icp; | |
592 | u32 reject; | |
593 | bool resend; | |
594 | bool local; | |
595 | ||
596 | XICS_DBG("h_ipi vcpu %d to server %lu mfrr %#lx\n", | |
597 | vcpu->vcpu_id, server, mfrr); | |
598 | ||
599 | icp = vcpu->arch.icp; | |
600 | local = icp->server_num == server; | |
601 | if (!local) { | |
602 | icp = kvmppc_xics_find_server(vcpu->kvm, server); | |
603 | if (!icp) | |
604 | return H_PARAMETER; | |
605 | } | |
606 | ||
607 | /* | |
608 | * ICP state: Set_MFRR | |
609 | * | |
610 | * If the CPPR is more favored than the new MFRR, then | |
611 | * nothing needs to be rejected as there can be no XISR to | |
612 | * reject. If the MFRR is being made less favored then | |
613 | * there might be a previously-rejected interrupt needing | |
614 | * to be resent. | |
615 | * | |
616 | * If the CPPR is less favored, then we might be replacing | |
617 | * an interrupt, and thus need to possibly reject it as in | |
618 | * | |
619 | * ICP state: Check_IPI | |
620 | */ | |
621 | do { | |
622 | old_state = new_state = ACCESS_ONCE(icp->state); | |
623 | ||
624 | /* Set_MFRR */ | |
625 | new_state.mfrr = mfrr; | |
626 | ||
627 | /* Check_IPI */ | |
628 | reject = 0; | |
629 | resend = false; | |
630 | if (mfrr < new_state.cppr) { | |
631 | /* Reject a pending interrupt if not an IPI */ | |
632 | if (mfrr <= new_state.pending_pri) | |
633 | reject = new_state.xisr; | |
634 | new_state.pending_pri = mfrr; | |
635 | new_state.xisr = XICS_IPI; | |
636 | } | |
637 | ||
638 | if (mfrr > old_state.mfrr && mfrr > new_state.cppr) { | |
639 | resend = new_state.need_resend; | |
640 | new_state.need_resend = 0; | |
641 | } | |
642 | } while (!icp_try_update(icp, old_state, new_state, local)); | |
643 | ||
644 | /* Handle reject */ | |
645 | if (reject && reject != XICS_IPI) | |
646 | icp_deliver_irq(xics, icp, reject); | |
647 | ||
648 | /* Handle resend */ | |
649 | if (resend) | |
650 | icp_check_resend(xics, icp); | |
651 | ||
652 | return H_SUCCESS; | |
653 | } | |
654 | ||
8e44ddc3 PM |
655 | static int kvmppc_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server) |
656 | { | |
657 | union kvmppc_icp_state state; | |
658 | struct kvmppc_icp *icp; | |
659 | ||
660 | icp = vcpu->arch.icp; | |
661 | if (icp->server_num != server) { | |
662 | icp = kvmppc_xics_find_server(vcpu->kvm, server); | |
663 | if (!icp) | |
664 | return H_PARAMETER; | |
665 | } | |
666 | state = ACCESS_ONCE(icp->state); | |
667 | kvmppc_set_gpr(vcpu, 4, ((u32)state.cppr << 24) | state.xisr); | |
668 | kvmppc_set_gpr(vcpu, 5, state.mfrr); | |
669 | return H_SUCCESS; | |
670 | } | |
671 | ||
e7d26f28 | 672 | static noinline void kvmppc_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr) |
bc5ad3f3 BH |
673 | { |
674 | union kvmppc_icp_state old_state, new_state; | |
675 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
676 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
677 | u32 reject; | |
678 | ||
679 | XICS_DBG("h_cppr vcpu %d cppr %#lx\n", vcpu->vcpu_id, cppr); | |
680 | ||
681 | /* | |
682 | * ICP State: Set_CPPR | |
683 | * | |
684 | * We can safely compare the new value with the current | |
685 | * value outside of the transaction as the CPPR is only | |
686 | * ever changed by the processor on itself | |
687 | */ | |
688 | if (cppr > icp->state.cppr) | |
689 | icp_down_cppr(xics, icp, cppr); | |
690 | else if (cppr == icp->state.cppr) | |
691 | return; | |
692 | ||
693 | /* | |
694 | * ICP State: Up_CPPR | |
695 | * | |
696 | * The processor is raising its priority, this can result | |
697 | * in a rejection of a pending interrupt: | |
698 | * | |
699 | * ICP State: Reject_Current | |
700 | * | |
701 | * We can remove EE from the current processor, the update | |
702 | * transaction will set it again if needed | |
703 | */ | |
704 | kvmppc_book3s_dequeue_irqprio(icp->vcpu, | |
705 | BOOK3S_INTERRUPT_EXTERNAL_LEVEL); | |
706 | ||
707 | do { | |
708 | old_state = new_state = ACCESS_ONCE(icp->state); | |
709 | ||
710 | reject = 0; | |
711 | new_state.cppr = cppr; | |
712 | ||
713 | if (cppr <= new_state.pending_pri) { | |
714 | reject = new_state.xisr; | |
715 | new_state.xisr = 0; | |
716 | new_state.pending_pri = 0xff; | |
717 | } | |
718 | ||
719 | } while (!icp_try_update(icp, old_state, new_state, true)); | |
720 | ||
721 | /* | |
722 | * Check for rejects. They are handled by doing a new delivery | |
723 | * attempt (see comments in icp_deliver_irq). | |
724 | */ | |
725 | if (reject && reject != XICS_IPI) | |
726 | icp_deliver_irq(xics, icp, reject); | |
727 | } | |
728 | ||
e7d26f28 | 729 | static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr) |
bc5ad3f3 BH |
730 | { |
731 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
732 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
733 | struct kvmppc_ics *ics; | |
734 | struct ics_irq_state *state; | |
735 | u32 irq = xirr & 0x00ffffff; | |
736 | u16 src; | |
737 | ||
738 | XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr); | |
739 | ||
740 | /* | |
741 | * ICP State: EOI | |
742 | * | |
743 | * Note: If EOI is incorrectly used by SW to lower the CPPR | |
744 | * value (ie more favored), we do not check for rejection of | |
745 | * a pending interrupt, this is a SW error and PAPR sepcifies | |
746 | * that we don't have to deal with it. | |
747 | * | |
748 | * The sending of an EOI to the ICS is handled after the | |
749 | * CPPR update | |
750 | * | |
751 | * ICP State: Down_CPPR which we handle | |
752 | * in a separate function as it's shared with H_CPPR. | |
753 | */ | |
754 | icp_down_cppr(xics, icp, xirr >> 24); | |
755 | ||
756 | /* IPIs have no EOI */ | |
757 | if (irq == XICS_IPI) | |
758 | return H_SUCCESS; | |
759 | /* | |
760 | * EOI handling: If the interrupt is still asserted, we need to | |
761 | * resend it. We can take a lockless "peek" at the ICS state here. | |
762 | * | |
763 | * "Message" interrupts will never have "asserted" set | |
764 | */ | |
765 | ics = kvmppc_xics_find_ics(xics, irq, &src); | |
766 | if (!ics) { | |
767 | XICS_DBG("h_eoi: IRQ 0x%06x not found !\n", irq); | |
768 | return H_PARAMETER; | |
769 | } | |
770 | state = &ics->irq_state[src]; | |
771 | ||
772 | /* Still asserted, resend it */ | |
773 | if (state->asserted) | |
774 | icp_deliver_irq(xics, icp, irq); | |
775 | ||
25a2150b PM |
776 | kvm_notify_acked_irq(vcpu->kvm, 0, irq); |
777 | ||
bc5ad3f3 BH |
778 | return H_SUCCESS; |
779 | } | |
780 | ||
e7d26f28 BH |
781 | static noinline int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall) |
782 | { | |
783 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
784 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
785 | ||
786 | XICS_DBG("XICS_RM: H_%x completing, act: %x state: %lx tgt: %p\n", | |
787 | hcall, icp->rm_action, icp->rm_dbgstate.raw, icp->rm_dbgtgt); | |
788 | ||
789 | if (icp->rm_action & XICS_RM_KICK_VCPU) | |
790 | kvmppc_fast_vcpu_kick(icp->rm_kick_target); | |
791 | if (icp->rm_action & XICS_RM_CHECK_RESEND) | |
792 | icp_check_resend(xics, icp); | |
793 | if (icp->rm_action & XICS_RM_REJECT) | |
794 | icp_deliver_irq(xics, icp, icp->rm_reject); | |
25a2150b PM |
795 | if (icp->rm_action & XICS_RM_NOTIFY_EOI) |
796 | kvm_notify_acked_irq(vcpu->kvm, 0, icp->rm_eoied_irq); | |
e7d26f28 BH |
797 | |
798 | icp->rm_action = 0; | |
799 | ||
800 | return H_SUCCESS; | |
801 | } | |
802 | ||
bc5ad3f3 BH |
803 | int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req) |
804 | { | |
e7d26f28 | 805 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; |
bc5ad3f3 BH |
806 | unsigned long res; |
807 | int rc = H_SUCCESS; | |
808 | ||
809 | /* Check if we have an ICP */ | |
e7d26f28 | 810 | if (!xics || !vcpu->arch.icp) |
bc5ad3f3 BH |
811 | return H_HARDWARE; |
812 | ||
8e44ddc3 PM |
813 | /* These requests don't have real-mode implementations at present */ |
814 | switch (req) { | |
815 | case H_XIRR_X: | |
816 | res = kvmppc_h_xirr(vcpu); | |
817 | kvmppc_set_gpr(vcpu, 4, res); | |
818 | kvmppc_set_gpr(vcpu, 5, get_tb()); | |
819 | return rc; | |
820 | case H_IPOLL: | |
821 | rc = kvmppc_h_ipoll(vcpu, kvmppc_get_gpr(vcpu, 4)); | |
822 | return rc; | |
823 | } | |
824 | ||
e7d26f28 | 825 | /* Check for real mode returning too hard */ |
a78b55d1 | 826 | if (xics->real_mode && is_kvmppc_hv_enabled(vcpu->kvm)) |
e7d26f28 BH |
827 | return kvmppc_xics_rm_complete(vcpu, req); |
828 | ||
bc5ad3f3 BH |
829 | switch (req) { |
830 | case H_XIRR: | |
e7d26f28 | 831 | res = kvmppc_h_xirr(vcpu); |
bc5ad3f3 BH |
832 | kvmppc_set_gpr(vcpu, 4, res); |
833 | break; | |
834 | case H_CPPR: | |
e7d26f28 | 835 | kvmppc_h_cppr(vcpu, kvmppc_get_gpr(vcpu, 4)); |
bc5ad3f3 BH |
836 | break; |
837 | case H_EOI: | |
e7d26f28 | 838 | rc = kvmppc_h_eoi(vcpu, kvmppc_get_gpr(vcpu, 4)); |
bc5ad3f3 BH |
839 | break; |
840 | case H_IPI: | |
e7d26f28 BH |
841 | rc = kvmppc_h_ipi(vcpu, kvmppc_get_gpr(vcpu, 4), |
842 | kvmppc_get_gpr(vcpu, 5)); | |
bc5ad3f3 BH |
843 | break; |
844 | } | |
845 | ||
846 | return rc; | |
847 | } | |
2ba9f0d8 | 848 | EXPORT_SYMBOL_GPL(kvmppc_xics_hcall); |
bc5ad3f3 BH |
849 | |
850 | ||
851 | /* -- Initialisation code etc. -- */ | |
852 | ||
853 | static int xics_debug_show(struct seq_file *m, void *private) | |
854 | { | |
855 | struct kvmppc_xics *xics = m->private; | |
856 | struct kvm *kvm = xics->kvm; | |
857 | struct kvm_vcpu *vcpu; | |
858 | int icsid, i; | |
859 | ||
860 | if (!kvm) | |
861 | return 0; | |
862 | ||
863 | seq_printf(m, "=========\nICP state\n=========\n"); | |
864 | ||
865 | kvm_for_each_vcpu(i, vcpu, kvm) { | |
866 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
867 | union kvmppc_icp_state state; | |
868 | ||
869 | if (!icp) | |
870 | continue; | |
871 | ||
872 | state.raw = ACCESS_ONCE(icp->state.raw); | |
873 | seq_printf(m, "cpu server %#lx XIRR:%#x PPRI:%#x CPPR:%#x MFRR:%#x OUT:%d NR:%d\n", | |
874 | icp->server_num, state.xisr, | |
875 | state.pending_pri, state.cppr, state.mfrr, | |
876 | state.out_ee, state.need_resend); | |
877 | } | |
878 | ||
879 | for (icsid = 0; icsid <= KVMPPC_XICS_MAX_ICS_ID; icsid++) { | |
880 | struct kvmppc_ics *ics = xics->ics[icsid]; | |
881 | ||
882 | if (!ics) | |
883 | continue; | |
884 | ||
885 | seq_printf(m, "=========\nICS state for ICS 0x%x\n=========\n", | |
886 | icsid); | |
887 | ||
888 | mutex_lock(&ics->lock); | |
889 | ||
890 | for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) { | |
891 | struct ics_irq_state *irq = &ics->irq_state[i]; | |
892 | ||
893 | seq_printf(m, "irq 0x%06x: server %#x prio %#x save prio %#x asserted %d resend %d masked pending %d\n", | |
894 | irq->number, irq->server, irq->priority, | |
895 | irq->saved_priority, irq->asserted, | |
896 | irq->resend, irq->masked_pending); | |
897 | ||
898 | } | |
899 | mutex_unlock(&ics->lock); | |
900 | } | |
901 | return 0; | |
902 | } | |
903 | ||
904 | static int xics_debug_open(struct inode *inode, struct file *file) | |
905 | { | |
906 | return single_open(file, xics_debug_show, inode->i_private); | |
907 | } | |
908 | ||
909 | static const struct file_operations xics_debug_fops = { | |
910 | .open = xics_debug_open, | |
911 | .read = seq_read, | |
912 | .llseek = seq_lseek, | |
913 | .release = single_release, | |
914 | }; | |
915 | ||
916 | static void xics_debugfs_init(struct kvmppc_xics *xics) | |
917 | { | |
918 | char *name; | |
919 | ||
920 | name = kasprintf(GFP_KERNEL, "kvm-xics-%p", xics); | |
921 | if (!name) { | |
922 | pr_err("%s: no memory for name\n", __func__); | |
923 | return; | |
924 | } | |
925 | ||
926 | xics->dentry = debugfs_create_file(name, S_IRUGO, powerpc_debugfs_root, | |
927 | xics, &xics_debug_fops); | |
928 | ||
929 | pr_debug("%s: created %s\n", __func__, name); | |
930 | kfree(name); | |
931 | } | |
932 | ||
5975a2e0 PM |
933 | static struct kvmppc_ics *kvmppc_xics_create_ics(struct kvm *kvm, |
934 | struct kvmppc_xics *xics, int irq) | |
bc5ad3f3 BH |
935 | { |
936 | struct kvmppc_ics *ics; | |
937 | int i, icsid; | |
938 | ||
939 | icsid = irq >> KVMPPC_XICS_ICS_SHIFT; | |
940 | ||
941 | mutex_lock(&kvm->lock); | |
942 | ||
943 | /* ICS already exists - somebody else got here first */ | |
944 | if (xics->ics[icsid]) | |
945 | goto out; | |
946 | ||
947 | /* Create the ICS */ | |
948 | ics = kzalloc(sizeof(struct kvmppc_ics), GFP_KERNEL); | |
949 | if (!ics) | |
950 | goto out; | |
951 | ||
952 | mutex_init(&ics->lock); | |
953 | ics->icsid = icsid; | |
954 | ||
955 | for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) { | |
956 | ics->irq_state[i].number = (icsid << KVMPPC_XICS_ICS_SHIFT) | i; | |
957 | ics->irq_state[i].priority = MASKED; | |
958 | ics->irq_state[i].saved_priority = MASKED; | |
959 | } | |
960 | smp_wmb(); | |
961 | xics->ics[icsid] = ics; | |
962 | ||
963 | if (icsid > xics->max_icsid) | |
964 | xics->max_icsid = icsid; | |
965 | ||
966 | out: | |
967 | mutex_unlock(&kvm->lock); | |
968 | return xics->ics[icsid]; | |
969 | } | |
970 | ||
971 | int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server_num) | |
972 | { | |
973 | struct kvmppc_icp *icp; | |
974 | ||
975 | if (!vcpu->kvm->arch.xics) | |
976 | return -ENODEV; | |
977 | ||
978 | if (kvmppc_xics_find_server(vcpu->kvm, server_num)) | |
979 | return -EEXIST; | |
980 | ||
981 | icp = kzalloc(sizeof(struct kvmppc_icp), GFP_KERNEL); | |
982 | if (!icp) | |
983 | return -ENOMEM; | |
984 | ||
985 | icp->vcpu = vcpu; | |
986 | icp->server_num = server_num; | |
987 | icp->state.mfrr = MASKED; | |
988 | icp->state.pending_pri = MASKED; | |
989 | vcpu->arch.icp = icp; | |
990 | ||
991 | XICS_DBG("created server for vcpu %d\n", vcpu->vcpu_id); | |
992 | ||
993 | return 0; | |
994 | } | |
995 | ||
8b78645c PM |
996 | u64 kvmppc_xics_get_icp(struct kvm_vcpu *vcpu) |
997 | { | |
998 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
999 | union kvmppc_icp_state state; | |
1000 | ||
1001 | if (!icp) | |
1002 | return 0; | |
1003 | state = icp->state; | |
1004 | return ((u64)state.cppr << KVM_REG_PPC_ICP_CPPR_SHIFT) | | |
1005 | ((u64)state.xisr << KVM_REG_PPC_ICP_XISR_SHIFT) | | |
1006 | ((u64)state.mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) | | |
1007 | ((u64)state.pending_pri << KVM_REG_PPC_ICP_PPRI_SHIFT); | |
1008 | } | |
1009 | ||
1010 | int kvmppc_xics_set_icp(struct kvm_vcpu *vcpu, u64 icpval) | |
1011 | { | |
1012 | struct kvmppc_icp *icp = vcpu->arch.icp; | |
1013 | struct kvmppc_xics *xics = vcpu->kvm->arch.xics; | |
1014 | union kvmppc_icp_state old_state, new_state; | |
1015 | struct kvmppc_ics *ics; | |
1016 | u8 cppr, mfrr, pending_pri; | |
1017 | u32 xisr; | |
1018 | u16 src; | |
1019 | bool resend; | |
1020 | ||
1021 | if (!icp || !xics) | |
1022 | return -ENOENT; | |
1023 | ||
1024 | cppr = icpval >> KVM_REG_PPC_ICP_CPPR_SHIFT; | |
1025 | xisr = (icpval >> KVM_REG_PPC_ICP_XISR_SHIFT) & | |
1026 | KVM_REG_PPC_ICP_XISR_MASK; | |
1027 | mfrr = icpval >> KVM_REG_PPC_ICP_MFRR_SHIFT; | |
1028 | pending_pri = icpval >> KVM_REG_PPC_ICP_PPRI_SHIFT; | |
1029 | ||
1030 | /* Require the new state to be internally consistent */ | |
1031 | if (xisr == 0) { | |
1032 | if (pending_pri != 0xff) | |
1033 | return -EINVAL; | |
1034 | } else if (xisr == XICS_IPI) { | |
1035 | if (pending_pri != mfrr || pending_pri >= cppr) | |
1036 | return -EINVAL; | |
1037 | } else { | |
1038 | if (pending_pri >= mfrr || pending_pri >= cppr) | |
1039 | return -EINVAL; | |
1040 | ics = kvmppc_xics_find_ics(xics, xisr, &src); | |
1041 | if (!ics) | |
1042 | return -EINVAL; | |
1043 | } | |
1044 | ||
1045 | new_state.raw = 0; | |
1046 | new_state.cppr = cppr; | |
1047 | new_state.xisr = xisr; | |
1048 | new_state.mfrr = mfrr; | |
1049 | new_state.pending_pri = pending_pri; | |
1050 | ||
1051 | /* | |
1052 | * Deassert the CPU interrupt request. | |
1053 | * icp_try_update will reassert it if necessary. | |
1054 | */ | |
1055 | kvmppc_book3s_dequeue_irqprio(icp->vcpu, | |
1056 | BOOK3S_INTERRUPT_EXTERNAL_LEVEL); | |
1057 | ||
1058 | /* | |
1059 | * Note that if we displace an interrupt from old_state.xisr, | |
1060 | * we don't mark it as rejected. We expect userspace to set | |
1061 | * the state of the interrupt sources to be consistent with | |
1062 | * the ICP states (either before or afterwards, which doesn't | |
1063 | * matter). We do handle resends due to CPPR becoming less | |
1064 | * favoured because that is necessary to end up with a | |
1065 | * consistent state in the situation where userspace restores | |
1066 | * the ICS states before the ICP states. | |
1067 | */ | |
1068 | do { | |
1069 | old_state = ACCESS_ONCE(icp->state); | |
1070 | ||
1071 | if (new_state.mfrr <= old_state.mfrr) { | |
1072 | resend = false; | |
1073 | new_state.need_resend = old_state.need_resend; | |
1074 | } else { | |
1075 | resend = old_state.need_resend; | |
1076 | new_state.need_resend = 0; | |
1077 | } | |
1078 | } while (!icp_try_update(icp, old_state, new_state, false)); | |
1079 | ||
1080 | if (resend) | |
1081 | icp_check_resend(xics, icp); | |
1082 | ||
1083 | return 0; | |
1084 | } | |
1085 | ||
5975a2e0 PM |
1086 | static int xics_get_source(struct kvmppc_xics *xics, long irq, u64 addr) |
1087 | { | |
1088 | int ret; | |
1089 | struct kvmppc_ics *ics; | |
1090 | struct ics_irq_state *irqp; | |
1091 | u64 __user *ubufp = (u64 __user *) addr; | |
1092 | u16 idx; | |
1093 | u64 val, prio; | |
1094 | ||
1095 | ics = kvmppc_xics_find_ics(xics, irq, &idx); | |
1096 | if (!ics) | |
1097 | return -ENOENT; | |
bc5ad3f3 | 1098 | |
5975a2e0 PM |
1099 | irqp = &ics->irq_state[idx]; |
1100 | mutex_lock(&ics->lock); | |
1101 | ret = -ENOENT; | |
1102 | if (irqp->exists) { | |
1103 | val = irqp->server; | |
1104 | prio = irqp->priority; | |
1105 | if (prio == MASKED) { | |
1106 | val |= KVM_XICS_MASKED; | |
1107 | prio = irqp->saved_priority; | |
1108 | } | |
1109 | val |= prio << KVM_XICS_PRIORITY_SHIFT; | |
1110 | if (irqp->asserted) | |
1111 | val |= KVM_XICS_LEVEL_SENSITIVE | KVM_XICS_PENDING; | |
1112 | else if (irqp->masked_pending || irqp->resend) | |
1113 | val |= KVM_XICS_PENDING; | |
1114 | ret = 0; | |
1115 | } | |
1116 | mutex_unlock(&ics->lock); | |
1117 | ||
1118 | if (!ret && put_user(val, ubufp)) | |
1119 | ret = -EFAULT; | |
1120 | ||
1121 | return ret; | |
1122 | } | |
1123 | ||
1124 | static int xics_set_source(struct kvmppc_xics *xics, long irq, u64 addr) | |
bc5ad3f3 | 1125 | { |
5975a2e0 PM |
1126 | struct kvmppc_ics *ics; |
1127 | struct ics_irq_state *irqp; | |
1128 | u64 __user *ubufp = (u64 __user *) addr; | |
1129 | u16 idx; | |
1130 | u64 val; | |
1131 | u8 prio; | |
1132 | u32 server; | |
1133 | ||
1134 | if (irq < KVMPPC_XICS_FIRST_IRQ || irq >= KVMPPC_XICS_NR_IRQS) | |
1135 | return -ENOENT; | |
1136 | ||
1137 | ics = kvmppc_xics_find_ics(xics, irq, &idx); | |
1138 | if (!ics) { | |
1139 | ics = kvmppc_xics_create_ics(xics->kvm, xics, irq); | |
1140 | if (!ics) | |
1141 | return -ENOMEM; | |
1142 | } | |
1143 | irqp = &ics->irq_state[idx]; | |
1144 | if (get_user(val, ubufp)) | |
1145 | return -EFAULT; | |
1146 | ||
1147 | server = val & KVM_XICS_DESTINATION_MASK; | |
1148 | prio = val >> KVM_XICS_PRIORITY_SHIFT; | |
1149 | if (prio != MASKED && | |
1150 | kvmppc_xics_find_server(xics->kvm, server) == NULL) | |
1151 | return -EINVAL; | |
bc5ad3f3 | 1152 | |
5975a2e0 PM |
1153 | mutex_lock(&ics->lock); |
1154 | irqp->server = server; | |
1155 | irqp->saved_priority = prio; | |
1156 | if (val & KVM_XICS_MASKED) | |
1157 | prio = MASKED; | |
1158 | irqp->priority = prio; | |
1159 | irqp->resend = 0; | |
1160 | irqp->masked_pending = 0; | |
1161 | irqp->asserted = 0; | |
1162 | if ((val & KVM_XICS_PENDING) && (val & KVM_XICS_LEVEL_SENSITIVE)) | |
1163 | irqp->asserted = 1; | |
1164 | irqp->exists = 1; | |
1165 | mutex_unlock(&ics->lock); | |
bc5ad3f3 | 1166 | |
5975a2e0 PM |
1167 | if (val & KVM_XICS_PENDING) |
1168 | icp_deliver_irq(xics, NULL, irqp->number); | |
bc5ad3f3 | 1169 | |
5975a2e0 PM |
1170 | return 0; |
1171 | } | |
1172 | ||
1173 | int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, | |
1174 | bool line_status) | |
1175 | { | |
1176 | struct kvmppc_xics *xics = kvm->arch.xics; | |
1177 | ||
25a2150b PM |
1178 | return ics_deliver_irq(xics, irq, level); |
1179 | } | |
1180 | ||
1181 | int kvm_set_msi(struct kvm_kernel_irq_routing_entry *irq_entry, struct kvm *kvm, | |
1182 | int irq_source_id, int level, bool line_status) | |
1183 | { | |
1184 | if (!level) | |
1185 | return -1; | |
1186 | return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi, | |
1187 | level, line_status); | |
5975a2e0 PM |
1188 | } |
1189 | ||
1190 | static int xics_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr) | |
1191 | { | |
1192 | struct kvmppc_xics *xics = dev->private; | |
1193 | ||
1194 | switch (attr->group) { | |
1195 | case KVM_DEV_XICS_GRP_SOURCES: | |
1196 | return xics_set_source(xics, attr->attr, attr->addr); | |
bc5ad3f3 | 1197 | } |
5975a2e0 PM |
1198 | return -ENXIO; |
1199 | } | |
bc5ad3f3 | 1200 | |
5975a2e0 PM |
1201 | static int xics_get_attr(struct kvm_device *dev, struct kvm_device_attr *attr) |
1202 | { | |
1203 | struct kvmppc_xics *xics = dev->private; | |
1204 | ||
1205 | switch (attr->group) { | |
1206 | case KVM_DEV_XICS_GRP_SOURCES: | |
1207 | return xics_get_source(xics, attr->attr, attr->addr); | |
1208 | } | |
1209 | return -ENXIO; | |
bc5ad3f3 BH |
1210 | } |
1211 | ||
5975a2e0 | 1212 | static int xics_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr) |
bc5ad3f3 | 1213 | { |
5975a2e0 PM |
1214 | switch (attr->group) { |
1215 | case KVM_DEV_XICS_GRP_SOURCES: | |
1216 | if (attr->attr >= KVMPPC_XICS_FIRST_IRQ && | |
1217 | attr->attr < KVMPPC_XICS_NR_IRQS) | |
1218 | return 0; | |
1219 | break; | |
1220 | } | |
1221 | return -ENXIO; | |
1222 | } | |
1223 | ||
1224 | static void kvmppc_xics_free(struct kvm_device *dev) | |
1225 | { | |
1226 | struct kvmppc_xics *xics = dev->private; | |
bc5ad3f3 BH |
1227 | int i; |
1228 | struct kvm *kvm = xics->kvm; | |
1229 | ||
1230 | debugfs_remove(xics->dentry); | |
1231 | ||
1232 | if (kvm) | |
1233 | kvm->arch.xics = NULL; | |
1234 | ||
1235 | for (i = 0; i <= xics->max_icsid; i++) | |
1236 | kfree(xics->ics[i]); | |
1237 | kfree(xics); | |
5975a2e0 | 1238 | kfree(dev); |
bc5ad3f3 BH |
1239 | } |
1240 | ||
5975a2e0 | 1241 | static int kvmppc_xics_create(struct kvm_device *dev, u32 type) |
bc5ad3f3 BH |
1242 | { |
1243 | struct kvmppc_xics *xics; | |
5975a2e0 | 1244 | struct kvm *kvm = dev->kvm; |
bc5ad3f3 BH |
1245 | int ret = 0; |
1246 | ||
1247 | xics = kzalloc(sizeof(*xics), GFP_KERNEL); | |
1248 | if (!xics) | |
1249 | return -ENOMEM; | |
1250 | ||
5975a2e0 PM |
1251 | dev->private = xics; |
1252 | xics->dev = dev; | |
bc5ad3f3 BH |
1253 | xics->kvm = kvm; |
1254 | ||
1255 | /* Already there ? */ | |
1256 | mutex_lock(&kvm->lock); | |
1257 | if (kvm->arch.xics) | |
1258 | ret = -EEXIST; | |
1259 | else | |
1260 | kvm->arch.xics = xics; | |
1261 | mutex_unlock(&kvm->lock); | |
1262 | ||
458ff3c0 GN |
1263 | if (ret) { |
1264 | kfree(xics); | |
bc5ad3f3 | 1265 | return ret; |
458ff3c0 | 1266 | } |
bc5ad3f3 BH |
1267 | |
1268 | xics_debugfs_init(xics); | |
1269 | ||
3a167bea | 1270 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
e7d26f28 BH |
1271 | if (cpu_has_feature(CPU_FTR_ARCH_206)) { |
1272 | /* Enable real mode support */ | |
1273 | xics->real_mode = ENABLE_REALMODE; | |
1274 | xics->real_mode_dbg = DEBUG_REALMODE; | |
1275 | } | |
3a167bea | 1276 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
e7d26f28 | 1277 | |
bc5ad3f3 BH |
1278 | return 0; |
1279 | } | |
1280 | ||
5975a2e0 PM |
1281 | struct kvm_device_ops kvm_xics_ops = { |
1282 | .name = "kvm-xics", | |
1283 | .create = kvmppc_xics_create, | |
1284 | .destroy = kvmppc_xics_free, | |
1285 | .set_attr = xics_set_attr, | |
1286 | .get_attr = xics_get_attr, | |
1287 | .has_attr = xics_has_attr, | |
1288 | }; | |
1289 | ||
1290 | int kvmppc_xics_connect_vcpu(struct kvm_device *dev, struct kvm_vcpu *vcpu, | |
1291 | u32 xcpu) | |
1292 | { | |
1293 | struct kvmppc_xics *xics = dev->private; | |
1294 | int r = -EBUSY; | |
1295 | ||
1296 | if (dev->ops != &kvm_xics_ops) | |
1297 | return -EPERM; | |
1298 | if (xics->kvm != vcpu->kvm) | |
1299 | return -EPERM; | |
1300 | if (vcpu->arch.irq_type) | |
1301 | return -EBUSY; | |
1302 | ||
1303 | r = kvmppc_xics_create_icp(vcpu, xcpu); | |
1304 | if (!r) | |
1305 | vcpu->arch.irq_type = KVMPPC_IRQ_XICS; | |
1306 | ||
1307 | return r; | |
1308 | } | |
1309 | ||
bc5ad3f3 BH |
1310 | void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu) |
1311 | { | |
1312 | if (!vcpu->arch.icp) | |
1313 | return; | |
1314 | kfree(vcpu->arch.icp); | |
1315 | vcpu->arch.icp = NULL; | |
1316 | vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT; | |
1317 | } | |
25a2150b PM |
1318 | |
1319 | static int xics_set_irq(struct kvm_kernel_irq_routing_entry *e, | |
1320 | struct kvm *kvm, int irq_source_id, int level, | |
1321 | bool line_status) | |
1322 | { | |
1323 | return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status); | |
1324 | } | |
1325 | ||
1326 | int kvm_irq_map_gsi(struct kvm *kvm, | |
1327 | struct kvm_kernel_irq_routing_entry *entries, int gsi) | |
1328 | { | |
1329 | entries->gsi = gsi; | |
1330 | entries->type = KVM_IRQ_ROUTING_IRQCHIP; | |
1331 | entries->set = xics_set_irq; | |
1332 | entries->irqchip.irqchip = 0; | |
1333 | entries->irqchip.pin = gsi; | |
1334 | return 1; | |
1335 | } | |
1336 | ||
1337 | int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) | |
1338 | { | |
1339 | return pin; | |
1340 | } |