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KVM: PPC: e500mc: add load inst fixup
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CommitLineData
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
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17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
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22 */
23
24#include <linux/errno.h>
25#include <linux/err.h>
26#include <linux/kvm_host.h>
5a0e3ad6 27#include <linux/gfp.h>
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28#include <linux/module.h>
29#include <linux/vmalloc.h>
30#include <linux/fs.h>
7924bd41 31
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32#include <asm/cputable.h>
33#include <asm/uaccess.h>
34#include <asm/kvm_ppc.h>
d9fbd03d 35#include <asm/cacheflush.h>
d30f6e48
SW
36#include <asm/dbell.h>
37#include <asm/hw_irq.h>
38#include <asm/irq.h>
bbf45ba5 39
d30f6e48 40#include "timing.h"
75f74f0d 41#include "booke.h"
bbf45ba5 42
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43unsigned long kvmppc_booke_handlers;
44
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45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
47
48struct kvm_stats_debugfs_item debugfs_entries[] = {
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49 { "mmio", VCPU_STAT(mmio_exits) },
50 { "dcr", VCPU_STAT(dcr_exits) },
51 { "sig", VCPU_STAT(signal_exits) },
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52 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
53 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
54 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
55 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
56 { "sysc", VCPU_STAT(syscall_exits) },
57 { "isi", VCPU_STAT(isi_exits) },
58 { "dsi", VCPU_STAT(dsi_exits) },
59 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
60 { "dec", VCPU_STAT(dec_exits) },
61 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
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63 { "doorbell", VCPU_STAT(dbell_exits) },
64 { "guest doorbell", VCPU_STAT(gdbell_exits) },
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65 { NULL }
66};
67
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68/* TODO: use vcpu_printf() */
69void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
70{
71 int i;
72
666e7252 73 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 74 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
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AG
75 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
76 vcpu->arch.shared->srr1);
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77
78 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
79
80 for (i = 0; i < 32; i += 4) {
5cf8ca22 81 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
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AG
82 kvmppc_get_gpr(vcpu, i),
83 kvmppc_get_gpr(vcpu, i+1),
84 kvmppc_get_gpr(vcpu, i+2),
85 kvmppc_get_gpr(vcpu, i+3));
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86 }
87}
88
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89#ifdef CONFIG_SPE
90void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
91{
92 preempt_disable();
93 enable_kernel_spe();
94 kvmppc_save_guest_spe(vcpu);
95 vcpu->arch.shadow_msr &= ~MSR_SPE;
96 preempt_enable();
97}
98
99static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
100{
101 preempt_disable();
102 enable_kernel_spe();
103 kvmppc_load_guest_spe(vcpu);
104 vcpu->arch.shadow_msr |= MSR_SPE;
105 preempt_enable();
106}
107
108static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
109{
110 if (vcpu->arch.shared->msr & MSR_SPE) {
111 if (!(vcpu->arch.shadow_msr & MSR_SPE))
112 kvmppc_vcpu_enable_spe(vcpu);
113 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
114 kvmppc_vcpu_disable_spe(vcpu);
115 }
116}
117#else
118static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
119{
120}
121#endif
122
dd9ebf1f
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123/*
124 * Helper function for "full" MSR writes. No need to call this if only
125 * EE/CE/ME/DE/RI are changing.
126 */
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127void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
128{
dd9ebf1f 129 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67 130
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131#ifdef CONFIG_KVM_BOOKE_HV
132 new_msr |= MSR_GS;
133#endif
134
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135 vcpu->arch.shared->msr = new_msr;
136
dd9ebf1f 137 kvmppc_mmu_msr_notify(vcpu, old_msr);
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138 kvmppc_vcpu_sync_spe(vcpu);
139}
140
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141static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
142 unsigned int priority)
9dd921cf 143{
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144 set_bit(priority, &vcpu->arch.pending_exceptions);
145}
146
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147static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
148 ulong dear_flags, ulong esr_flags)
9dd921cf 149{
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LY
150 vcpu->arch.queued_dear = dear_flags;
151 vcpu->arch.queued_esr = esr_flags;
152 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
153}
154
155static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
156 ulong dear_flags, ulong esr_flags)
157{
158 vcpu->arch.queued_dear = dear_flags;
159 vcpu->arch.queued_esr = esr_flags;
160 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
161}
162
163static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
164 ulong esr_flags)
165{
166 vcpu->arch.queued_esr = esr_flags;
167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
168}
169
170void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
171{
172 vcpu->arch.queued_esr = esr_flags;
d4cf3892 173 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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174}
175
176void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
177{
d4cf3892 178 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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179}
180
181int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
182{
d4cf3892 183 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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184}
185
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AG
186void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
187{
188 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
189}
190
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191void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
192 struct kvm_interrupt *irq)
193{
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194 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
195
196 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
197 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
198
199 kvmppc_booke_queue_irqprio(vcpu, prio);
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200}
201
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202void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
203 struct kvm_interrupt *irq)
204{
205 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 206 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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AG
207}
208
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209static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
210{
211#ifdef CONFIG_KVM_BOOKE_HV
212 mtspr(SPRN_GSRR0, srr0);
213 mtspr(SPRN_GSRR1, srr1);
214#else
215 vcpu->arch.shared->srr0 = srr0;
216 vcpu->arch.shared->srr1 = srr1;
217#endif
218}
219
220static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
221{
222 vcpu->arch.csrr0 = srr0;
223 vcpu->arch.csrr1 = srr1;
224}
225
226static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
227{
228 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
229 vcpu->arch.dsrr0 = srr0;
230 vcpu->arch.dsrr1 = srr1;
231 } else {
232 set_guest_csrr(vcpu, srr0, srr1);
233 }
234}
235
236static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
237{
238 vcpu->arch.mcsrr0 = srr0;
239 vcpu->arch.mcsrr1 = srr1;
240}
241
242static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
243{
244#ifdef CONFIG_KVM_BOOKE_HV
245 return mfspr(SPRN_GDEAR);
246#else
247 return vcpu->arch.shared->dar;
248#endif
249}
250
251static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
252{
253#ifdef CONFIG_KVM_BOOKE_HV
254 mtspr(SPRN_GDEAR, dear);
255#else
256 vcpu->arch.shared->dar = dear;
257#endif
258}
259
260static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
261{
262#ifdef CONFIG_KVM_BOOKE_HV
263 return mfspr(SPRN_GESR);
264#else
265 return vcpu->arch.shared->esr;
266#endif
267}
268
269static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
270{
271#ifdef CONFIG_KVM_BOOKE_HV
272 mtspr(SPRN_GESR, esr);
273#else
274 vcpu->arch.shared->esr = esr;
275#endif
276}
277
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278/* Deliver the interrupt of the corresponding priority, if possible. */
279static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
280 unsigned int priority)
bbf45ba5 281{
d4cf3892 282 int allowed = 0;
79300f8c 283 ulong msr_mask = 0;
daf5e271 284 bool update_esr = false, update_dear = false;
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AG
285 ulong crit_raw = vcpu->arch.shared->critical;
286 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
287 bool crit;
c5335f17 288 bool keep_irq = false;
d30f6e48 289 enum int_class int_class;
5c6cedf4
AG
290
291 /* Truncate crit indicators in 32 bit mode */
292 if (!(vcpu->arch.shared->msr & MSR_SF)) {
293 crit_raw &= 0xffffffff;
294 crit_r1 &= 0xffffffff;
295 }
296
297 /* Critical section when crit == r1 */
298 crit = (crit_raw == crit_r1);
299 /* ... and we're in supervisor mode */
300 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 301
c5335f17
AG
302 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
303 priority = BOOKE_IRQPRIO_EXTERNAL;
304 keep_irq = true;
305 }
306
d4cf3892 307 switch (priority) {
d4cf3892 308 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 309 case BOOKE_IRQPRIO_DATA_STORAGE:
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LY
310 update_dear = true;
311 /* fall through */
d4cf3892 312 case BOOKE_IRQPRIO_INST_STORAGE:
daf5e271
LY
313 case BOOKE_IRQPRIO_PROGRAM:
314 update_esr = true;
315 /* fall through */
316 case BOOKE_IRQPRIO_ITLB_MISS:
317 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 318 case BOOKE_IRQPRIO_FP_UNAVAIL:
bb3a8a17
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319 case BOOKE_IRQPRIO_SPE_UNAVAIL:
320 case BOOKE_IRQPRIO_SPE_FP_DATA:
321 case BOOKE_IRQPRIO_SPE_FP_ROUND:
d4cf3892
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322 case BOOKE_IRQPRIO_AP_UNAVAIL:
323 case BOOKE_IRQPRIO_ALIGNMENT:
324 allowed = 1;
79300f8c 325 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 326 int_class = INT_CLASS_NONCRIT;
bbf45ba5 327 break;
d4cf3892 328 case BOOKE_IRQPRIO_CRITICAL:
4ab96919 329 case BOOKE_IRQPRIO_DBELL_CRIT:
666e7252 330 allowed = vcpu->arch.shared->msr & MSR_CE;
d30f6e48 331 allowed = allowed && !crit;
79300f8c 332 msr_mask = MSR_ME;
d30f6e48 333 int_class = INT_CLASS_CRIT;
bbf45ba5 334 break;
d4cf3892 335 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 336 allowed = vcpu->arch.shared->msr & MSR_ME;
d30f6e48 337 allowed = allowed && !crit;
d30f6e48 338 int_class = INT_CLASS_MC;
bbf45ba5 339 break;
d4cf3892
HB
340 case BOOKE_IRQPRIO_DECREMENTER:
341 case BOOKE_IRQPRIO_FIT:
dfd4d47e
SW
342 keep_irq = true;
343 /* fall through */
344 case BOOKE_IRQPRIO_EXTERNAL:
4ab96919 345 case BOOKE_IRQPRIO_DBELL:
666e7252 346 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 347 allowed = allowed && !crit;
79300f8c 348 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 349 int_class = INT_CLASS_NONCRIT;
bbf45ba5 350 break;
d4cf3892 351 case BOOKE_IRQPRIO_DEBUG:
666e7252 352 allowed = vcpu->arch.shared->msr & MSR_DE;
d30f6e48 353 allowed = allowed && !crit;
79300f8c 354 msr_mask = MSR_ME;
d30f6e48 355 int_class = INT_CLASS_CRIT;
bbf45ba5 356 break;
bbf45ba5
HB
357 }
358
d4cf3892 359 if (allowed) {
d30f6e48
SW
360 switch (int_class) {
361 case INT_CLASS_NONCRIT:
362 set_guest_srr(vcpu, vcpu->arch.pc,
363 vcpu->arch.shared->msr);
364 break;
365 case INT_CLASS_CRIT:
366 set_guest_csrr(vcpu, vcpu->arch.pc,
367 vcpu->arch.shared->msr);
368 break;
369 case INT_CLASS_DBG:
370 set_guest_dsrr(vcpu, vcpu->arch.pc,
371 vcpu->arch.shared->msr);
372 break;
373 case INT_CLASS_MC:
374 set_guest_mcsrr(vcpu, vcpu->arch.pc,
375 vcpu->arch.shared->msr);
376 break;
377 }
378
d4cf3892 379 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 380 if (update_esr == true)
d30f6e48 381 set_guest_esr(vcpu, vcpu->arch.queued_esr);
daf5e271 382 if (update_dear == true)
d30f6e48 383 set_guest_dear(vcpu, vcpu->arch.queued_dear);
666e7252 384 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 385
c5335f17
AG
386 if (!keep_irq)
387 clear_bit(priority, &vcpu->arch.pending_exceptions);
bbf45ba5
HB
388 }
389
d30f6e48
SW
390#ifdef CONFIG_KVM_BOOKE_HV
391 /*
392 * If an interrupt is pending but masked, raise a guest doorbell
393 * so that we are notified when the guest enables the relevant
394 * MSR bit.
395 */
396 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
397 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
398 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
399 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
400 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
401 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
402#endif
403
d4cf3892 404 return allowed;
bbf45ba5
HB
405}
406
dfd4d47e
SW
407static void update_timer_ints(struct kvm_vcpu *vcpu)
408{
409 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
410 kvmppc_core_queue_dec(vcpu);
411 else
412 kvmppc_core_dequeue_dec(vcpu);
413}
414
c59a6a3e 415static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
bbf45ba5
HB
416{
417 unsigned long *pending = &vcpu->arch.pending_exceptions;
bbf45ba5
HB
418 unsigned int priority;
419
dfd4d47e
SW
420 if (vcpu->requests) {
421 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
422 smp_mb();
423 update_timer_ints(vcpu);
424 }
425 }
426
9ab80843 427 priority = __ffs(*pending);
bdc89f13 428 while (priority <= BOOKE_IRQPRIO_MAX) {
d4cf3892 429 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 430 break;
bbf45ba5
HB
431
432 priority = find_next_bit(pending,
433 BITS_PER_BYTE * sizeof(*pending),
434 priority + 1);
435 }
90bba358
AG
436
437 /* Tell the guest about our interrupt status */
29ac26ef 438 vcpu->arch.shared->int_pending = !!*pending;
bbf45ba5
HB
439}
440
c59a6a3e
SW
441/* Check pending exceptions and deliver one, if possible. */
442void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
443{
444 WARN_ON_ONCE(!irqs_disabled());
445
446 kvmppc_core_check_exceptions(vcpu);
447
448 if (vcpu->arch.shared->msr & MSR_WE) {
449 local_irq_enable();
450 kvm_vcpu_block(vcpu);
451 local_irq_disable();
452
453 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
454 kvmppc_core_check_exceptions(vcpu);
455 };
456}
457
df6909e5
PM
458int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
459{
460 int ret;
8fae845f
SW
461#ifdef CONFIG_PPC_FPU
462 unsigned int fpscr;
463 int fpexc_mode;
464 u64 fpr[32];
465#endif
df6909e5 466
af8f38b3
AG
467 if (!vcpu->arch.sane) {
468 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
469 return -EINVAL;
470 }
471
d30f6e48
SW
472 if (!current->thread.kvm_vcpu) {
473 WARN(1, "no vcpu\n");
474 return -EPERM;
475 }
476
df6909e5 477 local_irq_disable();
1d1ef222 478
25051b5a
SW
479 kvmppc_core_prepare_to_enter(vcpu);
480
1d1ef222
SW
481 if (signal_pending(current)) {
482 kvm_run->exit_reason = KVM_EXIT_INTR;
483 ret = -EINTR;
484 goto out;
485 }
486
df6909e5 487 kvm_guest_enter();
8fae845f
SW
488
489#ifdef CONFIG_PPC_FPU
490 /* Save userspace FPU state in stack */
491 enable_kernel_fp();
492 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
493 fpscr = current->thread.fpscr.val;
494 fpexc_mode = current->thread.fpexc_mode;
495
496 /* Restore guest FPU state to thread */
497 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
498 current->thread.fpscr.val = vcpu->arch.fpscr;
499
500 /*
501 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
502 * as always using the FPU. Kernel usage of FP (via
503 * enable_kernel_fp()) in this thread must not occur while
504 * vcpu->fpu_active is set.
505 */
506 vcpu->fpu_active = 1;
507
508 kvmppc_load_guest_fp(vcpu);
509#endif
510
df6909e5 511 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
8fae845f
SW
512
513#ifdef CONFIG_PPC_FPU
514 kvmppc_save_guest_fp(vcpu);
515
516 vcpu->fpu_active = 0;
517
518 /* Save guest FPU state from thread */
519 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
520 vcpu->arch.fpscr = current->thread.fpscr.val;
521
522 /* Restore userspace FPU state from stack */
523 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
524 current->thread.fpscr.val = fpscr;
525 current->thread.fpexc_mode = fpexc_mode;
526#endif
527
df6909e5 528 kvm_guest_exit();
df6909e5 529
1d1ef222
SW
530out:
531 local_irq_enable();
df6909e5
PM
532 return ret;
533}
534
d30f6e48
SW
535static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
536{
537 enum emulation_result er;
538
539 er = kvmppc_emulate_instruction(run, vcpu);
540 switch (er) {
541 case EMULATE_DONE:
542 /* don't overwrite subtypes, just account kvm_stats */
543 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
544 /* Future optimization: only reload non-volatiles if
545 * they were actually modified by emulation. */
546 return RESUME_GUEST_NV;
547
548 case EMULATE_DO_DCR:
549 run->exit_reason = KVM_EXIT_DCR;
550 return RESUME_HOST;
551
552 case EMULATE_FAIL:
553 /* XXX Deliver Program interrupt to guest. */
554 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
555 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
556 /* For debugging, encode the failing instruction and
557 * report it to userspace. */
558 run->hw.hardware_exit_reason = ~0ULL << 32;
559 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
560 return RESUME_HOST;
561
562 default:
563 BUG();
564 }
565}
566
bbf45ba5
HB
567/**
568 * kvmppc_handle_exit
569 *
570 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
571 */
572int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
573 unsigned int exit_nr)
574{
bbf45ba5
HB
575 int r = RESUME_HOST;
576
73e75b41
HB
577 /* update before a new last_exit_type is rewritten */
578 kvmppc_update_timing_stats(vcpu);
579
d30f6e48
SW
580 switch (exit_nr) {
581 case BOOKE_INTERRUPT_EXTERNAL:
582 do_IRQ(current->thread.regs);
583 break;
584
585 case BOOKE_INTERRUPT_DECREMENTER:
586 timer_interrupt(current->thread.regs);
587 break;
588
589#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
590 case BOOKE_INTERRUPT_DOORBELL:
591 doorbell_exception(current->thread.regs);
592 break;
593#endif
594 case BOOKE_INTERRUPT_MACHINE_CHECK:
595 /* FIXME */
596 break;
597 }
598
bbf45ba5
HB
599 local_irq_enable();
600
601 run->exit_reason = KVM_EXIT_UNKNOWN;
602 run->ready_for_interrupt_injection = 1;
603
604 switch (exit_nr) {
605 case BOOKE_INTERRUPT_MACHINE_CHECK:
d30f6e48
SW
606 kvm_resched(vcpu);
607 r = RESUME_GUEST;
bbf45ba5
HB
608 break;
609
610 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 611 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
d30f6e48 612 kvm_resched(vcpu);
1b6766c7
HB
613 r = RESUME_GUEST;
614 break;
615
bbf45ba5 616 case BOOKE_INTERRUPT_DECREMENTER:
7b701591 617 kvmppc_account_exit(vcpu, DEC_EXITS);
d30f6e48 618 kvm_resched(vcpu);
bbf45ba5
HB
619 r = RESUME_GUEST;
620 break;
621
d30f6e48
SW
622 case BOOKE_INTERRUPT_DOORBELL:
623 kvmppc_account_exit(vcpu, DBELL_EXITS);
624 kvm_resched(vcpu);
625 r = RESUME_GUEST;
626 break;
627
628 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
629 kvmppc_account_exit(vcpu, GDBELL_EXITS);
630
631 /*
632 * We are here because there is a pending guest interrupt
633 * which could not be delivered as MSR_CE or MSR_ME was not
634 * set. Once we break from here we will retry delivery.
635 */
636 r = RESUME_GUEST;
637 break;
638
639 case BOOKE_INTERRUPT_GUEST_DBELL:
640 kvmppc_account_exit(vcpu, GDBELL_EXITS);
641
642 /*
643 * We are here because there is a pending guest interrupt
644 * which could not be delivered as MSR_EE was not set. Once
645 * we break from here we will retry delivery.
646 */
647 r = RESUME_GUEST;
648 break;
649
650 case BOOKE_INTERRUPT_HV_PRIV:
651 r = emulation_exit(run, vcpu);
652 break;
653
bbf45ba5 654 case BOOKE_INTERRUPT_PROGRAM:
d30f6e48 655 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
bbf45ba5
HB
656 /* Program traps generated by user-level software must be handled
657 * by the guest kernel. */
daf5e271 658 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 659 r = RESUME_GUEST;
7b701591 660 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB
661 break;
662 }
663
d30f6e48 664 r = emulation_exit(run, vcpu);
bbf45ba5
HB
665 break;
666
de368dce 667 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 668 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 669 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE
670 r = RESUME_GUEST;
671 break;
672
4cd35f67
SW
673#ifdef CONFIG_SPE
674 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
675 if (vcpu->arch.shared->msr & MSR_SPE)
676 kvmppc_vcpu_enable_spe(vcpu);
677 else
678 kvmppc_booke_queue_irqprio(vcpu,
679 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB
680 r = RESUME_GUEST;
681 break;
4cd35f67 682 }
bb3a8a17
HB
683
684 case BOOKE_INTERRUPT_SPE_FP_DATA:
685 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
686 r = RESUME_GUEST;
687 break;
688
689 case BOOKE_INTERRUPT_SPE_FP_ROUND:
690 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
691 r = RESUME_GUEST;
692 break;
4cd35f67
SW
693#else
694 case BOOKE_INTERRUPT_SPE_UNAVAIL:
695 /*
696 * Guest wants SPE, but host kernel doesn't support it. Send
697 * an "unimplemented operation" program check to the guest.
698 */
699 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
700 r = RESUME_GUEST;
701 break;
702
703 /*
704 * These really should never happen without CONFIG_SPE,
705 * as we should never enable the real MSR[SPE] in the guest.
706 */
707 case BOOKE_INTERRUPT_SPE_FP_DATA:
708 case BOOKE_INTERRUPT_SPE_FP_ROUND:
709 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
710 __func__, exit_nr, vcpu->arch.pc);
711 run->hw.hardware_exit_reason = exit_nr;
712 r = RESUME_HOST;
713 break;
714#endif
bb3a8a17 715
bbf45ba5 716 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY
717 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
718 vcpu->arch.fault_esr);
7b701591 719 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB
720 r = RESUME_GUEST;
721 break;
722
723 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 724 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 725 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB
726 r = RESUME_GUEST;
727 break;
728
d30f6e48
SW
729#ifdef CONFIG_KVM_BOOKE_HV
730 case BOOKE_INTERRUPT_HV_SYSCALL:
731 if (!(vcpu->arch.shared->msr & MSR_PR)) {
732 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
733 } else {
734 /*
735 * hcall from guest userspace -- send privileged
736 * instruction program check.
737 */
738 kvmppc_core_queue_program(vcpu, ESR_PPR);
739 }
740
741 r = RESUME_GUEST;
742 break;
743#else
bbf45ba5 744 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG
745 if (!(vcpu->arch.shared->msr & MSR_PR) &&
746 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
747 /* KVM PV hypercalls */
748 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
749 r = RESUME_GUEST;
750 } else {
751 /* Guest syscalls */
752 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
753 }
7b701591 754 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB
755 r = RESUME_GUEST;
756 break;
d30f6e48 757#endif
bbf45ba5
HB
758
759 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 760 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 761 int gtlb_index;
475e7cdd 762 gpa_t gpaddr;
bbf45ba5
HB
763 gfn_t gfn;
764
a4cd8b23
SW
765#ifdef CONFIG_KVM_E500
766 if (!(vcpu->arch.shared->msr & MSR_PR) &&
767 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
768 kvmppc_map_magic(vcpu);
769 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
770 r = RESUME_GUEST;
771
772 break;
773 }
774#endif
775
bbf45ba5 776 /* Check the guest TLB. */
fa86b8dd 777 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 778 if (gtlb_index < 0) {
bbf45ba5 779 /* The guest didn't have a mapping for it. */
daf5e271
LY
780 kvmppc_core_queue_dtlb_miss(vcpu,
781 vcpu->arch.fault_dear,
782 vcpu->arch.fault_esr);
b52a638c 783 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 784 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB
785 r = RESUME_GUEST;
786 break;
787 }
788
be8d1cae 789 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 790 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
791
792 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
793 /* The guest TLB had a mapping, but the shadow TLB
794 * didn't, and it is RAM. This could be because:
795 * a) the entry is mapping the host kernel, or
796 * b) the guest used a large mapping which we're faking
797 * Either way, we need to satisfy the fault without
798 * invoking the guest. */
58a96214 799 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 800 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB
801 r = RESUME_GUEST;
802 } else {
803 /* Guest has mapped and accessed a page which is not
804 * actually RAM. */
475e7cdd 805 vcpu->arch.paddr_accessed = gpaddr;
bbf45ba5 806 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 807 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB
808 }
809
810 break;
811 }
812
813 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 814 unsigned long eaddr = vcpu->arch.pc;
89168618 815 gpa_t gpaddr;
bbf45ba5 816 gfn_t gfn;
7924bd41 817 int gtlb_index;
bbf45ba5
HB
818
819 r = RESUME_GUEST;
820
821 /* Check the guest TLB. */
fa86b8dd 822 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 823 if (gtlb_index < 0) {
bbf45ba5 824 /* The guest didn't have a mapping for it. */
d4cf3892 825 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 826 kvmppc_mmu_itlb_miss(vcpu);
7b701591 827 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB
828 break;
829 }
830
7b701591 831 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 832
be8d1cae 833 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 834 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
835
836 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
837 /* The guest TLB had a mapping, but the shadow TLB
838 * didn't. This could be because:
839 * a) the entry is mapping the host kernel, or
840 * b) the guest used a large mapping which we're faking
841 * Either way, we need to satisfy the fault without
842 * invoking the guest. */
58a96214 843 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB
844 } else {
845 /* Guest mapped and leaped at non-RAM! */
d4cf3892 846 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB
847 }
848
849 break;
850 }
851
6a0ab738
HB
852 case BOOKE_INTERRUPT_DEBUG: {
853 u32 dbsr;
854
855 vcpu->arch.pc = mfspr(SPRN_CSRR0);
856
857 /* clear IAC events in DBSR register */
858 dbsr = mfspr(SPRN_DBSR);
859 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
860 mtspr(SPRN_DBSR, dbsr);
861
862 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 863 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB
864 r = RESUME_HOST;
865 break;
866 }
867
bbf45ba5
HB
868 default:
869 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
870 BUG();
871 }
872
873 local_irq_disable();
874
7e28e60e 875 kvmppc_core_prepare_to_enter(vcpu);
bbf45ba5 876
bbf45ba5
HB
877 if (!(r & RESUME_HOST)) {
878 /* To avoid clobbering exit_reason, only check for signals if
879 * we aren't already exiting to userspace for some other
880 * reason. */
881 if (signal_pending(current)) {
882 run->exit_reason = KVM_EXIT_INTR;
883 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
7b701591 884 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
bbf45ba5
HB
885 }
886 }
887
888 return r;
889}
890
891/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
892int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
893{
082decf2 894 int i;
af8f38b3 895 int r;
082decf2 896
bbf45ba5 897 vcpu->arch.pc = 0;
b5904972 898 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 899 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
d30f6e48 900 kvmppc_set_msr(vcpu, 0);
bbf45ba5 901
d30f6e48
SW
902#ifndef CONFIG_KVM_BOOKE_HV
903 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
49dd2c49 904 vcpu->arch.shadow_pid = 1;
d30f6e48
SW
905 vcpu->arch.shared->msr = 0;
906#endif
49dd2c49 907
082decf2
HB
908 /* Eye-catching numbers so we know if the guest takes an interrupt
909 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 910 vcpu->arch.ivpr = 0x55550000;
082decf2
HB
911 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
912 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 913
73e75b41
HB
914 kvmppc_init_timing_stats(vcpu);
915
af8f38b3
AG
916 r = kvmppc_core_vcpu_setup(vcpu);
917 kvmppc_sanity_check(vcpu);
918 return r;
bbf45ba5
HB
919}
920
921int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
922{
923 int i;
924
925 regs->pc = vcpu->arch.pc;
992b5b29 926 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB
927 regs->ctr = vcpu->arch.ctr;
928 regs->lr = vcpu->arch.lr;
992b5b29 929 regs->xer = kvmppc_get_xer(vcpu);
666e7252 930 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG
931 regs->srr0 = vcpu->arch.shared->srr0;
932 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 933 regs->pid = vcpu->arch.pid;
a73a9599
AG
934 regs->sprg0 = vcpu->arch.shared->sprg0;
935 regs->sprg1 = vcpu->arch.shared->sprg1;
936 regs->sprg2 = vcpu->arch.shared->sprg2;
937 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW
938 regs->sprg4 = vcpu->arch.shared->sprg4;
939 regs->sprg5 = vcpu->arch.shared->sprg5;
940 regs->sprg6 = vcpu->arch.shared->sprg6;
941 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB
942
943 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 944 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB
945
946 return 0;
947}
948
949int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
950{
951 int i;
952
953 vcpu->arch.pc = regs->pc;
992b5b29 954 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB
955 vcpu->arch.ctr = regs->ctr;
956 vcpu->arch.lr = regs->lr;
992b5b29 957 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 958 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG
959 vcpu->arch.shared->srr0 = regs->srr0;
960 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 961 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG
962 vcpu->arch.shared->sprg0 = regs->sprg0;
963 vcpu->arch.shared->sprg1 = regs->sprg1;
964 vcpu->arch.shared->sprg2 = regs->sprg2;
965 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW
966 vcpu->arch.shared->sprg4 = regs->sprg4;
967 vcpu->arch.shared->sprg5 = regs->sprg5;
968 vcpu->arch.shared->sprg6 = regs->sprg6;
969 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 970
8e5b26b5
AG
971 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
972 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB
973
974 return 0;
975}
976
5ce941ee
SW
977static void get_sregs_base(struct kvm_vcpu *vcpu,
978 struct kvm_sregs *sregs)
979{
980 u64 tb = get_tb();
981
982 sregs->u.e.features |= KVM_SREGS_E_BASE;
983
984 sregs->u.e.csrr0 = vcpu->arch.csrr0;
985 sregs->u.e.csrr1 = vcpu->arch.csrr1;
986 sregs->u.e.mcsr = vcpu->arch.mcsr;
d30f6e48
SW
987 sregs->u.e.esr = get_guest_esr(vcpu);
988 sregs->u.e.dear = get_guest_dear(vcpu);
5ce941ee
SW
989 sregs->u.e.tsr = vcpu->arch.tsr;
990 sregs->u.e.tcr = vcpu->arch.tcr;
991 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
992 sregs->u.e.tb = tb;
993 sregs->u.e.vrsave = vcpu->arch.vrsave;
994}
995
996static int set_sregs_base(struct kvm_vcpu *vcpu,
997 struct kvm_sregs *sregs)
998{
999 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1000 return 0;
1001
1002 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1003 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1004 vcpu->arch.mcsr = sregs->u.e.mcsr;
d30f6e48
SW
1005 set_guest_esr(vcpu, sregs->u.e.esr);
1006 set_guest_dear(vcpu, sregs->u.e.dear);
5ce941ee 1007 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 1008 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 1009
dfd4d47e 1010 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 1011 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW
1012 kvmppc_emulate_dec(vcpu);
1013 }
5ce941ee
SW
1014
1015 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
dfd4d47e
SW
1016 vcpu->arch.tsr = sregs->u.e.tsr;
1017 update_timer_ints(vcpu);
5ce941ee
SW
1018 }
1019
1020 return 0;
1021}
1022
1023static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1024 struct kvm_sregs *sregs)
1025{
1026 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1027
841741f2 1028 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW
1029 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1030 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1031 sregs->u.e.decar = vcpu->arch.decar;
1032 sregs->u.e.ivpr = vcpu->arch.ivpr;
1033}
1034
1035static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1036 struct kvm_sregs *sregs)
1037{
1038 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1039 return 0;
1040
841741f2 1041 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW
1042 return -EINVAL;
1043
1044 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1045 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1046 vcpu->arch.decar = sregs->u.e.decar;
1047 vcpu->arch.ivpr = sregs->u.e.ivpr;
1048
1049 return 0;
1050}
1051
1052void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1053{
1054 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1055
1056 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1057 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1058 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1059 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1060 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1061 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1062 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1063 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1064 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1065 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1066 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1067 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1068 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1069 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1070 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1071 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1072}
1073
1074int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1075{
1076 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1077 return 0;
1078
1079 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1080 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1081 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1082 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1083 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1084 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1085 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1086 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1087 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1088 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1089 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1090 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1091 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1092 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1093 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1094 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1095
1096 return 0;
1097}
1098
bbf45ba5
HB
1099int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1100 struct kvm_sregs *sregs)
1101{
5ce941ee
SW
1102 sregs->pvr = vcpu->arch.pvr;
1103
1104 get_sregs_base(vcpu, sregs);
1105 get_sregs_arch206(vcpu, sregs);
1106 kvmppc_core_get_sregs(vcpu, sregs);
1107 return 0;
bbf45ba5
HB
1108}
1109
1110int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1111 struct kvm_sregs *sregs)
1112{
5ce941ee
SW
1113 int ret;
1114
1115 if (vcpu->arch.pvr != sregs->pvr)
1116 return -EINVAL;
1117
1118 ret = set_sregs_base(vcpu, sregs);
1119 if (ret < 0)
1120 return ret;
1121
1122 ret = set_sregs_arch206(vcpu, sregs);
1123 if (ret < 0)
1124 return ret;
1125
1126 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB
1127}
1128
31f3438e
PM
1129int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1130{
1131 return -EINVAL;
1132}
1133
1134int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1135{
1136 return -EINVAL;
1137}
1138
bbf45ba5
HB
1139int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1140{
1141 return -ENOTSUPP;
1142}
1143
1144int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1145{
1146 return -ENOTSUPP;
1147}
1148
bbf45ba5
HB
1149int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1150 struct kvm_translation *tr)
1151{
98001d8d
AK
1152 int r;
1153
98001d8d 1154 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 1155 return r;
bbf45ba5 1156}
d9fbd03d 1157
4e755758
AG
1158int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1159{
1160 return -ENOTSUPP;
1161}
1162
f9e0554d
PM
1163int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1164 struct kvm_userspace_memory_region *mem)
1165{
1166 return 0;
1167}
1168
1169void kvmppc_core_commit_memory_region(struct kvm *kvm,
1170 struct kvm_userspace_memory_region *mem)
1171{
1172}
1173
dfd4d47e
SW
1174void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1175{
1176 vcpu->arch.tcr = new_tcr;
1177 update_timer_ints(vcpu);
1178}
1179
1180void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1181{
1182 set_bits(tsr_bits, &vcpu->arch.tsr);
1183 smp_wmb();
1184 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1185 kvm_vcpu_kick(vcpu);
1186}
1187
1188void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1189{
1190 clear_bits(tsr_bits, &vcpu->arch.tsr);
1191 update_timer_ints(vcpu);
1192}
1193
1194void kvmppc_decrementer_func(unsigned long data)
1195{
1196 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1197
1198 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1199}
1200
94fa9d99
SW
1201void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1202{
d30f6e48 1203 current->thread.kvm_vcpu = vcpu;
94fa9d99
SW
1204}
1205
1206void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1207{
d30f6e48 1208 current->thread.kvm_vcpu = NULL;
94fa9d99
SW
1209}
1210
2986b8c7 1211int __init kvmppc_booke_init(void)
d9fbd03d 1212{
d30f6e48 1213#ifndef CONFIG_KVM_BOOKE_HV
d9fbd03d
HB
1214 unsigned long ivor[16];
1215 unsigned long max_ivor = 0;
1216 int i;
1217
1218 /* We install our own exception handlers by hijacking IVPR. IVPR must
1219 * be 16-bit aligned, so we need a 64KB allocation. */
1220 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1221 VCPU_SIZE_ORDER);
1222 if (!kvmppc_booke_handlers)
1223 return -ENOMEM;
1224
1225 /* XXX make sure our handlers are smaller than Linux's */
1226
1227 /* Copy our interrupt handlers to match host IVORs. That way we don't
1228 * have to swap the IVORs on every guest/host transition. */
1229 ivor[0] = mfspr(SPRN_IVOR0);
1230 ivor[1] = mfspr(SPRN_IVOR1);
1231 ivor[2] = mfspr(SPRN_IVOR2);
1232 ivor[3] = mfspr(SPRN_IVOR3);
1233 ivor[4] = mfspr(SPRN_IVOR4);
1234 ivor[5] = mfspr(SPRN_IVOR5);
1235 ivor[6] = mfspr(SPRN_IVOR6);
1236 ivor[7] = mfspr(SPRN_IVOR7);
1237 ivor[8] = mfspr(SPRN_IVOR8);
1238 ivor[9] = mfspr(SPRN_IVOR9);
1239 ivor[10] = mfspr(SPRN_IVOR10);
1240 ivor[11] = mfspr(SPRN_IVOR11);
1241 ivor[12] = mfspr(SPRN_IVOR12);
1242 ivor[13] = mfspr(SPRN_IVOR13);
1243 ivor[14] = mfspr(SPRN_IVOR14);
1244 ivor[15] = mfspr(SPRN_IVOR15);
1245
1246 for (i = 0; i < 16; i++) {
1247 if (ivor[i] > max_ivor)
1248 max_ivor = ivor[i];
1249
1250 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1251 kvmppc_handlers_start + i * kvmppc_handler_len,
1252 kvmppc_handler_len);
1253 }
1254 flush_icache_range(kvmppc_booke_handlers,
1255 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
d30f6e48 1256#endif /* !BOOKE_HV */
db93f574 1257 return 0;
d9fbd03d
HB
1258}
1259
db93f574 1260void __exit kvmppc_booke_exit(void)
d9fbd03d
HB
1261{
1262 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1263 kvm_exit();
1264}