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KVM: PPC: booke: Do Not start decrementer when SPRN_DEC set 0
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / booke.c
CommitLineData
bbf45ba5
HB		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
bbf45ba5
HB		 17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20 */
21
22#include <linux/errno.h>
23#include <linux/err.h>
24#include <linux/kvm_host.h>
5a0e3ad6 25#include <linux/gfp.h>
bbf45ba5
HB		 26#include <linux/module.h>
27#include <linux/vmalloc.h>
28#include <linux/fs.h>
7924bd41 29
bbf45ba5
HB		 30#include <asm/cputable.h>
31#include <asm/uaccess.h>
32#include <asm/kvm_ppc.h>
73e75b41 33#include "timing.h"
d9fbd03d 34#include <asm/cacheflush.h>
bbf45ba5 35
75f74f0d 36#include "booke.h"
bbf45ba5 37
d9fbd03d
HB		 38unsigned long kvmppc_booke_handlers;
39
bbf45ba5
HB		 40#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
41#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
42
43struct kvm_stats_debugfs_item debugfs_entries[] = {
bbf45ba5
HB		 44 { "mmio", VCPU_STAT(mmio_exits) },
45 { "dcr", VCPU_STAT(dcr_exits) },
46 { "sig", VCPU_STAT(signal_exits) },
bbf45ba5
HB		 47 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
48 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
49 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
50 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
51 { "sysc", VCPU_STAT(syscall_exits) },
52 { "isi", VCPU_STAT(isi_exits) },
53 { "dsi", VCPU_STAT(dsi_exits) },
54 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
55 { "dec", VCPU_STAT(dec_exits) },
56 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 57 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
bbf45ba5
HB		 58 { NULL }
59};
60
bbf45ba5
HB		 61/* TODO: use vcpu_printf() */
62void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
63{
64 int i;
65
666e7252 66 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 67 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
de7906c3
AG		 68 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
69 vcpu->arch.shared->srr1);
bbf45ba5
HB		 70
71 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
72
73 for (i = 0; i < 32; i += 4) {
5cf8ca22 74 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
8e5b26b5
AG		 75 kvmppc_get_gpr(vcpu, i),
76 kvmppc_get_gpr(vcpu, i+1),
77 kvmppc_get_gpr(vcpu, i+2),
78 kvmppc_get_gpr(vcpu, i+3));
bbf45ba5
HB		 79 }
80}
81
4cd35f67
SW		 82#ifdef CONFIG_SPE
83void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
84{
85 preempt_disable();
86 enable_kernel_spe();
87 kvmppc_save_guest_spe(vcpu);
88 vcpu->arch.shadow_msr &= ~MSR_SPE;
89 preempt_enable();
90}
91
92static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
93{
94 preempt_disable();
95 enable_kernel_spe();
96 kvmppc_load_guest_spe(vcpu);
97 vcpu->arch.shadow_msr |= MSR_SPE;
98 preempt_enable();
99}
100
101static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
102{
103 if (vcpu->arch.shared->msr & MSR_SPE) {
104 if (!(vcpu->arch.shadow_msr & MSR_SPE))
105 kvmppc_vcpu_enable_spe(vcpu);
106 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
107 kvmppc_vcpu_disable_spe(vcpu);
108 }
109}
110#else
111static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
112{
113}
114#endif
115
dd9ebf1f
LY		 116/*
117 * Helper function for "full" MSR writes. No need to call this if only
118 * EE/CE/ME/DE/RI are changing.
119 */
4cd35f67
SW		 120void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
121{
dd9ebf1f 122 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67
SW		 123
124 vcpu->arch.shared->msr = new_msr;
125
dd9ebf1f
LY		 126 kvmppc_mmu_msr_notify(vcpu, old_msr);
127
4cd35f67
SW		 128 if (vcpu->arch.shared->msr & MSR_WE) {
129 kvm_vcpu_block(vcpu);
130 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
131 };
132
133 kvmppc_vcpu_sync_spe(vcpu);
134}
135
d4cf3892
HB		 136static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
137 unsigned int priority)
9dd921cf 138{
9dd921cf
HB		 139 set_bit(priority, &vcpu->arch.pending_exceptions);
140}
141
daf5e271
LY		 142static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
143 ulong dear_flags, ulong esr_flags)
9dd921cf 144{
daf5e271
LY		 145 vcpu->arch.queued_dear = dear_flags;
146 vcpu->arch.queued_esr = esr_flags;
147 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
148}
149
150static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
151 ulong dear_flags, ulong esr_flags)
152{
153 vcpu->arch.queued_dear = dear_flags;
154 vcpu->arch.queued_esr = esr_flags;
155 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
156}
157
158static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
159 ulong esr_flags)
160{
161 vcpu->arch.queued_esr = esr_flags;
162 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
163}
164
165void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
166{
167 vcpu->arch.queued_esr = esr_flags;
d4cf3892 168 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
9dd921cf
HB		 169}
170
171void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
172{
d4cf3892 173 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
9dd921cf
HB		 174}
175
176int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
177{
d4cf3892 178 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
9dd921cf
HB		 179}
180
7706664d
AG		 181void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
182{
183 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
184}
185
9dd921cf
HB		 186void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
187 struct kvm_interrupt *irq)
188{
c5335f17
AG		 189 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
190
191 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
192 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
193
194 kvmppc_booke_queue_irqprio(vcpu, prio);
9dd921cf
HB		 195}
196
4496f974
AG		 197void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
198 struct kvm_interrupt *irq)
199{
200 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 201 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
4496f974
AG		 202}
203
d4cf3892
HB		 204/* Deliver the interrupt of the corresponding priority, if possible. */
205static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
206 unsigned int priority)
bbf45ba5 207{
d4cf3892 208 int allowed = 0;
6045be5d 209 ulong uninitialized_var(msr_mask);
daf5e271 210 bool update_esr = false, update_dear = false;
5c6cedf4
AG		 211 ulong crit_raw = vcpu->arch.shared->critical;
212 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
213 bool crit;
c5335f17 214 bool keep_irq = false;
5c6cedf4
AG		 215
216 /* Truncate crit indicators in 32 bit mode */
217 if (!(vcpu->arch.shared->msr & MSR_SF)) {
218 crit_raw &= 0xffffffff;
219 crit_r1 &= 0xffffffff;
220 }
221
222 /* Critical section when crit == r1 */
223 crit = (crit_raw == crit_r1);
224 /* ... and we're in supervisor mode */
225 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 226
c5335f17
AG		 227 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
228 priority = BOOKE_IRQPRIO_EXTERNAL;
229 keep_irq = true;
230 }
231
d4cf3892 232 switch (priority) {
d4cf3892 233 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 234 case BOOKE_IRQPRIO_DATA_STORAGE:
daf5e271
LY		 235 update_dear = true;
236 /* fall through */
d4cf3892 237 case BOOKE_IRQPRIO_INST_STORAGE:
daf5e271
LY		 238 case BOOKE_IRQPRIO_PROGRAM:
239 update_esr = true;
240 /* fall through */
241 case BOOKE_IRQPRIO_ITLB_MISS:
242 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 243 case BOOKE_IRQPRIO_FP_UNAVAIL:
bb3a8a17
HB		 244 case BOOKE_IRQPRIO_SPE_UNAVAIL:
245 case BOOKE_IRQPRIO_SPE_FP_DATA:
246 case BOOKE_IRQPRIO_SPE_FP_ROUND:
d4cf3892
HB		 247 case BOOKE_IRQPRIO_AP_UNAVAIL:
248 case BOOKE_IRQPRIO_ALIGNMENT:
249 allowed = 1;
250 msr_mask = MSR_CE|MSR_ME|MSR_DE;
bbf45ba5 251 break;
d4cf3892
HB		 252 case BOOKE_IRQPRIO_CRITICAL:
253 case BOOKE_IRQPRIO_WATCHDOG:
666e7252 254 allowed = vcpu->arch.shared->msr & MSR_CE;
d4cf3892 255 msr_mask = MSR_ME;
bbf45ba5 256 break;
d4cf3892 257 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 258 allowed = vcpu->arch.shared->msr & MSR_ME;
d4cf3892 259 msr_mask = 0;
bbf45ba5 260 break;
d4cf3892
HB		 261 case BOOKE_IRQPRIO_EXTERNAL:
262 case BOOKE_IRQPRIO_DECREMENTER:
263 case BOOKE_IRQPRIO_FIT:
666e7252 264 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 265 allowed = allowed && !crit;
d4cf3892 266 msr_mask = MSR_CE|MSR_ME|MSR_DE;
bbf45ba5 267 break;
d4cf3892 268 case BOOKE_IRQPRIO_DEBUG:
666e7252 269 allowed = vcpu->arch.shared->msr & MSR_DE;
d4cf3892 270 msr_mask = MSR_ME;
bbf45ba5 271 break;
bbf45ba5
HB		 272 }
273
d4cf3892 274 if (allowed) {
de7906c3
AG		 275 vcpu->arch.shared->srr0 = vcpu->arch.pc;
276 vcpu->arch.shared->srr1 = vcpu->arch.shared->msr;
d4cf3892 277 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271
LY		 278 if (update_esr == true)
279 vcpu->arch.esr = vcpu->arch.queued_esr;
280 if (update_dear == true)
5e030186 281 vcpu->arch.shared->dar = vcpu->arch.queued_dear;
666e7252 282 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 283
c5335f17
AG		 284 if (!keep_irq)
285 clear_bit(priority, &vcpu->arch.pending_exceptions);
bbf45ba5
HB		 286 }
287
d4cf3892 288 return allowed;
bbf45ba5
HB		 289}
290
291/* Check pending exceptions and deliver one, if possible. */
9dd921cf 292void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
bbf45ba5
HB		 293{
294 unsigned long *pending = &vcpu->arch.pending_exceptions;
90bba358 295 unsigned long old_pending = vcpu->arch.pending_exceptions;
bbf45ba5
HB		 296 unsigned int priority;
297
9ab80843 298 priority = __ffs(*pending);
bdc89f13 299 while (priority <= BOOKE_IRQPRIO_MAX) {
d4cf3892 300 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 301 break;
bbf45ba5
HB		 302
303 priority = find_next_bit(pending,
304 BITS_PER_BYTE * sizeof(*pending),
305 priority + 1);
306 }
90bba358
AG		 307
308 /* Tell the guest about our interrupt status */
309 if (*pending)
310 vcpu->arch.shared->int_pending = 1;
311 else if (old_pending)
312 vcpu->arch.shared->int_pending = 0;
bbf45ba5
HB		 313}
314
df6909e5
PM		 315int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
316{
317 int ret;
318
af8f38b3
AG		 319 if (!vcpu->arch.sane) {
320 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
321 return -EINVAL;
322 }
323
df6909e5
PM		 324 local_irq_disable();
325 kvm_guest_enter();
326 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
327 kvm_guest_exit();
328 local_irq_enable();
329
330 return ret;
331}
332
bbf45ba5
HB		 333/**
334 * kvmppc_handle_exit
335 *
336 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
337 */
338int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
339 unsigned int exit_nr)
340{
341 enum emulation_result er;
342 int r = RESUME_HOST;
343
73e75b41
HB		 344 /* update before a new last_exit_type is rewritten */
345 kvmppc_update_timing_stats(vcpu);
346
bbf45ba5
HB		 347 local_irq_enable();
348
349 run->exit_reason = KVM_EXIT_UNKNOWN;
350 run->ready_for_interrupt_injection = 1;
351
352 switch (exit_nr) {
353 case BOOKE_INTERRUPT_MACHINE_CHECK:
354 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
355 kvmppc_dump_vcpu(vcpu);
356 r = RESUME_HOST;
357 break;
358
359 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 360 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB		 361 if (need_resched())
362 cond_resched();
363 r = RESUME_GUEST;
364 break;
365
bbf45ba5
HB		 366 case BOOKE_INTERRUPT_DECREMENTER:
367 /* Since we switched IVPR back to the host's value, the host
368 * handled this interrupt the moment we enabled interrupts.
369 * Now we just offer it a chance to reschedule the guest. */
7b701591 370 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB		 371 if (need_resched())
372 cond_resched();
bbf45ba5
HB		 373 r = RESUME_GUEST;
374 break;
375
376 case BOOKE_INTERRUPT_PROGRAM:
666e7252 377 if (vcpu->arch.shared->msr & MSR_PR) {
bbf45ba5
HB		 378 /* Program traps generated by user-level software must be handled
379 * by the guest kernel. */
daf5e271 380 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 381 r = RESUME_GUEST;
7b701591 382 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB		 383 break;
384 }
385
386 er = kvmppc_emulate_instruction(run, vcpu);
387 switch (er) {
388 case EMULATE_DONE:
73e75b41 389 /* don't overwrite subtypes, just account kvm_stats */
7b701591 390 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
bbf45ba5
HB		 391 /* Future optimization: only reload non-volatiles if
392 * they were actually modified by emulation. */
bbf45ba5
HB		 393 r = RESUME_GUEST_NV;
394 break;
395 case EMULATE_DO_DCR:
396 run->exit_reason = KVM_EXIT_DCR;
397 r = RESUME_HOST;
398 break;
399 case EMULATE_FAIL:
400 /* XXX Deliver Program interrupt to guest. */
5cf8ca22 401 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
bbf45ba5
HB		 402 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
403 /* For debugging, encode the failing instruction and
404 * report it to userspace. */
405 run->hw.hardware_exit_reason = ~0ULL << 32;
406 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
407 r = RESUME_HOST;
408 break;
409 default:
410 BUG();
411 }
412 break;
413
de368dce 414 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 415 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 416 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE		 417 r = RESUME_GUEST;
418 break;
419
4cd35f67
SW		 420#ifdef CONFIG_SPE
421 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
422 if (vcpu->arch.shared->msr & MSR_SPE)
423 kvmppc_vcpu_enable_spe(vcpu);
424 else
425 kvmppc_booke_queue_irqprio(vcpu,
426 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB		 427 r = RESUME_GUEST;
428 break;
4cd35f67 429 }
bb3a8a17
HB		 430
431 case BOOKE_INTERRUPT_SPE_FP_DATA:
432 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
433 r = RESUME_GUEST;
434 break;
435
436 case BOOKE_INTERRUPT_SPE_FP_ROUND:
437 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
438 r = RESUME_GUEST;
439 break;
4cd35f67
SW		 440#else
441 case BOOKE_INTERRUPT_SPE_UNAVAIL:
442 /*
443 * Guest wants SPE, but host kernel doesn't support it. Send
444 * an "unimplemented operation" program check to the guest.
445 */
446 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
447 r = RESUME_GUEST;
448 break;
449
450 /*
451 * These really should never happen without CONFIG_SPE,
452 * as we should never enable the real MSR[SPE] in the guest.
453 */
454 case BOOKE_INTERRUPT_SPE_FP_DATA:
455 case BOOKE_INTERRUPT_SPE_FP_ROUND:
456 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
457 __func__, exit_nr, vcpu->arch.pc);
458 run->hw.hardware_exit_reason = exit_nr;
459 r = RESUME_HOST;
460 break;
461#endif
bb3a8a17 462
bbf45ba5 463 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY		 464 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
465 vcpu->arch.fault_esr);
7b701591 466 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB		 467 r = RESUME_GUEST;
468 break;
469
470 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 471 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 472 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB		 473 r = RESUME_GUEST;
474 break;
475
476 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG		 477 if (!(vcpu->arch.shared->msr & MSR_PR) &&
478 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
479 /* KVM PV hypercalls */
480 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
481 r = RESUME_GUEST;
482 } else {
483 /* Guest syscalls */
484 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
485 }
7b701591 486 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB		 487 r = RESUME_GUEST;
488 break;
489
490 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 491 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 492 int gtlb_index;
475e7cdd 493 gpa_t gpaddr;
bbf45ba5
HB		 494 gfn_t gfn;
495
a4cd8b23
SW		 496#ifdef CONFIG_KVM_E500
497 if (!(vcpu->arch.shared->msr & MSR_PR) &&
498 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
499 kvmppc_map_magic(vcpu);
500 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
501 r = RESUME_GUEST;
502
503 break;
504 }
505#endif
506
bbf45ba5 507 /* Check the guest TLB. */
fa86b8dd 508 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 509 if (gtlb_index < 0) {
bbf45ba5 510 /* The guest didn't have a mapping for it. */
daf5e271
LY		 511 kvmppc_core_queue_dtlb_miss(vcpu,
512 vcpu->arch.fault_dear,
513 vcpu->arch.fault_esr);
b52a638c 514 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 515 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB		 516 r = RESUME_GUEST;
517 break;
518 }
519
be8d1cae 520 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 521 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 522
523 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
524 /* The guest TLB had a mapping, but the shadow TLB
525 * didn't, and it is RAM. This could be because:
526 * a) the entry is mapping the host kernel, or
527 * b) the guest used a large mapping which we're faking
528 * Either way, we need to satisfy the fault without
529 * invoking the guest. */
58a96214 530 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 531 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB		 532 r = RESUME_GUEST;
533 } else {
534 /* Guest has mapped and accessed a page which is not
535 * actually RAM. */
475e7cdd 536 vcpu->arch.paddr_accessed = gpaddr;
bbf45ba5 537 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 538 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB		 539 }
540
541 break;
542 }
543
544 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 545 unsigned long eaddr = vcpu->arch.pc;
89168618 546 gpa_t gpaddr;
bbf45ba5 547 gfn_t gfn;
7924bd41 548 int gtlb_index;
bbf45ba5
HB		 549
550 r = RESUME_GUEST;
551
552 /* Check the guest TLB. */
fa86b8dd 553 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 554 if (gtlb_index < 0) {
bbf45ba5 555 /* The guest didn't have a mapping for it. */
d4cf3892 556 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 557 kvmppc_mmu_itlb_miss(vcpu);
7b701591 558 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB		 559 break;
560 }
561
7b701591 562 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 563
be8d1cae 564 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 565 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 566
567 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
568 /* The guest TLB had a mapping, but the shadow TLB
569 * didn't. This could be because:
570 * a) the entry is mapping the host kernel, or
571 * b) the guest used a large mapping which we're faking
572 * Either way, we need to satisfy the fault without
573 * invoking the guest. */
58a96214 574 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB		 575 } else {
576 /* Guest mapped and leaped at non-RAM! */
d4cf3892 577 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB		 578 }
579
580 break;
581 }
582
6a0ab738
HB		 583 case BOOKE_INTERRUPT_DEBUG: {
584 u32 dbsr;
585
586 vcpu->arch.pc = mfspr(SPRN_CSRR0);
587
588 /* clear IAC events in DBSR register */
589 dbsr = mfspr(SPRN_DBSR);
590 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
591 mtspr(SPRN_DBSR, dbsr);
592
593 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 594 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB		 595 r = RESUME_HOST;
596 break;
597 }
598
bbf45ba5
HB		 599 default:
600 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
601 BUG();
602 }
603
604 local_irq_disable();
605
9dd921cf 606 kvmppc_core_deliver_interrupts(vcpu);
bbf45ba5 607
bbf45ba5
HB		 608 if (!(r & RESUME_HOST)) {
609 /* To avoid clobbering exit_reason, only check for signals if
610 * we aren't already exiting to userspace for some other
611 * reason. */
612 if (signal_pending(current)) {
613 run->exit_reason = KVM_EXIT_INTR;
614 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
7b701591 615 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
bbf45ba5
HB		 616 }
617 }
618
619 return r;
620}
621
622/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
623int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
624{
082decf2 625 int i;
af8f38b3 626 int r;
082decf2 627
bbf45ba5 628 vcpu->arch.pc = 0;
666e7252 629 vcpu->arch.shared->msr = 0;
ecee273f 630 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
8e5b26b5 631 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
bbf45ba5 632
49dd2c49
HB		 633 vcpu->arch.shadow_pid = 1;
634
082decf2
HB		 635 /* Eye-catching numbers so we know if the guest takes an interrupt
636 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 637 vcpu->arch.ivpr = 0x55550000;
082decf2
HB		 638 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
639 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 640
73e75b41
HB		 641 kvmppc_init_timing_stats(vcpu);
642
af8f38b3
AG		 643 r = kvmppc_core_vcpu_setup(vcpu);
644 kvmppc_sanity_check(vcpu);
645 return r;
bbf45ba5
HB		 646}
647
648int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
649{
650 int i;
651
652 regs->pc = vcpu->arch.pc;
992b5b29 653 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB		 654 regs->ctr = vcpu->arch.ctr;
655 regs->lr = vcpu->arch.lr;
992b5b29 656 regs->xer = kvmppc_get_xer(vcpu);
666e7252 657 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG		 658 regs->srr0 = vcpu->arch.shared->srr0;
659 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 660 regs->pid = vcpu->arch.pid;
a73a9599
AG		 661 regs->sprg0 = vcpu->arch.shared->sprg0;
662 regs->sprg1 = vcpu->arch.shared->sprg1;
663 regs->sprg2 = vcpu->arch.shared->sprg2;
664 regs->sprg3 = vcpu->arch.shared->sprg3;
bc9c1933
PT		 665 regs->sprg4 = vcpu->arch.sprg4;
666 regs->sprg5 = vcpu->arch.sprg5;
667 regs->sprg6 = vcpu->arch.sprg6;
668 regs->sprg7 = vcpu->arch.sprg7;
bbf45ba5
HB		 669
670 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 671 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB		 672
673 return 0;
674}
675
676int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
677{
678 int i;
679
680 vcpu->arch.pc = regs->pc;
992b5b29 681 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB		 682 vcpu->arch.ctr = regs->ctr;
683 vcpu->arch.lr = regs->lr;
992b5b29 684 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 685 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG		 686 vcpu->arch.shared->srr0 = regs->srr0;
687 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 688 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG		 689 vcpu->arch.shared->sprg0 = regs->sprg0;
690 vcpu->arch.shared->sprg1 = regs->sprg1;
691 vcpu->arch.shared->sprg2 = regs->sprg2;
692 vcpu->arch.shared->sprg3 = regs->sprg3;
bc9c1933
PT		 693 vcpu->arch.sprg4 = regs->sprg4;
694 vcpu->arch.sprg5 = regs->sprg5;
695 vcpu->arch.sprg6 = regs->sprg6;
696 vcpu->arch.sprg7 = regs->sprg7;
bbf45ba5 697
8e5b26b5
AG		 698 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
699 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB		 700
701 return 0;
702}
703
5ce941ee
SW		 704static void get_sregs_base(struct kvm_vcpu *vcpu,
705 struct kvm_sregs *sregs)
706{
707 u64 tb = get_tb();
708
709 sregs->u.e.features |= KVM_SREGS_E_BASE;
710
711 sregs->u.e.csrr0 = vcpu->arch.csrr0;
712 sregs->u.e.csrr1 = vcpu->arch.csrr1;
713 sregs->u.e.mcsr = vcpu->arch.mcsr;
714 sregs->u.e.esr = vcpu->arch.esr;
715 sregs->u.e.dear = vcpu->arch.shared->dar;
716 sregs->u.e.tsr = vcpu->arch.tsr;
717 sregs->u.e.tcr = vcpu->arch.tcr;
718 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
719 sregs->u.e.tb = tb;
720 sregs->u.e.vrsave = vcpu->arch.vrsave;
721}
722
723static int set_sregs_base(struct kvm_vcpu *vcpu,
724 struct kvm_sregs *sregs)
725{
726 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
727 return 0;
728
729 vcpu->arch.csrr0 = sregs->u.e.csrr0;
730 vcpu->arch.csrr1 = sregs->u.e.csrr1;
731 vcpu->arch.mcsr = sregs->u.e.mcsr;
732 vcpu->arch.esr = sregs->u.e.esr;
733 vcpu->arch.shared->dar = sregs->u.e.dear;
734 vcpu->arch.vrsave = sregs->u.e.vrsave;
735 vcpu->arch.tcr = sregs->u.e.tcr;
736
737 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC)
738 vcpu->arch.dec = sregs->u.e.dec;
739
740 kvmppc_emulate_dec(vcpu);
741
742 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
743 /*
744 * FIXME: existing KVM timer handling is incomplete.
745 * TSR cannot be read by the guest, and its value in
746 * vcpu->arch is always zero. For now, just handle
747 * the case where the caller is trying to inject a
748 * decrementer interrupt.
749 */
750
751 if ((sregs->u.e.tsr & TSR_DIS) &&
752 (vcpu->arch.tcr & TCR_DIE))
753 kvmppc_core_queue_dec(vcpu);
754 }
755
756 return 0;
757}
758
759static void get_sregs_arch206(struct kvm_vcpu *vcpu,
760 struct kvm_sregs *sregs)
761{
762 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
763
841741f2 764 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW		 765 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
766 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
767 sregs->u.e.decar = vcpu->arch.decar;
768 sregs->u.e.ivpr = vcpu->arch.ivpr;
769}
770
771static int set_sregs_arch206(struct kvm_vcpu *vcpu,
772 struct kvm_sregs *sregs)
773{
774 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
775 return 0;
776
841741f2 777 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW		 778 return -EINVAL;
779
780 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
781 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
782 vcpu->arch.decar = sregs->u.e.decar;
783 vcpu->arch.ivpr = sregs->u.e.ivpr;
784
785 return 0;
786}
787
788void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
789{
790 sregs->u.e.features |= KVM_SREGS_E_IVOR;
791
792 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
793 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
794 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
795 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
796 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
797 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
798 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
799 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
800 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
801 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
802 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
803 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
804 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
805 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
806 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
807 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
808}
809
810int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
811{
812 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
813 return 0;
814
815 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
816 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
817 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
818 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
819 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
820 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
821 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
822 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
823 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
824 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
825 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
826 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
827 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
828 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
829 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
830 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
831
832 return 0;
833}
834
bbf45ba5
HB		 835int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
836 struct kvm_sregs *sregs)
837{
5ce941ee
SW		 838 sregs->pvr = vcpu->arch.pvr;
839
840 get_sregs_base(vcpu, sregs);
841 get_sregs_arch206(vcpu, sregs);
842 kvmppc_core_get_sregs(vcpu, sregs);
843 return 0;
bbf45ba5
HB		 844}
845
846int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
847 struct kvm_sregs *sregs)
848{
5ce941ee
SW		 849 int ret;
850
851 if (vcpu->arch.pvr != sregs->pvr)
852 return -EINVAL;
853
854 ret = set_sregs_base(vcpu, sregs);
855 if (ret < 0)
856 return ret;
857
858 ret = set_sregs_arch206(vcpu, sregs);
859 if (ret < 0)
860 return ret;
861
862 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB		 863}
864
865int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
866{
867 return -ENOTSUPP;
868}
869
870int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
871{
872 return -ENOTSUPP;
873}
874
bbf45ba5
HB		 875int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
876 struct kvm_translation *tr)
877{
98001d8d
AK		 878 int r;
879
98001d8d 880 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 881 return r;
bbf45ba5 882}
d9fbd03d 883
4e755758
AG		 884int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
885{
886 return -ENOTSUPP;
887}
888
f9e0554d
PM		 889int kvmppc_core_prepare_memory_region(struct kvm *kvm,
890 struct kvm_userspace_memory_region *mem)
891{
892 return 0;
893}
894
895void kvmppc_core_commit_memory_region(struct kvm *kvm,
896 struct kvm_userspace_memory_region *mem)
897{
898}
899
900int kvmppc_core_init_vm(struct kvm *kvm)
901{
902 return 0;
903}
904
905void kvmppc_core_destroy_vm(struct kvm *kvm)
906{
907}
908
2986b8c7 909int __init kvmppc_booke_init(void)
d9fbd03d
HB		 910{
911 unsigned long ivor[16];
912 unsigned long max_ivor = 0;
913 int i;
914
915 /* We install our own exception handlers by hijacking IVPR. IVPR must
916 * be 16-bit aligned, so we need a 64KB allocation. */
917 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
918 VCPU_SIZE_ORDER);
919 if (!kvmppc_booke_handlers)
920 return -ENOMEM;
921
922 /* XXX make sure our handlers are smaller than Linux's */
923
924 /* Copy our interrupt handlers to match host IVORs. That way we don't
925 * have to swap the IVORs on every guest/host transition. */
926 ivor[0] = mfspr(SPRN_IVOR0);
927 ivor[1] = mfspr(SPRN_IVOR1);
928 ivor[2] = mfspr(SPRN_IVOR2);
929 ivor[3] = mfspr(SPRN_IVOR3);
930 ivor[4] = mfspr(SPRN_IVOR4);
931 ivor[5] = mfspr(SPRN_IVOR5);
932 ivor[6] = mfspr(SPRN_IVOR6);
933 ivor[7] = mfspr(SPRN_IVOR7);
934 ivor[8] = mfspr(SPRN_IVOR8);
935 ivor[9] = mfspr(SPRN_IVOR9);
936 ivor[10] = mfspr(SPRN_IVOR10);
937 ivor[11] = mfspr(SPRN_IVOR11);
938 ivor[12] = mfspr(SPRN_IVOR12);
939 ivor[13] = mfspr(SPRN_IVOR13);
940 ivor[14] = mfspr(SPRN_IVOR14);
941 ivor[15] = mfspr(SPRN_IVOR15);
942
943 for (i = 0; i < 16; i++) {
944 if (ivor[i] > max_ivor)
945 max_ivor = ivor[i];
946
947 memcpy((void *)kvmppc_booke_handlers + ivor[i],
948 kvmppc_handlers_start + i * kvmppc_handler_len,
949 kvmppc_handler_len);
950 }
951 flush_icache_range(kvmppc_booke_handlers,
952 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
953
db93f574 954 return 0;
d9fbd03d
HB		 955}
956
db93f574 957void __exit kvmppc_booke_exit(void)
d9fbd03d
HB		 958{
959 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
960 kvm_exit();
961}
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