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CommitLineData
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
bbf45ba5
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17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
d30f6e48
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20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
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22 */
23
24#include <linux/errno.h>
25#include <linux/err.h>
26#include <linux/kvm_host.h>
5a0e3ad6 27#include <linux/gfp.h>
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28#include <linux/module.h>
29#include <linux/vmalloc.h>
30#include <linux/fs.h>
7924bd41 31
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32#include <asm/cputable.h>
33#include <asm/uaccess.h>
34#include <asm/kvm_ppc.h>
d9fbd03d 35#include <asm/cacheflush.h>
d30f6e48
SW
36#include <asm/dbell.h>
37#include <asm/hw_irq.h>
38#include <asm/irq.h>
bbf45ba5 39
d30f6e48 40#include "timing.h"
75f74f0d 41#include "booke.h"
97c95059 42#include "trace.h"
bbf45ba5 43
d9fbd03d
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44unsigned long kvmppc_booke_handlers;
45
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46#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
48
49struct kvm_stats_debugfs_item debugfs_entries[] = {
bbf45ba5
HB
50 { "mmio", VCPU_STAT(mmio_exits) },
51 { "dcr", VCPU_STAT(dcr_exits) },
52 { "sig", VCPU_STAT(signal_exits) },
bbf45ba5
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53 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
54 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
55 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
56 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
57 { "sysc", VCPU_STAT(syscall_exits) },
58 { "isi", VCPU_STAT(isi_exits) },
59 { "dsi", VCPU_STAT(dsi_exits) },
60 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
61 { "dec", VCPU_STAT(dec_exits) },
62 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 63 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
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SW
64 { "doorbell", VCPU_STAT(dbell_exits) },
65 { "guest doorbell", VCPU_STAT(gdbell_exits) },
cf1c5ca4 66 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
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67 { NULL }
68};
69
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70/* TODO: use vcpu_printf() */
71void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
72{
73 int i;
74
666e7252 75 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 76 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
de7906c3
AG
77 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
78 vcpu->arch.shared->srr1);
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79
80 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
81
82 for (i = 0; i < 32; i += 4) {
5cf8ca22 83 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
8e5b26b5
AG
84 kvmppc_get_gpr(vcpu, i),
85 kvmppc_get_gpr(vcpu, i+1),
86 kvmppc_get_gpr(vcpu, i+2),
87 kvmppc_get_gpr(vcpu, i+3));
bbf45ba5
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88 }
89}
90
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SW
91#ifdef CONFIG_SPE
92void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
93{
94 preempt_disable();
95 enable_kernel_spe();
96 kvmppc_save_guest_spe(vcpu);
97 vcpu->arch.shadow_msr &= ~MSR_SPE;
98 preempt_enable();
99}
100
101static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
102{
103 preempt_disable();
104 enable_kernel_spe();
105 kvmppc_load_guest_spe(vcpu);
106 vcpu->arch.shadow_msr |= MSR_SPE;
107 preempt_enable();
108}
109
110static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
111{
112 if (vcpu->arch.shared->msr & MSR_SPE) {
113 if (!(vcpu->arch.shadow_msr & MSR_SPE))
114 kvmppc_vcpu_enable_spe(vcpu);
115 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
116 kvmppc_vcpu_disable_spe(vcpu);
117 }
118}
119#else
120static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
121{
122}
123#endif
124
dd9ebf1f
LY
125/*
126 * Helper function for "full" MSR writes. No need to call this if only
127 * EE/CE/ME/DE/RI are changing.
128 */
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129void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
130{
dd9ebf1f 131 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67 132
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SW
133#ifdef CONFIG_KVM_BOOKE_HV
134 new_msr |= MSR_GS;
135#endif
136
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137 vcpu->arch.shared->msr = new_msr;
138
dd9ebf1f 139 kvmppc_mmu_msr_notify(vcpu, old_msr);
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SW
140 kvmppc_vcpu_sync_spe(vcpu);
141}
142
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143static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
144 unsigned int priority)
9dd921cf 145{
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146 set_bit(priority, &vcpu->arch.pending_exceptions);
147}
148
daf5e271
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149static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
150 ulong dear_flags, ulong esr_flags)
9dd921cf 151{
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LY
152 vcpu->arch.queued_dear = dear_flags;
153 vcpu->arch.queued_esr = esr_flags;
154 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
155}
156
157static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
158 ulong dear_flags, ulong esr_flags)
159{
160 vcpu->arch.queued_dear = dear_flags;
161 vcpu->arch.queued_esr = esr_flags;
162 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
163}
164
165static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
166 ulong esr_flags)
167{
168 vcpu->arch.queued_esr = esr_flags;
169 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
170}
171
172void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
173{
174 vcpu->arch.queued_esr = esr_flags;
d4cf3892 175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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176}
177
178void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
179{
d4cf3892 180 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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181}
182
183int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
184{
d4cf3892 185 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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186}
187
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AG
188void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
189{
190 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
191}
192
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193void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
194 struct kvm_interrupt *irq)
195{
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AG
196 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
197
198 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
199 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
200
201 kvmppc_booke_queue_irqprio(vcpu, prio);
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202}
203
4496f974
AG
204void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
205 struct kvm_interrupt *irq)
206{
207 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 208 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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AG
209}
210
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SW
211static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
212{
213#ifdef CONFIG_KVM_BOOKE_HV
214 mtspr(SPRN_GSRR0, srr0);
215 mtspr(SPRN_GSRR1, srr1);
216#else
217 vcpu->arch.shared->srr0 = srr0;
218 vcpu->arch.shared->srr1 = srr1;
219#endif
220}
221
222static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
223{
224 vcpu->arch.csrr0 = srr0;
225 vcpu->arch.csrr1 = srr1;
226}
227
228static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
229{
230 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
231 vcpu->arch.dsrr0 = srr0;
232 vcpu->arch.dsrr1 = srr1;
233 } else {
234 set_guest_csrr(vcpu, srr0, srr1);
235 }
236}
237
238static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
239{
240 vcpu->arch.mcsrr0 = srr0;
241 vcpu->arch.mcsrr1 = srr1;
242}
243
244static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
245{
246#ifdef CONFIG_KVM_BOOKE_HV
247 return mfspr(SPRN_GDEAR);
248#else
249 return vcpu->arch.shared->dar;
250#endif
251}
252
253static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
254{
255#ifdef CONFIG_KVM_BOOKE_HV
256 mtspr(SPRN_GDEAR, dear);
257#else
258 vcpu->arch.shared->dar = dear;
259#endif
260}
261
262static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
263{
264#ifdef CONFIG_KVM_BOOKE_HV
265 return mfspr(SPRN_GESR);
266#else
267 return vcpu->arch.shared->esr;
268#endif
269}
270
271static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
272{
273#ifdef CONFIG_KVM_BOOKE_HV
274 mtspr(SPRN_GESR, esr);
275#else
276 vcpu->arch.shared->esr = esr;
277#endif
278}
279
d4cf3892
HB
280/* Deliver the interrupt of the corresponding priority, if possible. */
281static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
282 unsigned int priority)
bbf45ba5 283{
d4cf3892 284 int allowed = 0;
79300f8c 285 ulong msr_mask = 0;
daf5e271 286 bool update_esr = false, update_dear = false;
5c6cedf4
AG
287 ulong crit_raw = vcpu->arch.shared->critical;
288 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
289 bool crit;
c5335f17 290 bool keep_irq = false;
d30f6e48 291 enum int_class int_class;
5c6cedf4
AG
292
293 /* Truncate crit indicators in 32 bit mode */
294 if (!(vcpu->arch.shared->msr & MSR_SF)) {
295 crit_raw &= 0xffffffff;
296 crit_r1 &= 0xffffffff;
297 }
298
299 /* Critical section when crit == r1 */
300 crit = (crit_raw == crit_r1);
301 /* ... and we're in supervisor mode */
302 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 303
c5335f17
AG
304 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
305 priority = BOOKE_IRQPRIO_EXTERNAL;
306 keep_irq = true;
307 }
308
d4cf3892 309 switch (priority) {
d4cf3892 310 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 311 case BOOKE_IRQPRIO_DATA_STORAGE:
daf5e271
LY
312 update_dear = true;
313 /* fall through */
d4cf3892 314 case BOOKE_IRQPRIO_INST_STORAGE:
daf5e271
LY
315 case BOOKE_IRQPRIO_PROGRAM:
316 update_esr = true;
317 /* fall through */
318 case BOOKE_IRQPRIO_ITLB_MISS:
319 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 320 case BOOKE_IRQPRIO_FP_UNAVAIL:
bb3a8a17
HB
321 case BOOKE_IRQPRIO_SPE_UNAVAIL:
322 case BOOKE_IRQPRIO_SPE_FP_DATA:
323 case BOOKE_IRQPRIO_SPE_FP_ROUND:
d4cf3892
HB
324 case BOOKE_IRQPRIO_AP_UNAVAIL:
325 case BOOKE_IRQPRIO_ALIGNMENT:
326 allowed = 1;
79300f8c 327 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 328 int_class = INT_CLASS_NONCRIT;
bbf45ba5 329 break;
d4cf3892 330 case BOOKE_IRQPRIO_CRITICAL:
4ab96919 331 case BOOKE_IRQPRIO_DBELL_CRIT:
666e7252 332 allowed = vcpu->arch.shared->msr & MSR_CE;
d30f6e48 333 allowed = allowed && !crit;
79300f8c 334 msr_mask = MSR_ME;
d30f6e48 335 int_class = INT_CLASS_CRIT;
bbf45ba5 336 break;
d4cf3892 337 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 338 allowed = vcpu->arch.shared->msr & MSR_ME;
d30f6e48 339 allowed = allowed && !crit;
d30f6e48 340 int_class = INT_CLASS_MC;
bbf45ba5 341 break;
d4cf3892
HB
342 case BOOKE_IRQPRIO_DECREMENTER:
343 case BOOKE_IRQPRIO_FIT:
dfd4d47e
SW
344 keep_irq = true;
345 /* fall through */
346 case BOOKE_IRQPRIO_EXTERNAL:
4ab96919 347 case BOOKE_IRQPRIO_DBELL:
666e7252 348 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 349 allowed = allowed && !crit;
79300f8c 350 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 351 int_class = INT_CLASS_NONCRIT;
bbf45ba5 352 break;
d4cf3892 353 case BOOKE_IRQPRIO_DEBUG:
666e7252 354 allowed = vcpu->arch.shared->msr & MSR_DE;
d30f6e48 355 allowed = allowed && !crit;
79300f8c 356 msr_mask = MSR_ME;
d30f6e48 357 int_class = INT_CLASS_CRIT;
bbf45ba5 358 break;
bbf45ba5
HB
359 }
360
d4cf3892 361 if (allowed) {
d30f6e48
SW
362 switch (int_class) {
363 case INT_CLASS_NONCRIT:
364 set_guest_srr(vcpu, vcpu->arch.pc,
365 vcpu->arch.shared->msr);
366 break;
367 case INT_CLASS_CRIT:
368 set_guest_csrr(vcpu, vcpu->arch.pc,
369 vcpu->arch.shared->msr);
370 break;
371 case INT_CLASS_DBG:
372 set_guest_dsrr(vcpu, vcpu->arch.pc,
373 vcpu->arch.shared->msr);
374 break;
375 case INT_CLASS_MC:
376 set_guest_mcsrr(vcpu, vcpu->arch.pc,
377 vcpu->arch.shared->msr);
378 break;
379 }
380
d4cf3892 381 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 382 if (update_esr == true)
d30f6e48 383 set_guest_esr(vcpu, vcpu->arch.queued_esr);
daf5e271 384 if (update_dear == true)
d30f6e48 385 set_guest_dear(vcpu, vcpu->arch.queued_dear);
666e7252 386 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 387
c5335f17
AG
388 if (!keep_irq)
389 clear_bit(priority, &vcpu->arch.pending_exceptions);
bbf45ba5
HB
390 }
391
d30f6e48
SW
392#ifdef CONFIG_KVM_BOOKE_HV
393 /*
394 * If an interrupt is pending but masked, raise a guest doorbell
395 * so that we are notified when the guest enables the relevant
396 * MSR bit.
397 */
398 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
399 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
400 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
401 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
402 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
403 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
404#endif
405
d4cf3892 406 return allowed;
bbf45ba5
HB
407}
408
dfd4d47e
SW
409static void update_timer_ints(struct kvm_vcpu *vcpu)
410{
411 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
412 kvmppc_core_queue_dec(vcpu);
413 else
414 kvmppc_core_dequeue_dec(vcpu);
415}
416
c59a6a3e 417static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
bbf45ba5
HB
418{
419 unsigned long *pending = &vcpu->arch.pending_exceptions;
bbf45ba5
HB
420 unsigned int priority;
421
dfd4d47e
SW
422 if (vcpu->requests) {
423 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
424 smp_mb();
425 update_timer_ints(vcpu);
426 }
427 }
428
9ab80843 429 priority = __ffs(*pending);
8b3a00fc 430 while (priority < BOOKE_IRQPRIO_MAX) {
d4cf3892 431 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 432 break;
bbf45ba5
HB
433
434 priority = find_next_bit(pending,
435 BITS_PER_BYTE * sizeof(*pending),
436 priority + 1);
437 }
90bba358
AG
438
439 /* Tell the guest about our interrupt status */
29ac26ef 440 vcpu->arch.shared->int_pending = !!*pending;
bbf45ba5
HB
441}
442
c59a6a3e 443/* Check pending exceptions and deliver one, if possible. */
a8e4ef84 444int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
c59a6a3e 445{
a8e4ef84 446 int r = 0;
c59a6a3e
SW
447 WARN_ON_ONCE(!irqs_disabled());
448
449 kvmppc_core_check_exceptions(vcpu);
450
451 if (vcpu->arch.shared->msr & MSR_WE) {
452 local_irq_enable();
453 kvm_vcpu_block(vcpu);
966cd0f3 454 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
c59a6a3e
SW
455 local_irq_disable();
456
457 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
a8e4ef84 458 r = 1;
c59a6a3e 459 };
a8e4ef84
AG
460
461 return r;
462}
463
464/*
465 * Common checks before entering the guest world. Call with interrupts
466 * disabled.
467 *
468 * returns !0 if a signal is pending and check_signal is true
469 */
03660ba2 470static int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
a8e4ef84
AG
471{
472 int r = 0;
473
474 WARN_ON_ONCE(!irqs_disabled());
475 while (true) {
476 if (need_resched()) {
477 local_irq_enable();
478 cond_resched();
479 local_irq_disable();
480 continue;
481 }
482
03660ba2 483 if (signal_pending(current)) {
a8e4ef84
AG
484 r = 1;
485 break;
486 }
487
488 if (kvmppc_core_prepare_to_enter(vcpu)) {
489 /* interrupts got enabled in between, so we
490 are back at square 1 */
491 continue;
492 }
493
494 break;
495 }
496
497 return r;
c59a6a3e
SW
498}
499
df6909e5
PM
500int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
501{
502 int ret;
8fae845f
SW
503#ifdef CONFIG_PPC_FPU
504 unsigned int fpscr;
505 int fpexc_mode;
506 u64 fpr[32];
507#endif
df6909e5 508
af8f38b3
AG
509 if (!vcpu->arch.sane) {
510 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
511 return -EINVAL;
512 }
513
df6909e5 514 local_irq_disable();
03660ba2 515 if (kvmppc_prepare_to_enter(vcpu)) {
1d1ef222
SW
516 kvm_run->exit_reason = KVM_EXIT_INTR;
517 ret = -EINTR;
518 goto out;
519 }
520
df6909e5 521 kvm_guest_enter();
8fae845f
SW
522
523#ifdef CONFIG_PPC_FPU
524 /* Save userspace FPU state in stack */
525 enable_kernel_fp();
526 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
527 fpscr = current->thread.fpscr.val;
528 fpexc_mode = current->thread.fpexc_mode;
529
530 /* Restore guest FPU state to thread */
531 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
532 current->thread.fpscr.val = vcpu->arch.fpscr;
533
534 /*
535 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
536 * as always using the FPU. Kernel usage of FP (via
537 * enable_kernel_fp()) in this thread must not occur while
538 * vcpu->fpu_active is set.
539 */
540 vcpu->fpu_active = 1;
541
542 kvmppc_load_guest_fp(vcpu);
543#endif
544
df6909e5 545 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
8fae845f
SW
546
547#ifdef CONFIG_PPC_FPU
548 kvmppc_save_guest_fp(vcpu);
549
550 vcpu->fpu_active = 0;
551
552 /* Save guest FPU state from thread */
553 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
554 vcpu->arch.fpscr = current->thread.fpscr.val;
555
556 /* Restore userspace FPU state from stack */
557 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
558 current->thread.fpscr.val = fpscr;
559 current->thread.fpexc_mode = fpexc_mode;
560#endif
561
df6909e5 562 kvm_guest_exit();
df6909e5 563
1d1ef222
SW
564out:
565 local_irq_enable();
df6909e5
PM
566 return ret;
567}
568
d30f6e48
SW
569static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
570{
571 enum emulation_result er;
572
573 er = kvmppc_emulate_instruction(run, vcpu);
574 switch (er) {
575 case EMULATE_DONE:
576 /* don't overwrite subtypes, just account kvm_stats */
577 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
578 /* Future optimization: only reload non-volatiles if
579 * they were actually modified by emulation. */
580 return RESUME_GUEST_NV;
581
582 case EMULATE_DO_DCR:
583 run->exit_reason = KVM_EXIT_DCR;
584 return RESUME_HOST;
585
586 case EMULATE_FAIL:
d30f6e48
SW
587 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
588 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
589 /* For debugging, encode the failing instruction and
590 * report it to userspace. */
591 run->hw.hardware_exit_reason = ~0ULL << 32;
592 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
d1ff5499 593 kvmppc_core_queue_program(vcpu, ESR_PIL);
d30f6e48
SW
594 return RESUME_HOST;
595
596 default:
597 BUG();
598 }
599}
600
4e642ccb 601static void kvmppc_fill_pt_regs(struct pt_regs *regs)
bbf45ba5 602{
4e642ccb 603 ulong r1, ip, msr, lr;
bbf45ba5 604
4e642ccb
AG
605 asm("mr %0, 1" : "=r"(r1));
606 asm("mflr %0" : "=r"(lr));
607 asm("mfmsr %0" : "=r"(msr));
608 asm("bl 1f; 1: mflr %0" : "=r"(ip));
609
610 memset(regs, 0, sizeof(*regs));
611 regs->gpr[1] = r1;
612 regs->nip = ip;
613 regs->msr = msr;
614 regs->link = lr;
615}
616
6328e593
BB
617/*
618 * For interrupts needed to be handled by host interrupt handlers,
619 * corresponding host handler are called from here in similar way
620 * (but not exact) as they are called from low level handler
621 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
622 */
4e642ccb
AG
623static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
624 unsigned int exit_nr)
625{
626 struct pt_regs regs;
73e75b41 627
d30f6e48
SW
628 switch (exit_nr) {
629 case BOOKE_INTERRUPT_EXTERNAL:
4e642ccb
AG
630 kvmppc_fill_pt_regs(&regs);
631 do_IRQ(&regs);
d30f6e48 632 break;
d30f6e48 633 case BOOKE_INTERRUPT_DECREMENTER:
4e642ccb
AG
634 kvmppc_fill_pt_regs(&regs);
635 timer_interrupt(&regs);
d30f6e48 636 break;
d30f6e48
SW
637#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
638 case BOOKE_INTERRUPT_DOORBELL:
4e642ccb
AG
639 kvmppc_fill_pt_regs(&regs);
640 doorbell_exception(&regs);
d30f6e48
SW
641 break;
642#endif
643 case BOOKE_INTERRUPT_MACHINE_CHECK:
644 /* FIXME */
645 break;
7cc1e8ee
AG
646 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
647 kvmppc_fill_pt_regs(&regs);
648 performance_monitor_exception(&regs);
649 break;
6328e593
BB
650 case BOOKE_INTERRUPT_WATCHDOG:
651 kvmppc_fill_pt_regs(&regs);
652#ifdef CONFIG_BOOKE_WDT
653 WatchdogException(&regs);
654#else
655 unknown_exception(&regs);
656#endif
657 break;
658 case BOOKE_INTERRUPT_CRITICAL:
659 unknown_exception(&regs);
660 break;
d30f6e48 661 }
4e642ccb
AG
662}
663
664/**
665 * kvmppc_handle_exit
666 *
667 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
668 */
669int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
670 unsigned int exit_nr)
671{
672 int r = RESUME_HOST;
673
674 /* update before a new last_exit_type is rewritten */
675 kvmppc_update_timing_stats(vcpu);
676
677 /* restart interrupts if they were meant for the host */
678 kvmppc_restart_interrupt(vcpu, exit_nr);
d30f6e48 679
bbf45ba5
HB
680 local_irq_enable();
681
97c95059
AG
682 trace_kvm_exit(exit_nr, vcpu);
683
bbf45ba5
HB
684 run->exit_reason = KVM_EXIT_UNKNOWN;
685 run->ready_for_interrupt_injection = 1;
686
687 switch (exit_nr) {
688 case BOOKE_INTERRUPT_MACHINE_CHECK:
c35c9d84
AG
689 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
690 kvmppc_dump_vcpu(vcpu);
691 /* For debugging, send invalid exit reason to user space */
692 run->hw.hardware_exit_reason = ~1ULL << 32;
693 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
694 r = RESUME_HOST;
bbf45ba5
HB
695 break;
696
697 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 698 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB
699 r = RESUME_GUEST;
700 break;
701
bbf45ba5 702 case BOOKE_INTERRUPT_DECREMENTER:
7b701591 703 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB
704 r = RESUME_GUEST;
705 break;
706
6328e593
BB
707 case BOOKE_INTERRUPT_WATCHDOG:
708 r = RESUME_GUEST;
709 break;
710
d30f6e48
SW
711 case BOOKE_INTERRUPT_DOORBELL:
712 kvmppc_account_exit(vcpu, DBELL_EXITS);
d30f6e48
SW
713 r = RESUME_GUEST;
714 break;
715
716 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
717 kvmppc_account_exit(vcpu, GDBELL_EXITS);
718
719 /*
720 * We are here because there is a pending guest interrupt
721 * which could not be delivered as MSR_CE or MSR_ME was not
722 * set. Once we break from here we will retry delivery.
723 */
724 r = RESUME_GUEST;
725 break;
726
727 case BOOKE_INTERRUPT_GUEST_DBELL:
728 kvmppc_account_exit(vcpu, GDBELL_EXITS);
729
730 /*
731 * We are here because there is a pending guest interrupt
732 * which could not be delivered as MSR_EE was not set. Once
733 * we break from here we will retry delivery.
734 */
735 r = RESUME_GUEST;
736 break;
737
95f2e921
AG
738 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
739 r = RESUME_GUEST;
740 break;
741
d30f6e48
SW
742 case BOOKE_INTERRUPT_HV_PRIV:
743 r = emulation_exit(run, vcpu);
744 break;
745
bbf45ba5 746 case BOOKE_INTERRUPT_PROGRAM:
d30f6e48 747 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
0268597c
AG
748 /*
749 * Program traps generated by user-level software must
750 * be handled by the guest kernel.
751 *
752 * In GS mode, hypervisor privileged instructions trap
753 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
754 * actual program interrupts, handled by the guest.
755 */
daf5e271 756 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 757 r = RESUME_GUEST;
7b701591 758 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB
759 break;
760 }
761
d30f6e48 762 r = emulation_exit(run, vcpu);
bbf45ba5
HB
763 break;
764
de368dce 765 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 766 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 767 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE
768 r = RESUME_GUEST;
769 break;
770
4cd35f67
SW
771#ifdef CONFIG_SPE
772 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
773 if (vcpu->arch.shared->msr & MSR_SPE)
774 kvmppc_vcpu_enable_spe(vcpu);
775 else
776 kvmppc_booke_queue_irqprio(vcpu,
777 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB
778 r = RESUME_GUEST;
779 break;
4cd35f67 780 }
bb3a8a17
HB
781
782 case BOOKE_INTERRUPT_SPE_FP_DATA:
783 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
784 r = RESUME_GUEST;
785 break;
786
787 case BOOKE_INTERRUPT_SPE_FP_ROUND:
788 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
789 r = RESUME_GUEST;
790 break;
4cd35f67
SW
791#else
792 case BOOKE_INTERRUPT_SPE_UNAVAIL:
793 /*
794 * Guest wants SPE, but host kernel doesn't support it. Send
795 * an "unimplemented operation" program check to the guest.
796 */
797 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
798 r = RESUME_GUEST;
799 break;
800
801 /*
802 * These really should never happen without CONFIG_SPE,
803 * as we should never enable the real MSR[SPE] in the guest.
804 */
805 case BOOKE_INTERRUPT_SPE_FP_DATA:
806 case BOOKE_INTERRUPT_SPE_FP_ROUND:
807 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
808 __func__, exit_nr, vcpu->arch.pc);
809 run->hw.hardware_exit_reason = exit_nr;
810 r = RESUME_HOST;
811 break;
812#endif
bb3a8a17 813
bbf45ba5 814 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY
815 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
816 vcpu->arch.fault_esr);
7b701591 817 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB
818 r = RESUME_GUEST;
819 break;
820
821 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 822 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 823 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB
824 r = RESUME_GUEST;
825 break;
826
d30f6e48
SW
827#ifdef CONFIG_KVM_BOOKE_HV
828 case BOOKE_INTERRUPT_HV_SYSCALL:
829 if (!(vcpu->arch.shared->msr & MSR_PR)) {
830 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
831 } else {
832 /*
833 * hcall from guest userspace -- send privileged
834 * instruction program check.
835 */
836 kvmppc_core_queue_program(vcpu, ESR_PPR);
837 }
838
839 r = RESUME_GUEST;
840 break;
841#else
bbf45ba5 842 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG
843 if (!(vcpu->arch.shared->msr & MSR_PR) &&
844 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
845 /* KVM PV hypercalls */
846 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
847 r = RESUME_GUEST;
848 } else {
849 /* Guest syscalls */
850 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
851 }
7b701591 852 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB
853 r = RESUME_GUEST;
854 break;
d30f6e48 855#endif
bbf45ba5
HB
856
857 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 858 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 859 int gtlb_index;
475e7cdd 860 gpa_t gpaddr;
bbf45ba5
HB
861 gfn_t gfn;
862
bf7ca4bd 863#ifdef CONFIG_KVM_E500V2
a4cd8b23
SW
864 if (!(vcpu->arch.shared->msr & MSR_PR) &&
865 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
866 kvmppc_map_magic(vcpu);
867 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
868 r = RESUME_GUEST;
869
870 break;
871 }
872#endif
873
bbf45ba5 874 /* Check the guest TLB. */
fa86b8dd 875 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 876 if (gtlb_index < 0) {
bbf45ba5 877 /* The guest didn't have a mapping for it. */
daf5e271
LY
878 kvmppc_core_queue_dtlb_miss(vcpu,
879 vcpu->arch.fault_dear,
880 vcpu->arch.fault_esr);
b52a638c 881 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 882 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB
883 r = RESUME_GUEST;
884 break;
885 }
886
be8d1cae 887 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 888 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
889
890 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
891 /* The guest TLB had a mapping, but the shadow TLB
892 * didn't, and it is RAM. This could be because:
893 * a) the entry is mapping the host kernel, or
894 * b) the guest used a large mapping which we're faking
895 * Either way, we need to satisfy the fault without
896 * invoking the guest. */
58a96214 897 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 898 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB
899 r = RESUME_GUEST;
900 } else {
901 /* Guest has mapped and accessed a page which is not
902 * actually RAM. */
475e7cdd 903 vcpu->arch.paddr_accessed = gpaddr;
6020c0f6 904 vcpu->arch.vaddr_accessed = eaddr;
bbf45ba5 905 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 906 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB
907 }
908
909 break;
910 }
911
912 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 913 unsigned long eaddr = vcpu->arch.pc;
89168618 914 gpa_t gpaddr;
bbf45ba5 915 gfn_t gfn;
7924bd41 916 int gtlb_index;
bbf45ba5
HB
917
918 r = RESUME_GUEST;
919
920 /* Check the guest TLB. */
fa86b8dd 921 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 922 if (gtlb_index < 0) {
bbf45ba5 923 /* The guest didn't have a mapping for it. */
d4cf3892 924 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 925 kvmppc_mmu_itlb_miss(vcpu);
7b701591 926 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB
927 break;
928 }
929
7b701591 930 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 931
be8d1cae 932 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 933 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
934
935 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
936 /* The guest TLB had a mapping, but the shadow TLB
937 * didn't. This could be because:
938 * a) the entry is mapping the host kernel, or
939 * b) the guest used a large mapping which we're faking
940 * Either way, we need to satisfy the fault without
941 * invoking the guest. */
58a96214 942 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB
943 } else {
944 /* Guest mapped and leaped at non-RAM! */
d4cf3892 945 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB
946 }
947
948 break;
949 }
950
6a0ab738
HB
951 case BOOKE_INTERRUPT_DEBUG: {
952 u32 dbsr;
953
954 vcpu->arch.pc = mfspr(SPRN_CSRR0);
955
956 /* clear IAC events in DBSR register */
957 dbsr = mfspr(SPRN_DBSR);
958 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
959 mtspr(SPRN_DBSR, dbsr);
960
961 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 962 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB
963 r = RESUME_HOST;
964 break;
965 }
966
bbf45ba5
HB
967 default:
968 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
969 BUG();
970 }
971
a8e4ef84
AG
972 /*
973 * To avoid clobbering exit_reason, only check for signals if we
974 * aren't already exiting to userspace for some other reason.
975 */
03660ba2
AG
976 if (!(r & RESUME_HOST)) {
977 local_irq_disable();
978 if (kvmppc_prepare_to_enter(vcpu)) {
979 run->exit_reason = KVM_EXIT_INTR;
980 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
981 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
982 }
bbf45ba5
HB
983 }
984
985 return r;
986}
987
988/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
989int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
990{
082decf2 991 int i;
af8f38b3 992 int r;
082decf2 993
bbf45ba5 994 vcpu->arch.pc = 0;
b5904972 995 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 996 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
d30f6e48 997 kvmppc_set_msr(vcpu, 0);
bbf45ba5 998
d30f6e48
SW
999#ifndef CONFIG_KVM_BOOKE_HV
1000 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
49dd2c49 1001 vcpu->arch.shadow_pid = 1;
d30f6e48
SW
1002 vcpu->arch.shared->msr = 0;
1003#endif
49dd2c49 1004
082decf2
HB
1005 /* Eye-catching numbers so we know if the guest takes an interrupt
1006 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 1007 vcpu->arch.ivpr = 0x55550000;
082decf2
HB
1008 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1009 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 1010
73e75b41
HB
1011 kvmppc_init_timing_stats(vcpu);
1012
af8f38b3
AG
1013 r = kvmppc_core_vcpu_setup(vcpu);
1014 kvmppc_sanity_check(vcpu);
1015 return r;
bbf45ba5
HB
1016}
1017
1018int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1019{
1020 int i;
1021
1022 regs->pc = vcpu->arch.pc;
992b5b29 1023 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB
1024 regs->ctr = vcpu->arch.ctr;
1025 regs->lr = vcpu->arch.lr;
992b5b29 1026 regs->xer = kvmppc_get_xer(vcpu);
666e7252 1027 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG
1028 regs->srr0 = vcpu->arch.shared->srr0;
1029 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 1030 regs->pid = vcpu->arch.pid;
a73a9599
AG
1031 regs->sprg0 = vcpu->arch.shared->sprg0;
1032 regs->sprg1 = vcpu->arch.shared->sprg1;
1033 regs->sprg2 = vcpu->arch.shared->sprg2;
1034 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW
1035 regs->sprg4 = vcpu->arch.shared->sprg4;
1036 regs->sprg5 = vcpu->arch.shared->sprg5;
1037 regs->sprg6 = vcpu->arch.shared->sprg6;
1038 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB
1039
1040 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 1041 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB
1042
1043 return 0;
1044}
1045
1046int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1047{
1048 int i;
1049
1050 vcpu->arch.pc = regs->pc;
992b5b29 1051 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB
1052 vcpu->arch.ctr = regs->ctr;
1053 vcpu->arch.lr = regs->lr;
992b5b29 1054 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 1055 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG
1056 vcpu->arch.shared->srr0 = regs->srr0;
1057 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 1058 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG
1059 vcpu->arch.shared->sprg0 = regs->sprg0;
1060 vcpu->arch.shared->sprg1 = regs->sprg1;
1061 vcpu->arch.shared->sprg2 = regs->sprg2;
1062 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW
1063 vcpu->arch.shared->sprg4 = regs->sprg4;
1064 vcpu->arch.shared->sprg5 = regs->sprg5;
1065 vcpu->arch.shared->sprg6 = regs->sprg6;
1066 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 1067
8e5b26b5
AG
1068 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1069 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB
1070
1071 return 0;
1072}
1073
5ce941ee
SW
1074static void get_sregs_base(struct kvm_vcpu *vcpu,
1075 struct kvm_sregs *sregs)
1076{
1077 u64 tb = get_tb();
1078
1079 sregs->u.e.features |= KVM_SREGS_E_BASE;
1080
1081 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1082 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1083 sregs->u.e.mcsr = vcpu->arch.mcsr;
d30f6e48
SW
1084 sregs->u.e.esr = get_guest_esr(vcpu);
1085 sregs->u.e.dear = get_guest_dear(vcpu);
5ce941ee
SW
1086 sregs->u.e.tsr = vcpu->arch.tsr;
1087 sregs->u.e.tcr = vcpu->arch.tcr;
1088 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1089 sregs->u.e.tb = tb;
1090 sregs->u.e.vrsave = vcpu->arch.vrsave;
1091}
1092
1093static int set_sregs_base(struct kvm_vcpu *vcpu,
1094 struct kvm_sregs *sregs)
1095{
1096 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1097 return 0;
1098
1099 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1100 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1101 vcpu->arch.mcsr = sregs->u.e.mcsr;
d30f6e48
SW
1102 set_guest_esr(vcpu, sregs->u.e.esr);
1103 set_guest_dear(vcpu, sregs->u.e.dear);
5ce941ee 1104 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 1105 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 1106
dfd4d47e 1107 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 1108 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW
1109 kvmppc_emulate_dec(vcpu);
1110 }
5ce941ee
SW
1111
1112 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
dfd4d47e
SW
1113 vcpu->arch.tsr = sregs->u.e.tsr;
1114 update_timer_ints(vcpu);
5ce941ee
SW
1115 }
1116
1117 return 0;
1118}
1119
1120static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1121 struct kvm_sregs *sregs)
1122{
1123 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1124
841741f2 1125 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW
1126 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1127 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1128 sregs->u.e.decar = vcpu->arch.decar;
1129 sregs->u.e.ivpr = vcpu->arch.ivpr;
1130}
1131
1132static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1133 struct kvm_sregs *sregs)
1134{
1135 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1136 return 0;
1137
841741f2 1138 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW
1139 return -EINVAL;
1140
1141 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1142 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1143 vcpu->arch.decar = sregs->u.e.decar;
1144 vcpu->arch.ivpr = sregs->u.e.ivpr;
1145
1146 return 0;
1147}
1148
1149void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1150{
1151 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1152
1153 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1154 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1155 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1156 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1157 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1158 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1159 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1160 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1161 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1162 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1163 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1164 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1165 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1166 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1167 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1168 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1169}
1170
1171int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1172{
1173 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1174 return 0;
1175
1176 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1177 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1178 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1179 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1180 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1181 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1182 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1183 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1184 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1185 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1186 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1187 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1188 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1189 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1190 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1191 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1192
1193 return 0;
1194}
1195
bbf45ba5
HB
1196int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1197 struct kvm_sregs *sregs)
1198{
5ce941ee
SW
1199 sregs->pvr = vcpu->arch.pvr;
1200
1201 get_sregs_base(vcpu, sregs);
1202 get_sregs_arch206(vcpu, sregs);
1203 kvmppc_core_get_sregs(vcpu, sregs);
1204 return 0;
bbf45ba5
HB
1205}
1206
1207int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1208 struct kvm_sregs *sregs)
1209{
5ce941ee
SW
1210 int ret;
1211
1212 if (vcpu->arch.pvr != sregs->pvr)
1213 return -EINVAL;
1214
1215 ret = set_sregs_base(vcpu, sregs);
1216 if (ret < 0)
1217 return ret;
1218
1219 ret = set_sregs_arch206(vcpu, sregs);
1220 if (ret < 0)
1221 return ret;
1222
1223 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB
1224}
1225
31f3438e
PM
1226int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1227{
1228 return -EINVAL;
1229}
1230
1231int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1232{
1233 return -EINVAL;
1234}
1235
bbf45ba5
HB
1236int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1237{
1238 return -ENOTSUPP;
1239}
1240
1241int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1242{
1243 return -ENOTSUPP;
1244}
1245
bbf45ba5
HB
1246int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1247 struct kvm_translation *tr)
1248{
98001d8d
AK
1249 int r;
1250
98001d8d 1251 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 1252 return r;
bbf45ba5 1253}
d9fbd03d 1254
4e755758
AG
1255int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1256{
1257 return -ENOTSUPP;
1258}
1259
f9e0554d
PM
1260int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1261 struct kvm_userspace_memory_region *mem)
1262{
1263 return 0;
1264}
1265
1266void kvmppc_core_commit_memory_region(struct kvm *kvm,
1267 struct kvm_userspace_memory_region *mem)
1268{
1269}
1270
dfd4d47e
SW
1271void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1272{
1273 vcpu->arch.tcr = new_tcr;
1274 update_timer_ints(vcpu);
1275}
1276
1277void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1278{
1279 set_bits(tsr_bits, &vcpu->arch.tsr);
1280 smp_wmb();
1281 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1282 kvm_vcpu_kick(vcpu);
1283}
1284
1285void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1286{
1287 clear_bits(tsr_bits, &vcpu->arch.tsr);
1288 update_timer_ints(vcpu);
1289}
1290
1291void kvmppc_decrementer_func(unsigned long data)
1292{
1293 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1294
21bd000a
BB
1295 if (vcpu->arch.tcr & TCR_ARE) {
1296 vcpu->arch.dec = vcpu->arch.decar;
1297 kvmppc_emulate_dec(vcpu);
1298 }
1299
dfd4d47e
SW
1300 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1301}
1302
94fa9d99
SW
1303void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1304{
d30f6e48 1305 current->thread.kvm_vcpu = vcpu;
94fa9d99
SW
1306}
1307
1308void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1309{
d30f6e48 1310 current->thread.kvm_vcpu = NULL;
94fa9d99
SW
1311}
1312
2986b8c7 1313int __init kvmppc_booke_init(void)
d9fbd03d 1314{
d30f6e48 1315#ifndef CONFIG_KVM_BOOKE_HV
d9fbd03d
HB
1316 unsigned long ivor[16];
1317 unsigned long max_ivor = 0;
1318 int i;
1319
1320 /* We install our own exception handlers by hijacking IVPR. IVPR must
1321 * be 16-bit aligned, so we need a 64KB allocation. */
1322 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1323 VCPU_SIZE_ORDER);
1324 if (!kvmppc_booke_handlers)
1325 return -ENOMEM;
1326
1327 /* XXX make sure our handlers are smaller than Linux's */
1328
1329 /* Copy our interrupt handlers to match host IVORs. That way we don't
1330 * have to swap the IVORs on every guest/host transition. */
1331 ivor[0] = mfspr(SPRN_IVOR0);
1332 ivor[1] = mfspr(SPRN_IVOR1);
1333 ivor[2] = mfspr(SPRN_IVOR2);
1334 ivor[3] = mfspr(SPRN_IVOR3);
1335 ivor[4] = mfspr(SPRN_IVOR4);
1336 ivor[5] = mfspr(SPRN_IVOR5);
1337 ivor[6] = mfspr(SPRN_IVOR6);
1338 ivor[7] = mfspr(SPRN_IVOR7);
1339 ivor[8] = mfspr(SPRN_IVOR8);
1340 ivor[9] = mfspr(SPRN_IVOR9);
1341 ivor[10] = mfspr(SPRN_IVOR10);
1342 ivor[11] = mfspr(SPRN_IVOR11);
1343 ivor[12] = mfspr(SPRN_IVOR12);
1344 ivor[13] = mfspr(SPRN_IVOR13);
1345 ivor[14] = mfspr(SPRN_IVOR14);
1346 ivor[15] = mfspr(SPRN_IVOR15);
1347
1348 for (i = 0; i < 16; i++) {
1349 if (ivor[i] > max_ivor)
1350 max_ivor = ivor[i];
1351
1352 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1353 kvmppc_handlers_start + i * kvmppc_handler_len,
1354 kvmppc_handler_len);
1355 }
1356 flush_icache_range(kvmppc_booke_handlers,
1357 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
d30f6e48 1358#endif /* !BOOKE_HV */
db93f574 1359 return 0;
d9fbd03d
HB
1360}
1361
db93f574 1362void __exit kvmppc_booke_exit(void)
d9fbd03d
HB
1363{
1364 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1365 kvm_exit();
1366}