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KVM: PPC: Work around POWER7 DABR corruption problem
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / booke.c
CommitLineData
bbf45ba5
HB		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
bbf45ba5
HB		 17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
d30f6e48
SW		 20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
bbf45ba5
HB		 22 */
23
24#include <linux/errno.h>
25#include <linux/err.h>
26#include <linux/kvm_host.h>
5a0e3ad6 27#include <linux/gfp.h>
bbf45ba5
HB		 28#include <linux/module.h>
29#include <linux/vmalloc.h>
30#include <linux/fs.h>
7924bd41 31
bbf45ba5
HB		 32#include <asm/cputable.h>
33#include <asm/uaccess.h>
34#include <asm/kvm_ppc.h>
d9fbd03d 35#include <asm/cacheflush.h>
d30f6e48
SW		 36#include <asm/dbell.h>
37#include <asm/hw_irq.h>
38#include <asm/irq.h>
bbf45ba5 39
d30f6e48 40#include "timing.h"
75f74f0d 41#include "booke.h"
bbf45ba5 42
d9fbd03d
HB		 43unsigned long kvmppc_booke_handlers;
44
bbf45ba5
HB		 45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
47
48struct kvm_stats_debugfs_item debugfs_entries[] = {
bbf45ba5
HB		 49 { "mmio", VCPU_STAT(mmio_exits) },
50 { "dcr", VCPU_STAT(dcr_exits) },
51 { "sig", VCPU_STAT(signal_exits) },
bbf45ba5
HB		 52 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
53 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
54 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
55 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
56 { "sysc", VCPU_STAT(syscall_exits) },
57 { "isi", VCPU_STAT(isi_exits) },
58 { "dsi", VCPU_STAT(dsi_exits) },
59 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
60 { "dec", VCPU_STAT(dec_exits) },
61 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
d30f6e48
SW		 63 { "doorbell", VCPU_STAT(dbell_exits) },
64 { "guest doorbell", VCPU_STAT(gdbell_exits) },
bbf45ba5
HB		 65 { NULL }
66};
67
bbf45ba5
HB		 68/* TODO: use vcpu_printf() */
69void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
70{
71 int i;
72
666e7252 73 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 74 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
de7906c3
AG		 75 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
76 vcpu->arch.shared->srr1);
bbf45ba5
HB		 77
78 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
79
80 for (i = 0; i < 32; i += 4) {
5cf8ca22 81 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
8e5b26b5
AG		 82 kvmppc_get_gpr(vcpu, i),
83 kvmppc_get_gpr(vcpu, i+1),
84 kvmppc_get_gpr(vcpu, i+2),
85 kvmppc_get_gpr(vcpu, i+3));
bbf45ba5
HB		 86 }
87}
88
4cd35f67
SW		 89#ifdef CONFIG_SPE
90void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
91{
92 preempt_disable();
93 enable_kernel_spe();
94 kvmppc_save_guest_spe(vcpu);
95 vcpu->arch.shadow_msr &= ~MSR_SPE;
96 preempt_enable();
97}
98
99static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
100{
101 preempt_disable();
102 enable_kernel_spe();
103 kvmppc_load_guest_spe(vcpu);
104 vcpu->arch.shadow_msr |= MSR_SPE;
105 preempt_enable();
106}
107
108static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
109{
110 if (vcpu->arch.shared->msr & MSR_SPE) {
111 if (!(vcpu->arch.shadow_msr & MSR_SPE))
112 kvmppc_vcpu_enable_spe(vcpu);
113 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
114 kvmppc_vcpu_disable_spe(vcpu);
115 }
116}
117#else
118static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
119{
120}
121#endif
122
dd9ebf1f
LY		 123/*
124 * Helper function for "full" MSR writes. No need to call this if only
125 * EE/CE/ME/DE/RI are changing.
126 */
4cd35f67
SW		 127void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
128{
dd9ebf1f 129 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67 130
d30f6e48
SW		 131#ifdef CONFIG_KVM_BOOKE_HV
132 new_msr |= MSR_GS;
133#endif
134
4cd35f67
SW		 135 vcpu->arch.shared->msr = new_msr;
136
dd9ebf1f 137 kvmppc_mmu_msr_notify(vcpu, old_msr);
4cd35f67
SW		 138 kvmppc_vcpu_sync_spe(vcpu);
139}
140
d4cf3892
HB		 141static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
142 unsigned int priority)
9dd921cf 143{
9dd921cf
HB		 144 set_bit(priority, &vcpu->arch.pending_exceptions);
145}
146
daf5e271
LY		 147static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
148 ulong dear_flags, ulong esr_flags)
9dd921cf 149{
daf5e271
LY		 150 vcpu->arch.queued_dear = dear_flags;
151 vcpu->arch.queued_esr = esr_flags;
152 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
153}
154
155static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
156 ulong dear_flags, ulong esr_flags)
157{
158 vcpu->arch.queued_dear = dear_flags;
159 vcpu->arch.queued_esr = esr_flags;
160 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
161}
162
163static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
164 ulong esr_flags)
165{
166 vcpu->arch.queued_esr = esr_flags;
167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
168}
169
170void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
171{
172 vcpu->arch.queued_esr = esr_flags;
d4cf3892 173 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
9dd921cf
HB		 174}
175
176void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
177{
d4cf3892 178 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
9dd921cf
HB		 179}
180
181int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
182{
d4cf3892 183 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
9dd921cf
HB		 184}
185
7706664d
AG		 186void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
187{
188 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
189}
190
9dd921cf
HB		 191void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
192 struct kvm_interrupt *irq)
193{
c5335f17
AG		 194 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
195
196 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
197 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
198
199 kvmppc_booke_queue_irqprio(vcpu, prio);
9dd921cf
HB		 200}
201
4496f974
AG		 202void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
203 struct kvm_interrupt *irq)
204{
205 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 206 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
4496f974
AG		 207}
208
d30f6e48
SW		 209static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
210{
211#ifdef CONFIG_KVM_BOOKE_HV
212 mtspr(SPRN_GSRR0, srr0);
213 mtspr(SPRN_GSRR1, srr1);
214#else
215 vcpu->arch.shared->srr0 = srr0;
216 vcpu->arch.shared->srr1 = srr1;
217#endif
218}
219
220static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
221{
222 vcpu->arch.csrr0 = srr0;
223 vcpu->arch.csrr1 = srr1;
224}
225
226static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
227{
228 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
229 vcpu->arch.dsrr0 = srr0;
230 vcpu->arch.dsrr1 = srr1;
231 } else {
232 set_guest_csrr(vcpu, srr0, srr1);
233 }
234}
235
236static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
237{
238 vcpu->arch.mcsrr0 = srr0;
239 vcpu->arch.mcsrr1 = srr1;
240}
241
242static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
243{
244#ifdef CONFIG_KVM_BOOKE_HV
245 return mfspr(SPRN_GDEAR);
246#else
247 return vcpu->arch.shared->dar;
248#endif
249}
250
251static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
252{
253#ifdef CONFIG_KVM_BOOKE_HV
254 mtspr(SPRN_GDEAR, dear);
255#else
256 vcpu->arch.shared->dar = dear;
257#endif
258}
259
260static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
261{
262#ifdef CONFIG_KVM_BOOKE_HV
263 return mfspr(SPRN_GESR);
264#else
265 return vcpu->arch.shared->esr;
266#endif
267}
268
269static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
270{
271#ifdef CONFIG_KVM_BOOKE_HV
272 mtspr(SPRN_GESR, esr);
273#else
274 vcpu->arch.shared->esr = esr;
275#endif
276}
277
d4cf3892
HB		 278/* Deliver the interrupt of the corresponding priority, if possible. */
279static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
280 unsigned int priority)
bbf45ba5 281{
d4cf3892 282 int allowed = 0;
79300f8c 283 ulong msr_mask = 0;
daf5e271 284 bool update_esr = false, update_dear = false;
5c6cedf4
AG		 285 ulong crit_raw = vcpu->arch.shared->critical;
286 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
287 bool crit;
c5335f17 288 bool keep_irq = false;
d30f6e48 289 enum int_class int_class;
5c6cedf4
AG		 290
291 /* Truncate crit indicators in 32 bit mode */
292 if (!(vcpu->arch.shared->msr & MSR_SF)) {
293 crit_raw &= 0xffffffff;
294 crit_r1 &= 0xffffffff;
295 }
296
297 /* Critical section when crit == r1 */
298 crit = (crit_raw == crit_r1);
299 /* ... and we're in supervisor mode */
300 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 301
c5335f17
AG		 302 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
303 priority = BOOKE_IRQPRIO_EXTERNAL;
304 keep_irq = true;
305 }
306
d4cf3892 307 switch (priority) {
d4cf3892 308 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 309 case BOOKE_IRQPRIO_DATA_STORAGE:
daf5e271
LY		 310 update_dear = true;
311 /* fall through */
d4cf3892 312 case BOOKE_IRQPRIO_INST_STORAGE:
daf5e271
LY		 313 case BOOKE_IRQPRIO_PROGRAM:
314 update_esr = true;
315 /* fall through */
316 case BOOKE_IRQPRIO_ITLB_MISS:
317 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 318 case BOOKE_IRQPRIO_FP_UNAVAIL:
bb3a8a17
HB		 319 case BOOKE_IRQPRIO_SPE_UNAVAIL:
320 case BOOKE_IRQPRIO_SPE_FP_DATA:
321 case BOOKE_IRQPRIO_SPE_FP_ROUND:
d4cf3892
HB		 322 case BOOKE_IRQPRIO_AP_UNAVAIL:
323 case BOOKE_IRQPRIO_ALIGNMENT:
324 allowed = 1;
79300f8c 325 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 326 int_class = INT_CLASS_NONCRIT;
bbf45ba5 327 break;
d4cf3892 328 case BOOKE_IRQPRIO_CRITICAL:
4ab96919 329 case BOOKE_IRQPRIO_DBELL_CRIT:
666e7252 330 allowed = vcpu->arch.shared->msr & MSR_CE;
d30f6e48 331 allowed = allowed && !crit;
79300f8c 332 msr_mask = MSR_ME;
d30f6e48 333 int_class = INT_CLASS_CRIT;
bbf45ba5 334 break;
d4cf3892 335 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 336 allowed = vcpu->arch.shared->msr & MSR_ME;
d30f6e48 337 allowed = allowed && !crit;
d30f6e48 338 int_class = INT_CLASS_MC;
bbf45ba5 339 break;
d4cf3892
HB		 340 case BOOKE_IRQPRIO_DECREMENTER:
341 case BOOKE_IRQPRIO_FIT:
dfd4d47e
SW		 342 keep_irq = true;
343 /* fall through */
344 case BOOKE_IRQPRIO_EXTERNAL:
4ab96919 345 case BOOKE_IRQPRIO_DBELL:
666e7252 346 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 347 allowed = allowed && !crit;
79300f8c 348 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 349 int_class = INT_CLASS_NONCRIT;
bbf45ba5 350 break;
d4cf3892 351 case BOOKE_IRQPRIO_DEBUG:
666e7252 352 allowed = vcpu->arch.shared->msr & MSR_DE;
d30f6e48 353 allowed = allowed && !crit;
79300f8c 354 msr_mask = MSR_ME;
d30f6e48 355 int_class = INT_CLASS_CRIT;
bbf45ba5 356 break;
bbf45ba5
HB		 357 }
358
d4cf3892 359 if (allowed) {
d30f6e48
SW		 360 switch (int_class) {
361 case INT_CLASS_NONCRIT:
362 set_guest_srr(vcpu, vcpu->arch.pc,
363 vcpu->arch.shared->msr);
364 break;
365 case INT_CLASS_CRIT:
366 set_guest_csrr(vcpu, vcpu->arch.pc,
367 vcpu->arch.shared->msr);
368 break;
369 case INT_CLASS_DBG:
370 set_guest_dsrr(vcpu, vcpu->arch.pc,
371 vcpu->arch.shared->msr);
372 break;
373 case INT_CLASS_MC:
374 set_guest_mcsrr(vcpu, vcpu->arch.pc,
375 vcpu->arch.shared->msr);
376 break;
377 }
378
d4cf3892 379 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 380 if (update_esr == true)
d30f6e48 381 set_guest_esr(vcpu, vcpu->arch.queued_esr);
daf5e271 382 if (update_dear == true)
d30f6e48 383 set_guest_dear(vcpu, vcpu->arch.queued_dear);
666e7252 384 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 385
c5335f17
AG		 386 if (!keep_irq)
387 clear_bit(priority, &vcpu->arch.pending_exceptions);
bbf45ba5
HB		 388 }
389
d30f6e48
SW		 390#ifdef CONFIG_KVM_BOOKE_HV
391 /*
392 * If an interrupt is pending but masked, raise a guest doorbell
393 * so that we are notified when the guest enables the relevant
394 * MSR bit.
395 */
396 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
397 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
398 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
399 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
400 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
401 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
402#endif
403
d4cf3892 404 return allowed;
bbf45ba5
HB		 405}
406
dfd4d47e
SW		 407static void update_timer_ints(struct kvm_vcpu *vcpu)
408{
409 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
410 kvmppc_core_queue_dec(vcpu);
411 else
412 kvmppc_core_dequeue_dec(vcpu);
413}
414
c59a6a3e 415static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
bbf45ba5
HB		 416{
417 unsigned long *pending = &vcpu->arch.pending_exceptions;
bbf45ba5
HB		 418 unsigned int priority;
419
dfd4d47e
SW		 420 if (vcpu->requests) {
421 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
422 smp_mb();
423 update_timer_ints(vcpu);
424 }
425 }
426
9ab80843 427 priority = __ffs(*pending);
8b3a00fc 428 while (priority < BOOKE_IRQPRIO_MAX) {
d4cf3892 429 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 430 break;
bbf45ba5
HB		 431
432 priority = find_next_bit(pending,
433 BITS_PER_BYTE * sizeof(*pending),
434 priority + 1);
435 }
90bba358
AG		 436
437 /* Tell the guest about our interrupt status */
29ac26ef 438 vcpu->arch.shared->int_pending = !!*pending;
bbf45ba5
HB		 439}
440
c59a6a3e 441/* Check pending exceptions and deliver one, if possible. */
a8e4ef84 442int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
c59a6a3e 443{
a8e4ef84 444 int r = 0;
c59a6a3e
SW		 445 WARN_ON_ONCE(!irqs_disabled());
446
447 kvmppc_core_check_exceptions(vcpu);
448
449 if (vcpu->arch.shared->msr & MSR_WE) {
450 local_irq_enable();
451 kvm_vcpu_block(vcpu);
452 local_irq_disable();
453
454 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
a8e4ef84 455 r = 1;
c59a6a3e 456 };
a8e4ef84
AG		 457
458 return r;
459}
460
461/*
462 * Common checks before entering the guest world. Call with interrupts
463 * disabled.
464 *
465 * returns !0 if a signal is pending and check_signal is true
466 */
03660ba2 467static int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
a8e4ef84
AG		 468{
469 int r = 0;
470
471 WARN_ON_ONCE(!irqs_disabled());
472 while (true) {
473 if (need_resched()) {
474 local_irq_enable();
475 cond_resched();
476 local_irq_disable();
477 continue;
478 }
479
03660ba2 480 if (signal_pending(current)) {
a8e4ef84
AG		 481 r = 1;
482 break;
483 }
484
485 if (kvmppc_core_prepare_to_enter(vcpu)) {
486 /* interrupts got enabled in between, so we
487 are back at square 1 */
488 continue;
489 }
490
491 break;
492 }
493
494 return r;
c59a6a3e
SW		 495}
496
df6909e5
PM		 497int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
498{
499 int ret;
8fae845f
SW		 500#ifdef CONFIG_PPC_FPU
501 unsigned int fpscr;
502 int fpexc_mode;
503 u64 fpr[32];
504#endif
df6909e5 505
af8f38b3
AG		 506 if (!vcpu->arch.sane) {
507 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
508 return -EINVAL;
509 }
510
df6909e5 511 local_irq_disable();
03660ba2 512 if (kvmppc_prepare_to_enter(vcpu)) {
1d1ef222
SW		 513 kvm_run->exit_reason = KVM_EXIT_INTR;
514 ret = -EINTR;
515 goto out;
516 }
517
df6909e5 518 kvm_guest_enter();
8fae845f
SW		 519
520#ifdef CONFIG_PPC_FPU
521 /* Save userspace FPU state in stack */
522 enable_kernel_fp();
523 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
524 fpscr = current->thread.fpscr.val;
525 fpexc_mode = current->thread.fpexc_mode;
526
527 /* Restore guest FPU state to thread */
528 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
529 current->thread.fpscr.val = vcpu->arch.fpscr;
530
531 /*
532 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
533 * as always using the FPU. Kernel usage of FP (via
534 * enable_kernel_fp()) in this thread must not occur while
535 * vcpu->fpu_active is set.
536 */
537 vcpu->fpu_active = 1;
538
539 kvmppc_load_guest_fp(vcpu);
540#endif
541
df6909e5 542 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
8fae845f
SW		 543
544#ifdef CONFIG_PPC_FPU
545 kvmppc_save_guest_fp(vcpu);
546
547 vcpu->fpu_active = 0;
548
549 /* Save guest FPU state from thread */
550 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
551 vcpu->arch.fpscr = current->thread.fpscr.val;
552
553 /* Restore userspace FPU state from stack */
554 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
555 current->thread.fpscr.val = fpscr;
556 current->thread.fpexc_mode = fpexc_mode;
557#endif
558
df6909e5 559 kvm_guest_exit();
df6909e5 560
1d1ef222
SW		 561out:
562 local_irq_enable();
df6909e5
PM		 563 return ret;
564}
565
d30f6e48
SW		 566static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
567{
568 enum emulation_result er;
569
570 er = kvmppc_emulate_instruction(run, vcpu);
571 switch (er) {
572 case EMULATE_DONE:
573 /* don't overwrite subtypes, just account kvm_stats */
574 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
575 /* Future optimization: only reload non-volatiles if
576 * they were actually modified by emulation. */
577 return RESUME_GUEST_NV;
578
579 case EMULATE_DO_DCR:
580 run->exit_reason = KVM_EXIT_DCR;
581 return RESUME_HOST;
582
583 case EMULATE_FAIL:
d30f6e48
SW		 584 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
585 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
586 /* For debugging, encode the failing instruction and
587 * report it to userspace. */
588 run->hw.hardware_exit_reason = ~0ULL << 32;
589 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
d1ff5499 590 kvmppc_core_queue_program(vcpu, ESR_PIL);
d30f6e48
SW		 591 return RESUME_HOST;
592
593 default:
594 BUG();
595 }
596}
597
4e642ccb 598static void kvmppc_fill_pt_regs(struct pt_regs *regs)
bbf45ba5 599{
4e642ccb 600 ulong r1, ip, msr, lr;
bbf45ba5 601
4e642ccb
AG		 602 asm("mr %0, 1" : "=r"(r1));
603 asm("mflr %0" : "=r"(lr));
604 asm("mfmsr %0" : "=r"(msr));
605 asm("bl 1f; 1: mflr %0" : "=r"(ip));
606
607 memset(regs, 0, sizeof(*regs));
608 regs->gpr[1] = r1;
609 regs->nip = ip;
610 regs->msr = msr;
611 regs->link = lr;
612}
613
614static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
615 unsigned int exit_nr)
616{
617 struct pt_regs regs;
73e75b41 618
d30f6e48
SW		 619 switch (exit_nr) {
620 case BOOKE_INTERRUPT_EXTERNAL:
4e642ccb
AG		 621 kvmppc_fill_pt_regs(&regs);
622 do_IRQ(&regs);
d30f6e48 623 break;
d30f6e48 624 case BOOKE_INTERRUPT_DECREMENTER:
4e642ccb
AG		 625 kvmppc_fill_pt_regs(&regs);
626 timer_interrupt(&regs);
d30f6e48 627 break;
d30f6e48
SW		 628#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
629 case BOOKE_INTERRUPT_DOORBELL:
4e642ccb
AG		 630 kvmppc_fill_pt_regs(&regs);
631 doorbell_exception(&regs);
d30f6e48
SW		 632 break;
633#endif
634 case BOOKE_INTERRUPT_MACHINE_CHECK:
635 /* FIXME */
636 break;
7cc1e8ee
AG		 637 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
638 kvmppc_fill_pt_regs(&regs);
639 performance_monitor_exception(&regs);
640 break;
d30f6e48 641 }
4e642ccb
AG		 642}
643
644/**
645 * kvmppc_handle_exit
646 *
647 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
648 */
649int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
650 unsigned int exit_nr)
651{
652 int r = RESUME_HOST;
653
654 /* update before a new last_exit_type is rewritten */
655 kvmppc_update_timing_stats(vcpu);
656
657 /* restart interrupts if they were meant for the host */
658 kvmppc_restart_interrupt(vcpu, exit_nr);
d30f6e48 659
bbf45ba5
HB		 660 local_irq_enable();
661
662 run->exit_reason = KVM_EXIT_UNKNOWN;
663 run->ready_for_interrupt_injection = 1;
664
665 switch (exit_nr) {
666 case BOOKE_INTERRUPT_MACHINE_CHECK:
c35c9d84
AG		 667 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
668 kvmppc_dump_vcpu(vcpu);
669 /* For debugging, send invalid exit reason to user space */
670 run->hw.hardware_exit_reason = ~1ULL << 32;
671 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
672 r = RESUME_HOST;
bbf45ba5
HB		 673 break;
674
675 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 676 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB		 677 r = RESUME_GUEST;
678 break;
679
bbf45ba5 680 case BOOKE_INTERRUPT_DECREMENTER:
7b701591 681 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB		 682 r = RESUME_GUEST;
683 break;
684
d30f6e48
SW		 685 case BOOKE_INTERRUPT_DOORBELL:
686 kvmppc_account_exit(vcpu, DBELL_EXITS);
d30f6e48
SW		 687 r = RESUME_GUEST;
688 break;
689
690 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
691 kvmppc_account_exit(vcpu, GDBELL_EXITS);
692
693 /*
694 * We are here because there is a pending guest interrupt
695 * which could not be delivered as MSR_CE or MSR_ME was not
696 * set. Once we break from here we will retry delivery.
697 */
698 r = RESUME_GUEST;
699 break;
700
701 case BOOKE_INTERRUPT_GUEST_DBELL:
702 kvmppc_account_exit(vcpu, GDBELL_EXITS);
703
704 /*
705 * We are here because there is a pending guest interrupt
706 * which could not be delivered as MSR_EE was not set. Once
707 * we break from here we will retry delivery.
708 */
709 r = RESUME_GUEST;
710 break;
711
95f2e921
AG		 712 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
713 r = RESUME_GUEST;
714 break;
715
d30f6e48
SW		 716 case BOOKE_INTERRUPT_HV_PRIV:
717 r = emulation_exit(run, vcpu);
718 break;
719
bbf45ba5 720 case BOOKE_INTERRUPT_PROGRAM:
d30f6e48 721 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
0268597c
AG		 722 /*
723 * Program traps generated by user-level software must
724 * be handled by the guest kernel.
725 *
726 * In GS mode, hypervisor privileged instructions trap
727 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
728 * actual program interrupts, handled by the guest.
729 */
daf5e271 730 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 731 r = RESUME_GUEST;
7b701591 732 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB		 733 break;
734 }
735
d30f6e48 736 r = emulation_exit(run, vcpu);
bbf45ba5
HB		 737 break;
738
de368dce 739 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 740 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 741 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE		 742 r = RESUME_GUEST;
743 break;
744
4cd35f67
SW		 745#ifdef CONFIG_SPE
746 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
747 if (vcpu->arch.shared->msr & MSR_SPE)
748 kvmppc_vcpu_enable_spe(vcpu);
749 else
750 kvmppc_booke_queue_irqprio(vcpu,
751 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB		 752 r = RESUME_GUEST;
753 break;
4cd35f67 754 }
bb3a8a17
HB		 755
756 case BOOKE_INTERRUPT_SPE_FP_DATA:
757 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
758 r = RESUME_GUEST;
759 break;
760
761 case BOOKE_INTERRUPT_SPE_FP_ROUND:
762 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
763 r = RESUME_GUEST;
764 break;
4cd35f67
SW		 765#else
766 case BOOKE_INTERRUPT_SPE_UNAVAIL:
767 /*
768 * Guest wants SPE, but host kernel doesn't support it. Send
769 * an "unimplemented operation" program check to the guest.
770 */
771 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
772 r = RESUME_GUEST;
773 break;
774
775 /*
776 * These really should never happen without CONFIG_SPE,
777 * as we should never enable the real MSR[SPE] in the guest.
778 */
779 case BOOKE_INTERRUPT_SPE_FP_DATA:
780 case BOOKE_INTERRUPT_SPE_FP_ROUND:
781 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
782 __func__, exit_nr, vcpu->arch.pc);
783 run->hw.hardware_exit_reason = exit_nr;
784 r = RESUME_HOST;
785 break;
786#endif
bb3a8a17 787
bbf45ba5 788 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY		 789 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
790 vcpu->arch.fault_esr);
7b701591 791 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB		 792 r = RESUME_GUEST;
793 break;
794
795 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 796 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 797 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB		 798 r = RESUME_GUEST;
799 break;
800
d30f6e48
SW		 801#ifdef CONFIG_KVM_BOOKE_HV
802 case BOOKE_INTERRUPT_HV_SYSCALL:
803 if (!(vcpu->arch.shared->msr & MSR_PR)) {
804 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
805 } else {
806 /*
807 * hcall from guest userspace -- send privileged
808 * instruction program check.
809 */
810 kvmppc_core_queue_program(vcpu, ESR_PPR);
811 }
812
813 r = RESUME_GUEST;
814 break;
815#else
bbf45ba5 816 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG		 817 if (!(vcpu->arch.shared->msr & MSR_PR) &&
818 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
819 /* KVM PV hypercalls */
820 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
821 r = RESUME_GUEST;
822 } else {
823 /* Guest syscalls */
824 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
825 }
7b701591 826 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB		 827 r = RESUME_GUEST;
828 break;
d30f6e48 829#endif
bbf45ba5
HB		 830
831 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 832 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 833 int gtlb_index;
475e7cdd 834 gpa_t gpaddr;
bbf45ba5
HB		 835 gfn_t gfn;
836
bf7ca4bd 837#ifdef CONFIG_KVM_E500V2
a4cd8b23
SW		 838 if (!(vcpu->arch.shared->msr & MSR_PR) &&
839 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
840 kvmppc_map_magic(vcpu);
841 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
842 r = RESUME_GUEST;
843
844 break;
845 }
846#endif
847
bbf45ba5 848 /* Check the guest TLB. */
fa86b8dd 849 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 850 if (gtlb_index < 0) {
bbf45ba5 851 /* The guest didn't have a mapping for it. */
daf5e271
LY		 852 kvmppc_core_queue_dtlb_miss(vcpu,
853 vcpu->arch.fault_dear,
854 vcpu->arch.fault_esr);
b52a638c 855 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 856 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB		 857 r = RESUME_GUEST;
858 break;
859 }
860
be8d1cae 861 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 862 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 863
864 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
865 /* The guest TLB had a mapping, but the shadow TLB
866 * didn't, and it is RAM. This could be because:
867 * a) the entry is mapping the host kernel, or
868 * b) the guest used a large mapping which we're faking
869 * Either way, we need to satisfy the fault without
870 * invoking the guest. */
58a96214 871 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 872 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB		 873 r = RESUME_GUEST;
874 } else {
875 /* Guest has mapped and accessed a page which is not
876 * actually RAM. */
475e7cdd 877 vcpu->arch.paddr_accessed = gpaddr;
bbf45ba5 878 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 879 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB		 880 }
881
882 break;
883 }
884
885 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 886 unsigned long eaddr = vcpu->arch.pc;
89168618 887 gpa_t gpaddr;
bbf45ba5 888 gfn_t gfn;
7924bd41 889 int gtlb_index;
bbf45ba5
HB		 890
891 r = RESUME_GUEST;
892
893 /* Check the guest TLB. */
fa86b8dd 894 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 895 if (gtlb_index < 0) {
bbf45ba5 896 /* The guest didn't have a mapping for it. */
d4cf3892 897 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 898 kvmppc_mmu_itlb_miss(vcpu);
7b701591 899 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB		 900 break;
901 }
902
7b701591 903 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 904
be8d1cae 905 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 906 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 907
908 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
909 /* The guest TLB had a mapping, but the shadow TLB
910 * didn't. This could be because:
911 * a) the entry is mapping the host kernel, or
912 * b) the guest used a large mapping which we're faking
913 * Either way, we need to satisfy the fault without
914 * invoking the guest. */
58a96214 915 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB		 916 } else {
917 /* Guest mapped and leaped at non-RAM! */
d4cf3892 918 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB		 919 }
920
921 break;
922 }
923
6a0ab738
HB		 924 case BOOKE_INTERRUPT_DEBUG: {
925 u32 dbsr;
926
927 vcpu->arch.pc = mfspr(SPRN_CSRR0);
928
929 /* clear IAC events in DBSR register */
930 dbsr = mfspr(SPRN_DBSR);
931 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
932 mtspr(SPRN_DBSR, dbsr);
933
934 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 935 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB		 936 r = RESUME_HOST;
937 break;
938 }
939
bbf45ba5
HB		 940 default:
941 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
942 BUG();
943 }
944
a8e4ef84
AG		 945 /*
946 * To avoid clobbering exit_reason, only check for signals if we
947 * aren't already exiting to userspace for some other reason.
948 */
03660ba2
AG		 949 if (!(r & RESUME_HOST)) {
950 local_irq_disable();
951 if (kvmppc_prepare_to_enter(vcpu)) {
952 run->exit_reason = KVM_EXIT_INTR;
953 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
954 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
955 }
bbf45ba5
HB		 956 }
957
958 return r;
959}
960
961/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
962int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
963{
082decf2 964 int i;
af8f38b3 965 int r;
082decf2 966
bbf45ba5 967 vcpu->arch.pc = 0;
b5904972 968 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 969 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
d30f6e48 970 kvmppc_set_msr(vcpu, 0);
bbf45ba5 971
d30f6e48
SW		 972#ifndef CONFIG_KVM_BOOKE_HV
973 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
49dd2c49 974 vcpu->arch.shadow_pid = 1;
d30f6e48
SW		 975 vcpu->arch.shared->msr = 0;
976#endif
49dd2c49 977
082decf2
HB		 978 /* Eye-catching numbers so we know if the guest takes an interrupt
979 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 980 vcpu->arch.ivpr = 0x55550000;
082decf2
HB		 981 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
982 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 983
73e75b41
HB		 984 kvmppc_init_timing_stats(vcpu);
985
af8f38b3
AG		 986 r = kvmppc_core_vcpu_setup(vcpu);
987 kvmppc_sanity_check(vcpu);
988 return r;
bbf45ba5
HB		 989}
990
991int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
992{
993 int i;
994
995 regs->pc = vcpu->arch.pc;
992b5b29 996 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB		 997 regs->ctr = vcpu->arch.ctr;
998 regs->lr = vcpu->arch.lr;
992b5b29 999 regs->xer = kvmppc_get_xer(vcpu);
666e7252 1000 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG		 1001 regs->srr0 = vcpu->arch.shared->srr0;
1002 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 1003 regs->pid = vcpu->arch.pid;
a73a9599
AG		 1004 regs->sprg0 = vcpu->arch.shared->sprg0;
1005 regs->sprg1 = vcpu->arch.shared->sprg1;
1006 regs->sprg2 = vcpu->arch.shared->sprg2;
1007 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW		 1008 regs->sprg4 = vcpu->arch.shared->sprg4;
1009 regs->sprg5 = vcpu->arch.shared->sprg5;
1010 regs->sprg6 = vcpu->arch.shared->sprg6;
1011 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB		 1012
1013 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 1014 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB		 1015
1016 return 0;
1017}
1018
1019int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1020{
1021 int i;
1022
1023 vcpu->arch.pc = regs->pc;
992b5b29 1024 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB		 1025 vcpu->arch.ctr = regs->ctr;
1026 vcpu->arch.lr = regs->lr;
992b5b29 1027 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 1028 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG		 1029 vcpu->arch.shared->srr0 = regs->srr0;
1030 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 1031 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG		 1032 vcpu->arch.shared->sprg0 = regs->sprg0;
1033 vcpu->arch.shared->sprg1 = regs->sprg1;
1034 vcpu->arch.shared->sprg2 = regs->sprg2;
1035 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW		 1036 vcpu->arch.shared->sprg4 = regs->sprg4;
1037 vcpu->arch.shared->sprg5 = regs->sprg5;
1038 vcpu->arch.shared->sprg6 = regs->sprg6;
1039 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 1040
8e5b26b5
AG		 1041 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1042 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB		 1043
1044 return 0;
1045}
1046
5ce941ee
SW		 1047static void get_sregs_base(struct kvm_vcpu *vcpu,
1048 struct kvm_sregs *sregs)
1049{
1050 u64 tb = get_tb();
1051
1052 sregs->u.e.features |= KVM_SREGS_E_BASE;
1053
1054 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1055 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1056 sregs->u.e.mcsr = vcpu->arch.mcsr;
d30f6e48
SW		 1057 sregs->u.e.esr = get_guest_esr(vcpu);
1058 sregs->u.e.dear = get_guest_dear(vcpu);
5ce941ee
SW		 1059 sregs->u.e.tsr = vcpu->arch.tsr;
1060 sregs->u.e.tcr = vcpu->arch.tcr;
1061 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1062 sregs->u.e.tb = tb;
1063 sregs->u.e.vrsave = vcpu->arch.vrsave;
1064}
1065
1066static int set_sregs_base(struct kvm_vcpu *vcpu,
1067 struct kvm_sregs *sregs)
1068{
1069 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1070 return 0;
1071
1072 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1073 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1074 vcpu->arch.mcsr = sregs->u.e.mcsr;
d30f6e48
SW		 1075 set_guest_esr(vcpu, sregs->u.e.esr);
1076 set_guest_dear(vcpu, sregs->u.e.dear);
5ce941ee 1077 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 1078 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 1079
dfd4d47e 1080 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 1081 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW		 1082 kvmppc_emulate_dec(vcpu);
1083 }
5ce941ee
SW		 1084
1085 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
dfd4d47e
SW		 1086 vcpu->arch.tsr = sregs->u.e.tsr;
1087 update_timer_ints(vcpu);
5ce941ee
SW		 1088 }
1089
1090 return 0;
1091}
1092
1093static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1094 struct kvm_sregs *sregs)
1095{
1096 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1097
841741f2 1098 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW		 1099 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1100 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1101 sregs->u.e.decar = vcpu->arch.decar;
1102 sregs->u.e.ivpr = vcpu->arch.ivpr;
1103}
1104
1105static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1106 struct kvm_sregs *sregs)
1107{
1108 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1109 return 0;
1110
841741f2 1111 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW		 1112 return -EINVAL;
1113
1114 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1115 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1116 vcpu->arch.decar = sregs->u.e.decar;
1117 vcpu->arch.ivpr = sregs->u.e.ivpr;
1118
1119 return 0;
1120}
1121
1122void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1123{
1124 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1125
1126 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1127 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1128 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1129 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1130 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1131 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1132 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1133 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1134 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1135 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1136 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1137 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1138 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1139 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1140 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1141 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1142}
1143
1144int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1145{
1146 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1147 return 0;
1148
1149 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1150 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1151 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1152 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1153 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1154 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1155 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1156 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1157 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1158 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1159 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1160 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1161 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1162 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1163 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1164 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1165
1166 return 0;
1167}
1168
bbf45ba5
HB		 1169int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1170 struct kvm_sregs *sregs)
1171{
5ce941ee
SW		 1172 sregs->pvr = vcpu->arch.pvr;
1173
1174 get_sregs_base(vcpu, sregs);
1175 get_sregs_arch206(vcpu, sregs);
1176 kvmppc_core_get_sregs(vcpu, sregs);
1177 return 0;
bbf45ba5
HB		 1178}
1179
1180int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1181 struct kvm_sregs *sregs)
1182{
5ce941ee
SW		 1183 int ret;
1184
1185 if (vcpu->arch.pvr != sregs->pvr)
1186 return -EINVAL;
1187
1188 ret = set_sregs_base(vcpu, sregs);
1189 if (ret < 0)
1190 return ret;
1191
1192 ret = set_sregs_arch206(vcpu, sregs);
1193 if (ret < 0)
1194 return ret;
1195
1196 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB		 1197}
1198
31f3438e
PM		 1199int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1200{
1201 return -EINVAL;
1202}
1203
1204int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1205{
1206 return -EINVAL;
1207}
1208
bbf45ba5
HB		 1209int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1210{
1211 return -ENOTSUPP;
1212}
1213
1214int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1215{
1216 return -ENOTSUPP;
1217}
1218
bbf45ba5
HB		 1219int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1220 struct kvm_translation *tr)
1221{
98001d8d
AK		 1222 int r;
1223
98001d8d 1224 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 1225 return r;
bbf45ba5 1226}
d9fbd03d 1227
4e755758
AG		 1228int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1229{
1230 return -ENOTSUPP;
1231}
1232
f9e0554d
PM		 1233int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1234 struct kvm_userspace_memory_region *mem)
1235{
1236 return 0;
1237}
1238
1239void kvmppc_core_commit_memory_region(struct kvm *kvm,
1240 struct kvm_userspace_memory_region *mem)
1241{
1242}
1243
dfd4d47e
SW		 1244void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1245{
1246 vcpu->arch.tcr = new_tcr;
1247 update_timer_ints(vcpu);
1248}
1249
1250void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1251{
1252 set_bits(tsr_bits, &vcpu->arch.tsr);
1253 smp_wmb();
1254 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1255 kvm_vcpu_kick(vcpu);
1256}
1257
1258void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1259{
1260 clear_bits(tsr_bits, &vcpu->arch.tsr);
1261 update_timer_ints(vcpu);
1262}
1263
1264void kvmppc_decrementer_func(unsigned long data)
1265{
1266 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1267
1268 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1269}
1270
94fa9d99
SW		 1271void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1272{
d30f6e48 1273 current->thread.kvm_vcpu = vcpu;
94fa9d99
SW		 1274}
1275
1276void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1277{
d30f6e48 1278 current->thread.kvm_vcpu = NULL;
94fa9d99
SW		 1279}
1280
2986b8c7 1281int __init kvmppc_booke_init(void)
d9fbd03d 1282{
d30f6e48 1283#ifndef CONFIG_KVM_BOOKE_HV
d9fbd03d
HB		 1284 unsigned long ivor[16];
1285 unsigned long max_ivor = 0;
1286 int i;
1287
1288 /* We install our own exception handlers by hijacking IVPR. IVPR must
1289 * be 16-bit aligned, so we need a 64KB allocation. */
1290 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1291 VCPU_SIZE_ORDER);
1292 if (!kvmppc_booke_handlers)
1293 return -ENOMEM;
1294
1295 /* XXX make sure our handlers are smaller than Linux's */
1296
1297 /* Copy our interrupt handlers to match host IVORs. That way we don't
1298 * have to swap the IVORs on every guest/host transition. */
1299 ivor[0] = mfspr(SPRN_IVOR0);
1300 ivor[1] = mfspr(SPRN_IVOR1);
1301 ivor[2] = mfspr(SPRN_IVOR2);
1302 ivor[3] = mfspr(SPRN_IVOR3);
1303 ivor[4] = mfspr(SPRN_IVOR4);
1304 ivor[5] = mfspr(SPRN_IVOR5);
1305 ivor[6] = mfspr(SPRN_IVOR6);
1306 ivor[7] = mfspr(SPRN_IVOR7);
1307 ivor[8] = mfspr(SPRN_IVOR8);
1308 ivor[9] = mfspr(SPRN_IVOR9);
1309 ivor[10] = mfspr(SPRN_IVOR10);
1310 ivor[11] = mfspr(SPRN_IVOR11);
1311 ivor[12] = mfspr(SPRN_IVOR12);
1312 ivor[13] = mfspr(SPRN_IVOR13);
1313 ivor[14] = mfspr(SPRN_IVOR14);
1314 ivor[15] = mfspr(SPRN_IVOR15);
1315
1316 for (i = 0; i < 16; i++) {
1317 if (ivor[i] > max_ivor)
1318 max_ivor = ivor[i];
1319
1320 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1321 kvmppc_handlers_start + i * kvmppc_handler_len,
1322 kvmppc_handler_len);
1323 }
1324 flush_icache_range(kvmppc_booke_handlers,
1325 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
d30f6e48 1326#endif /* !BOOKE_HV */
db93f574 1327 return 0;
d9fbd03d
HB		 1328}
1329
db93f574 1330void __exit kvmppc_booke_exit(void)
d9fbd03d
HB		 1331{
1332 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1333 kvm_exit();
1334}
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