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KVM: PPC: Enable the PAPR CAP for Book3S
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / booke.c
CommitLineData
bbf45ba5
HB		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
bbf45ba5
HB		 17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20 */
21
22#include <linux/errno.h>
23#include <linux/err.h>
24#include <linux/kvm_host.h>
5a0e3ad6 25#include <linux/gfp.h>
bbf45ba5
HB		 26#include <linux/module.h>
27#include <linux/vmalloc.h>
28#include <linux/fs.h>
7924bd41 29
bbf45ba5
HB		 30#include <asm/cputable.h>
31#include <asm/uaccess.h>
32#include <asm/kvm_ppc.h>
73e75b41 33#include "timing.h"
d9fbd03d 34#include <asm/cacheflush.h>
bbf45ba5 35
75f74f0d 36#include "booke.h"
bbf45ba5 37
d9fbd03d
HB		 38unsigned long kvmppc_booke_handlers;
39
bbf45ba5
HB		 40#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
41#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
42
43struct kvm_stats_debugfs_item debugfs_entries[] = {
bbf45ba5
HB		 44 { "mmio", VCPU_STAT(mmio_exits) },
45 { "dcr", VCPU_STAT(dcr_exits) },
46 { "sig", VCPU_STAT(signal_exits) },
bbf45ba5
HB		 47 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
48 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
49 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
50 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
51 { "sysc", VCPU_STAT(syscall_exits) },
52 { "isi", VCPU_STAT(isi_exits) },
53 { "dsi", VCPU_STAT(dsi_exits) },
54 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
55 { "dec", VCPU_STAT(dec_exits) },
56 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 57 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
bbf45ba5
HB		 58 { NULL }
59};
60
bbf45ba5
HB		 61/* TODO: use vcpu_printf() */
62void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
63{
64 int i;
65
666e7252 66 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 67 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
de7906c3
AG		 68 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
69 vcpu->arch.shared->srr1);
bbf45ba5
HB		 70
71 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
72
73 for (i = 0; i < 32; i += 4) {
5cf8ca22 74 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
8e5b26b5
AG		 75 kvmppc_get_gpr(vcpu, i),
76 kvmppc_get_gpr(vcpu, i+1),
77 kvmppc_get_gpr(vcpu, i+2),
78 kvmppc_get_gpr(vcpu, i+3));
bbf45ba5
HB		 79 }
80}
81
4cd35f67
SW		 82#ifdef CONFIG_SPE
83void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
84{
85 preempt_disable();
86 enable_kernel_spe();
87 kvmppc_save_guest_spe(vcpu);
88 vcpu->arch.shadow_msr &= ~MSR_SPE;
89 preempt_enable();
90}
91
92static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
93{
94 preempt_disable();
95 enable_kernel_spe();
96 kvmppc_load_guest_spe(vcpu);
97 vcpu->arch.shadow_msr |= MSR_SPE;
98 preempt_enable();
99}
100
101static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
102{
103 if (vcpu->arch.shared->msr & MSR_SPE) {
104 if (!(vcpu->arch.shadow_msr & MSR_SPE))
105 kvmppc_vcpu_enable_spe(vcpu);
106 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
107 kvmppc_vcpu_disable_spe(vcpu);
108 }
109}
110#else
111static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
112{
113}
114#endif
115
dd9ebf1f
LY		 116/*
117 * Helper function for "full" MSR writes. No need to call this if only
118 * EE/CE/ME/DE/RI are changing.
119 */
4cd35f67
SW		 120void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
121{
dd9ebf1f 122 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67
SW		 123
124 vcpu->arch.shared->msr = new_msr;
125
dd9ebf1f
LY		 126 kvmppc_mmu_msr_notify(vcpu, old_msr);
127
4cd35f67
SW		 128 if (vcpu->arch.shared->msr & MSR_WE) {
129 kvm_vcpu_block(vcpu);
130 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
131 };
132
133 kvmppc_vcpu_sync_spe(vcpu);
134}
135
d4cf3892
HB		 136static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
137 unsigned int priority)
9dd921cf 138{
9dd921cf
HB		 139 set_bit(priority, &vcpu->arch.pending_exceptions);
140}
141
daf5e271
LY		 142static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
143 ulong dear_flags, ulong esr_flags)
9dd921cf 144{
daf5e271
LY		 145 vcpu->arch.queued_dear = dear_flags;
146 vcpu->arch.queued_esr = esr_flags;
147 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
148}
149
150static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
151 ulong dear_flags, ulong esr_flags)
152{
153 vcpu->arch.queued_dear = dear_flags;
154 vcpu->arch.queued_esr = esr_flags;
155 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
156}
157
158static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
159 ulong esr_flags)
160{
161 vcpu->arch.queued_esr = esr_flags;
162 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
163}
164
165void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
166{
167 vcpu->arch.queued_esr = esr_flags;
d4cf3892 168 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
9dd921cf
HB		 169}
170
171void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
172{
d4cf3892 173 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
9dd921cf
HB		 174}
175
176int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
177{
d4cf3892 178 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
9dd921cf
HB		 179}
180
7706664d
AG		 181void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
182{
183 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
184}
185
9dd921cf
HB		 186void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
187 struct kvm_interrupt *irq)
188{
c5335f17
AG		 189 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
190
191 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
192 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
193
194 kvmppc_booke_queue_irqprio(vcpu, prio);
9dd921cf
HB		 195}
196
4496f974
AG		 197void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
198 struct kvm_interrupt *irq)
199{
200 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 201 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
4496f974
AG		 202}
203
d4cf3892
HB		 204/* Deliver the interrupt of the corresponding priority, if possible. */
205static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
206 unsigned int priority)
bbf45ba5 207{
d4cf3892 208 int allowed = 0;
6045be5d 209 ulong uninitialized_var(msr_mask);
daf5e271 210 bool update_esr = false, update_dear = false;
5c6cedf4
AG		 211 ulong crit_raw = vcpu->arch.shared->critical;
212 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
213 bool crit;
c5335f17 214 bool keep_irq = false;
5c6cedf4
AG		 215
216 /* Truncate crit indicators in 32 bit mode */
217 if (!(vcpu->arch.shared->msr & MSR_SF)) {
218 crit_raw &= 0xffffffff;
219 crit_r1 &= 0xffffffff;
220 }
221
222 /* Critical section when crit == r1 */
223 crit = (crit_raw == crit_r1);
224 /* ... and we're in supervisor mode */
225 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 226
c5335f17
AG		 227 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
228 priority = BOOKE_IRQPRIO_EXTERNAL;
229 keep_irq = true;
230 }
231
d4cf3892 232 switch (priority) {
d4cf3892 233 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 234 case BOOKE_IRQPRIO_DATA_STORAGE:
daf5e271
LY		 235 update_dear = true;
236 /* fall through */
d4cf3892 237 case BOOKE_IRQPRIO_INST_STORAGE:
daf5e271
LY		 238 case BOOKE_IRQPRIO_PROGRAM:
239 update_esr = true;
240 /* fall through */
241 case BOOKE_IRQPRIO_ITLB_MISS:
242 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 243 case BOOKE_IRQPRIO_FP_UNAVAIL:
bb3a8a17
HB		 244 case BOOKE_IRQPRIO_SPE_UNAVAIL:
245 case BOOKE_IRQPRIO_SPE_FP_DATA:
246 case BOOKE_IRQPRIO_SPE_FP_ROUND:
d4cf3892
HB		 247 case BOOKE_IRQPRIO_AP_UNAVAIL:
248 case BOOKE_IRQPRIO_ALIGNMENT:
249 allowed = 1;
250 msr_mask = MSR_CE|MSR_ME|MSR_DE;
bbf45ba5 251 break;
d4cf3892
HB		 252 case BOOKE_IRQPRIO_CRITICAL:
253 case BOOKE_IRQPRIO_WATCHDOG:
666e7252 254 allowed = vcpu->arch.shared->msr & MSR_CE;
d4cf3892 255 msr_mask = MSR_ME;
bbf45ba5 256 break;
d4cf3892 257 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 258 allowed = vcpu->arch.shared->msr & MSR_ME;
d4cf3892 259 msr_mask = 0;
bbf45ba5 260 break;
d4cf3892
HB		 261 case BOOKE_IRQPRIO_EXTERNAL:
262 case BOOKE_IRQPRIO_DECREMENTER:
263 case BOOKE_IRQPRIO_FIT:
666e7252 264 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 265 allowed = allowed && !crit;
d4cf3892 266 msr_mask = MSR_CE|MSR_ME|MSR_DE;
bbf45ba5 267 break;
d4cf3892 268 case BOOKE_IRQPRIO_DEBUG:
666e7252 269 allowed = vcpu->arch.shared->msr & MSR_DE;
d4cf3892 270 msr_mask = MSR_ME;
bbf45ba5 271 break;
bbf45ba5
HB		 272 }
273
d4cf3892 274 if (allowed) {
de7906c3
AG		 275 vcpu->arch.shared->srr0 = vcpu->arch.pc;
276 vcpu->arch.shared->srr1 = vcpu->arch.shared->msr;
d4cf3892 277 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271
LY		 278 if (update_esr == true)
279 vcpu->arch.esr = vcpu->arch.queued_esr;
280 if (update_dear == true)
5e030186 281 vcpu->arch.shared->dar = vcpu->arch.queued_dear;
666e7252 282 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 283
c5335f17
AG		 284 if (!keep_irq)
285 clear_bit(priority, &vcpu->arch.pending_exceptions);
bbf45ba5
HB		 286 }
287
d4cf3892 288 return allowed;
bbf45ba5
HB		 289}
290
291/* Check pending exceptions and deliver one, if possible. */
9dd921cf 292void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
bbf45ba5
HB		 293{
294 unsigned long *pending = &vcpu->arch.pending_exceptions;
90bba358 295 unsigned long old_pending = vcpu->arch.pending_exceptions;
bbf45ba5
HB		 296 unsigned int priority;
297
9ab80843 298 priority = __ffs(*pending);
bdc89f13 299 while (priority <= BOOKE_IRQPRIO_MAX) {
d4cf3892 300 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 301 break;
bbf45ba5
HB		 302
303 priority = find_next_bit(pending,
304 BITS_PER_BYTE * sizeof(*pending),
305 priority + 1);
306 }
90bba358
AG		 307
308 /* Tell the guest about our interrupt status */
309 if (*pending)
310 vcpu->arch.shared->int_pending = 1;
311 else if (old_pending)
312 vcpu->arch.shared->int_pending = 0;
bbf45ba5
HB		 313}
314
df6909e5
PM		 315int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
316{
317 int ret;
318
319 local_irq_disable();
320 kvm_guest_enter();
321 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
322 kvm_guest_exit();
323 local_irq_enable();
324
325 return ret;
326}
327
bbf45ba5
HB		 328/**
329 * kvmppc_handle_exit
330 *
331 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
332 */
333int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
334 unsigned int exit_nr)
335{
336 enum emulation_result er;
337 int r = RESUME_HOST;
338
73e75b41
HB		 339 /* update before a new last_exit_type is rewritten */
340 kvmppc_update_timing_stats(vcpu);
341
bbf45ba5
HB		 342 local_irq_enable();
343
344 run->exit_reason = KVM_EXIT_UNKNOWN;
345 run->ready_for_interrupt_injection = 1;
346
347 switch (exit_nr) {
348 case BOOKE_INTERRUPT_MACHINE_CHECK:
349 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
350 kvmppc_dump_vcpu(vcpu);
351 r = RESUME_HOST;
352 break;
353
354 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 355 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB		 356 if (need_resched())
357 cond_resched();
358 r = RESUME_GUEST;
359 break;
360
bbf45ba5
HB		 361 case BOOKE_INTERRUPT_DECREMENTER:
362 /* Since we switched IVPR back to the host's value, the host
363 * handled this interrupt the moment we enabled interrupts.
364 * Now we just offer it a chance to reschedule the guest. */
7b701591 365 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB		 366 if (need_resched())
367 cond_resched();
bbf45ba5
HB		 368 r = RESUME_GUEST;
369 break;
370
371 case BOOKE_INTERRUPT_PROGRAM:
666e7252 372 if (vcpu->arch.shared->msr & MSR_PR) {
bbf45ba5
HB		 373 /* Program traps generated by user-level software must be handled
374 * by the guest kernel. */
daf5e271 375 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 376 r = RESUME_GUEST;
7b701591 377 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB		 378 break;
379 }
380
381 er = kvmppc_emulate_instruction(run, vcpu);
382 switch (er) {
383 case EMULATE_DONE:
73e75b41 384 /* don't overwrite subtypes, just account kvm_stats */
7b701591 385 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
bbf45ba5
HB		 386 /* Future optimization: only reload non-volatiles if
387 * they were actually modified by emulation. */
bbf45ba5
HB		 388 r = RESUME_GUEST_NV;
389 break;
390 case EMULATE_DO_DCR:
391 run->exit_reason = KVM_EXIT_DCR;
392 r = RESUME_HOST;
393 break;
394 case EMULATE_FAIL:
395 /* XXX Deliver Program interrupt to guest. */
5cf8ca22 396 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
bbf45ba5
HB		 397 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
398 /* For debugging, encode the failing instruction and
399 * report it to userspace. */
400 run->hw.hardware_exit_reason = ~0ULL << 32;
401 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
402 r = RESUME_HOST;
403 break;
404 default:
405 BUG();
406 }
407 break;
408
de368dce 409 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 410 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 411 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE		 412 r = RESUME_GUEST;
413 break;
414
4cd35f67
SW		 415#ifdef CONFIG_SPE
416 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
417 if (vcpu->arch.shared->msr & MSR_SPE)
418 kvmppc_vcpu_enable_spe(vcpu);
419 else
420 kvmppc_booke_queue_irqprio(vcpu,
421 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB		 422 r = RESUME_GUEST;
423 break;
4cd35f67 424 }
bb3a8a17
HB		 425
426 case BOOKE_INTERRUPT_SPE_FP_DATA:
427 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
428 r = RESUME_GUEST;
429 break;
430
431 case BOOKE_INTERRUPT_SPE_FP_ROUND:
432 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
433 r = RESUME_GUEST;
434 break;
4cd35f67
SW		 435#else
436 case BOOKE_INTERRUPT_SPE_UNAVAIL:
437 /*
438 * Guest wants SPE, but host kernel doesn't support it. Send
439 * an "unimplemented operation" program check to the guest.
440 */
441 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
442 r = RESUME_GUEST;
443 break;
444
445 /*
446 * These really should never happen without CONFIG_SPE,
447 * as we should never enable the real MSR[SPE] in the guest.
448 */
449 case BOOKE_INTERRUPT_SPE_FP_DATA:
450 case BOOKE_INTERRUPT_SPE_FP_ROUND:
451 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
452 __func__, exit_nr, vcpu->arch.pc);
453 run->hw.hardware_exit_reason = exit_nr;
454 r = RESUME_HOST;
455 break;
456#endif
bb3a8a17 457
bbf45ba5 458 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY		 459 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
460 vcpu->arch.fault_esr);
7b701591 461 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB		 462 r = RESUME_GUEST;
463 break;
464
465 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 466 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 467 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB		 468 r = RESUME_GUEST;
469 break;
470
471 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG		 472 if (!(vcpu->arch.shared->msr & MSR_PR) &&
473 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
474 /* KVM PV hypercalls */
475 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
476 r = RESUME_GUEST;
477 } else {
478 /* Guest syscalls */
479 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
480 }
7b701591 481 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB		 482 r = RESUME_GUEST;
483 break;
484
485 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 486 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 487 int gtlb_index;
475e7cdd 488 gpa_t gpaddr;
bbf45ba5
HB		 489 gfn_t gfn;
490
a4cd8b23
SW		 491#ifdef CONFIG_KVM_E500
492 if (!(vcpu->arch.shared->msr & MSR_PR) &&
493 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
494 kvmppc_map_magic(vcpu);
495 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
496 r = RESUME_GUEST;
497
498 break;
499 }
500#endif
501
bbf45ba5 502 /* Check the guest TLB. */
fa86b8dd 503 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 504 if (gtlb_index < 0) {
bbf45ba5 505 /* The guest didn't have a mapping for it. */
daf5e271
LY		 506 kvmppc_core_queue_dtlb_miss(vcpu,
507 vcpu->arch.fault_dear,
508 vcpu->arch.fault_esr);
b52a638c 509 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 510 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB		 511 r = RESUME_GUEST;
512 break;
513 }
514
be8d1cae 515 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 516 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 517
518 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
519 /* The guest TLB had a mapping, but the shadow TLB
520 * didn't, and it is RAM. This could be because:
521 * a) the entry is mapping the host kernel, or
522 * b) the guest used a large mapping which we're faking
523 * Either way, we need to satisfy the fault without
524 * invoking the guest. */
58a96214 525 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 526 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB		 527 r = RESUME_GUEST;
528 } else {
529 /* Guest has mapped and accessed a page which is not
530 * actually RAM. */
475e7cdd 531 vcpu->arch.paddr_accessed = gpaddr;
bbf45ba5 532 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 533 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB		 534 }
535
536 break;
537 }
538
539 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 540 unsigned long eaddr = vcpu->arch.pc;
89168618 541 gpa_t gpaddr;
bbf45ba5 542 gfn_t gfn;
7924bd41 543 int gtlb_index;
bbf45ba5
HB		 544
545 r = RESUME_GUEST;
546
547 /* Check the guest TLB. */
fa86b8dd 548 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 549 if (gtlb_index < 0) {
bbf45ba5 550 /* The guest didn't have a mapping for it. */
d4cf3892 551 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 552 kvmppc_mmu_itlb_miss(vcpu);
7b701591 553 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB		 554 break;
555 }
556
7b701591 557 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 558
be8d1cae 559 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 560 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 561
562 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
563 /* The guest TLB had a mapping, but the shadow TLB
564 * didn't. This could be because:
565 * a) the entry is mapping the host kernel, or
566 * b) the guest used a large mapping which we're faking
567 * Either way, we need to satisfy the fault without
568 * invoking the guest. */
58a96214 569 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB		 570 } else {
571 /* Guest mapped and leaped at non-RAM! */
d4cf3892 572 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB		 573 }
574
575 break;
576 }
577
6a0ab738
HB		 578 case BOOKE_INTERRUPT_DEBUG: {
579 u32 dbsr;
580
581 vcpu->arch.pc = mfspr(SPRN_CSRR0);
582
583 /* clear IAC events in DBSR register */
584 dbsr = mfspr(SPRN_DBSR);
585 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
586 mtspr(SPRN_DBSR, dbsr);
587
588 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 589 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB		 590 r = RESUME_HOST;
591 break;
592 }
593
bbf45ba5
HB		 594 default:
595 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
596 BUG();
597 }
598
599 local_irq_disable();
600
9dd921cf 601 kvmppc_core_deliver_interrupts(vcpu);
bbf45ba5 602
bbf45ba5
HB		 603 if (!(r & RESUME_HOST)) {
604 /* To avoid clobbering exit_reason, only check for signals if
605 * we aren't already exiting to userspace for some other
606 * reason. */
607 if (signal_pending(current)) {
608 run->exit_reason = KVM_EXIT_INTR;
609 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
7b701591 610 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
bbf45ba5
HB		 611 }
612 }
613
614 return r;
615}
616
617/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
618int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
619{
082decf2
HB		 620 int i;
621
bbf45ba5 622 vcpu->arch.pc = 0;
666e7252 623 vcpu->arch.shared->msr = 0;
ecee273f 624 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
8e5b26b5 625 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
bbf45ba5 626
49dd2c49
HB		 627 vcpu->arch.shadow_pid = 1;
628
082decf2
HB		 629 /* Eye-catching numbers so we know if the guest takes an interrupt
630 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 631 vcpu->arch.ivpr = 0x55550000;
082decf2
HB		 632 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
633 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 634
73e75b41
HB		 635 kvmppc_init_timing_stats(vcpu);
636
5cbb5106 637 return kvmppc_core_vcpu_setup(vcpu);
bbf45ba5
HB		 638}
639
640int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
641{
642 int i;
643
644 regs->pc = vcpu->arch.pc;
992b5b29 645 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB		 646 regs->ctr = vcpu->arch.ctr;
647 regs->lr = vcpu->arch.lr;
992b5b29 648 regs->xer = kvmppc_get_xer(vcpu);
666e7252 649 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG		 650 regs->srr0 = vcpu->arch.shared->srr0;
651 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 652 regs->pid = vcpu->arch.pid;
a73a9599
AG		 653 regs->sprg0 = vcpu->arch.shared->sprg0;
654 regs->sprg1 = vcpu->arch.shared->sprg1;
655 regs->sprg2 = vcpu->arch.shared->sprg2;
656 regs->sprg3 = vcpu->arch.shared->sprg3;
bc9c1933
PT		 657 regs->sprg4 = vcpu->arch.sprg4;
658 regs->sprg5 = vcpu->arch.sprg5;
659 regs->sprg6 = vcpu->arch.sprg6;
660 regs->sprg7 = vcpu->arch.sprg7;
bbf45ba5
HB		 661
662 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 663 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB		 664
665 return 0;
666}
667
668int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
669{
670 int i;
671
672 vcpu->arch.pc = regs->pc;
992b5b29 673 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB		 674 vcpu->arch.ctr = regs->ctr;
675 vcpu->arch.lr = regs->lr;
992b5b29 676 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 677 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG		 678 vcpu->arch.shared->srr0 = regs->srr0;
679 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 680 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG		 681 vcpu->arch.shared->sprg0 = regs->sprg0;
682 vcpu->arch.shared->sprg1 = regs->sprg1;
683 vcpu->arch.shared->sprg2 = regs->sprg2;
684 vcpu->arch.shared->sprg3 = regs->sprg3;
bc9c1933
PT		 685 vcpu->arch.sprg4 = regs->sprg4;
686 vcpu->arch.sprg5 = regs->sprg5;
687 vcpu->arch.sprg6 = regs->sprg6;
688 vcpu->arch.sprg7 = regs->sprg7;
bbf45ba5 689
8e5b26b5
AG		 690 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
691 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB		 692
693 return 0;
694}
695
5ce941ee
SW		 696static void get_sregs_base(struct kvm_vcpu *vcpu,
697 struct kvm_sregs *sregs)
698{
699 u64 tb = get_tb();
700
701 sregs->u.e.features |= KVM_SREGS_E_BASE;
702
703 sregs->u.e.csrr0 = vcpu->arch.csrr0;
704 sregs->u.e.csrr1 = vcpu->arch.csrr1;
705 sregs->u.e.mcsr = vcpu->arch.mcsr;
706 sregs->u.e.esr = vcpu->arch.esr;
707 sregs->u.e.dear = vcpu->arch.shared->dar;
708 sregs->u.e.tsr = vcpu->arch.tsr;
709 sregs->u.e.tcr = vcpu->arch.tcr;
710 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
711 sregs->u.e.tb = tb;
712 sregs->u.e.vrsave = vcpu->arch.vrsave;
713}
714
715static int set_sregs_base(struct kvm_vcpu *vcpu,
716 struct kvm_sregs *sregs)
717{
718 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
719 return 0;
720
721 vcpu->arch.csrr0 = sregs->u.e.csrr0;
722 vcpu->arch.csrr1 = sregs->u.e.csrr1;
723 vcpu->arch.mcsr = sregs->u.e.mcsr;
724 vcpu->arch.esr = sregs->u.e.esr;
725 vcpu->arch.shared->dar = sregs->u.e.dear;
726 vcpu->arch.vrsave = sregs->u.e.vrsave;
727 vcpu->arch.tcr = sregs->u.e.tcr;
728
729 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC)
730 vcpu->arch.dec = sregs->u.e.dec;
731
732 kvmppc_emulate_dec(vcpu);
733
734 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
735 /*
736 * FIXME: existing KVM timer handling is incomplete.
737 * TSR cannot be read by the guest, and its value in
738 * vcpu->arch is always zero. For now, just handle
739 * the case where the caller is trying to inject a
740 * decrementer interrupt.
741 */
742
743 if ((sregs->u.e.tsr & TSR_DIS) &&
744 (vcpu->arch.tcr & TCR_DIE))
745 kvmppc_core_queue_dec(vcpu);
746 }
747
748 return 0;
749}
750
751static void get_sregs_arch206(struct kvm_vcpu *vcpu,
752 struct kvm_sregs *sregs)
753{
754 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
755
756 sregs->u.e.pir = 0;
757 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
758 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
759 sregs->u.e.decar = vcpu->arch.decar;
760 sregs->u.e.ivpr = vcpu->arch.ivpr;
761}
762
763static int set_sregs_arch206(struct kvm_vcpu *vcpu,
764 struct kvm_sregs *sregs)
765{
766 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
767 return 0;
768
769 if (sregs->u.e.pir != 0)
770 return -EINVAL;
771
772 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
773 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
774 vcpu->arch.decar = sregs->u.e.decar;
775 vcpu->arch.ivpr = sregs->u.e.ivpr;
776
777 return 0;
778}
779
780void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
781{
782 sregs->u.e.features |= KVM_SREGS_E_IVOR;
783
784 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
785 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
786 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
787 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
788 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
789 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
790 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
791 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
792 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
793 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
794 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
795 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
796 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
797 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
798 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
799 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
800}
801
802int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
803{
804 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
805 return 0;
806
807 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
808 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
809 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
810 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
811 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
812 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
813 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
814 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
815 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
816 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
817 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
818 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
819 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
820 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
821 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
822 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
823
824 return 0;
825}
826
bbf45ba5
HB		 827int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
828 struct kvm_sregs *sregs)
829{
5ce941ee
SW		 830 sregs->pvr = vcpu->arch.pvr;
831
832 get_sregs_base(vcpu, sregs);
833 get_sregs_arch206(vcpu, sregs);
834 kvmppc_core_get_sregs(vcpu, sregs);
835 return 0;
bbf45ba5
HB		 836}
837
838int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
839 struct kvm_sregs *sregs)
840{
5ce941ee
SW		 841 int ret;
842
843 if (vcpu->arch.pvr != sregs->pvr)
844 return -EINVAL;
845
846 ret = set_sregs_base(vcpu, sregs);
847 if (ret < 0)
848 return ret;
849
850 ret = set_sregs_arch206(vcpu, sregs);
851 if (ret < 0)
852 return ret;
853
854 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB		 855}
856
857int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
858{
859 return -ENOTSUPP;
860}
861
862int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
863{
864 return -ENOTSUPP;
865}
866
bbf45ba5
HB		 867int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
868 struct kvm_translation *tr)
869{
98001d8d
AK		 870 int r;
871
98001d8d 872 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 873 return r;
bbf45ba5 874}
d9fbd03d 875
4e755758
AG		 876int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
877{
878 return -ENOTSUPP;
879}
880
f9e0554d
PM		 881int kvmppc_core_prepare_memory_region(struct kvm *kvm,
882 struct kvm_userspace_memory_region *mem)
883{
884 return 0;
885}
886
887void kvmppc_core_commit_memory_region(struct kvm *kvm,
888 struct kvm_userspace_memory_region *mem)
889{
890}
891
892int kvmppc_core_init_vm(struct kvm *kvm)
893{
894 return 0;
895}
896
897void kvmppc_core_destroy_vm(struct kvm *kvm)
898{
899}
900
2986b8c7 901int __init kvmppc_booke_init(void)
d9fbd03d
HB		 902{
903 unsigned long ivor[16];
904 unsigned long max_ivor = 0;
905 int i;
906
907 /* We install our own exception handlers by hijacking IVPR. IVPR must
908 * be 16-bit aligned, so we need a 64KB allocation. */
909 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
910 VCPU_SIZE_ORDER);
911 if (!kvmppc_booke_handlers)
912 return -ENOMEM;
913
914 /* XXX make sure our handlers are smaller than Linux's */
915
916 /* Copy our interrupt handlers to match host IVORs. That way we don't
917 * have to swap the IVORs on every guest/host transition. */
918 ivor[0] = mfspr(SPRN_IVOR0);
919 ivor[1] = mfspr(SPRN_IVOR1);
920 ivor[2] = mfspr(SPRN_IVOR2);
921 ivor[3] = mfspr(SPRN_IVOR3);
922 ivor[4] = mfspr(SPRN_IVOR4);
923 ivor[5] = mfspr(SPRN_IVOR5);
924 ivor[6] = mfspr(SPRN_IVOR6);
925 ivor[7] = mfspr(SPRN_IVOR7);
926 ivor[8] = mfspr(SPRN_IVOR8);
927 ivor[9] = mfspr(SPRN_IVOR9);
928 ivor[10] = mfspr(SPRN_IVOR10);
929 ivor[11] = mfspr(SPRN_IVOR11);
930 ivor[12] = mfspr(SPRN_IVOR12);
931 ivor[13] = mfspr(SPRN_IVOR13);
932 ivor[14] = mfspr(SPRN_IVOR14);
933 ivor[15] = mfspr(SPRN_IVOR15);
934
935 for (i = 0; i < 16; i++) {
936 if (ivor[i] > max_ivor)
937 max_ivor = ivor[i];
938
939 memcpy((void *)kvmppc_booke_handlers + ivor[i],
940 kvmppc_handlers_start + i * kvmppc_handler_len,
941 kvmppc_handler_len);
942 }
943 flush_icache_range(kvmppc_booke_handlers,
944 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
945
db93f574 946 return 0;
d9fbd03d
HB		 947}
948
db93f574 949void __exit kvmppc_booke_exit(void)
d9fbd03d
HB		 950{
951 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
952 kvm_exit();
953}
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