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bbf45ba5 HB |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright IBM Corp. 2007 | |
16 | * | |
17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | |
18 | * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> | |
19 | */ | |
20 | ||
21 | #include <linux/errno.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/kvm_host.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/vmalloc.h> | |
26 | #include <linux/fs.h> | |
7924bd41 | 27 | |
bbf45ba5 HB |
28 | #include <asm/cputable.h> |
29 | #include <asm/uaccess.h> | |
30 | #include <asm/kvm_ppc.h> | |
73e75b41 | 31 | #include "timing.h" |
d9fbd03d | 32 | #include <asm/cacheflush.h> |
7924bd41 | 33 | #include <asm/kvm_44x.h> |
bbf45ba5 | 34 | |
75f74f0d | 35 | #include "booke.h" |
bbf45ba5 HB |
36 | #include "44x_tlb.h" |
37 | ||
d9fbd03d HB |
38 | unsigned long kvmppc_booke_handlers; |
39 | ||
bbf45ba5 HB |
40 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM |
41 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU | |
42 | ||
43 | struct kvm_stats_debugfs_item debugfs_entries[] = { | |
bbf45ba5 HB |
44 | { "mmio", VCPU_STAT(mmio_exits) }, |
45 | { "dcr", VCPU_STAT(dcr_exits) }, | |
46 | { "sig", VCPU_STAT(signal_exits) }, | |
bbf45ba5 HB |
47 | { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, |
48 | { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, | |
49 | { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, | |
50 | { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, | |
51 | { "sysc", VCPU_STAT(syscall_exits) }, | |
52 | { "isi", VCPU_STAT(isi_exits) }, | |
53 | { "dsi", VCPU_STAT(dsi_exits) }, | |
54 | { "inst_emu", VCPU_STAT(emulated_inst_exits) }, | |
55 | { "dec", VCPU_STAT(dec_exits) }, | |
56 | { "ext_intr", VCPU_STAT(ext_intr_exits) }, | |
45c5eb67 | 57 | { "halt_wakeup", VCPU_STAT(halt_wakeup) }, |
bbf45ba5 HB |
58 | { NULL } |
59 | }; | |
60 | ||
bbf45ba5 HB |
61 | /* TODO: use vcpu_printf() */ |
62 | void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) | |
63 | { | |
64 | int i; | |
65 | ||
5cf8ca22 HB |
66 | printk("pc: %08lx msr: %08lx\n", vcpu->arch.pc, vcpu->arch.msr); |
67 | printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); | |
68 | printk("srr0: %08lx srr1: %08lx\n", vcpu->arch.srr0, vcpu->arch.srr1); | |
bbf45ba5 HB |
69 | |
70 | printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); | |
71 | ||
72 | for (i = 0; i < 32; i += 4) { | |
5cf8ca22 | 73 | printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, |
bbf45ba5 HB |
74 | vcpu->arch.gpr[i], |
75 | vcpu->arch.gpr[i+1], | |
76 | vcpu->arch.gpr[i+2], | |
77 | vcpu->arch.gpr[i+3]); | |
78 | } | |
79 | } | |
80 | ||
d4cf3892 HB |
81 | static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, |
82 | unsigned int priority) | |
9dd921cf | 83 | { |
9dd921cf HB |
84 | set_bit(priority, &vcpu->arch.pending_exceptions); |
85 | } | |
86 | ||
9dd921cf HB |
87 | void kvmppc_core_queue_program(struct kvm_vcpu *vcpu) |
88 | { | |
d4cf3892 | 89 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); |
9dd921cf HB |
90 | } |
91 | ||
92 | void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) | |
93 | { | |
d4cf3892 | 94 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); |
9dd921cf HB |
95 | } |
96 | ||
97 | int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) | |
98 | { | |
d4cf3892 | 99 | return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); |
9dd921cf HB |
100 | } |
101 | ||
102 | void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, | |
103 | struct kvm_interrupt *irq) | |
104 | { | |
d4cf3892 | 105 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL); |
9dd921cf HB |
106 | } |
107 | ||
d4cf3892 HB |
108 | /* Deliver the interrupt of the corresponding priority, if possible. */ |
109 | static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, | |
110 | unsigned int priority) | |
bbf45ba5 | 111 | { |
d4cf3892 HB |
112 | int allowed = 0; |
113 | ulong msr_mask; | |
114 | ||
115 | switch (priority) { | |
116 | case BOOKE_IRQPRIO_PROGRAM: | |
117 | case BOOKE_IRQPRIO_DTLB_MISS: | |
118 | case BOOKE_IRQPRIO_ITLB_MISS: | |
119 | case BOOKE_IRQPRIO_SYSCALL: | |
120 | case BOOKE_IRQPRIO_DATA_STORAGE: | |
121 | case BOOKE_IRQPRIO_INST_STORAGE: | |
122 | case BOOKE_IRQPRIO_FP_UNAVAIL: | |
123 | case BOOKE_IRQPRIO_AP_UNAVAIL: | |
124 | case BOOKE_IRQPRIO_ALIGNMENT: | |
125 | allowed = 1; | |
126 | msr_mask = MSR_CE|MSR_ME|MSR_DE; | |
bbf45ba5 | 127 | break; |
d4cf3892 HB |
128 | case BOOKE_IRQPRIO_CRITICAL: |
129 | case BOOKE_IRQPRIO_WATCHDOG: | |
130 | allowed = vcpu->arch.msr & MSR_CE; | |
131 | msr_mask = MSR_ME; | |
bbf45ba5 | 132 | break; |
d4cf3892 HB |
133 | case BOOKE_IRQPRIO_MACHINE_CHECK: |
134 | allowed = vcpu->arch.msr & MSR_ME; | |
135 | msr_mask = 0; | |
bbf45ba5 | 136 | break; |
d4cf3892 HB |
137 | case BOOKE_IRQPRIO_EXTERNAL: |
138 | case BOOKE_IRQPRIO_DECREMENTER: | |
139 | case BOOKE_IRQPRIO_FIT: | |
140 | allowed = vcpu->arch.msr & MSR_EE; | |
141 | msr_mask = MSR_CE|MSR_ME|MSR_DE; | |
bbf45ba5 | 142 | break; |
d4cf3892 HB |
143 | case BOOKE_IRQPRIO_DEBUG: |
144 | allowed = vcpu->arch.msr & MSR_DE; | |
145 | msr_mask = MSR_ME; | |
bbf45ba5 | 146 | break; |
bbf45ba5 HB |
147 | } |
148 | ||
d4cf3892 HB |
149 | if (allowed) { |
150 | vcpu->arch.srr0 = vcpu->arch.pc; | |
151 | vcpu->arch.srr1 = vcpu->arch.msr; | |
152 | vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; | |
153 | kvmppc_set_msr(vcpu, vcpu->arch.msr & msr_mask); | |
bbf45ba5 | 154 | |
d4cf3892 | 155 | clear_bit(priority, &vcpu->arch.pending_exceptions); |
bbf45ba5 HB |
156 | } |
157 | ||
d4cf3892 | 158 | return allowed; |
bbf45ba5 HB |
159 | } |
160 | ||
161 | /* Check pending exceptions and deliver one, if possible. */ | |
9dd921cf | 162 | void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu) |
bbf45ba5 HB |
163 | { |
164 | unsigned long *pending = &vcpu->arch.pending_exceptions; | |
bbf45ba5 HB |
165 | unsigned int priority; |
166 | ||
9ab80843 | 167 | priority = __ffs(*pending); |
bbf45ba5 | 168 | while (priority <= BOOKE_MAX_INTERRUPT) { |
d4cf3892 | 169 | if (kvmppc_booke_irqprio_deliver(vcpu, priority)) |
bbf45ba5 | 170 | break; |
bbf45ba5 HB |
171 | |
172 | priority = find_next_bit(pending, | |
173 | BITS_PER_BYTE * sizeof(*pending), | |
174 | priority + 1); | |
175 | } | |
176 | } | |
177 | ||
bbf45ba5 HB |
178 | /** |
179 | * kvmppc_handle_exit | |
180 | * | |
181 | * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) | |
182 | */ | |
183 | int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
184 | unsigned int exit_nr) | |
185 | { | |
186 | enum emulation_result er; | |
187 | int r = RESUME_HOST; | |
188 | ||
73e75b41 HB |
189 | /* update before a new last_exit_type is rewritten */ |
190 | kvmppc_update_timing_stats(vcpu); | |
191 | ||
bbf45ba5 HB |
192 | local_irq_enable(); |
193 | ||
194 | run->exit_reason = KVM_EXIT_UNKNOWN; | |
195 | run->ready_for_interrupt_injection = 1; | |
196 | ||
197 | switch (exit_nr) { | |
198 | case BOOKE_INTERRUPT_MACHINE_CHECK: | |
199 | printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); | |
200 | kvmppc_dump_vcpu(vcpu); | |
201 | r = RESUME_HOST; | |
202 | break; | |
203 | ||
204 | case BOOKE_INTERRUPT_EXTERNAL: | |
7b701591 | 205 | kvmppc_account_exit(vcpu, EXT_INTR_EXITS); |
1b6766c7 HB |
206 | if (need_resched()) |
207 | cond_resched(); | |
208 | r = RESUME_GUEST; | |
209 | break; | |
210 | ||
bbf45ba5 HB |
211 | case BOOKE_INTERRUPT_DECREMENTER: |
212 | /* Since we switched IVPR back to the host's value, the host | |
213 | * handled this interrupt the moment we enabled interrupts. | |
214 | * Now we just offer it a chance to reschedule the guest. */ | |
7b701591 | 215 | kvmppc_account_exit(vcpu, DEC_EXITS); |
bbf45ba5 HB |
216 | if (need_resched()) |
217 | cond_resched(); | |
bbf45ba5 HB |
218 | r = RESUME_GUEST; |
219 | break; | |
220 | ||
221 | case BOOKE_INTERRUPT_PROGRAM: | |
222 | if (vcpu->arch.msr & MSR_PR) { | |
223 | /* Program traps generated by user-level software must be handled | |
224 | * by the guest kernel. */ | |
225 | vcpu->arch.esr = vcpu->arch.fault_esr; | |
d4cf3892 | 226 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); |
bbf45ba5 | 227 | r = RESUME_GUEST; |
7b701591 | 228 | kvmppc_account_exit(vcpu, USR_PR_INST); |
bbf45ba5 HB |
229 | break; |
230 | } | |
231 | ||
232 | er = kvmppc_emulate_instruction(run, vcpu); | |
233 | switch (er) { | |
234 | case EMULATE_DONE: | |
73e75b41 | 235 | /* don't overwrite subtypes, just account kvm_stats */ |
7b701591 | 236 | kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); |
bbf45ba5 HB |
237 | /* Future optimization: only reload non-volatiles if |
238 | * they were actually modified by emulation. */ | |
bbf45ba5 HB |
239 | r = RESUME_GUEST_NV; |
240 | break; | |
241 | case EMULATE_DO_DCR: | |
242 | run->exit_reason = KVM_EXIT_DCR; | |
243 | r = RESUME_HOST; | |
244 | break; | |
245 | case EMULATE_FAIL: | |
246 | /* XXX Deliver Program interrupt to guest. */ | |
5cf8ca22 | 247 | printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", |
bbf45ba5 HB |
248 | __func__, vcpu->arch.pc, vcpu->arch.last_inst); |
249 | /* For debugging, encode the failing instruction and | |
250 | * report it to userspace. */ | |
251 | run->hw.hardware_exit_reason = ~0ULL << 32; | |
252 | run->hw.hardware_exit_reason |= vcpu->arch.last_inst; | |
253 | r = RESUME_HOST; | |
254 | break; | |
255 | default: | |
256 | BUG(); | |
257 | } | |
258 | break; | |
259 | ||
de368dce | 260 | case BOOKE_INTERRUPT_FP_UNAVAIL: |
d4cf3892 | 261 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); |
7b701591 | 262 | kvmppc_account_exit(vcpu, FP_UNAVAIL); |
de368dce CE |
263 | r = RESUME_GUEST; |
264 | break; | |
265 | ||
bbf45ba5 HB |
266 | case BOOKE_INTERRUPT_DATA_STORAGE: |
267 | vcpu->arch.dear = vcpu->arch.fault_dear; | |
268 | vcpu->arch.esr = vcpu->arch.fault_esr; | |
d4cf3892 | 269 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); |
7b701591 | 270 | kvmppc_account_exit(vcpu, DSI_EXITS); |
bbf45ba5 HB |
271 | r = RESUME_GUEST; |
272 | break; | |
273 | ||
274 | case BOOKE_INTERRUPT_INST_STORAGE: | |
275 | vcpu->arch.esr = vcpu->arch.fault_esr; | |
d4cf3892 | 276 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); |
7b701591 | 277 | kvmppc_account_exit(vcpu, ISI_EXITS); |
bbf45ba5 HB |
278 | r = RESUME_GUEST; |
279 | break; | |
280 | ||
281 | case BOOKE_INTERRUPT_SYSCALL: | |
d4cf3892 | 282 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); |
7b701591 | 283 | kvmppc_account_exit(vcpu, SYSCALL_EXITS); |
bbf45ba5 HB |
284 | r = RESUME_GUEST; |
285 | break; | |
286 | ||
7924bd41 | 287 | /* XXX move to a 440-specific file. */ |
bbf45ba5 | 288 | case BOOKE_INTERRUPT_DTLB_MISS: { |
bbf45ba5 | 289 | unsigned long eaddr = vcpu->arch.fault_dear; |
7924bd41 | 290 | int gtlb_index; |
475e7cdd | 291 | gpa_t gpaddr; |
bbf45ba5 HB |
292 | gfn_t gfn; |
293 | ||
294 | /* Check the guest TLB. */ | |
7924bd41 HB |
295 | gtlb_index = kvmppc_44x_dtlb_index(vcpu, eaddr); |
296 | if (gtlb_index < 0) { | |
bbf45ba5 | 297 | /* The guest didn't have a mapping for it. */ |
d4cf3892 | 298 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); |
bbf45ba5 HB |
299 | vcpu->arch.dear = vcpu->arch.fault_dear; |
300 | vcpu->arch.esr = vcpu->arch.fault_esr; | |
7b701591 | 301 | kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); |
bbf45ba5 HB |
302 | r = RESUME_GUEST; |
303 | break; | |
304 | } | |
305 | ||
be8d1cae | 306 | gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); |
475e7cdd | 307 | gfn = gpaddr >> PAGE_SHIFT; |
bbf45ba5 HB |
308 | |
309 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { | |
310 | /* The guest TLB had a mapping, but the shadow TLB | |
311 | * didn't, and it is RAM. This could be because: | |
312 | * a) the entry is mapping the host kernel, or | |
313 | * b) the guest used a large mapping which we're faking | |
314 | * Either way, we need to satisfy the fault without | |
315 | * invoking the guest. */ | |
58a96214 | 316 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); |
7b701591 | 317 | kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); |
bbf45ba5 HB |
318 | r = RESUME_GUEST; |
319 | } else { | |
320 | /* Guest has mapped and accessed a page which is not | |
321 | * actually RAM. */ | |
475e7cdd | 322 | vcpu->arch.paddr_accessed = gpaddr; |
bbf45ba5 | 323 | r = kvmppc_emulate_mmio(run, vcpu); |
7b701591 | 324 | kvmppc_account_exit(vcpu, MMIO_EXITS); |
bbf45ba5 HB |
325 | } |
326 | ||
327 | break; | |
328 | } | |
329 | ||
7924bd41 | 330 | /* XXX move to a 440-specific file. */ |
bbf45ba5 | 331 | case BOOKE_INTERRUPT_ITLB_MISS: { |
bbf45ba5 | 332 | unsigned long eaddr = vcpu->arch.pc; |
89168618 | 333 | gpa_t gpaddr; |
bbf45ba5 | 334 | gfn_t gfn; |
7924bd41 | 335 | int gtlb_index; |
bbf45ba5 HB |
336 | |
337 | r = RESUME_GUEST; | |
338 | ||
339 | /* Check the guest TLB. */ | |
7924bd41 HB |
340 | gtlb_index = kvmppc_44x_itlb_index(vcpu, eaddr); |
341 | if (gtlb_index < 0) { | |
bbf45ba5 | 342 | /* The guest didn't have a mapping for it. */ |
d4cf3892 | 343 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); |
7b701591 | 344 | kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); |
bbf45ba5 HB |
345 | break; |
346 | } | |
347 | ||
7b701591 | 348 | kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); |
bbf45ba5 | 349 | |
be8d1cae | 350 | gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); |
89168618 | 351 | gfn = gpaddr >> PAGE_SHIFT; |
bbf45ba5 HB |
352 | |
353 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { | |
354 | /* The guest TLB had a mapping, but the shadow TLB | |
355 | * didn't. This could be because: | |
356 | * a) the entry is mapping the host kernel, or | |
357 | * b) the guest used a large mapping which we're faking | |
358 | * Either way, we need to satisfy the fault without | |
359 | * invoking the guest. */ | |
58a96214 | 360 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); |
bbf45ba5 HB |
361 | } else { |
362 | /* Guest mapped and leaped at non-RAM! */ | |
d4cf3892 | 363 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); |
bbf45ba5 HB |
364 | } |
365 | ||
366 | break; | |
367 | } | |
368 | ||
6a0ab738 HB |
369 | case BOOKE_INTERRUPT_DEBUG: { |
370 | u32 dbsr; | |
371 | ||
372 | vcpu->arch.pc = mfspr(SPRN_CSRR0); | |
373 | ||
374 | /* clear IAC events in DBSR register */ | |
375 | dbsr = mfspr(SPRN_DBSR); | |
376 | dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; | |
377 | mtspr(SPRN_DBSR, dbsr); | |
378 | ||
379 | run->exit_reason = KVM_EXIT_DEBUG; | |
7b701591 | 380 | kvmppc_account_exit(vcpu, DEBUG_EXITS); |
6a0ab738 HB |
381 | r = RESUME_HOST; |
382 | break; | |
383 | } | |
384 | ||
bbf45ba5 HB |
385 | default: |
386 | printk(KERN_EMERG "exit_nr %d\n", exit_nr); | |
387 | BUG(); | |
388 | } | |
389 | ||
390 | local_irq_disable(); | |
391 | ||
9dd921cf | 392 | kvmppc_core_deliver_interrupts(vcpu); |
bbf45ba5 | 393 | |
bbf45ba5 HB |
394 | if (!(r & RESUME_HOST)) { |
395 | /* To avoid clobbering exit_reason, only check for signals if | |
396 | * we aren't already exiting to userspace for some other | |
397 | * reason. */ | |
398 | if (signal_pending(current)) { | |
399 | run->exit_reason = KVM_EXIT_INTR; | |
400 | r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); | |
7b701591 | 401 | kvmppc_account_exit(vcpu, SIGNAL_EXITS); |
bbf45ba5 HB |
402 | } |
403 | } | |
404 | ||
405 | return r; | |
406 | } | |
407 | ||
408 | /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ | |
409 | int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) | |
410 | { | |
bbf45ba5 HB |
411 | vcpu->arch.pc = 0; |
412 | vcpu->arch.msr = 0; | |
413 | vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */ | |
414 | ||
49dd2c49 HB |
415 | vcpu->arch.shadow_pid = 1; |
416 | ||
bbf45ba5 HB |
417 | /* Eye-catching number so we know if the guest takes an interrupt |
418 | * before it's programmed its own IVPR. */ | |
419 | vcpu->arch.ivpr = 0x55550000; | |
420 | ||
73e75b41 HB |
421 | kvmppc_init_timing_stats(vcpu); |
422 | ||
5cbb5106 | 423 | return kvmppc_core_vcpu_setup(vcpu); |
bbf45ba5 HB |
424 | } |
425 | ||
426 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
427 | { | |
428 | int i; | |
429 | ||
430 | regs->pc = vcpu->arch.pc; | |
431 | regs->cr = vcpu->arch.cr; | |
432 | regs->ctr = vcpu->arch.ctr; | |
433 | regs->lr = vcpu->arch.lr; | |
434 | regs->xer = vcpu->arch.xer; | |
435 | regs->msr = vcpu->arch.msr; | |
436 | regs->srr0 = vcpu->arch.srr0; | |
437 | regs->srr1 = vcpu->arch.srr1; | |
438 | regs->pid = vcpu->arch.pid; | |
439 | regs->sprg0 = vcpu->arch.sprg0; | |
440 | regs->sprg1 = vcpu->arch.sprg1; | |
441 | regs->sprg2 = vcpu->arch.sprg2; | |
442 | regs->sprg3 = vcpu->arch.sprg3; | |
443 | regs->sprg5 = vcpu->arch.sprg4; | |
444 | regs->sprg6 = vcpu->arch.sprg5; | |
445 | regs->sprg7 = vcpu->arch.sprg6; | |
446 | ||
447 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | |
448 | regs->gpr[i] = vcpu->arch.gpr[i]; | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
453 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
454 | { | |
455 | int i; | |
456 | ||
457 | vcpu->arch.pc = regs->pc; | |
458 | vcpu->arch.cr = regs->cr; | |
459 | vcpu->arch.ctr = regs->ctr; | |
460 | vcpu->arch.lr = regs->lr; | |
461 | vcpu->arch.xer = regs->xer; | |
b8fd68ac | 462 | kvmppc_set_msr(vcpu, regs->msr); |
bbf45ba5 HB |
463 | vcpu->arch.srr0 = regs->srr0; |
464 | vcpu->arch.srr1 = regs->srr1; | |
465 | vcpu->arch.sprg0 = regs->sprg0; | |
466 | vcpu->arch.sprg1 = regs->sprg1; | |
467 | vcpu->arch.sprg2 = regs->sprg2; | |
468 | vcpu->arch.sprg3 = regs->sprg3; | |
469 | vcpu->arch.sprg5 = regs->sprg4; | |
470 | vcpu->arch.sprg6 = regs->sprg5; | |
471 | vcpu->arch.sprg7 = regs->sprg6; | |
472 | ||
473 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++) | |
474 | vcpu->arch.gpr[i] = regs->gpr[i]; | |
475 | ||
476 | return 0; | |
477 | } | |
478 | ||
479 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |
480 | struct kvm_sregs *sregs) | |
481 | { | |
482 | return -ENOTSUPP; | |
483 | } | |
484 | ||
485 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
486 | struct kvm_sregs *sregs) | |
487 | { | |
488 | return -ENOTSUPP; | |
489 | } | |
490 | ||
491 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
492 | { | |
493 | return -ENOTSUPP; | |
494 | } | |
495 | ||
496 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
497 | { | |
498 | return -ENOTSUPP; | |
499 | } | |
500 | ||
bbf45ba5 HB |
501 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, |
502 | struct kvm_translation *tr) | |
503 | { | |
5cbb5106 | 504 | return kvmppc_core_vcpu_translate(vcpu, tr); |
bbf45ba5 | 505 | } |
d9fbd03d | 506 | |
db93f574 | 507 | int kvmppc_booke_init(void) |
d9fbd03d HB |
508 | { |
509 | unsigned long ivor[16]; | |
510 | unsigned long max_ivor = 0; | |
511 | int i; | |
512 | ||
513 | /* We install our own exception handlers by hijacking IVPR. IVPR must | |
514 | * be 16-bit aligned, so we need a 64KB allocation. */ | |
515 | kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, | |
516 | VCPU_SIZE_ORDER); | |
517 | if (!kvmppc_booke_handlers) | |
518 | return -ENOMEM; | |
519 | ||
520 | /* XXX make sure our handlers are smaller than Linux's */ | |
521 | ||
522 | /* Copy our interrupt handlers to match host IVORs. That way we don't | |
523 | * have to swap the IVORs on every guest/host transition. */ | |
524 | ivor[0] = mfspr(SPRN_IVOR0); | |
525 | ivor[1] = mfspr(SPRN_IVOR1); | |
526 | ivor[2] = mfspr(SPRN_IVOR2); | |
527 | ivor[3] = mfspr(SPRN_IVOR3); | |
528 | ivor[4] = mfspr(SPRN_IVOR4); | |
529 | ivor[5] = mfspr(SPRN_IVOR5); | |
530 | ivor[6] = mfspr(SPRN_IVOR6); | |
531 | ivor[7] = mfspr(SPRN_IVOR7); | |
532 | ivor[8] = mfspr(SPRN_IVOR8); | |
533 | ivor[9] = mfspr(SPRN_IVOR9); | |
534 | ivor[10] = mfspr(SPRN_IVOR10); | |
535 | ivor[11] = mfspr(SPRN_IVOR11); | |
536 | ivor[12] = mfspr(SPRN_IVOR12); | |
537 | ivor[13] = mfspr(SPRN_IVOR13); | |
538 | ivor[14] = mfspr(SPRN_IVOR14); | |
539 | ivor[15] = mfspr(SPRN_IVOR15); | |
540 | ||
541 | for (i = 0; i < 16; i++) { | |
542 | if (ivor[i] > max_ivor) | |
543 | max_ivor = ivor[i]; | |
544 | ||
545 | memcpy((void *)kvmppc_booke_handlers + ivor[i], | |
546 | kvmppc_handlers_start + i * kvmppc_handler_len, | |
547 | kvmppc_handler_len); | |
548 | } | |
549 | flush_icache_range(kvmppc_booke_handlers, | |
550 | kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); | |
551 | ||
db93f574 | 552 | return 0; |
d9fbd03d HB |
553 | } |
554 | ||
db93f574 | 555 | void __exit kvmppc_booke_exit(void) |
d9fbd03d HB |
556 | { |
557 | free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); | |
558 | kvm_exit(); | |
559 | } |