[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / booke.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright IBM Corp. 2007
 *
 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
 *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
 */

#include <linux/errno.h>
#include <linux/err.h>
#include <linux/kvm_host.h>
#include <linux/module.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <asm/cputable.h>
#include <asm/uaccess.h>
#include <asm/kvm_ppc.h>
#include <asm/cacheflush.h>

#include "booke.h"
#include "44x_tlb.h"

unsigned long kvmppc_booke_handlers;

#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU

struct kvm_stats_debugfs_item debugfs_entries[] = {
	{ "mmio",       VCPU_STAT(mmio_exits) },
	{ "dcr",        VCPU_STAT(dcr_exits) },
	{ "sig",        VCPU_STAT(signal_exits) },
	{ "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
	{ "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
	{ "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
	{ "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
	{ "sysc",       VCPU_STAT(syscall_exits) },
	{ "isi",        VCPU_STAT(isi_exits) },
	{ "dsi",        VCPU_STAT(dsi_exits) },
	{ "inst_emu",   VCPU_STAT(emulated_inst_exits) },
	{ "dec",        VCPU_STAT(dec_exits) },
	{ "ext_intr",   VCPU_STAT(ext_intr_exits) },
	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
	{ NULL }
};

/* TODO: use vcpu_printf() */
void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
{
	int i;

	printk("pc:   %08lx msr:  %08lx\n", vcpu->arch.pc, vcpu->arch.msr);
	printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
	printk("srr0: %08lx srr1: %08lx\n", vcpu->arch.srr0, vcpu->arch.srr1);

	printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);

	for (i = 0; i < 32; i += 4) {
		printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
		       vcpu->arch.gpr[i],
		       vcpu->arch.gpr[i+1],
		       vcpu->arch.gpr[i+2],
		       vcpu->arch.gpr[i+3]);
	}
}

static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
                                       unsigned int priority)
{
	set_bit(priority, &vcpu->arch.pending_exceptions);
}

void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
{
	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
}

void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
{
	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
}

int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
{
	return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
}

void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
                                struct kvm_interrupt *irq)
{
	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL);
}

/* Deliver the interrupt of the corresponding priority, if possible. */
static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
                                        unsigned int priority)
{
	int allowed = 0;
	ulong msr_mask;

	switch (priority) {
	case BOOKE_IRQPRIO_PROGRAM:
	case BOOKE_IRQPRIO_DTLB_MISS:
	case BOOKE_IRQPRIO_ITLB_MISS:
	case BOOKE_IRQPRIO_SYSCALL:
	case BOOKE_IRQPRIO_DATA_STORAGE:
	case BOOKE_IRQPRIO_INST_STORAGE:
	case BOOKE_IRQPRIO_FP_UNAVAIL:
	case BOOKE_IRQPRIO_AP_UNAVAIL:
	case BOOKE_IRQPRIO_ALIGNMENT:
		allowed = 1;
		msr_mask = MSR_CE|MSR_ME|MSR_DE;
		break;
	case BOOKE_IRQPRIO_CRITICAL:
	case BOOKE_IRQPRIO_WATCHDOG:
		allowed = vcpu->arch.msr & MSR_CE;
		msr_mask = MSR_ME;
		break;
	case BOOKE_IRQPRIO_MACHINE_CHECK:
		allowed = vcpu->arch.msr & MSR_ME;
		msr_mask = 0;
		break;
	case BOOKE_IRQPRIO_EXTERNAL:
	case BOOKE_IRQPRIO_DECREMENTER:
	case BOOKE_IRQPRIO_FIT:
		allowed = vcpu->arch.msr & MSR_EE;
		msr_mask = MSR_CE|MSR_ME|MSR_DE;
		break;
	case BOOKE_IRQPRIO_DEBUG:
		allowed = vcpu->arch.msr & MSR_DE;
		msr_mask = MSR_ME;
		break;
	}

	if (allowed) {
		vcpu->arch.srr0 = vcpu->arch.pc;
		vcpu->arch.srr1 = vcpu->arch.msr;
		vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
		kvmppc_set_msr(vcpu, vcpu->arch.msr & msr_mask);

		clear_bit(priority, &vcpu->arch.pending_exceptions);
	}

	return allowed;
}

/* Check pending exceptions and deliver one, if possible. */
void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
{
	unsigned long *pending = &vcpu->arch.pending_exceptions;
	unsigned int priority;

	priority = __ffs(*pending);
	while (priority <= BOOKE_MAX_INTERRUPT) {
		if (kvmppc_booke_irqprio_deliver(vcpu, priority))
			break;

		priority = find_next_bit(pending,
		                         BITS_PER_BYTE * sizeof(*pending),
		                         priority + 1);
	}
}

/**
 * kvmppc_handle_exit
 *
 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
 */
int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                       unsigned int exit_nr)
{
	enum emulation_result er;
	int r = RESUME_HOST;

	local_irq_enable();

	run->exit_reason = KVM_EXIT_UNKNOWN;
	run->ready_for_interrupt_injection = 1;

	switch (exit_nr) {
	case BOOKE_INTERRUPT_MACHINE_CHECK:
		printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
		kvmppc_dump_vcpu(vcpu);
		r = RESUME_HOST;
		break;

	case BOOKE_INTERRUPT_EXTERNAL:
		vcpu->stat.ext_intr_exits++;
		if (need_resched())
			cond_resched();
		r = RESUME_GUEST;
		break;

	case BOOKE_INTERRUPT_DECREMENTER:
		/* Since we switched IVPR back to the host's value, the host
		 * handled this interrupt the moment we enabled interrupts.
		 * Now we just offer it a chance to reschedule the guest. */

		/* XXX At this point the TLB still holds our shadow TLB, so if
		 * we do reschedule the host will fault over it. Perhaps we
		 * should politely restore the host's entries to minimize
		 * misses before ceding control. */
		vcpu->stat.dec_exits++;
		if (need_resched())
			cond_resched();
		r = RESUME_GUEST;
		break;

	case BOOKE_INTERRUPT_PROGRAM:
		if (vcpu->arch.msr & MSR_PR) {
			/* Program traps generated by user-level software must be handled
			 * by the guest kernel. */
			vcpu->arch.esr = vcpu->arch.fault_esr;
			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
			r = RESUME_GUEST;
			break;
		}

		er = kvmppc_emulate_instruction(run, vcpu);
		switch (er) {
		case EMULATE_DONE:
			/* Future optimization: only reload non-volatiles if
			 * they were actually modified by emulation. */
			vcpu->stat.emulated_inst_exits++;
			r = RESUME_GUEST_NV;
			break;
		case EMULATE_DO_DCR:
			run->exit_reason = KVM_EXIT_DCR;
			vcpu->stat.dcr_exits++;
			r = RESUME_HOST;
			break;
		case EMULATE_FAIL:
			/* XXX Deliver Program interrupt to guest. */
			printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
			       __func__, vcpu->arch.pc, vcpu->arch.last_inst);
			/* For debugging, encode the failing instruction and
			 * report it to userspace. */
			run->hw.hardware_exit_reason = ~0ULL << 32;
			run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
			r = RESUME_HOST;
			break;
		default:
			BUG();
		}
		break;

	case BOOKE_INTERRUPT_FP_UNAVAIL:
		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
		r = RESUME_GUEST;
		break;

	case BOOKE_INTERRUPT_DATA_STORAGE:
		vcpu->arch.dear = vcpu->arch.fault_dear;
		vcpu->arch.esr = vcpu->arch.fault_esr;
		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
		vcpu->stat.dsi_exits++;
		r = RESUME_GUEST;
		break;

	case BOOKE_INTERRUPT_INST_STORAGE:
		vcpu->arch.esr = vcpu->arch.fault_esr;
		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
		vcpu->stat.isi_exits++;
		r = RESUME_GUEST;
		break;

	case BOOKE_INTERRUPT_SYSCALL:
		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
		vcpu->stat.syscall_exits++;
		r = RESUME_GUEST;
		break;

	case BOOKE_INTERRUPT_DTLB_MISS: {
		struct kvmppc_44x_tlbe *gtlbe;
		unsigned long eaddr = vcpu->arch.fault_dear;
		gfn_t gfn;

		/* Check the guest TLB. */
		gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
		if (!gtlbe) {
			/* The guest didn't have a mapping for it. */
			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
			vcpu->arch.dear = vcpu->arch.fault_dear;
			vcpu->arch.esr = vcpu->arch.fault_esr;
			vcpu->stat.dtlb_real_miss_exits++;
			r = RESUME_GUEST;
			break;
		}

		vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
		gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;

		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
			/* The guest TLB had a mapping, but the shadow TLB
			 * didn't, and it is RAM. This could be because:
			 * a) the entry is mapping the host kernel, or
			 * b) the guest used a large mapping which we're faking
			 * Either way, we need to satisfy the fault without
			 * invoking the guest. */
			kvmppc_mmu_map(vcpu, eaddr, vcpu->arch.paddr_accessed, gtlbe->tid,
			               gtlbe->word2, get_tlb_bytes(gtlbe));
			vcpu->stat.dtlb_virt_miss_exits++;
			r = RESUME_GUEST;
		} else {
			/* Guest has mapped and accessed a page which is not
			 * actually RAM. */
			r = kvmppc_emulate_mmio(run, vcpu);
			vcpu->stat.mmio_exits++;
		}

		break;
	}

	case BOOKE_INTERRUPT_ITLB_MISS: {
		struct kvmppc_44x_tlbe *gtlbe;
		unsigned long eaddr = vcpu->arch.pc;
		gpa_t gpaddr;
		gfn_t gfn;

		r = RESUME_GUEST;

		/* Check the guest TLB. */
		gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
		if (!gtlbe) {
			/* The guest didn't have a mapping for it. */
			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
			vcpu->stat.itlb_real_miss_exits++;
			break;
		}

		vcpu->stat.itlb_virt_miss_exits++;

		gpaddr = tlb_xlate(gtlbe, eaddr);
		gfn = gpaddr >> PAGE_SHIFT;

		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
			/* The guest TLB had a mapping, but the shadow TLB
			 * didn't. This could be because:
			 * a) the entry is mapping the host kernel, or
			 * b) the guest used a large mapping which we're faking
			 * Either way, we need to satisfy the fault without
			 * invoking the guest. */
			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlbe->tid,
			               gtlbe->word2, get_tlb_bytes(gtlbe));
		} else {
			/* Guest mapped and leaped at non-RAM! */
			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
		}

		break;
	}

	case BOOKE_INTERRUPT_DEBUG: {
		u32 dbsr;

		vcpu->arch.pc = mfspr(SPRN_CSRR0);

		/* clear IAC events in DBSR register */
		dbsr = mfspr(SPRN_DBSR);
		dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
		mtspr(SPRN_DBSR, dbsr);

		run->exit_reason = KVM_EXIT_DEBUG;
		r = RESUME_HOST;
		break;
	}

	default:
		printk(KERN_EMERG "exit_nr %d\n", exit_nr);
		BUG();
	}

	local_irq_disable();

	kvmppc_core_deliver_interrupts(vcpu);

	if (!(r & RESUME_HOST)) {
		/* To avoid clobbering exit_reason, only check for signals if
		 * we aren't already exiting to userspace for some other
		 * reason. */
		if (signal_pending(current)) {
			run->exit_reason = KVM_EXIT_INTR;
			r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
			vcpu->stat.signal_exits++;
		}
	}

	return r;
}

/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
{
	vcpu->arch.pc = 0;
	vcpu->arch.msr = 0;
	vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */

	vcpu->arch.shadow_pid = 1;

	/* Eye-catching number so we know if the guest takes an interrupt
	 * before it's programmed its own IVPR. */
	vcpu->arch.ivpr = 0x55550000;

	return kvmppc_core_vcpu_setup(vcpu);
}

int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
	int i;

	regs->pc = vcpu->arch.pc;
	regs->cr = vcpu->arch.cr;
	regs->ctr = vcpu->arch.ctr;
	regs->lr = vcpu->arch.lr;
	regs->xer = vcpu->arch.xer;
	regs->msr = vcpu->arch.msr;
	regs->srr0 = vcpu->arch.srr0;
	regs->srr1 = vcpu->arch.srr1;
	regs->pid = vcpu->arch.pid;
	regs->sprg0 = vcpu->arch.sprg0;
	regs->sprg1 = vcpu->arch.sprg1;
	regs->sprg2 = vcpu->arch.sprg2;
	regs->sprg3 = vcpu->arch.sprg3;
	regs->sprg5 = vcpu->arch.sprg4;
	regs->sprg6 = vcpu->arch.sprg5;
	regs->sprg7 = vcpu->arch.sprg6;

	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
		regs->gpr[i] = vcpu->arch.gpr[i];

	return 0;
}

int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
	int i;

	vcpu->arch.pc = regs->pc;
	vcpu->arch.cr = regs->cr;
	vcpu->arch.ctr = regs->ctr;
	vcpu->arch.lr = regs->lr;
	vcpu->arch.xer = regs->xer;
	kvmppc_set_msr(vcpu, regs->msr);
	vcpu->arch.srr0 = regs->srr0;
	vcpu->arch.srr1 = regs->srr1;
	vcpu->arch.sprg0 = regs->sprg0;
	vcpu->arch.sprg1 = regs->sprg1;
	vcpu->arch.sprg2 = regs->sprg2;
	vcpu->arch.sprg3 = regs->sprg3;
	vcpu->arch.sprg5 = regs->sprg4;
	vcpu->arch.sprg6 = regs->sprg5;
	vcpu->arch.sprg7 = regs->sprg6;

	for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
		vcpu->arch.gpr[i] = regs->gpr[i];

	return 0;
}

int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
                                  struct kvm_sregs *sregs)
{
	return -ENOTSUPP;
}

int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
                                  struct kvm_sregs *sregs)
{
	return -ENOTSUPP;
}

int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
	return -ENOTSUPP;
}

int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
	return -ENOTSUPP;
}

int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
                                  struct kvm_translation *tr)
{
	return kvmppc_core_vcpu_translate(vcpu, tr);
}

int kvmppc_booke_init(void)
{
	unsigned long ivor[16];
	unsigned long max_ivor = 0;
	int i;

	/* We install our own exception handlers by hijacking IVPR. IVPR must
	 * be 16-bit aligned, so we need a 64KB allocation. */
	kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
	                                         VCPU_SIZE_ORDER);
	if (!kvmppc_booke_handlers)
		return -ENOMEM;

	/* XXX make sure our handlers are smaller than Linux's */

	/* Copy our interrupt handlers to match host IVORs. That way we don't
	 * have to swap the IVORs on every guest/host transition. */
	ivor[0] = mfspr(SPRN_IVOR0);
	ivor[1] = mfspr(SPRN_IVOR1);
	ivor[2] = mfspr(SPRN_IVOR2);
	ivor[3] = mfspr(SPRN_IVOR3);
	ivor[4] = mfspr(SPRN_IVOR4);
	ivor[5] = mfspr(SPRN_IVOR5);
	ivor[6] = mfspr(SPRN_IVOR6);
	ivor[7] = mfspr(SPRN_IVOR7);
	ivor[8] = mfspr(SPRN_IVOR8);
	ivor[9] = mfspr(SPRN_IVOR9);
	ivor[10] = mfspr(SPRN_IVOR10);
	ivor[11] = mfspr(SPRN_IVOR11);
	ivor[12] = mfspr(SPRN_IVOR12);
	ivor[13] = mfspr(SPRN_IVOR13);
	ivor[14] = mfspr(SPRN_IVOR14);
	ivor[15] = mfspr(SPRN_IVOR15);

	for (i = 0; i < 16; i++) {
		if (ivor[i] > max_ivor)
			max_ivor = ivor[i];

		memcpy((void *)kvmppc_booke_handlers + ivor[i],
		       kvmppc_handlers_start + i * kvmppc_handler_len,
		       kvmppc_handler_len);
	}
	flush_icache_range(kvmppc_booke_handlers,
	                   kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);

	return 0;
}

void __exit kvmppc_booke_exit(void)
{
	free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
	kvm_exit();
}
Commit	Line	Data
bbf45ba5 HB	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright IBM Corp. 2007
	16	*
	17	* Authors: Hollis Blanchard <hollisb@us.ibm.com>
	18	* Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
	19	*/
	20
	21	#include <linux/errno.h>
	22	#include <linux/err.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/module.h>
	25	#include <linux/vmalloc.h>
	26	#include <linux/fs.h>
	27	#include <asm/cputable.h>
	28	#include <asm/uaccess.h>
	29	#include <asm/kvm_ppc.h>
d9fbd03d	30	#include <asm/cacheflush.h>
bbf45ba5	31
75f74f0d	32	#include "booke.h"
bbf45ba5 HB	33	#include "44x_tlb.h"
bbf45ba5 HB	34
d9fbd03d HB	35	unsigned long kvmppc_booke_handlers;
d9fbd03d HB	36
bbf45ba5 HB	37	#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
	38	#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
	39
	40	struct kvm_stats_debugfs_item debugfs_entries[] = {
bbf45ba5 HB	41	{ "mmio", VCPU_STAT(mmio_exits) },
	42	{ "dcr", VCPU_STAT(dcr_exits) },
	43	{ "sig", VCPU_STAT(signal_exits) },
bbf45ba5 HB	44	{ "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
	45	{ "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
	46	{ "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
	47	{ "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
	48	{ "sysc", VCPU_STAT(syscall_exits) },
	49	{ "isi", VCPU_STAT(isi_exits) },
	50	{ "dsi", VCPU_STAT(dsi_exits) },
	51	{ "inst_emu", VCPU_STAT(emulated_inst_exits) },
	52	{ "dec", VCPU_STAT(dec_exits) },
	53	{ "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67	54	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
bbf45ba5 HB	55	{ NULL }
	56	};
	57
bbf45ba5 HB	58	/* TODO: use vcpu_printf() */
	59	void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
	60	{
	61	int i;
	62
5cf8ca22 HB	63	printk("pc: %08lx msr: %08lx\n", vcpu->arch.pc, vcpu->arch.msr);
	64	printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
	65	printk("srr0: %08lx srr1: %08lx\n", vcpu->arch.srr0, vcpu->arch.srr1);
bbf45ba5 HB	66
	67	printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
	68
	69	for (i = 0; i < 32; i += 4) {
5cf8ca22	70	printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
bbf45ba5 HB	71	vcpu->arch.gpr[i],
	72	vcpu->arch.gpr[i+1],
	73	vcpu->arch.gpr[i+2],
	74	vcpu->arch.gpr[i+3]);
	75	}
	76	}
	77
d4cf3892 HB	78	static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
d4cf3892 HB	79	unsigned int priority)
9dd921cf	80	{
9dd921cf HB	81	set_bit(priority, &vcpu->arch.pending_exceptions);
	82	}
	83
9dd921cf HB	84	void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
9dd921cf HB	85	{
d4cf3892	86	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
9dd921cf HB	87	}
	88
	89	void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
	90	{
d4cf3892	91	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
9dd921cf HB	92	}
	93
	94	int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
	95	{
d4cf3892	96	return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
9dd921cf HB	97	}
	98
	99	void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
	100	struct kvm_interrupt *irq)
	101	{
d4cf3892	102	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL);
9dd921cf HB	103	}
9dd921cf HB	104
d4cf3892 HB	105	/* Deliver the interrupt of the corresponding priority, if possible. */
	106	static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
	107	unsigned int priority)
bbf45ba5	108	{
d4cf3892 HB	109	int allowed = 0;
	110	ulong msr_mask;
	111
	112	switch (priority) {
	113	case BOOKE_IRQPRIO_PROGRAM:
	114	case BOOKE_IRQPRIO_DTLB_MISS:
	115	case BOOKE_IRQPRIO_ITLB_MISS:
	116	case BOOKE_IRQPRIO_SYSCALL:
	117	case BOOKE_IRQPRIO_DATA_STORAGE:
	118	case BOOKE_IRQPRIO_INST_STORAGE:
	119	case BOOKE_IRQPRIO_FP_UNAVAIL:
	120	case BOOKE_IRQPRIO_AP_UNAVAIL:
	121	case BOOKE_IRQPRIO_ALIGNMENT:
	122	allowed = 1;
	123	msr_mask = MSR_CE\|MSR_ME\|MSR_DE;
bbf45ba5	124	break;
d4cf3892 HB	125	case BOOKE_IRQPRIO_CRITICAL:
	126	case BOOKE_IRQPRIO_WATCHDOG:
	127	allowed = vcpu->arch.msr & MSR_CE;
	128	msr_mask = MSR_ME;
bbf45ba5	129	break;
d4cf3892 HB	130	case BOOKE_IRQPRIO_MACHINE_CHECK:
	131	allowed = vcpu->arch.msr & MSR_ME;
	132	msr_mask = 0;
bbf45ba5	133	break;
d4cf3892 HB	134	case BOOKE_IRQPRIO_EXTERNAL:
	135	case BOOKE_IRQPRIO_DECREMENTER:
	136	case BOOKE_IRQPRIO_FIT:
	137	allowed = vcpu->arch.msr & MSR_EE;
	138	msr_mask = MSR_CE\|MSR_ME\|MSR_DE;
bbf45ba5	139	break;
d4cf3892 HB	140	case BOOKE_IRQPRIO_DEBUG:
	141	allowed = vcpu->arch.msr & MSR_DE;
	142	msr_mask = MSR_ME;
bbf45ba5	143	break;
bbf45ba5 HB	144	}
bbf45ba5 HB	145
d4cf3892 HB	146	if (allowed) {
	147	vcpu->arch.srr0 = vcpu->arch.pc;
	148	vcpu->arch.srr1 = vcpu->arch.msr;
	149	vcpu->arch.pc = vcpu->arch.ivpr \| vcpu->arch.ivor[priority];
	150	kvmppc_set_msr(vcpu, vcpu->arch.msr & msr_mask);
bbf45ba5	151
d4cf3892	152	clear_bit(priority, &vcpu->arch.pending_exceptions);
bbf45ba5 HB	153	}
bbf45ba5 HB	154
d4cf3892	155	return allowed;
bbf45ba5 HB	156	}
	157
	158	/* Check pending exceptions and deliver one, if possible. */
9dd921cf	159	void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
bbf45ba5 HB	160	{
bbf45ba5 HB	161	unsigned long *pending = &vcpu->arch.pending_exceptions;
bbf45ba5 HB	162	unsigned int priority;
bbf45ba5 HB	163
9ab80843	164	priority = __ffs(*pending);
bbf45ba5	165	while (priority <= BOOKE_MAX_INTERRUPT) {
d4cf3892	166	if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5	167	break;
bbf45ba5 HB	168
	169	priority = find_next_bit(pending,
	170	BITS_PER_BYTE * sizeof(*pending),
	171	priority + 1);
	172	}
	173	}
	174
bbf45ba5 HB	175	/**
	176	* kvmppc_handle_exit
	177	*
	178	* Return value is in the form (errcode<<2 \| RESUME_FLAG_HOST \| RESUME_FLAG_NV)
	179	*/
	180	int kvmppc_handle_exit(struct kvm_run run, struct kvm_vcpu vcpu,
	181	unsigned int exit_nr)
	182	{
	183	enum emulation_result er;
	184	int r = RESUME_HOST;
	185
	186	local_irq_enable();
	187
	188	run->exit_reason = KVM_EXIT_UNKNOWN;
	189	run->ready_for_interrupt_injection = 1;
	190
	191	switch (exit_nr) {
	192	case BOOKE_INTERRUPT_MACHINE_CHECK:
	193	printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
	194	kvmppc_dump_vcpu(vcpu);
	195	r = RESUME_HOST;
	196	break;
	197
	198	case BOOKE_INTERRUPT_EXTERNAL:
1b6766c7 HB	199	vcpu->stat.ext_intr_exits++;
	200	if (need_resched())
	201	cond_resched();
	202	r = RESUME_GUEST;
	203	break;
	204
bbf45ba5 HB	205	case BOOKE_INTERRUPT_DECREMENTER:
	206	/* Since we switched IVPR back to the host's value, the host
	207	* handled this interrupt the moment we enabled interrupts.
	208	* Now we just offer it a chance to reschedule the guest. */
	209
	210	/* XXX At this point the TLB still holds our shadow TLB, so if
	211	* we do reschedule the host will fault over it. Perhaps we
	212	* should politely restore the host's entries to minimize
	213	* misses before ceding control. */
1b6766c7	214	vcpu->stat.dec_exits++;
bbf45ba5 HB	215	if (need_resched())
bbf45ba5 HB	216	cond_resched();
bbf45ba5 HB	217	r = RESUME_GUEST;
	218	break;
	219
	220	case BOOKE_INTERRUPT_PROGRAM:
	221	if (vcpu->arch.msr & MSR_PR) {
	222	/* Program traps generated by user-level software must be handled
	223	* by the guest kernel. */
	224	vcpu->arch.esr = vcpu->arch.fault_esr;
d4cf3892	225	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
bbf45ba5 HB	226	r = RESUME_GUEST;
	227	break;
	228	}
	229
	230	er = kvmppc_emulate_instruction(run, vcpu);
	231	switch (er) {
	232	case EMULATE_DONE:
	233	/* Future optimization: only reload non-volatiles if
	234	* they were actually modified by emulation. */
	235	vcpu->stat.emulated_inst_exits++;
	236	r = RESUME_GUEST_NV;
	237	break;
	238	case EMULATE_DO_DCR:
	239	run->exit_reason = KVM_EXIT_DCR;
1b6766c7	240	vcpu->stat.dcr_exits++;
bbf45ba5 HB	241	r = RESUME_HOST;
	242	break;
	243	case EMULATE_FAIL:
	244	/* XXX Deliver Program interrupt to guest. */
5cf8ca22	245	printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
bbf45ba5 HB	246	__func__, vcpu->arch.pc, vcpu->arch.last_inst);
	247	/* For debugging, encode the failing instruction and
	248	* report it to userspace. */
	249	run->hw.hardware_exit_reason = ~0ULL << 32;
	250	run->hw.hardware_exit_reason \|= vcpu->arch.last_inst;
	251	r = RESUME_HOST;
	252	break;
	253	default:
	254	BUG();
	255	}
	256	break;
	257
de368dce	258	case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892	259	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
de368dce CE	260	r = RESUME_GUEST;
	261	break;
	262
bbf45ba5 HB	263	case BOOKE_INTERRUPT_DATA_STORAGE:
	264	vcpu->arch.dear = vcpu->arch.fault_dear;
	265	vcpu->arch.esr = vcpu->arch.fault_esr;
d4cf3892	266	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
bbf45ba5 HB	267	vcpu->stat.dsi_exits++;
	268	r = RESUME_GUEST;
	269	break;
	270
	271	case BOOKE_INTERRUPT_INST_STORAGE:
	272	vcpu->arch.esr = vcpu->arch.fault_esr;
d4cf3892	273	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
bbf45ba5 HB	274	vcpu->stat.isi_exits++;
	275	r = RESUME_GUEST;
	276	break;
	277
	278	case BOOKE_INTERRUPT_SYSCALL:
d4cf3892	279	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
bbf45ba5 HB	280	vcpu->stat.syscall_exits++;
	281	r = RESUME_GUEST;
	282	break;
	283
	284	case BOOKE_INTERRUPT_DTLB_MISS: {
0f55dc48	285	struct kvmppc_44x_tlbe *gtlbe;
bbf45ba5 HB	286	unsigned long eaddr = vcpu->arch.fault_dear;
	287	gfn_t gfn;
	288
	289	/* Check the guest TLB. */
	290	gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
	291	if (!gtlbe) {
	292	/* The guest didn't have a mapping for it. */
d4cf3892	293	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
bbf45ba5 HB	294	vcpu->arch.dear = vcpu->arch.fault_dear;
	295	vcpu->arch.esr = vcpu->arch.fault_esr;
	296	vcpu->stat.dtlb_real_miss_exits++;
	297	r = RESUME_GUEST;
	298	break;
	299	}
	300
	301	vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
	302	gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
	303
	304	if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
	305	/* The guest TLB had a mapping, but the shadow TLB
	306	* didn't, and it is RAM. This could be because:
	307	* a) the entry is mapping the host kernel, or
	308	* b) the guest used a large mapping which we're faking
	309	* Either way, we need to satisfy the fault without
	310	* invoking the guest. */
89168618 HB	311	kvmppc_mmu_map(vcpu, eaddr, vcpu->arch.paddr_accessed, gtlbe->tid,
89168618 HB	312	gtlbe->word2, get_tlb_bytes(gtlbe));
bbf45ba5 HB	313	vcpu->stat.dtlb_virt_miss_exits++;
	314	r = RESUME_GUEST;
	315	} else {
	316	/* Guest has mapped and accessed a page which is not
	317	* actually RAM. */
	318	r = kvmppc_emulate_mmio(run, vcpu);
1b6766c7	319	vcpu->stat.mmio_exits++;
bbf45ba5 HB	320	}
	321
	322	break;
	323	}
	324
	325	case BOOKE_INTERRUPT_ITLB_MISS: {
0f55dc48	326	struct kvmppc_44x_tlbe *gtlbe;
bbf45ba5	327	unsigned long eaddr = vcpu->arch.pc;
89168618	328	gpa_t gpaddr;
bbf45ba5 HB	329	gfn_t gfn;
	330
	331	r = RESUME_GUEST;
	332
	333	/* Check the guest TLB. */
	334	gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
	335	if (!gtlbe) {
	336	/* The guest didn't have a mapping for it. */
d4cf3892	337	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
bbf45ba5 HB	338	vcpu->stat.itlb_real_miss_exits++;
	339	break;
	340	}
	341
	342	vcpu->stat.itlb_virt_miss_exits++;
	343
89168618 HB	344	gpaddr = tlb_xlate(gtlbe, eaddr);
89168618 HB	345	gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5 HB	346
	347	if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
	348	/* The guest TLB had a mapping, but the shadow TLB
	349	* didn't. This could be because:
	350	* a) the entry is mapping the host kernel, or
	351	* b) the guest used a large mapping which we're faking
	352	* Either way, we need to satisfy the fault without
	353	* invoking the guest. */
89168618 HB	354	kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlbe->tid,
89168618 HB	355	gtlbe->word2, get_tlb_bytes(gtlbe));
bbf45ba5 HB	356	} else {
bbf45ba5 HB	357	/* Guest mapped and leaped at non-RAM! */
d4cf3892	358	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5 HB	359	}
	360
	361	break;
	362	}
	363
6a0ab738 HB	364	case BOOKE_INTERRUPT_DEBUG: {
	365	u32 dbsr;
	366
	367	vcpu->arch.pc = mfspr(SPRN_CSRR0);
	368
	369	/* clear IAC events in DBSR register */
	370	dbsr = mfspr(SPRN_DBSR);
	371	dbsr &= DBSR_IAC1 \| DBSR_IAC2 \| DBSR_IAC3 \| DBSR_IAC4;
	372	mtspr(SPRN_DBSR, dbsr);
	373
	374	run->exit_reason = KVM_EXIT_DEBUG;
	375	r = RESUME_HOST;
	376	break;
	377	}
	378
bbf45ba5 HB	379	default:
	380	printk(KERN_EMERG "exit_nr %d\n", exit_nr);
	381	BUG();
	382	}
	383
	384	local_irq_disable();
	385
9dd921cf	386	kvmppc_core_deliver_interrupts(vcpu);
bbf45ba5	387
bbf45ba5 HB	388	if (!(r & RESUME_HOST)) {
	389	/* To avoid clobbering exit_reason, only check for signals if
	390	* we aren't already exiting to userspace for some other
	391	* reason. */
	392	if (signal_pending(current)) {
	393	run->exit_reason = KVM_EXIT_INTR;
	394	r = (-EINTR << 2) \| RESUME_HOST \| (r & RESUME_FLAG_NV);
bbf45ba5	395	vcpu->stat.signal_exits++;
bbf45ba5 HB	396	}
	397	}
	398
	399	return r;
	400	}
	401
	402	/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
	403	int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
	404	{
bbf45ba5 HB	405	vcpu->arch.pc = 0;
	406	vcpu->arch.msr = 0;
	407	vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
	408
49dd2c49 HB	409	vcpu->arch.shadow_pid = 1;
49dd2c49 HB	410
bbf45ba5 HB	411	/* Eye-catching number so we know if the guest takes an interrupt
	412	* before it's programmed its own IVPR. */
	413	vcpu->arch.ivpr = 0x55550000;
	414
5cbb5106	415	return kvmppc_core_vcpu_setup(vcpu);
bbf45ba5 HB	416	}
	417
	418	int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu vcpu, struct kvm_regs regs)
	419	{
	420	int i;
	421
	422	regs->pc = vcpu->arch.pc;
	423	regs->cr = vcpu->arch.cr;
	424	regs->ctr = vcpu->arch.ctr;
	425	regs->lr = vcpu->arch.lr;
	426	regs->xer = vcpu->arch.xer;
	427	regs->msr = vcpu->arch.msr;
	428	regs->srr0 = vcpu->arch.srr0;
	429	regs->srr1 = vcpu->arch.srr1;
	430	regs->pid = vcpu->arch.pid;
	431	regs->sprg0 = vcpu->arch.sprg0;
	432	regs->sprg1 = vcpu->arch.sprg1;
	433	regs->sprg2 = vcpu->arch.sprg2;
	434	regs->sprg3 = vcpu->arch.sprg3;
	435	regs->sprg5 = vcpu->arch.sprg4;
	436	regs->sprg6 = vcpu->arch.sprg5;
	437	regs->sprg7 = vcpu->arch.sprg6;
	438
	439	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
	440	regs->gpr[i] = vcpu->arch.gpr[i];
	441
	442	return 0;
	443	}
	444
	445	int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu vcpu, struct kvm_regs regs)
	446	{
	447	int i;
	448
	449	vcpu->arch.pc = regs->pc;
	450	vcpu->arch.cr = regs->cr;
	451	vcpu->arch.ctr = regs->ctr;
	452	vcpu->arch.lr = regs->lr;
	453	vcpu->arch.xer = regs->xer;
b8fd68ac	454	kvmppc_set_msr(vcpu, regs->msr);
bbf45ba5 HB	455	vcpu->arch.srr0 = regs->srr0;
	456	vcpu->arch.srr1 = regs->srr1;
	457	vcpu->arch.sprg0 = regs->sprg0;
	458	vcpu->arch.sprg1 = regs->sprg1;
	459	vcpu->arch.sprg2 = regs->sprg2;
	460	vcpu->arch.sprg3 = regs->sprg3;
	461	vcpu->arch.sprg5 = regs->sprg4;
	462	vcpu->arch.sprg6 = regs->sprg5;
	463	vcpu->arch.sprg7 = regs->sprg6;
	464
	465	for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
	466	vcpu->arch.gpr[i] = regs->gpr[i];
	467
	468	return 0;
	469	}
	470
	471	int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
	472	struct kvm_sregs *sregs)
	473	{
	474	return -ENOTSUPP;
	475	}
	476
	477	int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
	478	struct kvm_sregs *sregs)
	479	{
	480	return -ENOTSUPP;
	481	}
	482
	483	int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu vcpu, struct kvm_fpu fpu)
	484	{
	485	return -ENOTSUPP;
	486	}
	487
	488	int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu vcpu, struct kvm_fpu fpu)
	489	{
	490	return -ENOTSUPP;
	491	}
	492
bbf45ba5 HB	493	int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
	494	struct kvm_translation *tr)
	495	{
5cbb5106	496	return kvmppc_core_vcpu_translate(vcpu, tr);
bbf45ba5	497	}
d9fbd03d	498
db93f574	499	int kvmppc_booke_init(void)
d9fbd03d HB	500	{
	501	unsigned long ivor[16];
	502	unsigned long max_ivor = 0;
	503	int i;
	504
	505	/* We install our own exception handlers by hijacking IVPR. IVPR must
	506	* be 16-bit aligned, so we need a 64KB allocation. */
	507	kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL \| __GFP_ZERO,
	508	VCPU_SIZE_ORDER);
	509	if (!kvmppc_booke_handlers)
	510	return -ENOMEM;
	511
	512	/* XXX make sure our handlers are smaller than Linux's */
	513
	514	/* Copy our interrupt handlers to match host IVORs. That way we don't
	515	* have to swap the IVORs on every guest/host transition. */
	516	ivor[0] = mfspr(SPRN_IVOR0);
	517	ivor[1] = mfspr(SPRN_IVOR1);
	518	ivor[2] = mfspr(SPRN_IVOR2);
	519	ivor[3] = mfspr(SPRN_IVOR3);
	520	ivor[4] = mfspr(SPRN_IVOR4);
	521	ivor[5] = mfspr(SPRN_IVOR5);
	522	ivor[6] = mfspr(SPRN_IVOR6);
	523	ivor[7] = mfspr(SPRN_IVOR7);
	524	ivor[8] = mfspr(SPRN_IVOR8);
	525	ivor[9] = mfspr(SPRN_IVOR9);
	526	ivor[10] = mfspr(SPRN_IVOR10);
	527	ivor[11] = mfspr(SPRN_IVOR11);
	528	ivor[12] = mfspr(SPRN_IVOR12);
	529	ivor[13] = mfspr(SPRN_IVOR13);
	530	ivor[14] = mfspr(SPRN_IVOR14);
	531	ivor[15] = mfspr(SPRN_IVOR15);
	532
	533	for (i = 0; i < 16; i++) {
	534	if (ivor[i] > max_ivor)
	535	max_ivor = ivor[i];
	536
	537	memcpy((void *)kvmppc_booke_handlers + ivor[i],
	538	kvmppc_handlers_start + i * kvmppc_handler_len,
	539	kvmppc_handler_len);
	540	}
	541	flush_icache_range(kvmppc_booke_handlers,
	542	kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
	543
db93f574	544	return 0;
d9fbd03d HB	545	}
d9fbd03d HB	546
db93f574	547	void __exit kvmppc_booke_exit(void)
d9fbd03d HB	548	{
	549	free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
	550	kvm_exit();
	551	}