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KVM: Move some PPC ioctl definitions to the correct place
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / booke.c
CommitLineData
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
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17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
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22 */
23
24#include <linux/errno.h>
25#include <linux/err.h>
26#include <linux/kvm_host.h>
5a0e3ad6 27#include <linux/gfp.h>
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28#include <linux/module.h>
29#include <linux/vmalloc.h>
30#include <linux/fs.h>
7924bd41 31
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32#include <asm/cputable.h>
33#include <asm/uaccess.h>
34#include <asm/kvm_ppc.h>
d9fbd03d 35#include <asm/cacheflush.h>
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36#include <asm/dbell.h>
37#include <asm/hw_irq.h>
38#include <asm/irq.h>
bbf45ba5 39
d30f6e48 40#include "timing.h"
75f74f0d 41#include "booke.h"
97c95059 42#include "trace.h"
bbf45ba5 43
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44unsigned long kvmppc_booke_handlers;
45
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46#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
48
49struct kvm_stats_debugfs_item debugfs_entries[] = {
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50 { "mmio", VCPU_STAT(mmio_exits) },
51 { "dcr", VCPU_STAT(dcr_exits) },
52 { "sig", VCPU_STAT(signal_exits) },
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53 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
54 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
55 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
56 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
57 { "sysc", VCPU_STAT(syscall_exits) },
58 { "isi", VCPU_STAT(isi_exits) },
59 { "dsi", VCPU_STAT(dsi_exits) },
60 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
61 { "dec", VCPU_STAT(dec_exits) },
62 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 63 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
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64 { "doorbell", VCPU_STAT(dbell_exits) },
65 { "guest doorbell", VCPU_STAT(gdbell_exits) },
cf1c5ca4 66 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
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67 { NULL }
68};
69
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70/* TODO: use vcpu_printf() */
71void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
72{
73 int i;
74
666e7252 75 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 76 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
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77 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
78 vcpu->arch.shared->srr1);
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79
80 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
81
82 for (i = 0; i < 32; i += 4) {
5cf8ca22 83 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
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84 kvmppc_get_gpr(vcpu, i),
85 kvmppc_get_gpr(vcpu, i+1),
86 kvmppc_get_gpr(vcpu, i+2),
87 kvmppc_get_gpr(vcpu, i+3));
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88 }
89}
90
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91#ifdef CONFIG_SPE
92void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
93{
94 preempt_disable();
95 enable_kernel_spe();
96 kvmppc_save_guest_spe(vcpu);
97 vcpu->arch.shadow_msr &= ~MSR_SPE;
98 preempt_enable();
99}
100
101static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
102{
103 preempt_disable();
104 enable_kernel_spe();
105 kvmppc_load_guest_spe(vcpu);
106 vcpu->arch.shadow_msr |= MSR_SPE;
107 preempt_enable();
108}
109
110static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
111{
112 if (vcpu->arch.shared->msr & MSR_SPE) {
113 if (!(vcpu->arch.shadow_msr & MSR_SPE))
114 kvmppc_vcpu_enable_spe(vcpu);
115 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
116 kvmppc_vcpu_disable_spe(vcpu);
117 }
118}
119#else
120static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
121{
122}
123#endif
124
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125static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
126{
127#if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
128 /* We always treat the FP bit as enabled from the host
129 perspective, so only need to adjust the shadow MSR */
130 vcpu->arch.shadow_msr &= ~MSR_FP;
131 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
132#endif
133}
134
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135/*
136 * Helper function for "full" MSR writes. No need to call this if only
137 * EE/CE/ME/DE/RI are changing.
138 */
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139void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
140{
dd9ebf1f 141 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67 142
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143#ifdef CONFIG_KVM_BOOKE_HV
144 new_msr |= MSR_GS;
145#endif
146
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147 vcpu->arch.shared->msr = new_msr;
148
dd9ebf1f 149 kvmppc_mmu_msr_notify(vcpu, old_msr);
4cd35f67 150 kvmppc_vcpu_sync_spe(vcpu);
7a08c274 151 kvmppc_vcpu_sync_fpu(vcpu);
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152}
153
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154static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
155 unsigned int priority)
9dd921cf 156{
6346046c 157 trace_kvm_booke_queue_irqprio(vcpu, priority);
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158 set_bit(priority, &vcpu->arch.pending_exceptions);
159}
160
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161static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
162 ulong dear_flags, ulong esr_flags)
9dd921cf 163{
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164 vcpu->arch.queued_dear = dear_flags;
165 vcpu->arch.queued_esr = esr_flags;
166 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
167}
168
169static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
170 ulong dear_flags, ulong esr_flags)
171{
172 vcpu->arch.queued_dear = dear_flags;
173 vcpu->arch.queued_esr = esr_flags;
174 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
175}
176
177static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
178 ulong esr_flags)
179{
180 vcpu->arch.queued_esr = esr_flags;
181 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
182}
183
184void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
185{
186 vcpu->arch.queued_esr = esr_flags;
d4cf3892 187 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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188}
189
190void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
191{
d4cf3892 192 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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193}
194
195int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
196{
d4cf3892 197 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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198}
199
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200void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
201{
202 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
203}
204
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205void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
206 struct kvm_interrupt *irq)
207{
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208 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
209
210 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
211 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
212
213 kvmppc_booke_queue_irqprio(vcpu, prio);
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214}
215
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216void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
217 struct kvm_interrupt *irq)
218{
219 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 220 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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221}
222
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223static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
224{
225 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
226}
227
228static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
229{
230 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
231}
232
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233static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
234{
235#ifdef CONFIG_KVM_BOOKE_HV
236 mtspr(SPRN_GSRR0, srr0);
237 mtspr(SPRN_GSRR1, srr1);
238#else
239 vcpu->arch.shared->srr0 = srr0;
240 vcpu->arch.shared->srr1 = srr1;
241#endif
242}
243
244static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
245{
246 vcpu->arch.csrr0 = srr0;
247 vcpu->arch.csrr1 = srr1;
248}
249
250static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
251{
252 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
253 vcpu->arch.dsrr0 = srr0;
254 vcpu->arch.dsrr1 = srr1;
255 } else {
256 set_guest_csrr(vcpu, srr0, srr1);
257 }
258}
259
260static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
261{
262 vcpu->arch.mcsrr0 = srr0;
263 vcpu->arch.mcsrr1 = srr1;
264}
265
266static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
267{
268#ifdef CONFIG_KVM_BOOKE_HV
269 return mfspr(SPRN_GDEAR);
270#else
271 return vcpu->arch.shared->dar;
272#endif
273}
274
275static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
276{
277#ifdef CONFIG_KVM_BOOKE_HV
278 mtspr(SPRN_GDEAR, dear);
279#else
280 vcpu->arch.shared->dar = dear;
281#endif
282}
283
284static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
285{
286#ifdef CONFIG_KVM_BOOKE_HV
287 return mfspr(SPRN_GESR);
288#else
289 return vcpu->arch.shared->esr;
290#endif
291}
292
293static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
294{
295#ifdef CONFIG_KVM_BOOKE_HV
296 mtspr(SPRN_GESR, esr);
297#else
298 vcpu->arch.shared->esr = esr;
299#endif
300}
301
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302/* Deliver the interrupt of the corresponding priority, if possible. */
303static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
304 unsigned int priority)
bbf45ba5 305{
d4cf3892 306 int allowed = 0;
79300f8c 307 ulong msr_mask = 0;
daf5e271 308 bool update_esr = false, update_dear = false;
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309 ulong crit_raw = vcpu->arch.shared->critical;
310 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
311 bool crit;
c5335f17 312 bool keep_irq = false;
d30f6e48 313 enum int_class int_class;
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314
315 /* Truncate crit indicators in 32 bit mode */
316 if (!(vcpu->arch.shared->msr & MSR_SF)) {
317 crit_raw &= 0xffffffff;
318 crit_r1 &= 0xffffffff;
319 }
320
321 /* Critical section when crit == r1 */
322 crit = (crit_raw == crit_r1);
323 /* ... and we're in supervisor mode */
324 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 325
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326 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
327 priority = BOOKE_IRQPRIO_EXTERNAL;
328 keep_irq = true;
329 }
330
d4cf3892 331 switch (priority) {
d4cf3892 332 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 333 case BOOKE_IRQPRIO_DATA_STORAGE:
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334 update_dear = true;
335 /* fall through */
d4cf3892 336 case BOOKE_IRQPRIO_INST_STORAGE:
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337 case BOOKE_IRQPRIO_PROGRAM:
338 update_esr = true;
339 /* fall through */
340 case BOOKE_IRQPRIO_ITLB_MISS:
341 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 342 case BOOKE_IRQPRIO_FP_UNAVAIL:
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343 case BOOKE_IRQPRIO_SPE_UNAVAIL:
344 case BOOKE_IRQPRIO_SPE_FP_DATA:
345 case BOOKE_IRQPRIO_SPE_FP_ROUND:
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346 case BOOKE_IRQPRIO_AP_UNAVAIL:
347 case BOOKE_IRQPRIO_ALIGNMENT:
348 allowed = 1;
79300f8c 349 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 350 int_class = INT_CLASS_NONCRIT;
bbf45ba5 351 break;
f61c94bb 352 case BOOKE_IRQPRIO_WATCHDOG:
d4cf3892 353 case BOOKE_IRQPRIO_CRITICAL:
4ab96919 354 case BOOKE_IRQPRIO_DBELL_CRIT:
666e7252 355 allowed = vcpu->arch.shared->msr & MSR_CE;
d30f6e48 356 allowed = allowed && !crit;
79300f8c 357 msr_mask = MSR_ME;
d30f6e48 358 int_class = INT_CLASS_CRIT;
bbf45ba5 359 break;
d4cf3892 360 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 361 allowed = vcpu->arch.shared->msr & MSR_ME;
d30f6e48 362 allowed = allowed && !crit;
d30f6e48 363 int_class = INT_CLASS_MC;
bbf45ba5 364 break;
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365 case BOOKE_IRQPRIO_DECREMENTER:
366 case BOOKE_IRQPRIO_FIT:
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367 keep_irq = true;
368 /* fall through */
369 case BOOKE_IRQPRIO_EXTERNAL:
4ab96919 370 case BOOKE_IRQPRIO_DBELL:
666e7252 371 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 372 allowed = allowed && !crit;
79300f8c 373 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 374 int_class = INT_CLASS_NONCRIT;
bbf45ba5 375 break;
d4cf3892 376 case BOOKE_IRQPRIO_DEBUG:
666e7252 377 allowed = vcpu->arch.shared->msr & MSR_DE;
d30f6e48 378 allowed = allowed && !crit;
79300f8c 379 msr_mask = MSR_ME;
d30f6e48 380 int_class = INT_CLASS_CRIT;
bbf45ba5 381 break;
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382 }
383
d4cf3892 384 if (allowed) {
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385 switch (int_class) {
386 case INT_CLASS_NONCRIT:
387 set_guest_srr(vcpu, vcpu->arch.pc,
388 vcpu->arch.shared->msr);
389 break;
390 case INT_CLASS_CRIT:
391 set_guest_csrr(vcpu, vcpu->arch.pc,
392 vcpu->arch.shared->msr);
393 break;
394 case INT_CLASS_DBG:
395 set_guest_dsrr(vcpu, vcpu->arch.pc,
396 vcpu->arch.shared->msr);
397 break;
398 case INT_CLASS_MC:
399 set_guest_mcsrr(vcpu, vcpu->arch.pc,
400 vcpu->arch.shared->msr);
401 break;
402 }
403
d4cf3892 404 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 405 if (update_esr == true)
d30f6e48 406 set_guest_esr(vcpu, vcpu->arch.queued_esr);
daf5e271 407 if (update_dear == true)
d30f6e48 408 set_guest_dear(vcpu, vcpu->arch.queued_dear);
666e7252 409 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 410
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AG
411 if (!keep_irq)
412 clear_bit(priority, &vcpu->arch.pending_exceptions);
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413 }
414
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415#ifdef CONFIG_KVM_BOOKE_HV
416 /*
417 * If an interrupt is pending but masked, raise a guest doorbell
418 * so that we are notified when the guest enables the relevant
419 * MSR bit.
420 */
421 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
422 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
423 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
424 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
425 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
426 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
427#endif
428
d4cf3892 429 return allowed;
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430}
431
f61c94bb
BB
432/*
433 * Return the number of jiffies until the next timeout. If the timeout is
434 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
435 * because the larger value can break the timer APIs.
436 */
437static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
438{
439 u64 tb, wdt_tb, wdt_ticks = 0;
440 u64 nr_jiffies = 0;
441 u32 period = TCR_GET_WP(vcpu->arch.tcr);
442
443 wdt_tb = 1ULL << (63 - period);
444 tb = get_tb();
445 /*
446 * The watchdog timeout will hapeen when TB bit corresponding
447 * to watchdog will toggle from 0 to 1.
448 */
449 if (tb & wdt_tb)
450 wdt_ticks = wdt_tb;
451
452 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
453
454 /* Convert timebase ticks to jiffies */
455 nr_jiffies = wdt_ticks;
456
457 if (do_div(nr_jiffies, tb_ticks_per_jiffy))
458 nr_jiffies++;
459
460 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
461}
462
463static void arm_next_watchdog(struct kvm_vcpu *vcpu)
464{
465 unsigned long nr_jiffies;
466 unsigned long flags;
467
468 /*
469 * If TSR_ENW and TSR_WIS are not set then no need to exit to
470 * userspace, so clear the KVM_REQ_WATCHDOG request.
471 */
472 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
473 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
474
475 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
476 nr_jiffies = watchdog_next_timeout(vcpu);
477 /*
478 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
479 * then do not run the watchdog timer as this can break timer APIs.
480 */
481 if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
482 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
483 else
484 del_timer(&vcpu->arch.wdt_timer);
485 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
486}
487
488void kvmppc_watchdog_func(unsigned long data)
489{
490 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
491 u32 tsr, new_tsr;
492 int final;
493
494 do {
495 new_tsr = tsr = vcpu->arch.tsr;
496 final = 0;
497
498 /* Time out event */
499 if (tsr & TSR_ENW) {
500 if (tsr & TSR_WIS)
501 final = 1;
502 else
503 new_tsr = tsr | TSR_WIS;
504 } else {
505 new_tsr = tsr | TSR_ENW;
506 }
507 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
508
509 if (new_tsr & TSR_WIS) {
510 smp_wmb();
511 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
512 kvm_vcpu_kick(vcpu);
513 }
514
515 /*
516 * If this is final watchdog expiry and some action is required
517 * then exit to userspace.
518 */
519 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
520 vcpu->arch.watchdog_enabled) {
521 smp_wmb();
522 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
523 kvm_vcpu_kick(vcpu);
524 }
525
526 /*
527 * Stop running the watchdog timer after final expiration to
528 * prevent the host from being flooded with timers if the
529 * guest sets a short period.
530 * Timers will resume when TSR/TCR is updated next time.
531 */
532 if (!final)
533 arm_next_watchdog(vcpu);
534}
535
dfd4d47e
SW
536static void update_timer_ints(struct kvm_vcpu *vcpu)
537{
538 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
539 kvmppc_core_queue_dec(vcpu);
540 else
541 kvmppc_core_dequeue_dec(vcpu);
f61c94bb
BB
542
543 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
544 kvmppc_core_queue_watchdog(vcpu);
545 else
546 kvmppc_core_dequeue_watchdog(vcpu);
dfd4d47e
SW
547}
548
c59a6a3e 549static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
bbf45ba5
HB
550{
551 unsigned long *pending = &vcpu->arch.pending_exceptions;
bbf45ba5
HB
552 unsigned int priority;
553
9ab80843 554 priority = __ffs(*pending);
8b3a00fc 555 while (priority < BOOKE_IRQPRIO_MAX) {
d4cf3892 556 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 557 break;
bbf45ba5
HB
558
559 priority = find_next_bit(pending,
560 BITS_PER_BYTE * sizeof(*pending),
561 priority + 1);
562 }
90bba358
AG
563
564 /* Tell the guest about our interrupt status */
29ac26ef 565 vcpu->arch.shared->int_pending = !!*pending;
bbf45ba5
HB
566}
567
c59a6a3e 568/* Check pending exceptions and deliver one, if possible. */
a8e4ef84 569int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
c59a6a3e 570{
a8e4ef84 571 int r = 0;
c59a6a3e
SW
572 WARN_ON_ONCE(!irqs_disabled());
573
574 kvmppc_core_check_exceptions(vcpu);
575
576 if (vcpu->arch.shared->msr & MSR_WE) {
577 local_irq_enable();
578 kvm_vcpu_block(vcpu);
966cd0f3 579 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
c59a6a3e
SW
580 local_irq_disable();
581
582 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
a8e4ef84 583 r = 1;
c59a6a3e 584 };
a8e4ef84
AG
585
586 return r;
587}
588
7c973a2e 589int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
4ffc6356 590{
7c973a2e
AG
591 int r = 1; /* Indicate we want to get back into the guest */
592
2d8185d4
AG
593 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
594 update_timer_ints(vcpu);
862d31f7 595#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
2d8185d4
AG
596 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
597 kvmppc_core_flush_tlb(vcpu);
862d31f7 598#endif
7c973a2e 599
f61c94bb
BB
600 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
601 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
602 r = 0;
603 }
604
7c973a2e 605 return r;
4ffc6356
AG
606}
607
df6909e5
PM
608int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
609{
7ee78855 610 int ret, s;
8fae845f
SW
611#ifdef CONFIG_PPC_FPU
612 unsigned int fpscr;
613 int fpexc_mode;
614 u64 fpr[32];
615#endif
df6909e5 616
af8f38b3
AG
617 if (!vcpu->arch.sane) {
618 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
619 return -EINVAL;
620 }
621
df6909e5 622 local_irq_disable();
7ee78855
AG
623 s = kvmppc_prepare_to_enter(vcpu);
624 if (s <= 0) {
24afa37b 625 local_irq_enable();
7ee78855 626 ret = s;
1d1ef222
SW
627 goto out;
628 }
bd2be683 629 kvmppc_lazy_ee_enable();
1d1ef222 630
df6909e5 631 kvm_guest_enter();
8fae845f
SW
632
633#ifdef CONFIG_PPC_FPU
634 /* Save userspace FPU state in stack */
635 enable_kernel_fp();
636 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
637 fpscr = current->thread.fpscr.val;
638 fpexc_mode = current->thread.fpexc_mode;
639
640 /* Restore guest FPU state to thread */
641 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
642 current->thread.fpscr.val = vcpu->arch.fpscr;
643
644 /*
645 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
646 * as always using the FPU. Kernel usage of FP (via
647 * enable_kernel_fp()) in this thread must not occur while
648 * vcpu->fpu_active is set.
649 */
650 vcpu->fpu_active = 1;
651
652 kvmppc_load_guest_fp(vcpu);
653#endif
654
df6909e5 655 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
8fae845f 656
24afa37b
AG
657 /* No need for kvm_guest_exit. It's done in handle_exit.
658 We also get here with interrupts enabled. */
659
8fae845f
SW
660#ifdef CONFIG_PPC_FPU
661 kvmppc_save_guest_fp(vcpu);
662
663 vcpu->fpu_active = 0;
664
665 /* Save guest FPU state from thread */
666 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
667 vcpu->arch.fpscr = current->thread.fpscr.val;
668
669 /* Restore userspace FPU state from stack */
670 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
671 current->thread.fpscr.val = fpscr;
672 current->thread.fpexc_mode = fpexc_mode;
673#endif
674
1d1ef222 675out:
d69c6436
AG
676 vcpu->mode = OUTSIDE_GUEST_MODE;
677 smp_wmb();
df6909e5
PM
678 return ret;
679}
680
d30f6e48
SW
681static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
682{
683 enum emulation_result er;
684
685 er = kvmppc_emulate_instruction(run, vcpu);
686 switch (er) {
687 case EMULATE_DONE:
688 /* don't overwrite subtypes, just account kvm_stats */
689 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
690 /* Future optimization: only reload non-volatiles if
691 * they were actually modified by emulation. */
692 return RESUME_GUEST_NV;
693
694 case EMULATE_DO_DCR:
695 run->exit_reason = KVM_EXIT_DCR;
696 return RESUME_HOST;
697
698 case EMULATE_FAIL:
d30f6e48
SW
699 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
700 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
701 /* For debugging, encode the failing instruction and
702 * report it to userspace. */
703 run->hw.hardware_exit_reason = ~0ULL << 32;
704 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
d1ff5499 705 kvmppc_core_queue_program(vcpu, ESR_PIL);
d30f6e48
SW
706 return RESUME_HOST;
707
708 default:
709 BUG();
710 }
711}
712
4e642ccb 713static void kvmppc_fill_pt_regs(struct pt_regs *regs)
bbf45ba5 714{
4e642ccb 715 ulong r1, ip, msr, lr;
bbf45ba5 716
4e642ccb
AG
717 asm("mr %0, 1" : "=r"(r1));
718 asm("mflr %0" : "=r"(lr));
719 asm("mfmsr %0" : "=r"(msr));
720 asm("bl 1f; 1: mflr %0" : "=r"(ip));
721
722 memset(regs, 0, sizeof(*regs));
723 regs->gpr[1] = r1;
724 regs->nip = ip;
725 regs->msr = msr;
726 regs->link = lr;
727}
728
6328e593
BB
729/*
730 * For interrupts needed to be handled by host interrupt handlers,
731 * corresponding host handler are called from here in similar way
732 * (but not exact) as they are called from low level handler
733 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
734 */
4e642ccb
AG
735static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
736 unsigned int exit_nr)
737{
738 struct pt_regs regs;
73e75b41 739
d30f6e48
SW
740 switch (exit_nr) {
741 case BOOKE_INTERRUPT_EXTERNAL:
4e642ccb
AG
742 kvmppc_fill_pt_regs(&regs);
743 do_IRQ(&regs);
d30f6e48 744 break;
d30f6e48 745 case BOOKE_INTERRUPT_DECREMENTER:
4e642ccb
AG
746 kvmppc_fill_pt_regs(&regs);
747 timer_interrupt(&regs);
d30f6e48 748 break;
d30f6e48
SW
749#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
750 case BOOKE_INTERRUPT_DOORBELL:
4e642ccb
AG
751 kvmppc_fill_pt_regs(&regs);
752 doorbell_exception(&regs);
d30f6e48
SW
753 break;
754#endif
755 case BOOKE_INTERRUPT_MACHINE_CHECK:
756 /* FIXME */
757 break;
7cc1e8ee
AG
758 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
759 kvmppc_fill_pt_regs(&regs);
760 performance_monitor_exception(&regs);
761 break;
6328e593
BB
762 case BOOKE_INTERRUPT_WATCHDOG:
763 kvmppc_fill_pt_regs(&regs);
764#ifdef CONFIG_BOOKE_WDT
765 WatchdogException(&regs);
766#else
767 unknown_exception(&regs);
768#endif
769 break;
770 case BOOKE_INTERRUPT_CRITICAL:
771 unknown_exception(&regs);
772 break;
d30f6e48 773 }
4e642ccb
AG
774}
775
776/**
777 * kvmppc_handle_exit
778 *
779 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
780 */
781int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
782 unsigned int exit_nr)
783{
784 int r = RESUME_HOST;
7ee78855 785 int s;
4e642ccb
AG
786
787 /* update before a new last_exit_type is rewritten */
788 kvmppc_update_timing_stats(vcpu);
789
790 /* restart interrupts if they were meant for the host */
791 kvmppc_restart_interrupt(vcpu, exit_nr);
d30f6e48 792
bbf45ba5
HB
793 local_irq_enable();
794
97c95059 795 trace_kvm_exit(exit_nr, vcpu);
706fb730 796 kvm_guest_exit();
97c95059 797
bbf45ba5
HB
798 run->exit_reason = KVM_EXIT_UNKNOWN;
799 run->ready_for_interrupt_injection = 1;
800
801 switch (exit_nr) {
802 case BOOKE_INTERRUPT_MACHINE_CHECK:
c35c9d84
AG
803 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
804 kvmppc_dump_vcpu(vcpu);
805 /* For debugging, send invalid exit reason to user space */
806 run->hw.hardware_exit_reason = ~1ULL << 32;
807 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
808 r = RESUME_HOST;
bbf45ba5
HB
809 break;
810
811 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 812 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB
813 r = RESUME_GUEST;
814 break;
815
bbf45ba5 816 case BOOKE_INTERRUPT_DECREMENTER:
7b701591 817 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB
818 r = RESUME_GUEST;
819 break;
820
6328e593
BB
821 case BOOKE_INTERRUPT_WATCHDOG:
822 r = RESUME_GUEST;
823 break;
824
d30f6e48
SW
825 case BOOKE_INTERRUPT_DOORBELL:
826 kvmppc_account_exit(vcpu, DBELL_EXITS);
d30f6e48
SW
827 r = RESUME_GUEST;
828 break;
829
830 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
831 kvmppc_account_exit(vcpu, GDBELL_EXITS);
832
833 /*
834 * We are here because there is a pending guest interrupt
835 * which could not be delivered as MSR_CE or MSR_ME was not
836 * set. Once we break from here we will retry delivery.
837 */
838 r = RESUME_GUEST;
839 break;
840
841 case BOOKE_INTERRUPT_GUEST_DBELL:
842 kvmppc_account_exit(vcpu, GDBELL_EXITS);
843
844 /*
845 * We are here because there is a pending guest interrupt
846 * which could not be delivered as MSR_EE was not set. Once
847 * we break from here we will retry delivery.
848 */
849 r = RESUME_GUEST;
850 break;
851
95f2e921
AG
852 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
853 r = RESUME_GUEST;
854 break;
855
d30f6e48
SW
856 case BOOKE_INTERRUPT_HV_PRIV:
857 r = emulation_exit(run, vcpu);
858 break;
859
bbf45ba5 860 case BOOKE_INTERRUPT_PROGRAM:
d30f6e48 861 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
0268597c
AG
862 /*
863 * Program traps generated by user-level software must
864 * be handled by the guest kernel.
865 *
866 * In GS mode, hypervisor privileged instructions trap
867 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
868 * actual program interrupts, handled by the guest.
869 */
daf5e271 870 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 871 r = RESUME_GUEST;
7b701591 872 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB
873 break;
874 }
875
d30f6e48 876 r = emulation_exit(run, vcpu);
bbf45ba5
HB
877 break;
878
de368dce 879 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 880 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 881 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE
882 r = RESUME_GUEST;
883 break;
884
4cd35f67
SW
885#ifdef CONFIG_SPE
886 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
887 if (vcpu->arch.shared->msr & MSR_SPE)
888 kvmppc_vcpu_enable_spe(vcpu);
889 else
890 kvmppc_booke_queue_irqprio(vcpu,
891 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB
892 r = RESUME_GUEST;
893 break;
4cd35f67 894 }
bb3a8a17
HB
895
896 case BOOKE_INTERRUPT_SPE_FP_DATA:
897 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
898 r = RESUME_GUEST;
899 break;
900
901 case BOOKE_INTERRUPT_SPE_FP_ROUND:
902 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
903 r = RESUME_GUEST;
904 break;
4cd35f67
SW
905#else
906 case BOOKE_INTERRUPT_SPE_UNAVAIL:
907 /*
908 * Guest wants SPE, but host kernel doesn't support it. Send
909 * an "unimplemented operation" program check to the guest.
910 */
911 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
912 r = RESUME_GUEST;
913 break;
914
915 /*
916 * These really should never happen without CONFIG_SPE,
917 * as we should never enable the real MSR[SPE] in the guest.
918 */
919 case BOOKE_INTERRUPT_SPE_FP_DATA:
920 case BOOKE_INTERRUPT_SPE_FP_ROUND:
921 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
922 __func__, exit_nr, vcpu->arch.pc);
923 run->hw.hardware_exit_reason = exit_nr;
924 r = RESUME_HOST;
925 break;
926#endif
bb3a8a17 927
bbf45ba5 928 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY
929 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
930 vcpu->arch.fault_esr);
7b701591 931 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB
932 r = RESUME_GUEST;
933 break;
934
935 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 936 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 937 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB
938 r = RESUME_GUEST;
939 break;
940
d30f6e48
SW
941#ifdef CONFIG_KVM_BOOKE_HV
942 case BOOKE_INTERRUPT_HV_SYSCALL:
943 if (!(vcpu->arch.shared->msr & MSR_PR)) {
944 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
945 } else {
946 /*
947 * hcall from guest userspace -- send privileged
948 * instruction program check.
949 */
950 kvmppc_core_queue_program(vcpu, ESR_PPR);
951 }
952
953 r = RESUME_GUEST;
954 break;
955#else
bbf45ba5 956 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG
957 if (!(vcpu->arch.shared->msr & MSR_PR) &&
958 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
959 /* KVM PV hypercalls */
960 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
961 r = RESUME_GUEST;
962 } else {
963 /* Guest syscalls */
964 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
965 }
7b701591 966 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB
967 r = RESUME_GUEST;
968 break;
d30f6e48 969#endif
bbf45ba5
HB
970
971 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 972 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 973 int gtlb_index;
475e7cdd 974 gpa_t gpaddr;
bbf45ba5
HB
975 gfn_t gfn;
976
bf7ca4bd 977#ifdef CONFIG_KVM_E500V2
a4cd8b23
SW
978 if (!(vcpu->arch.shared->msr & MSR_PR) &&
979 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
980 kvmppc_map_magic(vcpu);
981 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
982 r = RESUME_GUEST;
983
984 break;
985 }
986#endif
987
bbf45ba5 988 /* Check the guest TLB. */
fa86b8dd 989 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 990 if (gtlb_index < 0) {
bbf45ba5 991 /* The guest didn't have a mapping for it. */
daf5e271
LY
992 kvmppc_core_queue_dtlb_miss(vcpu,
993 vcpu->arch.fault_dear,
994 vcpu->arch.fault_esr);
b52a638c 995 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 996 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB
997 r = RESUME_GUEST;
998 break;
999 }
1000
be8d1cae 1001 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 1002 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
1003
1004 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1005 /* The guest TLB had a mapping, but the shadow TLB
1006 * didn't, and it is RAM. This could be because:
1007 * a) the entry is mapping the host kernel, or
1008 * b) the guest used a large mapping which we're faking
1009 * Either way, we need to satisfy the fault without
1010 * invoking the guest. */
58a96214 1011 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 1012 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB
1013 r = RESUME_GUEST;
1014 } else {
1015 /* Guest has mapped and accessed a page which is not
1016 * actually RAM. */
475e7cdd 1017 vcpu->arch.paddr_accessed = gpaddr;
6020c0f6 1018 vcpu->arch.vaddr_accessed = eaddr;
bbf45ba5 1019 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 1020 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB
1021 }
1022
1023 break;
1024 }
1025
1026 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 1027 unsigned long eaddr = vcpu->arch.pc;
89168618 1028 gpa_t gpaddr;
bbf45ba5 1029 gfn_t gfn;
7924bd41 1030 int gtlb_index;
bbf45ba5
HB
1031
1032 r = RESUME_GUEST;
1033
1034 /* Check the guest TLB. */
fa86b8dd 1035 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 1036 if (gtlb_index < 0) {
bbf45ba5 1037 /* The guest didn't have a mapping for it. */
d4cf3892 1038 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 1039 kvmppc_mmu_itlb_miss(vcpu);
7b701591 1040 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB
1041 break;
1042 }
1043
7b701591 1044 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 1045
be8d1cae 1046 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 1047 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
1048
1049 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1050 /* The guest TLB had a mapping, but the shadow TLB
1051 * didn't. This could be because:
1052 * a) the entry is mapping the host kernel, or
1053 * b) the guest used a large mapping which we're faking
1054 * Either way, we need to satisfy the fault without
1055 * invoking the guest. */
58a96214 1056 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB
1057 } else {
1058 /* Guest mapped and leaped at non-RAM! */
d4cf3892 1059 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB
1060 }
1061
1062 break;
1063 }
1064
6a0ab738
HB
1065 case BOOKE_INTERRUPT_DEBUG: {
1066 u32 dbsr;
1067
1068 vcpu->arch.pc = mfspr(SPRN_CSRR0);
1069
1070 /* clear IAC events in DBSR register */
1071 dbsr = mfspr(SPRN_DBSR);
1072 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
1073 mtspr(SPRN_DBSR, dbsr);
1074
1075 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 1076 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB
1077 r = RESUME_HOST;
1078 break;
1079 }
1080
bbf45ba5
HB
1081 default:
1082 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1083 BUG();
1084 }
1085
a8e4ef84
AG
1086 /*
1087 * To avoid clobbering exit_reason, only check for signals if we
1088 * aren't already exiting to userspace for some other reason.
1089 */
03660ba2
AG
1090 if (!(r & RESUME_HOST)) {
1091 local_irq_disable();
7ee78855
AG
1092 s = kvmppc_prepare_to_enter(vcpu);
1093 if (s <= 0) {
24afa37b 1094 local_irq_enable();
7ee78855 1095 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
24afa37b 1096 } else {
bd2be683 1097 kvmppc_lazy_ee_enable();
03660ba2 1098 }
bbf45ba5
HB
1099 }
1100
1101 return r;
1102}
1103
1104/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1105int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1106{
082decf2 1107 int i;
af8f38b3 1108 int r;
082decf2 1109
bbf45ba5 1110 vcpu->arch.pc = 0;
b5904972 1111 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 1112 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
d30f6e48 1113 kvmppc_set_msr(vcpu, 0);
bbf45ba5 1114
d30f6e48
SW
1115#ifndef CONFIG_KVM_BOOKE_HV
1116 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
49dd2c49 1117 vcpu->arch.shadow_pid = 1;
d30f6e48
SW
1118 vcpu->arch.shared->msr = 0;
1119#endif
49dd2c49 1120
082decf2
HB
1121 /* Eye-catching numbers so we know if the guest takes an interrupt
1122 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 1123 vcpu->arch.ivpr = 0x55550000;
082decf2
HB
1124 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1125 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 1126
73e75b41
HB
1127 kvmppc_init_timing_stats(vcpu);
1128
af8f38b3
AG
1129 r = kvmppc_core_vcpu_setup(vcpu);
1130 kvmppc_sanity_check(vcpu);
1131 return r;
bbf45ba5
HB
1132}
1133
f61c94bb
BB
1134int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1135{
1136 /* setup watchdog timer once */
1137 spin_lock_init(&vcpu->arch.wdt_lock);
1138 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1139 (unsigned long)vcpu);
1140
1141 return 0;
1142}
1143
1144void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1145{
1146 del_timer_sync(&vcpu->arch.wdt_timer);
1147}
1148
bbf45ba5
HB
1149int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1150{
1151 int i;
1152
1153 regs->pc = vcpu->arch.pc;
992b5b29 1154 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB
1155 regs->ctr = vcpu->arch.ctr;
1156 regs->lr = vcpu->arch.lr;
992b5b29 1157 regs->xer = kvmppc_get_xer(vcpu);
666e7252 1158 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG
1159 regs->srr0 = vcpu->arch.shared->srr0;
1160 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 1161 regs->pid = vcpu->arch.pid;
a73a9599
AG
1162 regs->sprg0 = vcpu->arch.shared->sprg0;
1163 regs->sprg1 = vcpu->arch.shared->sprg1;
1164 regs->sprg2 = vcpu->arch.shared->sprg2;
1165 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW
1166 regs->sprg4 = vcpu->arch.shared->sprg4;
1167 regs->sprg5 = vcpu->arch.shared->sprg5;
1168 regs->sprg6 = vcpu->arch.shared->sprg6;
1169 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB
1170
1171 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 1172 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB
1173
1174 return 0;
1175}
1176
1177int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1178{
1179 int i;
1180
1181 vcpu->arch.pc = regs->pc;
992b5b29 1182 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB
1183 vcpu->arch.ctr = regs->ctr;
1184 vcpu->arch.lr = regs->lr;
992b5b29 1185 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 1186 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG
1187 vcpu->arch.shared->srr0 = regs->srr0;
1188 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 1189 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG
1190 vcpu->arch.shared->sprg0 = regs->sprg0;
1191 vcpu->arch.shared->sprg1 = regs->sprg1;
1192 vcpu->arch.shared->sprg2 = regs->sprg2;
1193 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW
1194 vcpu->arch.shared->sprg4 = regs->sprg4;
1195 vcpu->arch.shared->sprg5 = regs->sprg5;
1196 vcpu->arch.shared->sprg6 = regs->sprg6;
1197 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 1198
8e5b26b5
AG
1199 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1200 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB
1201
1202 return 0;
1203}
1204
5ce941ee
SW
1205static void get_sregs_base(struct kvm_vcpu *vcpu,
1206 struct kvm_sregs *sregs)
1207{
1208 u64 tb = get_tb();
1209
1210 sregs->u.e.features |= KVM_SREGS_E_BASE;
1211
1212 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1213 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1214 sregs->u.e.mcsr = vcpu->arch.mcsr;
d30f6e48
SW
1215 sregs->u.e.esr = get_guest_esr(vcpu);
1216 sregs->u.e.dear = get_guest_dear(vcpu);
5ce941ee
SW
1217 sregs->u.e.tsr = vcpu->arch.tsr;
1218 sregs->u.e.tcr = vcpu->arch.tcr;
1219 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1220 sregs->u.e.tb = tb;
1221 sregs->u.e.vrsave = vcpu->arch.vrsave;
1222}
1223
1224static int set_sregs_base(struct kvm_vcpu *vcpu,
1225 struct kvm_sregs *sregs)
1226{
1227 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1228 return 0;
1229
1230 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1231 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1232 vcpu->arch.mcsr = sregs->u.e.mcsr;
d30f6e48
SW
1233 set_guest_esr(vcpu, sregs->u.e.esr);
1234 set_guest_dear(vcpu, sregs->u.e.dear);
5ce941ee 1235 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 1236 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 1237
dfd4d47e 1238 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 1239 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW
1240 kvmppc_emulate_dec(vcpu);
1241 }
5ce941ee
SW
1242
1243 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
f61c94bb
BB
1244 u32 old_tsr = vcpu->arch.tsr;
1245
dfd4d47e 1246 vcpu->arch.tsr = sregs->u.e.tsr;
f61c94bb
BB
1247
1248 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1249 arm_next_watchdog(vcpu);
1250
dfd4d47e 1251 update_timer_ints(vcpu);
5ce941ee
SW
1252 }
1253
1254 return 0;
1255}
1256
1257static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1258 struct kvm_sregs *sregs)
1259{
1260 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1261
841741f2 1262 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW
1263 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1264 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1265 sregs->u.e.decar = vcpu->arch.decar;
1266 sregs->u.e.ivpr = vcpu->arch.ivpr;
1267}
1268
1269static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1270 struct kvm_sregs *sregs)
1271{
1272 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1273 return 0;
1274
841741f2 1275 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW
1276 return -EINVAL;
1277
1278 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1279 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1280 vcpu->arch.decar = sregs->u.e.decar;
1281 vcpu->arch.ivpr = sregs->u.e.ivpr;
1282
1283 return 0;
1284}
1285
1286void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1287{
1288 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1289
1290 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1291 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1292 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1293 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1294 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1295 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1296 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1297 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1298 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1299 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1300 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1301 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1302 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1303 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1304 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1305 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1306}
1307
1308int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1309{
1310 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1311 return 0;
1312
1313 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1314 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1315 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1316 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1317 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1318 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1319 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1320 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1321 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1322 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1323 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1324 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1325 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1326 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1327 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1328 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1329
1330 return 0;
1331}
1332
bbf45ba5
HB
1333int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1334 struct kvm_sregs *sregs)
1335{
5ce941ee
SW
1336 sregs->pvr = vcpu->arch.pvr;
1337
1338 get_sregs_base(vcpu, sregs);
1339 get_sregs_arch206(vcpu, sregs);
1340 kvmppc_core_get_sregs(vcpu, sregs);
1341 return 0;
bbf45ba5
HB
1342}
1343
1344int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1345 struct kvm_sregs *sregs)
1346{
5ce941ee
SW
1347 int ret;
1348
1349 if (vcpu->arch.pvr != sregs->pvr)
1350 return -EINVAL;
1351
1352 ret = set_sregs_base(vcpu, sregs);
1353 if (ret < 0)
1354 return ret;
1355
1356 ret = set_sregs_arch206(vcpu, sregs);
1357 if (ret < 0)
1358 return ret;
1359
1360 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB
1361}
1362
31f3438e
PM
1363int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1364{
6df8d3fc
BB
1365 int r = -EINVAL;
1366
1367 switch (reg->id) {
1368 case KVM_REG_PPC_IAC1:
1369 case KVM_REG_PPC_IAC2:
1370 case KVM_REG_PPC_IAC3:
1371 case KVM_REG_PPC_IAC4: {
1372 int iac = reg->id - KVM_REG_PPC_IAC1;
1373 r = copy_to_user((u64 __user *)(long)reg->addr,
1374 &vcpu->arch.dbg_reg.iac[iac], sizeof(u64));
1375 break;
1376 }
1377 case KVM_REG_PPC_DAC1:
1378 case KVM_REG_PPC_DAC2: {
1379 int dac = reg->id - KVM_REG_PPC_DAC1;
1380 r = copy_to_user((u64 __user *)(long)reg->addr,
1381 &vcpu->arch.dbg_reg.dac[dac], sizeof(u64));
1382 break;
1383 }
1384 default:
1385 break;
1386 }
1387 return r;
31f3438e
PM
1388}
1389
1390int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1391{
6df8d3fc
BB
1392 int r = -EINVAL;
1393
1394 switch (reg->id) {
1395 case KVM_REG_PPC_IAC1:
1396 case KVM_REG_PPC_IAC2:
1397 case KVM_REG_PPC_IAC3:
1398 case KVM_REG_PPC_IAC4: {
1399 int iac = reg->id - KVM_REG_PPC_IAC1;
1400 r = copy_from_user(&vcpu->arch.dbg_reg.iac[iac],
1401 (u64 __user *)(long)reg->addr, sizeof(u64));
1402 break;
1403 }
1404 case KVM_REG_PPC_DAC1:
1405 case KVM_REG_PPC_DAC2: {
1406 int dac = reg->id - KVM_REG_PPC_DAC1;
1407 r = copy_from_user(&vcpu->arch.dbg_reg.dac[dac],
1408 (u64 __user *)(long)reg->addr, sizeof(u64));
1409 break;
1410 }
1411 default:
1412 break;
1413 }
1414 return r;
31f3438e
PM
1415}
1416
bbf45ba5
HB
1417int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1418{
1419 return -ENOTSUPP;
1420}
1421
1422int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1423{
1424 return -ENOTSUPP;
1425}
1426
bbf45ba5
HB
1427int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1428 struct kvm_translation *tr)
1429{
98001d8d
AK
1430 int r;
1431
98001d8d 1432 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 1433 return r;
bbf45ba5 1434}
d9fbd03d 1435
4e755758
AG
1436int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1437{
1438 return -ENOTSUPP;
1439}
1440
a66b48c3
PM
1441void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
1442 struct kvm_memory_slot *dont)
1443{
1444}
1445
1446int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
1447 unsigned long npages)
1448{
1449 return 0;
1450}
1451
f9e0554d 1452int kvmppc_core_prepare_memory_region(struct kvm *kvm,
a66b48c3 1453 struct kvm_memory_slot *memslot,
f9e0554d
PM
1454 struct kvm_userspace_memory_region *mem)
1455{
1456 return 0;
1457}
1458
1459void kvmppc_core_commit_memory_region(struct kvm *kvm,
dfe49dbd
PM
1460 struct kvm_userspace_memory_region *mem,
1461 struct kvm_memory_slot old)
1462{
1463}
1464
1465void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
f9e0554d
PM
1466{
1467}
1468
dfd4d47e
SW
1469void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1470{
1471 vcpu->arch.tcr = new_tcr;
f61c94bb 1472 arm_next_watchdog(vcpu);
dfd4d47e
SW
1473 update_timer_ints(vcpu);
1474}
1475
1476void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1477{
1478 set_bits(tsr_bits, &vcpu->arch.tsr);
1479 smp_wmb();
1480 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1481 kvm_vcpu_kick(vcpu);
1482}
1483
1484void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1485{
1486 clear_bits(tsr_bits, &vcpu->arch.tsr);
f61c94bb
BB
1487
1488 /*
1489 * We may have stopped the watchdog due to
1490 * being stuck on final expiration.
1491 */
1492 if (tsr_bits & (TSR_ENW | TSR_WIS))
1493 arm_next_watchdog(vcpu);
1494
dfd4d47e
SW
1495 update_timer_ints(vcpu);
1496}
1497
1498void kvmppc_decrementer_func(unsigned long data)
1499{
1500 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1501
21bd000a
BB
1502 if (vcpu->arch.tcr & TCR_ARE) {
1503 vcpu->arch.dec = vcpu->arch.decar;
1504 kvmppc_emulate_dec(vcpu);
1505 }
1506
dfd4d47e
SW
1507 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1508}
1509
94fa9d99
SW
1510void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1511{
d30f6e48 1512 current->thread.kvm_vcpu = vcpu;
94fa9d99
SW
1513}
1514
1515void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1516{
d30f6e48 1517 current->thread.kvm_vcpu = NULL;
94fa9d99
SW
1518}
1519
2986b8c7 1520int __init kvmppc_booke_init(void)
d9fbd03d 1521{
d30f6e48 1522#ifndef CONFIG_KVM_BOOKE_HV
d9fbd03d
HB
1523 unsigned long ivor[16];
1524 unsigned long max_ivor = 0;
1525 int i;
1526
1527 /* We install our own exception handlers by hijacking IVPR. IVPR must
1528 * be 16-bit aligned, so we need a 64KB allocation. */
1529 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1530 VCPU_SIZE_ORDER);
1531 if (!kvmppc_booke_handlers)
1532 return -ENOMEM;
1533
1534 /* XXX make sure our handlers are smaller than Linux's */
1535
1536 /* Copy our interrupt handlers to match host IVORs. That way we don't
1537 * have to swap the IVORs on every guest/host transition. */
1538 ivor[0] = mfspr(SPRN_IVOR0);
1539 ivor[1] = mfspr(SPRN_IVOR1);
1540 ivor[2] = mfspr(SPRN_IVOR2);
1541 ivor[3] = mfspr(SPRN_IVOR3);
1542 ivor[4] = mfspr(SPRN_IVOR4);
1543 ivor[5] = mfspr(SPRN_IVOR5);
1544 ivor[6] = mfspr(SPRN_IVOR6);
1545 ivor[7] = mfspr(SPRN_IVOR7);
1546 ivor[8] = mfspr(SPRN_IVOR8);
1547 ivor[9] = mfspr(SPRN_IVOR9);
1548 ivor[10] = mfspr(SPRN_IVOR10);
1549 ivor[11] = mfspr(SPRN_IVOR11);
1550 ivor[12] = mfspr(SPRN_IVOR12);
1551 ivor[13] = mfspr(SPRN_IVOR13);
1552 ivor[14] = mfspr(SPRN_IVOR14);
1553 ivor[15] = mfspr(SPRN_IVOR15);
1554
1555 for (i = 0; i < 16; i++) {
1556 if (ivor[i] > max_ivor)
1557 max_ivor = ivor[i];
1558
1559 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1560 kvmppc_handlers_start + i * kvmppc_handler_len,
1561 kvmppc_handler_len);
1562 }
1563 flush_icache_range(kvmppc_booke_handlers,
1564 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
d30f6e48 1565#endif /* !BOOKE_HV */
db93f574 1566 return 0;
d9fbd03d
HB
1567}
1568
db93f574 1569void __exit kvmppc_booke_exit(void)
d9fbd03d
HB
1570{
1571 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1572 kvm_exit();
1573}