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CommitLineData
bc8080cb 1/*
5ce941ee 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb
HB
3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
4ab96919 17#include <asm/dbell.h>
2daab50e 18#include <asm/reg_booke.h>
bc8080cb
HB
19
20#include "booke.h"
29a5a6f9 21#include "e500.h"
bc8080cb 22
8f20a3ab 23#define XOP_DCBTLS 166
4ab96919
AG
24#define XOP_MSGSND 206
25#define XOP_MSGCLR 238
2daab50e 26#define XOP_MFTMR 366
bc8080cb
HB
27#define XOP_TLBIVAX 786
28#define XOP_TLBSX 914
29#define XOP_TLBRE 946
30#define XOP_TLBWE 978
ab9fc405 31#define XOP_TLBILX 18
b12c7841 32#define XOP_EHPRIV 270
bc8080cb 33
4ab96919
AG
34#ifdef CONFIG_KVM_E500MC
35static int dbell2prio(ulong param)
36{
37 int msg = param & PPC_DBELL_TYPE_MASK;
38 int prio = -1;
39
40 switch (msg) {
41 case PPC_DBELL_TYPE(PPC_DBELL):
42 prio = BOOKE_IRQPRIO_DBELL;
43 break;
44 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
45 prio = BOOKE_IRQPRIO_DBELL_CRIT;
46 break;
47 default:
48 break;
49 }
50
51 return prio;
52}
53
54static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
55{
56 ulong param = vcpu->arch.gpr[rb];
57 int prio = dbell2prio(param);
58
59 if (prio < 0)
60 return EMULATE_FAIL;
61
62 clear_bit(prio, &vcpu->arch.pending_exceptions);
63 return EMULATE_DONE;
64}
65
66static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
67{
68 ulong param = vcpu->arch.gpr[rb];
69 int prio = dbell2prio(rb);
70 int pir = param & PPC_DBELL_PIR_MASK;
71 int i;
72 struct kvm_vcpu *cvcpu;
73
74 if (prio < 0)
75 return EMULATE_FAIL;
76
77 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
78 int cpir = cvcpu->arch.shared->pir;
79 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
80 set_bit(prio, &cvcpu->arch.pending_exceptions);
81 kvm_vcpu_kick(cvcpu);
82 }
83 }
84
85 return EMULATE_DONE;
86}
87#endif
88
b12c7841
BB
89static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu,
90 unsigned int inst, int *advance)
91{
92 int emulated = EMULATE_DONE;
93
94 switch (get_oc(inst)) {
95 case EHPRIV_OC_DEBUG:
96 run->exit_reason = KVM_EXIT_DEBUG;
97 run->debug.arch.address = vcpu->arch.pc;
98 run->debug.arch.status = 0;
99 kvmppc_account_exit(vcpu, DEBUG_EXITS);
100 emulated = EMULATE_EXIT_USER;
101 *advance = 0;
102 break;
103 default:
104 emulated = EMULATE_FAIL;
105 }
106 return emulated;
107}
108
8f20a3ab
AG
109static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
110{
111 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
112
113 /* Always fail to lock the cache */
114 vcpu_e500->l1csr0 |= L1CSR0_CUL;
115 return EMULATE_DONE;
116}
117
2daab50e
TL
118static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst,
119 int rt)
120{
121 /* Expose one thread per vcpu */
122 if (get_tmrn(inst) == TMRN_TMCFG0) {
123 kvmppc_set_gpr(vcpu, rt,
124 1 | (1 << TMRN_TMCFG0_NATHRD_SHIFT));
125 return EMULATE_DONE;
126 }
127
128 return EMULATE_FAIL;
129}
130
3a167bea
AK
131int kvmppc_core_emulate_op_e500(struct kvm_run *run, struct kvm_vcpu *vcpu,
132 unsigned int inst, int *advance)
bc8080cb
HB
133{
134 int emulated = EMULATE_DONE;
c46dc9a8
AG
135 int ra = get_ra(inst);
136 int rb = get_rb(inst);
137 int rt = get_rt(inst);
7cdd7a95 138 gva_t ea;
bc8080cb
HB
139
140 switch (get_op(inst)) {
141 case 31:
142 switch (get_xop(inst)) {
143
8f20a3ab
AG
144 case XOP_DCBTLS:
145 emulated = kvmppc_e500_emul_dcbtls(vcpu);
146 break;
147
4ab96919
AG
148#ifdef CONFIG_KVM_E500MC
149 case XOP_MSGSND:
c46dc9a8 150 emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
4ab96919
AG
151 break;
152
153 case XOP_MSGCLR:
c46dc9a8 154 emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
4ab96919
AG
155 break;
156#endif
157
bc8080cb
HB
158 case XOP_TLBRE:
159 emulated = kvmppc_e500_emul_tlbre(vcpu);
160 break;
161
162 case XOP_TLBWE:
163 emulated = kvmppc_e500_emul_tlbwe(vcpu);
164 break;
165
166 case XOP_TLBSX:
7cdd7a95
MC
167 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
168 emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
bc8080cb
HB
169 break;
170
7cdd7a95
MC
171 case XOP_TLBILX: {
172 int type = rt & 0x3;
173 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
174 emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
ab9fc405 175 break;
7cdd7a95 176 }
ab9fc405 177
bc8080cb 178 case XOP_TLBIVAX:
7cdd7a95
MC
179 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
180 emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
bc8080cb
HB
181 break;
182
2daab50e
TL
183 case XOP_MFTMR:
184 emulated = kvmppc_e500_emul_mftmr(vcpu, inst, rt);
185 break;
186
b12c7841
BB
187 case XOP_EHPRIV:
188 emulated = kvmppc_e500_emul_ehpriv(run, vcpu, inst,
189 advance);
190 break;
191
bc8080cb
HB
192 default:
193 emulated = EMULATE_FAIL;
194 }
195
196 break;
197
198 default:
199 emulated = EMULATE_FAIL;
200 }
201
202 if (emulated == EMULATE_FAIL)
203 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
204
205 return emulated;
206}
207
3a167bea 208int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
bc8080cb
HB
209{
210 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
211 int emulated = EMULATE_DONE;
212
213 switch (sprn) {
73196cd3 214#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb 215 case SPRN_PID:
5ce941ee 216 kvmppc_set_pid(vcpu, spr_val);
bc8080cb
HB
217 break;
218 case SPRN_PID1:
dd9ebf1f
LY
219 if (spr_val != 0)
220 return EMULATE_FAIL;
54771e62
AG
221 vcpu_e500->pid[1] = spr_val;
222 break;
bc8080cb 223 case SPRN_PID2:
dd9ebf1f
LY
224 if (spr_val != 0)
225 return EMULATE_FAIL;
54771e62
AG
226 vcpu_e500->pid[2] = spr_val;
227 break;
bc8080cb 228 case SPRN_MAS0:
54771e62
AG
229 vcpu->arch.shared->mas0 = spr_val;
230 break;
bc8080cb 231 case SPRN_MAS1:
54771e62
AG
232 vcpu->arch.shared->mas1 = spr_val;
233 break;
bc8080cb 234 case SPRN_MAS2:
54771e62
AG
235 vcpu->arch.shared->mas2 = spr_val;
236 break;
bc8080cb 237 case SPRN_MAS3:
b5904972
SW
238 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
239 vcpu->arch.shared->mas7_3 |= spr_val;
dc83b8bc 240 break;
bc8080cb 241 case SPRN_MAS4:
54771e62
AG
242 vcpu->arch.shared->mas4 = spr_val;
243 break;
bc8080cb 244 case SPRN_MAS6:
54771e62
AG
245 vcpu->arch.shared->mas6 = spr_val;
246 break;
bc8080cb 247 case SPRN_MAS7:
b5904972
SW
248 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
249 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
dc83b8bc 250 break;
73196cd3 251#endif
d86be077
LY
252 case SPRN_L1CSR0:
253 vcpu_e500->l1csr0 = spr_val;
254 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
255 break;
bc8080cb 256 case SPRN_L1CSR1:
54771e62 257 vcpu_e500->l1csr1 = spr_val;
07fec1c2 258 vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
54771e62 259 break;
bc8080cb 260 case SPRN_HID0:
54771e62
AG
261 vcpu_e500->hid0 = spr_val;
262 break;
bc8080cb 263 case SPRN_HID1:
54771e62
AG
264 vcpu_e500->hid1 = spr_val;
265 break;
bc8080cb 266
b0a1835d
LY
267 case SPRN_MMUCSR0:
268 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
8e5b26b5 269 spr_val);
b0a1835d
LY
270 break;
271
debf27d6
MC
272 case SPRN_PWRMGTCR0:
273 /*
274 * Guest relies on host power management configurations
275 * Treat the request as a general store
276 */
277 vcpu->arch.pwrmgtcr0 = spr_val;
278 break;
279
bb3a8a17 280 /* extra exceptions */
95d80a29 281#ifdef CONFIG_SPE_POSSIBLE
bb3a8a17 282 case SPRN_IVOR32:
8e5b26b5 283 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
bb3a8a17
HB
284 break;
285 case SPRN_IVOR33:
8e5b26b5 286 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
bb3a8a17
HB
287 break;
288 case SPRN_IVOR34:
8e5b26b5 289 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
bb3a8a17 290 break;
95d80a29
MC
291#endif
292#ifdef CONFIG_ALTIVEC
293 case SPRN_IVOR32:
294 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
295 break;
296 case SPRN_IVOR33:
297 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
298 break;
299#endif
bb3a8a17 300 case SPRN_IVOR35:
8e5b26b5 301 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
bb3a8a17 302 break;
73196cd3
SW
303#ifdef CONFIG_KVM_BOOKE_HV
304 case SPRN_IVOR36:
305 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
306 break;
307 case SPRN_IVOR37:
308 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
309 break;
310#endif
bc8080cb 311 default:
54771e62 312 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
bc8080cb
HB
313 }
314
315 return emulated;
316}
317
3a167bea 318int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
bc8080cb
HB
319{
320 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
321 int emulated = EMULATE_DONE;
322
323 switch (sprn) {
73196cd3 324#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb 325 case SPRN_PID:
54771e62
AG
326 *spr_val = vcpu_e500->pid[0];
327 break;
bc8080cb 328 case SPRN_PID1:
54771e62
AG
329 *spr_val = vcpu_e500->pid[1];
330 break;
bc8080cb 331 case SPRN_PID2:
54771e62
AG
332 *spr_val = vcpu_e500->pid[2];
333 break;
bc8080cb 334 case SPRN_MAS0:
54771e62
AG
335 *spr_val = vcpu->arch.shared->mas0;
336 break;
bc8080cb 337 case SPRN_MAS1:
54771e62
AG
338 *spr_val = vcpu->arch.shared->mas1;
339 break;
bc8080cb 340 case SPRN_MAS2:
54771e62
AG
341 *spr_val = vcpu->arch.shared->mas2;
342 break;
bc8080cb 343 case SPRN_MAS3:
54771e62 344 *spr_val = (u32)vcpu->arch.shared->mas7_3;
b5904972 345 break;
bc8080cb 346 case SPRN_MAS4:
54771e62
AG
347 *spr_val = vcpu->arch.shared->mas4;
348 break;
bc8080cb 349 case SPRN_MAS6:
54771e62
AG
350 *spr_val = vcpu->arch.shared->mas6;
351 break;
bc8080cb 352 case SPRN_MAS7:
54771e62 353 *spr_val = vcpu->arch.shared->mas7_3 >> 32;
b5904972 354 break;
73196cd3 355#endif
21bd000a
BB
356 case SPRN_DECAR:
357 *spr_val = vcpu->arch.decar;
358 break;
bc8080cb 359 case SPRN_TLB0CFG:
54771e62
AG
360 *spr_val = vcpu->arch.tlbcfg[0];
361 break;
bc8080cb 362 case SPRN_TLB1CFG:
54771e62
AG
363 *spr_val = vcpu->arch.tlbcfg[1];
364 break;
307d9008
MC
365 case SPRN_TLB0PS:
366 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
367 return EMULATE_FAIL;
368 *spr_val = vcpu->arch.tlbps[0];
369 break;
370 case SPRN_TLB1PS:
371 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
372 return EMULATE_FAIL;
373 *spr_val = vcpu->arch.tlbps[1];
374 break;
d86be077 375 case SPRN_L1CSR0:
54771e62
AG
376 *spr_val = vcpu_e500->l1csr0;
377 break;
bc8080cb 378 case SPRN_L1CSR1:
54771e62
AG
379 *spr_val = vcpu_e500->l1csr1;
380 break;
bc8080cb 381 case SPRN_HID0:
54771e62
AG
382 *spr_val = vcpu_e500->hid0;
383 break;
bc8080cb 384 case SPRN_HID1:
54771e62
AG
385 *spr_val = vcpu_e500->hid1;
386 break;
90d34b0e 387 case SPRN_SVR:
54771e62
AG
388 *spr_val = vcpu_e500->svr;
389 break;
bc8080cb 390
b0a1835d 391 case SPRN_MMUCSR0:
54771e62
AG
392 *spr_val = 0;
393 break;
b0a1835d 394
06579dd9 395 case SPRN_MMUCFG:
54771e62
AG
396 *spr_val = vcpu->arch.mmucfg;
397 break;
9a6061d7
MC
398 case SPRN_EPTCFG:
399 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
400 return EMULATE_FAIL;
401 /*
402 * Legacy Linux guests access EPTCFG register even if the E.PT
403 * category is disabled in the VM. Give them a chance to live.
404 */
405 *spr_val = vcpu->arch.eptcfg;
406 break;
06579dd9 407
debf27d6
MC
408 case SPRN_PWRMGTCR0:
409 *spr_val = vcpu->arch.pwrmgtcr0;
410 break;
411
bb3a8a17 412 /* extra exceptions */
95d80a29 413#ifdef CONFIG_SPE_POSSIBLE
bb3a8a17 414 case SPRN_IVOR32:
54771e62 415 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
bb3a8a17
HB
416 break;
417 case SPRN_IVOR33:
54771e62 418 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
bb3a8a17
HB
419 break;
420 case SPRN_IVOR34:
54771e62 421 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
bb3a8a17 422 break;
95d80a29
MC
423#endif
424#ifdef CONFIG_ALTIVEC
425 case SPRN_IVOR32:
426 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
427 break;
428 case SPRN_IVOR33:
429 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
430 break;
431#endif
bb3a8a17 432 case SPRN_IVOR35:
54771e62 433 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
bb3a8a17 434 break;
73196cd3
SW
435#ifdef CONFIG_KVM_BOOKE_HV
436 case SPRN_IVOR36:
54771e62 437 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
73196cd3
SW
438 break;
439 case SPRN_IVOR37:
54771e62 440 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
73196cd3
SW
441 break;
442#endif
bc8080cb 443 default:
54771e62 444 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
bc8080cb
HB
445 }
446
447 return emulated;
448}
449