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KVM: PPC: Book3S HV: Make the guest hash table size configurable
[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / kvm / e500_emulate.c
CommitLineData
bc8080cb 1/*
5ce941ee 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb
HB		 3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
4ab96919 17#include <asm/dbell.h>
bc8080cb
HB		 18
19#include "booke.h"
29a5a6f9 20#include "e500.h"
bc8080cb 21
4ab96919
AG		 22#define XOP_MSGSND 206
23#define XOP_MSGCLR 238
bc8080cb
HB		 24#define XOP_TLBIVAX 786
25#define XOP_TLBSX 914
26#define XOP_TLBRE 946
27#define XOP_TLBWE 978
ab9fc405 28#define XOP_TLBILX 18
bc8080cb 29
4ab96919
AG		 30#ifdef CONFIG_KVM_E500MC
31static int dbell2prio(ulong param)
32{
33 int msg = param & PPC_DBELL_TYPE_MASK;
34 int prio = -1;
35
36 switch (msg) {
37 case PPC_DBELL_TYPE(PPC_DBELL):
38 prio = BOOKE_IRQPRIO_DBELL;
39 break;
40 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
41 prio = BOOKE_IRQPRIO_DBELL_CRIT;
42 break;
43 default:
44 break;
45 }
46
47 return prio;
48}
49
50static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
51{
52 ulong param = vcpu->arch.gpr[rb];
53 int prio = dbell2prio(param);
54
55 if (prio < 0)
56 return EMULATE_FAIL;
57
58 clear_bit(prio, &vcpu->arch.pending_exceptions);
59 return EMULATE_DONE;
60}
61
62static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
63{
64 ulong param = vcpu->arch.gpr[rb];
65 int prio = dbell2prio(rb);
66 int pir = param & PPC_DBELL_PIR_MASK;
67 int i;
68 struct kvm_vcpu *cvcpu;
69
70 if (prio < 0)
71 return EMULATE_FAIL;
72
73 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
74 int cpir = cvcpu->arch.shared->pir;
75 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
76 set_bit(prio, &cvcpu->arch.pending_exceptions);
77 kvm_vcpu_kick(cvcpu);
78 }
79 }
80
81 return EMULATE_DONE;
82}
83#endif
84
bc8080cb
HB		 85int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
86 unsigned int inst, int *advance)
87{
88 int emulated = EMULATE_DONE;
c46dc9a8
AG		 89 int ra = get_ra(inst);
90 int rb = get_rb(inst);
91 int rt = get_rt(inst);
bc8080cb
HB		 92
93 switch (get_op(inst)) {
94 case 31:
95 switch (get_xop(inst)) {
96
4ab96919
AG		 97#ifdef CONFIG_KVM_E500MC
98 case XOP_MSGSND:
c46dc9a8 99 emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
4ab96919
AG		 100 break;
101
102 case XOP_MSGCLR:
c46dc9a8 103 emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
4ab96919
AG		 104 break;
105#endif
106
bc8080cb
HB		 107 case XOP_TLBRE:
108 emulated = kvmppc_e500_emul_tlbre(vcpu);
109 break;
110
111 case XOP_TLBWE:
112 emulated = kvmppc_e500_emul_tlbwe(vcpu);
113 break;
114
115 case XOP_TLBSX:
bc8080cb
HB		 116 emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
117 break;
118
ab9fc405 119 case XOP_TLBILX:
ab9fc405
SW		 120 emulated = kvmppc_e500_emul_tlbilx(vcpu, rt, ra, rb);
121 break;
122
bc8080cb 123 case XOP_TLBIVAX:
bc8080cb
HB		 124 emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
125 break;
126
127 default:
128 emulated = EMULATE_FAIL;
129 }
130
131 break;
132
133 default:
134 emulated = EMULATE_FAIL;
135 }
136
137 if (emulated == EMULATE_FAIL)
138 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
139
140 return emulated;
141}
142
54771e62 143int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
bc8080cb
HB		 144{
145 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
146 int emulated = EMULATE_DONE;
147
148 switch (sprn) {
73196cd3 149#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb 150 case SPRN_PID:
5ce941ee 151 kvmppc_set_pid(vcpu, spr_val);
bc8080cb
HB		 152 break;
153 case SPRN_PID1:
dd9ebf1f
LY		 154 if (spr_val != 0)
155 return EMULATE_FAIL;
54771e62
AG		 156 vcpu_e500->pid[1] = spr_val;
157 break;
bc8080cb 158 case SPRN_PID2:
dd9ebf1f
LY		 159 if (spr_val != 0)
160 return EMULATE_FAIL;
54771e62
AG		 161 vcpu_e500->pid[2] = spr_val;
162 break;
bc8080cb 163 case SPRN_MAS0:
54771e62
AG		 164 vcpu->arch.shared->mas0 = spr_val;
165 break;
bc8080cb 166 case SPRN_MAS1:
54771e62
AG		 167 vcpu->arch.shared->mas1 = spr_val;
168 break;
bc8080cb 169 case SPRN_MAS2:
54771e62
AG		 170 vcpu->arch.shared->mas2 = spr_val;
171 break;
bc8080cb 172 case SPRN_MAS3:
b5904972
SW		 173 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
174 vcpu->arch.shared->mas7_3 |= spr_val;
dc83b8bc 175 break;
bc8080cb 176 case SPRN_MAS4:
54771e62
AG		 177 vcpu->arch.shared->mas4 = spr_val;
178 break;
bc8080cb 179 case SPRN_MAS6:
54771e62
AG		 180 vcpu->arch.shared->mas6 = spr_val;
181 break;
bc8080cb 182 case SPRN_MAS7:
b5904972
SW		 183 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
184 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
dc83b8bc 185 break;
73196cd3 186#endif
d86be077
LY		 187 case SPRN_L1CSR0:
188 vcpu_e500->l1csr0 = spr_val;
189 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
190 break;
bc8080cb 191 case SPRN_L1CSR1:
54771e62
AG		 192 vcpu_e500->l1csr1 = spr_val;
193 break;
bc8080cb 194 case SPRN_HID0:
54771e62
AG		 195 vcpu_e500->hid0 = spr_val;
196 break;
bc8080cb 197 case SPRN_HID1:
54771e62
AG		 198 vcpu_e500->hid1 = spr_val;
199 break;
bc8080cb 200
b0a1835d
LY		 201 case SPRN_MMUCSR0:
202 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
8e5b26b5 203 spr_val);
b0a1835d
LY		 204 break;
205
bb3a8a17
HB		 206 /* extra exceptions */
207 case SPRN_IVOR32:
8e5b26b5 208 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
bb3a8a17
HB		 209 break;
210 case SPRN_IVOR33:
8e5b26b5 211 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
bb3a8a17
HB		 212 break;
213 case SPRN_IVOR34:
8e5b26b5 214 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
bb3a8a17
HB		 215 break;
216 case SPRN_IVOR35:
8e5b26b5 217 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
bb3a8a17 218 break;
73196cd3
SW		 219#ifdef CONFIG_KVM_BOOKE_HV
220 case SPRN_IVOR36:
221 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
222 break;
223 case SPRN_IVOR37:
224 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
225 break;
226#endif
bc8080cb 227 default:
54771e62 228 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
bc8080cb
HB		 229 }
230
231 return emulated;
232}
233
54771e62 234int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
bc8080cb
HB		 235{
236 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
237 int emulated = EMULATE_DONE;
238
239 switch (sprn) {
73196cd3 240#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb 241 case SPRN_PID:
54771e62
AG		 242 *spr_val = vcpu_e500->pid[0];
243 break;
bc8080cb 244 case SPRN_PID1:
54771e62
AG		 245 *spr_val = vcpu_e500->pid[1];
246 break;
bc8080cb 247 case SPRN_PID2:
54771e62
AG		 248 *spr_val = vcpu_e500->pid[2];
249 break;
bc8080cb 250 case SPRN_MAS0:
54771e62
AG		 251 *spr_val = vcpu->arch.shared->mas0;
252 break;
bc8080cb 253 case SPRN_MAS1:
54771e62
AG		 254 *spr_val = vcpu->arch.shared->mas1;
255 break;
bc8080cb 256 case SPRN_MAS2:
54771e62
AG		 257 *spr_val = vcpu->arch.shared->mas2;
258 break;
bc8080cb 259 case SPRN_MAS3:
54771e62 260 *spr_val = (u32)vcpu->arch.shared->mas7_3;
b5904972 261 break;
bc8080cb 262 case SPRN_MAS4:
54771e62
AG		 263 *spr_val = vcpu->arch.shared->mas4;
264 break;
bc8080cb 265 case SPRN_MAS6:
54771e62
AG		 266 *spr_val = vcpu->arch.shared->mas6;
267 break;
bc8080cb 268 case SPRN_MAS7:
54771e62 269 *spr_val = vcpu->arch.shared->mas7_3 >> 32;
b5904972 270 break;
73196cd3 271#endif
bc8080cb 272 case SPRN_TLB0CFG:
54771e62
AG		 273 *spr_val = vcpu->arch.tlbcfg[0];
274 break;
bc8080cb 275 case SPRN_TLB1CFG:
54771e62
AG		 276 *spr_val = vcpu->arch.tlbcfg[1];
277 break;
d86be077 278 case SPRN_L1CSR0:
54771e62
AG		 279 *spr_val = vcpu_e500->l1csr0;
280 break;
bc8080cb 281 case SPRN_L1CSR1:
54771e62
AG		 282 *spr_val = vcpu_e500->l1csr1;
283 break;
bc8080cb 284 case SPRN_HID0:
54771e62
AG		 285 *spr_val = vcpu_e500->hid0;
286 break;
bc8080cb 287 case SPRN_HID1:
54771e62
AG		 288 *spr_val = vcpu_e500->hid1;
289 break;
90d34b0e 290 case SPRN_SVR:
54771e62
AG		 291 *spr_val = vcpu_e500->svr;
292 break;
bc8080cb 293
b0a1835d 294 case SPRN_MMUCSR0:
54771e62
AG		 295 *spr_val = 0;
296 break;
b0a1835d 297
06579dd9 298 case SPRN_MMUCFG:
54771e62
AG		 299 *spr_val = vcpu->arch.mmucfg;
300 break;
06579dd9 301
bb3a8a17
HB		 302 /* extra exceptions */
303 case SPRN_IVOR32:
54771e62 304 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
bb3a8a17
HB		 305 break;
306 case SPRN_IVOR33:
54771e62 307 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
bb3a8a17
HB		 308 break;
309 case SPRN_IVOR34:
54771e62 310 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
bb3a8a17
HB		 311 break;
312 case SPRN_IVOR35:
54771e62 313 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
bb3a8a17 314 break;
73196cd3
SW		 315#ifdef CONFIG_KVM_BOOKE_HV
316 case SPRN_IVOR36:
54771e62 317 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
73196cd3
SW		 318 break;
319 case SPRN_IVOR37:
54771e62 320 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
73196cd3
SW		 321 break;
322#endif
bc8080cb 323 default:
54771e62 324 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
bc8080cb
HB		 325 }
326
327 return emulated;
328}
329
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