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kvm/powerpc: Add new ioctl to retreive server MMU infos
[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / kvm / e500_emulate.c
CommitLineData
bc8080cb 1/*
5ce941ee 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb
HB		 3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
4ab96919 17#include <asm/dbell.h>
bc8080cb
HB		 18
19#include "booke.h"
29a5a6f9 20#include "e500.h"
bc8080cb 21
4ab96919
AG		 22#define XOP_MSGSND 206
23#define XOP_MSGCLR 238
bc8080cb
HB		 24#define XOP_TLBIVAX 786
25#define XOP_TLBSX 914
26#define XOP_TLBRE 946
27#define XOP_TLBWE 978
ab9fc405 28#define XOP_TLBILX 18
bc8080cb 29
4ab96919
AG		 30#ifdef CONFIG_KVM_E500MC
31static int dbell2prio(ulong param)
32{
33 int msg = param & PPC_DBELL_TYPE_MASK;
34 int prio = -1;
35
36 switch (msg) {
37 case PPC_DBELL_TYPE(PPC_DBELL):
38 prio = BOOKE_IRQPRIO_DBELL;
39 break;
40 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
41 prio = BOOKE_IRQPRIO_DBELL_CRIT;
42 break;
43 default:
44 break;
45 }
46
47 return prio;
48}
49
50static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
51{
52 ulong param = vcpu->arch.gpr[rb];
53 int prio = dbell2prio(param);
54
55 if (prio < 0)
56 return EMULATE_FAIL;
57
58 clear_bit(prio, &vcpu->arch.pending_exceptions);
59 return EMULATE_DONE;
60}
61
62static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
63{
64 ulong param = vcpu->arch.gpr[rb];
65 int prio = dbell2prio(rb);
66 int pir = param & PPC_DBELL_PIR_MASK;
67 int i;
68 struct kvm_vcpu *cvcpu;
69
70 if (prio < 0)
71 return EMULATE_FAIL;
72
73 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
74 int cpir = cvcpu->arch.shared->pir;
75 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
76 set_bit(prio, &cvcpu->arch.pending_exceptions);
77 kvm_vcpu_kick(cvcpu);
78 }
79 }
80
81 return EMULATE_DONE;
82}
83#endif
84
bc8080cb
HB		 85int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
86 unsigned int inst, int *advance)
87{
88 int emulated = EMULATE_DONE;
89 int ra;
90 int rb;
ab9fc405 91 int rt;
bc8080cb
HB		 92
93 switch (get_op(inst)) {
94 case 31:
95 switch (get_xop(inst)) {
96
4ab96919
AG		 97#ifdef CONFIG_KVM_E500MC
98 case XOP_MSGSND:
99 emulated = kvmppc_e500_emul_msgsnd(vcpu, get_rb(inst));
100 break;
101
102 case XOP_MSGCLR:
103 emulated = kvmppc_e500_emul_msgclr(vcpu, get_rb(inst));
104 break;
105#endif
106
bc8080cb
HB		 107 case XOP_TLBRE:
108 emulated = kvmppc_e500_emul_tlbre(vcpu);
109 break;
110
111 case XOP_TLBWE:
112 emulated = kvmppc_e500_emul_tlbwe(vcpu);
113 break;
114
115 case XOP_TLBSX:
116 rb = get_rb(inst);
117 emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
118 break;
119
ab9fc405
SW		 120 case XOP_TLBILX:
121 ra = get_ra(inst);
122 rb = get_rb(inst);
123 rt = get_rt(inst);
124 emulated = kvmppc_e500_emul_tlbilx(vcpu, rt, ra, rb);
125 break;
126
bc8080cb
HB		 127 case XOP_TLBIVAX:
128 ra = get_ra(inst);
129 rb = get_rb(inst);
130 emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
131 break;
132
133 default:
134 emulated = EMULATE_FAIL;
135 }
136
137 break;
138
139 default:
140 emulated = EMULATE_FAIL;
141 }
142
143 if (emulated == EMULATE_FAIL)
144 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
145
146 return emulated;
147}
148
149int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
150{
151 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
152 int emulated = EMULATE_DONE;
8e5b26b5 153 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
bc8080cb
HB		 154
155 switch (sprn) {
73196cd3 156#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb 157 case SPRN_PID:
5ce941ee 158 kvmppc_set_pid(vcpu, spr_val);
bc8080cb
HB		 159 break;
160 case SPRN_PID1:
dd9ebf1f
LY		 161 if (spr_val != 0)
162 return EMULATE_FAIL;
8e5b26b5 163 vcpu_e500->pid[1] = spr_val; break;
bc8080cb 164 case SPRN_PID2:
dd9ebf1f
LY		 165 if (spr_val != 0)
166 return EMULATE_FAIL;
8e5b26b5 167 vcpu_e500->pid[2] = spr_val; break;
bc8080cb 168 case SPRN_MAS0:
b5904972 169 vcpu->arch.shared->mas0 = spr_val; break;
bc8080cb 170 case SPRN_MAS1:
b5904972 171 vcpu->arch.shared->mas1 = spr_val; break;
bc8080cb 172 case SPRN_MAS2:
b5904972 173 vcpu->arch.shared->mas2 = spr_val; break;
bc8080cb 174 case SPRN_MAS3:
b5904972
SW		 175 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
176 vcpu->arch.shared->mas7_3 |= spr_val;
dc83b8bc 177 break;
bc8080cb 178 case SPRN_MAS4:
b5904972 179 vcpu->arch.shared->mas4 = spr_val; break;
bc8080cb 180 case SPRN_MAS6:
b5904972 181 vcpu->arch.shared->mas6 = spr_val; break;
bc8080cb 182 case SPRN_MAS7:
b5904972
SW		 183 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
184 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
dc83b8bc 185 break;
73196cd3 186#endif
d86be077
LY		 187 case SPRN_L1CSR0:
188 vcpu_e500->l1csr0 = spr_val;
189 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
190 break;
bc8080cb 191 case SPRN_L1CSR1:
8e5b26b5 192 vcpu_e500->l1csr1 = spr_val; break;
bc8080cb 193 case SPRN_HID0:
8e5b26b5 194 vcpu_e500->hid0 = spr_val; break;
bc8080cb 195 case SPRN_HID1:
8e5b26b5 196 vcpu_e500->hid1 = spr_val; break;
bc8080cb 197
b0a1835d
LY		 198 case SPRN_MMUCSR0:
199 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
8e5b26b5 200 spr_val);
b0a1835d
LY		 201 break;
202
bb3a8a17
HB		 203 /* extra exceptions */
204 case SPRN_IVOR32:
8e5b26b5 205 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
bb3a8a17
HB		 206 break;
207 case SPRN_IVOR33:
8e5b26b5 208 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
bb3a8a17
HB		 209 break;
210 case SPRN_IVOR34:
8e5b26b5 211 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
bb3a8a17
HB		 212 break;
213 case SPRN_IVOR35:
8e5b26b5 214 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
bb3a8a17 215 break;
73196cd3
SW		 216#ifdef CONFIG_KVM_BOOKE_HV
217 case SPRN_IVOR36:
218 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
219 break;
220 case SPRN_IVOR37:
221 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
222 break;
223#endif
bc8080cb
HB		 224 default:
225 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
226 }
227
228 return emulated;
229}
230
231int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
232{
233 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
234 int emulated = EMULATE_DONE;
235
236 switch (sprn) {
73196cd3
SW		 237#ifndef CONFIG_KVM_BOOKE_HV
238 unsigned long val;
239
bc8080cb 240 case SPRN_PID:
8e5b26b5 241 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
bc8080cb 242 case SPRN_PID1:
8e5b26b5 243 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
bc8080cb 244 case SPRN_PID2:
8e5b26b5 245 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
bc8080cb 246 case SPRN_MAS0:
b5904972 247 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas0); break;
bc8080cb 248 case SPRN_MAS1:
b5904972 249 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas1); break;
bc8080cb 250 case SPRN_MAS2:
b5904972 251 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas2); break;
bc8080cb 252 case SPRN_MAS3:
b5904972
SW		 253 val = (u32)vcpu->arch.shared->mas7_3;
254 kvmppc_set_gpr(vcpu, rt, val);
255 break;
bc8080cb 256 case SPRN_MAS4:
b5904972 257 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas4); break;
bc8080cb 258 case SPRN_MAS6:
b5904972 259 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->mas6); break;
bc8080cb 260 case SPRN_MAS7:
b5904972
SW		 261 val = vcpu->arch.shared->mas7_3 >> 32;
262 kvmppc_set_gpr(vcpu, rt, val);
263 break;
73196cd3 264#endif
bc8080cb 265 case SPRN_TLB0CFG:
8fdd21a2 266 kvmppc_set_gpr(vcpu, rt, vcpu->arch.tlbcfg[0]); break;
bc8080cb 267 case SPRN_TLB1CFG:
8fdd21a2 268 kvmppc_set_gpr(vcpu, rt, vcpu->arch.tlbcfg[1]); break;
d86be077
LY		 269 case SPRN_L1CSR0:
270 kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr0); break;
bc8080cb 271 case SPRN_L1CSR1:
8e5b26b5 272 kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
bc8080cb 273 case SPRN_HID0:
8e5b26b5 274 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
bc8080cb 275 case SPRN_HID1:
8e5b26b5 276 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
90d34b0e
SW		 277 case SPRN_SVR:
278 kvmppc_set_gpr(vcpu, rt, vcpu_e500->svr); break;
bc8080cb 279
b0a1835d 280 case SPRN_MMUCSR0:
8e5b26b5 281 kvmppc_set_gpr(vcpu, rt, 0); break;
b0a1835d 282
06579dd9 283 case SPRN_MMUCFG:
8fdd21a2 284 kvmppc_set_gpr(vcpu, rt, vcpu->arch.mmucfg); break;
06579dd9 285
bb3a8a17
HB		 286 /* extra exceptions */
287 case SPRN_IVOR32:
8e5b26b5 288 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
bb3a8a17
HB		 289 break;
290 case SPRN_IVOR33:
8e5b26b5 291 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
bb3a8a17
HB		 292 break;
293 case SPRN_IVOR34:
8e5b26b5 294 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
bb3a8a17
HB		 295 break;
296 case SPRN_IVOR35:
8e5b26b5 297 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
bb3a8a17 298 break;
73196cd3
SW		 299#ifdef CONFIG_KVM_BOOKE_HV
300 case SPRN_IVOR36:
301 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]);
302 break;
303 case SPRN_IVOR37:
304 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]);
305 break;
306#endif
bc8080cb
HB		 307 default:
308 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
309 }
310
311 return emulated;
312}
313
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