[mirror_ubuntu-artful-kernel.git] / arch / powerpc / kvm / e500_emulate.c

/*
 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
 *
 * Author: Yu Liu, <yu.liu@freescale.com>
 *
 * Description:
 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
 * by Hollis Blanchard <hollisb@us.ibm.com>.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 */

#include <asm/kvm_ppc.h>
#include <asm/disassemble.h>
#include <asm/kvm_e500.h>

#include "booke.h"
#include "e500_tlb.h"

#define XOP_TLBIVAX 786
#define XOP_TLBSX   914
#define XOP_TLBRE   946
#define XOP_TLBWE   978

int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                           unsigned int inst, int *advance)
{
	int emulated = EMULATE_DONE;
	int ra;
	int rb;

	switch (get_op(inst)) {
	case 31:
		switch (get_xop(inst)) {

		case XOP_TLBRE:
			emulated = kvmppc_e500_emul_tlbre(vcpu);
			break;

		case XOP_TLBWE:
			emulated = kvmppc_e500_emul_tlbwe(vcpu);
			break;

		case XOP_TLBSX:
			rb = get_rb(inst);
			emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
			break;

		case XOP_TLBIVAX:
			ra = get_ra(inst);
			rb = get_rb(inst);
			emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
			break;

		default:
			emulated = EMULATE_FAIL;
		}

		break;

	default:
		emulated = EMULATE_FAIL;
	}

	if (emulated == EMULATE_FAIL)
		emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);

	return emulated;
}

int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
{
	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
	int emulated = EMULATE_DONE;
	ulong spr_val = kvmppc_get_gpr(vcpu, rs);

	switch (sprn) {
	case SPRN_PID:
		vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
			vcpu->arch.pid = spr_val;
		break;
	case SPRN_PID1:
		vcpu_e500->pid[1] = spr_val; break;
	case SPRN_PID2:
		vcpu_e500->pid[2] = spr_val; break;
	case SPRN_MAS0:
		vcpu_e500->mas0 = spr_val; break;
	case SPRN_MAS1:
		vcpu_e500->mas1 = spr_val; break;
	case SPRN_MAS2:
		vcpu_e500->mas2 = spr_val; break;
	case SPRN_MAS3:
		vcpu_e500->mas3 = spr_val; break;
	case SPRN_MAS4:
		vcpu_e500->mas4 = spr_val; break;
	case SPRN_MAS6:
		vcpu_e500->mas6 = spr_val; break;
	case SPRN_MAS7:
		vcpu_e500->mas7 = spr_val; break;
	case SPRN_L1CSR1:
		vcpu_e500->l1csr1 = spr_val; break;
	case SPRN_HID0:
		vcpu_e500->hid0 = spr_val; break;
	case SPRN_HID1:
		vcpu_e500->hid1 = spr_val; break;

	case SPRN_MMUCSR0:
		emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
				spr_val);
		break;

	/* extra exceptions */
	case SPRN_IVOR32:
		vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
		break;
	case SPRN_IVOR33:
		vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
		break;
	case SPRN_IVOR34:
		vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
		break;
	case SPRN_IVOR35:
		vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
		break;

	default:
		emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
	}

	return emulated;
}

int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
{
	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
	int emulated = EMULATE_DONE;

	switch (sprn) {
	case SPRN_PID:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
	case SPRN_PID1:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
	case SPRN_PID2:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
	case SPRN_MAS0:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas0); break;
	case SPRN_MAS1:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas1); break;
	case SPRN_MAS2:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas2); break;
	case SPRN_MAS3:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas3); break;
	case SPRN_MAS4:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas4); break;
	case SPRN_MAS6:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas6); break;
	case SPRN_MAS7:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas7); break;

	case SPRN_TLB0CFG:
	{
		ulong tmp = SPRN_TLB0CFG;

		tmp &= ~0xfffUL;
		tmp |= vcpu_e500->guest_tlb_size[0];
		kvmppc_set_gpr(vcpu, rt, tmp);
		break;
	}

	case SPRN_TLB1CFG:
	{
		ulong tmp = SPRN_TLB1CFG;

		tmp &= ~0xfffUL;
		tmp |= vcpu_e500->guest_tlb_size[1];
		kvmppc_set_gpr(vcpu, rt, tmp);
		break;
	}

	case SPRN_L1CSR1:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
	case SPRN_HID0:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
	case SPRN_HID1:
		kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;

	case SPRN_MMUCSR0:
		kvmppc_set_gpr(vcpu, rt, 0); break;

	case SPRN_MMUCFG:
		kvmppc_set_gpr(vcpu, rt, mfspr(SPRN_MMUCFG)); break;

	/* extra exceptions */
	case SPRN_IVOR32:
		kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
		break;
	case SPRN_IVOR33:
		kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
		break;
	case SPRN_IVOR34:
		kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
		break;
	case SPRN_IVOR35:
		kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
		break;
	default:
		emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
	}

	return emulated;
}
Commit	Line	Data
bc8080cb HB	1	/*
	2	* Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
	3	*
	4	* Author: Yu Liu, <yu.liu@freescale.com>
	5	*
	6	* Description:
	7	* This file is derived from arch/powerpc/kvm/44x_emulate.c,
	8	* by Hollis Blanchard <hollisb@us.ibm.com>.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License, version 2, as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <asm/kvm_ppc.h>
	16	#include <asm/disassemble.h>
	17	#include <asm/kvm_e500.h>
	18
	19	#include "booke.h"
	20	#include "e500_tlb.h"
	21
	22	#define XOP_TLBIVAX 786
	23	#define XOP_TLBSX 914
	24	#define XOP_TLBRE 946
	25	#define XOP_TLBWE 978
	26
	27	int kvmppc_core_emulate_op(struct kvm_run run, struct kvm_vcpu vcpu,
	28	unsigned int inst, int *advance)
	29	{
	30	int emulated = EMULATE_DONE;
	31	int ra;
	32	int rb;
bc8080cb HB	33
	34	switch (get_op(inst)) {
	35	case 31:
	36	switch (get_xop(inst)) {
	37
	38	case XOP_TLBRE:
	39	emulated = kvmppc_e500_emul_tlbre(vcpu);
	40	break;
	41
	42	case XOP_TLBWE:
	43	emulated = kvmppc_e500_emul_tlbwe(vcpu);
	44	break;
	45
	46	case XOP_TLBSX:
	47	rb = get_rb(inst);
	48	emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
	49	break;
	50
	51	case XOP_TLBIVAX:
	52	ra = get_ra(inst);
	53	rb = get_rb(inst);
	54	emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
	55	break;
	56
	57	default:
	58	emulated = EMULATE_FAIL;
	59	}
	60
	61	break;
	62
	63	default:
	64	emulated = EMULATE_FAIL;
	65	}
	66
	67	if (emulated == EMULATE_FAIL)
	68	emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
	69
	70	return emulated;
	71	}
	72
	73	int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
	74	{
	75	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
	76	int emulated = EMULATE_DONE;
8e5b26b5	77	ulong spr_val = kvmppc_get_gpr(vcpu, rs);
bc8080cb HB	78
	79	switch (sprn) {
	80	case SPRN_PID:
	81	vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
8e5b26b5	82	vcpu->arch.pid = spr_val;
bc8080cb HB	83	break;
bc8080cb HB	84	case SPRN_PID1:
8e5b26b5	85	vcpu_e500->pid[1] = spr_val; break;
bc8080cb	86	case SPRN_PID2:
8e5b26b5	87	vcpu_e500->pid[2] = spr_val; break;
bc8080cb	88	case SPRN_MAS0:
8e5b26b5	89	vcpu_e500->mas0 = spr_val; break;
bc8080cb	90	case SPRN_MAS1:
8e5b26b5	91	vcpu_e500->mas1 = spr_val; break;
bc8080cb	92	case SPRN_MAS2:
8e5b26b5	93	vcpu_e500->mas2 = spr_val; break;
bc8080cb	94	case SPRN_MAS3:
8e5b26b5	95	vcpu_e500->mas3 = spr_val; break;
bc8080cb	96	case SPRN_MAS4:
8e5b26b5	97	vcpu_e500->mas4 = spr_val; break;
bc8080cb	98	case SPRN_MAS6:
8e5b26b5	99	vcpu_e500->mas6 = spr_val; break;
bc8080cb	100	case SPRN_MAS7:
8e5b26b5	101	vcpu_e500->mas7 = spr_val; break;
bc8080cb	102	case SPRN_L1CSR1:
8e5b26b5	103	vcpu_e500->l1csr1 = spr_val; break;
bc8080cb	104	case SPRN_HID0:
8e5b26b5	105	vcpu_e500->hid0 = spr_val; break;
bc8080cb	106	case SPRN_HID1:
8e5b26b5	107	vcpu_e500->hid1 = spr_val; break;
bc8080cb	108
b0a1835d LY	109	case SPRN_MMUCSR0:
b0a1835d LY	110	emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
8e5b26b5	111	spr_val);
b0a1835d LY	112	break;
b0a1835d LY	113
bb3a8a17 HB	114	/* extra exceptions */
bb3a8a17 HB	115	case SPRN_IVOR32:
8e5b26b5	116	vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
bb3a8a17 HB	117	break;
bb3a8a17 HB	118	case SPRN_IVOR33:
8e5b26b5	119	vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
bb3a8a17 HB	120	break;
bb3a8a17 HB	121	case SPRN_IVOR34:
8e5b26b5	122	vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
bb3a8a17 HB	123	break;
bb3a8a17 HB	124	case SPRN_IVOR35:
8e5b26b5	125	vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
bb3a8a17 HB	126	break;
bb3a8a17 HB	127
bc8080cb HB	128	default:
	129	emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
	130	}
	131
	132	return emulated;
	133	}
	134
	135	int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
	136	{
	137	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
	138	int emulated = EMULATE_DONE;
	139
	140	switch (sprn) {
	141	case SPRN_PID:
8e5b26b5	142	kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
bc8080cb	143	case SPRN_PID1:
8e5b26b5	144	kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
bc8080cb	145	case SPRN_PID2:
8e5b26b5	146	kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
bc8080cb	147	case SPRN_MAS0:
8e5b26b5	148	kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas0); break;
bc8080cb	149	case SPRN_MAS1:
8e5b26b5	150	kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas1); break;
bc8080cb	151	case SPRN_MAS2:
8e5b26b5	152	kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas2); break;
bc8080cb	153	case SPRN_MAS3:
8e5b26b5	154	kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas3); break;
bc8080cb	155	case SPRN_MAS4:
8e5b26b5	156	kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas4); break;
bc8080cb	157	case SPRN_MAS6:
8e5b26b5	158	kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas6); break;
bc8080cb	159	case SPRN_MAS7:
8e5b26b5	160	kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas7); break;
bc8080cb HB	161
bc8080cb HB	162	case SPRN_TLB0CFG:
8e5b26b5 AG	163	{
	164	ulong tmp = SPRN_TLB0CFG;
	165
	166	tmp &= ~0xfffUL;
	167	tmp \|= vcpu_e500->guest_tlb_size[0];
	168	kvmppc_set_gpr(vcpu, rt, tmp);
bc8080cb	169	break;
8e5b26b5	170	}
bc8080cb HB	171
bc8080cb HB	172	case SPRN_TLB1CFG:
8e5b26b5 AG	173	{
	174	ulong tmp = SPRN_TLB1CFG;
	175
	176	tmp &= ~0xfffUL;
	177	tmp \|= vcpu_e500->guest_tlb_size[1];
	178	kvmppc_set_gpr(vcpu, rt, tmp);
bc8080cb	179	break;
8e5b26b5	180	}
bc8080cb HB	181
bc8080cb HB	182	case SPRN_L1CSR1:
8e5b26b5	183	kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
bc8080cb	184	case SPRN_HID0:
8e5b26b5	185	kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
bc8080cb	186	case SPRN_HID1:
8e5b26b5	187	kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
bc8080cb	188
b0a1835d	189	case SPRN_MMUCSR0:
8e5b26b5	190	kvmppc_set_gpr(vcpu, rt, 0); break;
b0a1835d	191
06579dd9	192	case SPRN_MMUCFG:
8e5b26b5	193	kvmppc_set_gpr(vcpu, rt, mfspr(SPRN_MMUCFG)); break;
06579dd9	194
bb3a8a17 HB	195	/* extra exceptions */
bb3a8a17 HB	196	case SPRN_IVOR32:
8e5b26b5	197	kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
bb3a8a17 HB	198	break;
bb3a8a17 HB	199	case SPRN_IVOR33:
8e5b26b5	200	kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
bb3a8a17 HB	201	break;
bb3a8a17 HB	202	case SPRN_IVOR34:
8e5b26b5	203	kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
bb3a8a17 HB	204	break;
bb3a8a17 HB	205	case SPRN_IVOR35:
8e5b26b5	206	kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
bb3a8a17	207	break;
bc8080cb HB	208	default:
	209	emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
	210	}
	211
	212	return emulated;
	213	}
	214