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KVM: PPC: Book3S HV: Convert kvmppc_read_intr to a C function
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / powerpc.c
CommitLineData
bbf45ba5
HB
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19 */
20
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/kvm_host.h>
bbf45ba5 24#include <linux/vmalloc.h>
544c6761 25#include <linux/hrtimer.h>
bbf45ba5 26#include <linux/fs.h>
5a0e3ad6 27#include <linux/slab.h>
eb1e4f43 28#include <linux/file.h>
cbbc58d4 29#include <linux/module.h>
bbf45ba5
HB
30#include <asm/cputable.h>
31#include <asm/uaccess.h>
32#include <asm/kvm_ppc.h>
83aae4a8 33#include <asm/tlbflush.h>
371fefd6 34#include <asm/cputhreads.h>
bd2be683 35#include <asm/irqflags.h>
58ded420 36#include <asm/iommu.h>
73e75b41 37#include "timing.h"
5efdb4be 38#include "irq.h"
fad7b9b5 39#include "../mm/mmu_decl.h"
bbf45ba5 40
46f43c6e
MT
41#define CREATE_TRACE_POINTS
42#include "trace.h"
43
cbbc58d4
AK
44struct kvmppc_ops *kvmppc_hv_ops;
45EXPORT_SYMBOL_GPL(kvmppc_hv_ops);
46struct kvmppc_ops *kvmppc_pr_ops;
47EXPORT_SYMBOL_GPL(kvmppc_pr_ops);
48
3a167bea 49
bbf45ba5
HB
50int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
51{
9202e076 52 return !!(v->arch.pending_exceptions) ||
dfd4d47e 53 v->requests;
bbf45ba5
HB
54}
55
b6d33834
CD
56int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
57{
58 return 1;
59}
60
03d25c5b
AG
61/*
62 * Common checks before entering the guest world. Call with interrupts
63 * disabled.
64 *
7ee78855
AG
65 * returns:
66 *
67 * == 1 if we're ready to go into guest state
68 * <= 0 if we need to go back to the host with return value
03d25c5b
AG
69 */
70int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
71{
6c85f52b
SW
72 int r;
73
74 WARN_ON(irqs_disabled());
75 hard_irq_disable();
03d25c5b 76
03d25c5b
AG
77 while (true) {
78 if (need_resched()) {
79 local_irq_enable();
80 cond_resched();
6c85f52b 81 hard_irq_disable();
03d25c5b
AG
82 continue;
83 }
84
85 if (signal_pending(current)) {
7ee78855
AG
86 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
87 vcpu->run->exit_reason = KVM_EXIT_INTR;
88 r = -EINTR;
03d25c5b
AG
89 break;
90 }
91
5bd1cf11
SW
92 vcpu->mode = IN_GUEST_MODE;
93
94 /*
95 * Reading vcpu->requests must happen after setting vcpu->mode,
96 * so we don't miss a request because the requester sees
97 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests
98 * before next entering the guest (and thus doesn't IPI).
489153c7
LT
99 * This also orders the write to mode from any reads
100 * to the page tables done while the VCPU is running.
101 * Please see the comment in kvm_flush_remote_tlbs.
5bd1cf11 102 */
03d25c5b 103 smp_mb();
5bd1cf11 104
03d25c5b
AG
105 if (vcpu->requests) {
106 /* Make sure we process requests preemptable */
107 local_irq_enable();
108 trace_kvm_check_requests(vcpu);
7c973a2e 109 r = kvmppc_core_check_requests(vcpu);
6c85f52b 110 hard_irq_disable();
7c973a2e
AG
111 if (r > 0)
112 continue;
113 break;
03d25c5b
AG
114 }
115
116 if (kvmppc_core_prepare_to_enter(vcpu)) {
117 /* interrupts got enabled in between, so we
118 are back at square 1 */
119 continue;
120 }
121
6edaa530 122 guest_enter_irqoff();
6c85f52b 123 return 1;
03d25c5b
AG
124 }
125
6c85f52b
SW
126 /* return to host */
127 local_irq_enable();
03d25c5b
AG
128 return r;
129}
2ba9f0d8 130EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter);
03d25c5b 131
5deb8e7a
AG
132#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
133static void kvmppc_swab_shared(struct kvm_vcpu *vcpu)
134{
135 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
136 int i;
137
138 shared->sprg0 = swab64(shared->sprg0);
139 shared->sprg1 = swab64(shared->sprg1);
140 shared->sprg2 = swab64(shared->sprg2);
141 shared->sprg3 = swab64(shared->sprg3);
142 shared->srr0 = swab64(shared->srr0);
143 shared->srr1 = swab64(shared->srr1);
144 shared->dar = swab64(shared->dar);
145 shared->msr = swab64(shared->msr);
146 shared->dsisr = swab32(shared->dsisr);
147 shared->int_pending = swab32(shared->int_pending);
148 for (i = 0; i < ARRAY_SIZE(shared->sr); i++)
149 shared->sr[i] = swab32(shared->sr[i]);
150}
151#endif
152
2a342ed5
AG
153int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
154{
155 int nr = kvmppc_get_gpr(vcpu, 11);
156 int r;
157 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
158 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
159 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
160 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
161 unsigned long r2 = 0;
162
5deb8e7a 163 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
2a342ed5
AG
164 /* 32 bit mode */
165 param1 &= 0xffffffff;
166 param2 &= 0xffffffff;
167 param3 &= 0xffffffff;
168 param4 &= 0xffffffff;
169 }
170
171 switch (nr) {
fdcf8bd7 172 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE):
5fc87407 173 {
5deb8e7a
AG
174#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
175 /* Book3S can be little endian, find it out here */
176 int shared_big_endian = true;
177 if (vcpu->arch.intr_msr & MSR_LE)
178 shared_big_endian = false;
179 if (shared_big_endian != vcpu->arch.shared_big_endian)
180 kvmppc_swab_shared(vcpu);
181 vcpu->arch.shared_big_endian = shared_big_endian;
182#endif
183
f3383cf8
AG
184 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) {
185 /*
186 * Older versions of the Linux magic page code had
187 * a bug where they would map their trampoline code
188 * NX. If that's the case, remove !PR NX capability.
189 */
190 vcpu->arch.disable_kernel_nx = true;
191 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
192 }
193
194 vcpu->arch.magic_page_pa = param1 & ~0xfffULL;
195 vcpu->arch.magic_page_ea = param2 & ~0xfffULL;
5fc87407 196
89b68c96
AG
197#ifdef CONFIG_PPC_64K_PAGES
198 /*
199 * Make sure our 4k magic page is in the same window of a 64k
200 * page within the guest and within the host's page.
201 */
202 if ((vcpu->arch.magic_page_pa & 0xf000) !=
203 ((ulong)vcpu->arch.shared & 0xf000)) {
204 void *old_shared = vcpu->arch.shared;
205 ulong shared = (ulong)vcpu->arch.shared;
206 void *new_shared;
207
208 shared &= PAGE_MASK;
209 shared |= vcpu->arch.magic_page_pa & 0xf000;
210 new_shared = (void*)shared;
211 memcpy(new_shared, old_shared, 0x1000);
212 vcpu->arch.shared = new_shared;
213 }
214#endif
215
b5904972 216 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
7508e16c 217
fdcf8bd7 218 r = EV_SUCCESS;
5fc87407
AG
219 break;
220 }
fdcf8bd7
SY
221 case KVM_HCALL_TOKEN(KVM_HC_FEATURES):
222 r = EV_SUCCESS;
bf7ca4bd 223#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
5fc87407
AG
224 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
225#endif
2a342ed5
AG
226
227 /* Second return value is in r4 */
2a342ed5 228 break;
9202e076
LYB
229 case EV_HCALL_TOKEN(EV_IDLE):
230 r = EV_SUCCESS;
231 kvm_vcpu_block(vcpu);
232 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
233 break;
2a342ed5 234 default:
fdcf8bd7 235 r = EV_UNIMPLEMENTED;
2a342ed5
AG
236 break;
237 }
238
7508e16c
AG
239 kvmppc_set_gpr(vcpu, 4, r2);
240
2a342ed5
AG
241 return r;
242}
2ba9f0d8 243EXPORT_SYMBOL_GPL(kvmppc_kvm_pv);
bbf45ba5 244
af8f38b3
AG
245int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
246{
247 int r = false;
248
249 /* We have to know what CPU to virtualize */
250 if (!vcpu->arch.pvr)
251 goto out;
252
253 /* PAPR only works with book3s_64 */
254 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
255 goto out;
256
af8f38b3 257 /* HV KVM can only do PAPR mode for now */
a78b55d1 258 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm))
af8f38b3 259 goto out;
af8f38b3 260
d30f6e48
SW
261#ifdef CONFIG_KVM_BOOKE_HV
262 if (!cpu_has_feature(CPU_FTR_EMB_HV))
263 goto out;
264#endif
265
af8f38b3
AG
266 r = true;
267
268out:
269 vcpu->arch.sane = r;
270 return r ? 0 : -EINVAL;
271}
2ba9f0d8 272EXPORT_SYMBOL_GPL(kvmppc_sanity_check);
af8f38b3 273
bbf45ba5
HB
274int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
275{
276 enum emulation_result er;
277 int r;
278
d69614a2 279 er = kvmppc_emulate_loadstore(vcpu);
bbf45ba5
HB
280 switch (er) {
281 case EMULATE_DONE:
282 /* Future optimization: only reload non-volatiles if they were
283 * actually modified. */
284 r = RESUME_GUEST_NV;
285 break;
51f04726
MC
286 case EMULATE_AGAIN:
287 r = RESUME_GUEST;
288 break;
bbf45ba5
HB
289 case EMULATE_DO_MMIO:
290 run->exit_reason = KVM_EXIT_MMIO;
291 /* We must reload nonvolatiles because "update" load/store
292 * instructions modify register state. */
293 /* Future optimization: only reload non-volatiles if they were
294 * actually modified. */
295 r = RESUME_HOST_NV;
296 break;
297 case EMULATE_FAIL:
51f04726
MC
298 {
299 u32 last_inst;
300
8d0eff63 301 kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
bbf45ba5 302 /* XXX Deliver Program interrupt to guest. */
51f04726 303 pr_emerg("%s: emulation failed (%08x)\n", __func__, last_inst);
bbf45ba5
HB
304 r = RESUME_HOST;
305 break;
51f04726 306 }
bbf45ba5 307 default:
5a33169e
AG
308 WARN_ON(1);
309 r = RESUME_GUEST;
bbf45ba5
HB
310 }
311
312 return r;
313}
2ba9f0d8 314EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio);
bbf45ba5 315
35c4a733
AG
316int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
317 bool data)
318{
c12fb43c 319 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733
AG
320 struct kvmppc_pte pte;
321 int r;
322
323 vcpu->stat.st++;
324
325 r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
326 XLATE_WRITE, &pte);
327 if (r < 0)
328 return r;
329
330 *eaddr = pte.raddr;
331
332 if (!pte.may_write)
333 return -EPERM;
334
c12fb43c
AG
335 /* Magic page override */
336 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
337 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
338 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
339 void *magic = vcpu->arch.shared;
340 magic += pte.eaddr & 0xfff;
341 memcpy(magic, ptr, size);
342 return EMULATE_DONE;
343 }
344
35c4a733
AG
345 if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size))
346 return EMULATE_DO_MMIO;
347
348 return EMULATE_DONE;
349}
350EXPORT_SYMBOL_GPL(kvmppc_st);
351
352int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
353 bool data)
354{
c12fb43c 355 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733 356 struct kvmppc_pte pte;
35c4a733
AG
357 int rc;
358
359 vcpu->stat.ld++;
360
361 rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
362 XLATE_READ, &pte);
363 if (rc)
364 return rc;
365
366 *eaddr = pte.raddr;
367
368 if (!pte.may_read)
369 return -EPERM;
370
371 if (!data && !pte.may_execute)
372 return -ENOEXEC;
373
c12fb43c
AG
374 /* Magic page override */
375 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
376 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
377 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
378 void *magic = vcpu->arch.shared;
379 magic += pte.eaddr & 0xfff;
380 memcpy(ptr, magic, size);
381 return EMULATE_DONE;
382 }
383
c45c5514
AG
384 if (kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size))
385 return EMULATE_DO_MMIO;
35c4a733
AG
386
387 return EMULATE_DONE;
35c4a733
AG
388}
389EXPORT_SYMBOL_GPL(kvmppc_ld);
390
13a34e06 391int kvm_arch_hardware_enable(void)
bbf45ba5 392{
10474ae8 393 return 0;
bbf45ba5
HB
394}
395
bbf45ba5
HB
396int kvm_arch_hardware_setup(void)
397{
398 return 0;
399}
400
bbf45ba5
HB
401void kvm_arch_check_processor_compat(void *rtn)
402{
9dd921cf 403 *(int *)rtn = kvmppc_core_check_processor_compat();
bbf45ba5
HB
404}
405
e08b9637 406int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
bbf45ba5 407{
cbbc58d4
AK
408 struct kvmppc_ops *kvm_ops = NULL;
409 /*
410 * if we have both HV and PR enabled, default is HV
411 */
412 if (type == 0) {
413 if (kvmppc_hv_ops)
414 kvm_ops = kvmppc_hv_ops;
415 else
416 kvm_ops = kvmppc_pr_ops;
417 if (!kvm_ops)
418 goto err_out;
419 } else if (type == KVM_VM_PPC_HV) {
420 if (!kvmppc_hv_ops)
421 goto err_out;
422 kvm_ops = kvmppc_hv_ops;
423 } else if (type == KVM_VM_PPC_PR) {
424 if (!kvmppc_pr_ops)
425 goto err_out;
426 kvm_ops = kvmppc_pr_ops;
427 } else
428 goto err_out;
429
430 if (kvm_ops->owner && !try_module_get(kvm_ops->owner))
431 return -ENOENT;
432
433 kvm->arch.kvm_ops = kvm_ops;
f9e0554d 434 return kvmppc_core_init_vm(kvm);
cbbc58d4
AK
435err_out:
436 return -EINVAL;
bbf45ba5
HB
437}
438
d89f5eff 439void kvm_arch_destroy_vm(struct kvm *kvm)
bbf45ba5
HB
440{
441 unsigned int i;
988a2cae 442 struct kvm_vcpu *vcpu;
bbf45ba5 443
e17769eb
SW
444#ifdef CONFIG_KVM_XICS
445 /*
446 * We call kick_all_cpus_sync() to ensure that all
447 * CPUs have executed any pending IPIs before we
448 * continue and free VCPUs structures below.
449 */
450 if (is_kvmppc_hv_enabled(kvm))
451 kick_all_cpus_sync();
452#endif
453
988a2cae
GN
454 kvm_for_each_vcpu(i, vcpu, kvm)
455 kvm_arch_vcpu_free(vcpu);
456
457 mutex_lock(&kvm->lock);
458 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
459 kvm->vcpus[i] = NULL;
460
461 atomic_set(&kvm->online_vcpus, 0);
f9e0554d
PM
462
463 kvmppc_core_destroy_vm(kvm);
464
988a2cae 465 mutex_unlock(&kvm->lock);
cbbc58d4
AK
466
467 /* drop the module reference */
468 module_put(kvm->arch.kvm_ops->owner);
bbf45ba5
HB
469}
470
784aa3d7 471int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
bbf45ba5
HB
472{
473 int r;
7a58777a 474 /* Assume we're using HV mode when the HV module is loaded */
cbbc58d4 475 int hv_enabled = kvmppc_hv_ops ? 1 : 0;
bbf45ba5 476
7a58777a
AG
477 if (kvm) {
478 /*
479 * Hooray - we know which VM type we're running on. Depend on
480 * that rather than the guess above.
481 */
482 hv_enabled = is_kvmppc_hv_enabled(kvm);
483 }
484
bbf45ba5 485 switch (ext) {
5ce941ee
SW
486#ifdef CONFIG_BOOKE
487 case KVM_CAP_PPC_BOOKE_SREGS:
f61c94bb 488 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1c810636 489 case KVM_CAP_PPC_EPR:
5ce941ee 490#else
e15a1137 491 case KVM_CAP_PPC_SEGSTATE:
1022fc3d 492 case KVM_CAP_PPC_HIOR:
930b412a 493 case KVM_CAP_PPC_PAPR:
5ce941ee 494#endif
18978768 495 case KVM_CAP_PPC_UNSET_IRQ:
7b4203e8 496 case KVM_CAP_PPC_IRQ_LEVEL:
71fbfd5f 497 case KVM_CAP_ENABLE_CAP:
699a0ea0 498 case KVM_CAP_ENABLE_CAP_VM:
e24ed81f 499 case KVM_CAP_ONE_REG:
0e673fb6 500 case KVM_CAP_IOEVENTFD:
5df554ad 501 case KVM_CAP_DEVICE_CTRL:
de56a948
PM
502 r = 1;
503 break;
de56a948 504 case KVM_CAP_PPC_PAIRED_SINGLES:
ad0a048b 505 case KVM_CAP_PPC_OSI:
15711e9c 506 case KVM_CAP_PPC_GET_PVINFO:
bf7ca4bd 507#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc 508 case KVM_CAP_SW_TLB:
eb1e4f43 509#endif
699cc876 510 /* We support this only for PR */
cbbc58d4 511 r = !hv_enabled;
e15a1137 512 break;
699cc876 513#ifdef CONFIG_KVM_MMIO
588968b6
LV
514 case KVM_CAP_COALESCED_MMIO:
515 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
516 break;
54738c09 517#endif
699cc876
AK
518#ifdef CONFIG_KVM_MPIC
519 case KVM_CAP_IRQ_MPIC:
520 r = 1;
521 break;
522#endif
523
f31e65e1 524#ifdef CONFIG_PPC_BOOK3S_64
54738c09 525 case KVM_CAP_SPAPR_TCE:
58ded420 526 case KVM_CAP_SPAPR_TCE_64:
32fad281 527 case KVM_CAP_PPC_ALLOC_HTAB:
8e591cb7 528 case KVM_CAP_PPC_RTAS:
f2e91042 529 case KVM_CAP_PPC_FIXUP_HCALL:
699a0ea0 530 case KVM_CAP_PPC_ENABLE_HCALL:
5975a2e0
PM
531#ifdef CONFIG_KVM_XICS
532 case KVM_CAP_IRQ_XICS:
533#endif
54738c09
DG
534 r = 1;
535 break;
f31e65e1 536#endif /* CONFIG_PPC_BOOK3S_64 */
699cc876 537#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
371fefd6 538 case KVM_CAP_PPC_SMT:
cbbc58d4 539 if (hv_enabled)
3102f784 540 r = threads_per_subcore;
699cc876
AK
541 else
542 r = 0;
371fefd6 543 break;
aa04b4cc 544 case KVM_CAP_PPC_RMA:
c17b98cf 545 r = 0;
aa04b4cc 546 break;
e928e9cb
ME
547 case KVM_CAP_PPC_HWRNG:
548 r = kvmppc_hwrng_present();
549 break;
f4800b1f 550#endif
342d3db7 551 case KVM_CAP_SYNC_MMU:
699cc876 552#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
c17b98cf 553 r = hv_enabled;
f4800b1f
AG
554#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
555 r = 1;
556#else
557 r = 0;
a2932923 558#endif
699cc876
AK
559 break;
560#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
a2932923 561 case KVM_CAP_PPC_HTAB_FD:
cbbc58d4 562 r = hv_enabled;
a2932923 563 break;
de56a948 564#endif
b5434032
ME
565 case KVM_CAP_NR_VCPUS:
566 /*
567 * Recommending a number of CPUs is somewhat arbitrary; we
568 * return the number of present CPUs for -HV (since a host
569 * will have secondary threads "offline"), and for other KVM
570 * implementations just count online CPUs.
571 */
cbbc58d4 572 if (hv_enabled)
699cc876
AK
573 r = num_present_cpus();
574 else
575 r = num_online_cpus();
b5434032 576 break;
bfec5c2c
ND
577 case KVM_CAP_NR_MEMSLOTS:
578 r = KVM_USER_MEM_SLOTS;
579 break;
b5434032
ME
580 case KVM_CAP_MAX_VCPUS:
581 r = KVM_MAX_VCPUS;
582 break;
5b74716e
BH
583#ifdef CONFIG_PPC_BOOK3S_64
584 case KVM_CAP_PPC_GET_SMMU_INFO:
585 r = 1;
586 break;
d3695aa4
AK
587 case KVM_CAP_SPAPR_MULTITCE:
588 r = 1;
589 break;
5b74716e 590#endif
23528bb2
SB
591 case KVM_CAP_PPC_HTM:
592 r = cpu_has_feature(CPU_FTR_TM_COMP) &&
593 is_kvmppc_hv_enabled(kvm);
594 break;
bbf45ba5
HB
595 default:
596 r = 0;
597 break;
598 }
599 return r;
600
601}
602
603long kvm_arch_dev_ioctl(struct file *filp,
604 unsigned int ioctl, unsigned long arg)
605{
606 return -EINVAL;
607}
608
5587027c 609void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
db3fe4eb
TY
610 struct kvm_memory_slot *dont)
611{
5587027c 612 kvmppc_core_free_memslot(kvm, free, dont);
db3fe4eb
TY
613}
614
5587027c
AK
615int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
616 unsigned long npages)
db3fe4eb 617{
5587027c 618 return kvmppc_core_create_memslot(kvm, slot, npages);
db3fe4eb
TY
619}
620
f7784b8e 621int kvm_arch_prepare_memory_region(struct kvm *kvm,
462fce46 622 struct kvm_memory_slot *memslot,
09170a49 623 const struct kvm_userspace_memory_region *mem,
7b6195a9 624 enum kvm_mr_change change)
bbf45ba5 625{
a66b48c3 626 return kvmppc_core_prepare_memory_region(kvm, memslot, mem);
bbf45ba5
HB
627}
628
f7784b8e 629void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 630 const struct kvm_userspace_memory_region *mem,
8482644a 631 const struct kvm_memory_slot *old,
f36f3f28 632 const struct kvm_memory_slot *new,
8482644a 633 enum kvm_mr_change change)
f7784b8e 634{
f36f3f28 635 kvmppc_core_commit_memory_region(kvm, mem, old, new);
f7784b8e
MT
636}
637
2df72e9b
MT
638void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
639 struct kvm_memory_slot *slot)
34d4cb8f 640{
dfe49dbd 641 kvmppc_core_flush_memslot(kvm, slot);
34d4cb8f
MT
642}
643
bbf45ba5
HB
644struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
645{
73e75b41
HB
646 struct kvm_vcpu *vcpu;
647 vcpu = kvmppc_core_vcpu_create(kvm, id);
03cdab53
ME
648 if (!IS_ERR(vcpu)) {
649 vcpu->arch.wqp = &vcpu->wq;
06056bfb 650 kvmppc_create_vcpu_debugfs(vcpu, id);
03cdab53 651 }
73e75b41 652 return vcpu;
bbf45ba5
HB
653}
654
31928aa5 655void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
42897d86 656{
42897d86
MT
657}
658
bbf45ba5
HB
659void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
660{
a595405d
AG
661 /* Make sure we're not using the vcpu anymore */
662 hrtimer_cancel(&vcpu->arch.dec_timer);
a595405d 663
73e75b41 664 kvmppc_remove_vcpu_debugfs(vcpu);
eb1e4f43
SW
665
666 switch (vcpu->arch.irq_type) {
667 case KVMPPC_IRQ_MPIC:
668 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);
669 break;
bc5ad3f3
BH
670 case KVMPPC_IRQ_XICS:
671 kvmppc_xics_free_icp(vcpu);
672 break;
eb1e4f43
SW
673 }
674
db93f574 675 kvmppc_core_vcpu_free(vcpu);
bbf45ba5
HB
676}
677
678void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
679{
680 kvm_arch_vcpu_free(vcpu);
681}
682
683int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
684{
9dd921cf 685 return kvmppc_core_pending_dec(vcpu);
bbf45ba5
HB
686}
687
5358a963 688static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
544c6761
AG
689{
690 struct kvm_vcpu *vcpu;
691
692 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
d02d4d15 693 kvmppc_decrementer_func(vcpu);
544c6761
AG
694
695 return HRTIMER_NORESTART;
696}
697
bbf45ba5
HB
698int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
699{
f61c94bb
BB
700 int ret;
701
544c6761 702 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
544c6761 703 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
de56a948 704 vcpu->arch.dec_expires = ~(u64)0;
bbf45ba5 705
09000adb
BB
706#ifdef CONFIG_KVM_EXIT_TIMING
707 mutex_init(&vcpu->arch.exit_timing_lock);
708#endif
f61c94bb
BB
709 ret = kvmppc_subarch_vcpu_init(vcpu);
710 return ret;
bbf45ba5
HB
711}
712
713void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
714{
ecc0981f 715 kvmppc_mmu_destroy(vcpu);
f61c94bb 716 kvmppc_subarch_vcpu_uninit(vcpu);
bbf45ba5
HB
717}
718
719void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
720{
eab17672
SW
721#ifdef CONFIG_BOOKE
722 /*
723 * vrsave (formerly usprg0) isn't used by Linux, but may
724 * be used by the guest.
725 *
726 * On non-booke this is associated with Altivec and
727 * is handled by code in book3s.c.
728 */
729 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
730#endif
9dd921cf 731 kvmppc_core_vcpu_load(vcpu, cpu);
bbf45ba5
HB
732}
733
734void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
735{
9dd921cf 736 kvmppc_core_vcpu_put(vcpu);
eab17672
SW
737#ifdef CONFIG_BOOKE
738 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
739#endif
bbf45ba5
HB
740}
741
bbf45ba5
HB
742static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
743 struct kvm_run *run)
744{
69b61833 745 u64 uninitialized_var(gpr);
bbf45ba5 746
8e5b26b5 747 if (run->mmio.len > sizeof(gpr)) {
bbf45ba5
HB
748 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
749 return;
750 }
751
d078eed3 752 if (!vcpu->arch.mmio_host_swabbed) {
bbf45ba5 753 switch (run->mmio.len) {
b104d066 754 case 8: gpr = *(u64 *)run->mmio.data; break;
8e5b26b5
AG
755 case 4: gpr = *(u32 *)run->mmio.data; break;
756 case 2: gpr = *(u16 *)run->mmio.data; break;
757 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
758 }
759 } else {
bbf45ba5 760 switch (run->mmio.len) {
d078eed3
DG
761 case 8: gpr = swab64(*(u64 *)run->mmio.data); break;
762 case 4: gpr = swab32(*(u32 *)run->mmio.data); break;
763 case 2: gpr = swab16(*(u16 *)run->mmio.data); break;
8e5b26b5 764 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
765 }
766 }
8e5b26b5 767
3587d534
AG
768 if (vcpu->arch.mmio_sign_extend) {
769 switch (run->mmio.len) {
770#ifdef CONFIG_PPC64
771 case 4:
772 gpr = (s64)(s32)gpr;
773 break;
774#endif
775 case 2:
776 gpr = (s64)(s16)gpr;
777 break;
778 case 1:
779 gpr = (s64)(s8)gpr;
780 break;
781 }
782 }
783
8e5b26b5 784 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
b104d066 785
b3c5d3c2
AG
786 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
787 case KVM_MMIO_REG_GPR:
b104d066
AG
788 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
789 break;
b3c5d3c2 790 case KVM_MMIO_REG_FPR:
efff1912 791 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b104d066 792 break;
287d5611 793#ifdef CONFIG_PPC_BOOK3S
b3c5d3c2
AG
794 case KVM_MMIO_REG_QPR:
795 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 796 break;
b3c5d3c2 797 case KVM_MMIO_REG_FQPR:
efff1912 798 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b3c5d3c2 799 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 800 break;
287d5611 801#endif
b104d066
AG
802 default:
803 BUG();
804 }
bbf45ba5
HB
805}
806
eb8b0560
PM
807static int __kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
808 unsigned int rt, unsigned int bytes,
809 int is_default_endian, int sign_extend)
bbf45ba5 810{
ed840ee9 811 int idx, ret;
d078eed3 812 bool host_swabbed;
73601775 813
d078eed3 814 /* Pity C doesn't have a logical XOR operator */
73601775 815 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 816 host_swabbed = is_default_endian;
73601775 817 } else {
d078eed3 818 host_swabbed = !is_default_endian;
73601775 819 }
ed840ee9 820
bbf45ba5
HB
821 if (bytes > sizeof(run->mmio.data)) {
822 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
823 run->mmio.len);
824 }
825
826 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
827 run->mmio.len = bytes;
828 run->mmio.is_write = 0;
829
830 vcpu->arch.io_gpr = rt;
d078eed3 831 vcpu->arch.mmio_host_swabbed = host_swabbed;
bbf45ba5
HB
832 vcpu->mmio_needed = 1;
833 vcpu->mmio_is_write = 0;
eb8b0560 834 vcpu->arch.mmio_sign_extend = sign_extend;
bbf45ba5 835
ed840ee9
SW
836 idx = srcu_read_lock(&vcpu->kvm->srcu);
837
e32edf4f 838 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
839 bytes, &run->mmio.data);
840
841 srcu_read_unlock(&vcpu->kvm->srcu, idx);
842
843 if (!ret) {
0e673fb6
AG
844 kvmppc_complete_mmio_load(vcpu, run);
845 vcpu->mmio_needed = 0;
846 return EMULATE_DONE;
847 }
848
bbf45ba5
HB
849 return EMULATE_DO_MMIO;
850}
eb8b0560
PM
851
852int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
853 unsigned int rt, unsigned int bytes,
854 int is_default_endian)
855{
856 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 0);
857}
2ba9f0d8 858EXPORT_SYMBOL_GPL(kvmppc_handle_load);
bbf45ba5 859
3587d534
AG
860/* Same as above, but sign extends */
861int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
862 unsigned int rt, unsigned int bytes,
863 int is_default_endian)
3587d534 864{
eb8b0560 865 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 1);
3587d534
AG
866}
867
bbf45ba5 868int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775 869 u64 val, unsigned int bytes, int is_default_endian)
bbf45ba5
HB
870{
871 void *data = run->mmio.data;
ed840ee9 872 int idx, ret;
d078eed3 873 bool host_swabbed;
73601775 874
d078eed3 875 /* Pity C doesn't have a logical XOR operator */
73601775 876 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 877 host_swabbed = is_default_endian;
73601775 878 } else {
d078eed3 879 host_swabbed = !is_default_endian;
73601775 880 }
bbf45ba5
HB
881
882 if (bytes > sizeof(run->mmio.data)) {
883 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
884 run->mmio.len);
885 }
886
887 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
888 run->mmio.len = bytes;
889 run->mmio.is_write = 1;
890 vcpu->mmio_needed = 1;
891 vcpu->mmio_is_write = 1;
892
893 /* Store the value at the lowest bytes in 'data'. */
d078eed3 894 if (!host_swabbed) {
bbf45ba5 895 switch (bytes) {
b104d066 896 case 8: *(u64 *)data = val; break;
bbf45ba5
HB
897 case 4: *(u32 *)data = val; break;
898 case 2: *(u16 *)data = val; break;
899 case 1: *(u8 *)data = val; break;
900 }
901 } else {
bbf45ba5 902 switch (bytes) {
d078eed3
DG
903 case 8: *(u64 *)data = swab64(val); break;
904 case 4: *(u32 *)data = swab32(val); break;
905 case 2: *(u16 *)data = swab16(val); break;
906 case 1: *(u8 *)data = val; break;
bbf45ba5
HB
907 }
908 }
909
ed840ee9
SW
910 idx = srcu_read_lock(&vcpu->kvm->srcu);
911
e32edf4f 912 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
913 bytes, &run->mmio.data);
914
915 srcu_read_unlock(&vcpu->kvm->srcu, idx);
916
917 if (!ret) {
0e673fb6
AG
918 vcpu->mmio_needed = 0;
919 return EMULATE_DONE;
920 }
921
bbf45ba5
HB
922 return EMULATE_DO_MMIO;
923}
2ba9f0d8 924EXPORT_SYMBOL_GPL(kvmppc_handle_store);
bbf45ba5 925
8a41ea53
MC
926int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
927{
928 int r = 0;
929 union kvmppc_one_reg val;
930 int size;
931
932 size = one_reg_size(reg->id);
933 if (size > sizeof(val))
934 return -EINVAL;
935
936 r = kvmppc_get_one_reg(vcpu, reg->id, &val);
937 if (r == -EINVAL) {
938 r = 0;
939 switch (reg->id) {
3840edc8
MC
940#ifdef CONFIG_ALTIVEC
941 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
942 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
943 r = -ENXIO;
944 break;
945 }
b4d7f161 946 val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
3840edc8
MC
947 break;
948 case KVM_REG_PPC_VSCR:
949 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
950 r = -ENXIO;
951 break;
952 }
b4d7f161 953 val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
3840edc8
MC
954 break;
955 case KVM_REG_PPC_VRSAVE:
b4d7f161 956 val = get_reg_val(reg->id, vcpu->arch.vrsave);
3840edc8
MC
957 break;
958#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
959 default:
960 r = -EINVAL;
961 break;
962 }
963 }
964
965 if (r)
966 return r;
967
968 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
969 r = -EFAULT;
970
971 return r;
972}
973
974int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
975{
976 int r;
977 union kvmppc_one_reg val;
978 int size;
979
980 size = one_reg_size(reg->id);
981 if (size > sizeof(val))
982 return -EINVAL;
983
984 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
985 return -EFAULT;
986
987 r = kvmppc_set_one_reg(vcpu, reg->id, &val);
988 if (r == -EINVAL) {
989 r = 0;
990 switch (reg->id) {
3840edc8
MC
991#ifdef CONFIG_ALTIVEC
992 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
993 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
994 r = -ENXIO;
995 break;
996 }
b4d7f161 997 vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
3840edc8
MC
998 break;
999 case KVM_REG_PPC_VSCR:
1000 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1001 r = -ENXIO;
1002 break;
1003 }
b4d7f161 1004 vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
3840edc8
MC
1005 break;
1006 case KVM_REG_PPC_VRSAVE:
b4d7f161
GK
1007 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1008 r = -ENXIO;
1009 break;
1010 }
1011 vcpu->arch.vrsave = set_reg_val(reg->id, val);
3840edc8
MC
1012 break;
1013#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1014 default:
1015 r = -EINVAL;
1016 break;
1017 }
1018 }
1019
1020 return r;
1021}
1022
bbf45ba5
HB
1023int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
1024{
1025 int r;
1026 sigset_t sigsaved;
1027
1028 if (vcpu->sigset_active)
1029 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
1030
1031 if (vcpu->mmio_needed) {
1032 if (!vcpu->mmio_is_write)
1033 kvmppc_complete_mmio_load(vcpu, run);
1034 vcpu->mmio_needed = 0;
ad0a048b
AG
1035 } else if (vcpu->arch.osi_needed) {
1036 u64 *gprs = run->osi.gprs;
1037 int i;
1038
1039 for (i = 0; i < 32; i++)
1040 kvmppc_set_gpr(vcpu, i, gprs[i]);
1041 vcpu->arch.osi_needed = 0;
de56a948
PM
1042 } else if (vcpu->arch.hcall_needed) {
1043 int i;
1044
1045 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
1046 for (i = 0; i < 9; ++i)
1047 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
1048 vcpu->arch.hcall_needed = 0;
1c810636
AG
1049#ifdef CONFIG_BOOKE
1050 } else if (vcpu->arch.epr_needed) {
1051 kvmppc_set_epr(vcpu, run->epr.epr);
1052 vcpu->arch.epr_needed = 0;
1053#endif
bbf45ba5
HB
1054 }
1055
df6909e5 1056 r = kvmppc_vcpu_run(run, vcpu);
bbf45ba5
HB
1057
1058 if (vcpu->sigset_active)
1059 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
1060
1061 return r;
1062}
1063
1064int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
1065{
19ccb76a 1066 if (irq->irq == KVM_INTERRUPT_UNSET) {
4fe27d2a 1067 kvmppc_core_dequeue_external(vcpu);
19ccb76a
PM
1068 return 0;
1069 }
1070
1071 kvmppc_core_queue_external(vcpu, irq);
b6d33834 1072
dfd4d47e 1073 kvm_vcpu_kick(vcpu);
45c5eb67 1074
bbf45ba5
HB
1075 return 0;
1076}
1077
71fbfd5f
AG
1078static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
1079 struct kvm_enable_cap *cap)
1080{
1081 int r;
1082
1083 if (cap->flags)
1084 return -EINVAL;
1085
1086 switch (cap->cap) {
ad0a048b
AG
1087 case KVM_CAP_PPC_OSI:
1088 r = 0;
1089 vcpu->arch.osi_enabled = true;
1090 break;
930b412a
AG
1091 case KVM_CAP_PPC_PAPR:
1092 r = 0;
1093 vcpu->arch.papr_enabled = true;
1094 break;
1c810636
AG
1095 case KVM_CAP_PPC_EPR:
1096 r = 0;
5df554ad
SW
1097 if (cap->args[0])
1098 vcpu->arch.epr_flags |= KVMPPC_EPR_USER;
1099 else
1100 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER;
1c810636 1101 break;
f61c94bb
BB
1102#ifdef CONFIG_BOOKE
1103 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1104 r = 0;
1105 vcpu->arch.watchdog_enabled = true;
1106 break;
1107#endif
bf7ca4bd 1108#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1109 case KVM_CAP_SW_TLB: {
1110 struct kvm_config_tlb cfg;
1111 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
1112
1113 r = -EFAULT;
1114 if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
1115 break;
1116
1117 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
1118 break;
eb1e4f43
SW
1119 }
1120#endif
1121#ifdef CONFIG_KVM_MPIC
1122 case KVM_CAP_IRQ_MPIC: {
70abaded 1123 struct fd f;
eb1e4f43
SW
1124 struct kvm_device *dev;
1125
1126 r = -EBADF;
70abaded
AV
1127 f = fdget(cap->args[0]);
1128 if (!f.file)
eb1e4f43
SW
1129 break;
1130
1131 r = -EPERM;
70abaded 1132 dev = kvm_device_from_filp(f.file);
eb1e4f43
SW
1133 if (dev)
1134 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]);
1135
70abaded 1136 fdput(f);
eb1e4f43 1137 break;
dc83b8bc
SW
1138 }
1139#endif
5975a2e0
PM
1140#ifdef CONFIG_KVM_XICS
1141 case KVM_CAP_IRQ_XICS: {
70abaded 1142 struct fd f;
5975a2e0
PM
1143 struct kvm_device *dev;
1144
1145 r = -EBADF;
70abaded
AV
1146 f = fdget(cap->args[0]);
1147 if (!f.file)
5975a2e0
PM
1148 break;
1149
1150 r = -EPERM;
70abaded 1151 dev = kvm_device_from_filp(f.file);
5975a2e0
PM
1152 if (dev)
1153 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]);
1154
70abaded 1155 fdput(f);
5975a2e0
PM
1156 break;
1157 }
1158#endif /* CONFIG_KVM_XICS */
71fbfd5f
AG
1159 default:
1160 r = -EINVAL;
1161 break;
1162 }
1163
af8f38b3
AG
1164 if (!r)
1165 r = kvmppc_sanity_check(vcpu);
1166
71fbfd5f
AG
1167 return r;
1168}
1169
34a75b0f
PM
1170bool kvm_arch_intc_initialized(struct kvm *kvm)
1171{
1172#ifdef CONFIG_KVM_MPIC
1173 if (kvm->arch.mpic)
1174 return true;
1175#endif
1176#ifdef CONFIG_KVM_XICS
1177 if (kvm->arch.xics)
1178 return true;
1179#endif
1180 return false;
1181}
1182
bbf45ba5
HB
1183int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
1184 struct kvm_mp_state *mp_state)
1185{
1186 return -EINVAL;
1187}
1188
1189int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
1190 struct kvm_mp_state *mp_state)
1191{
1192 return -EINVAL;
1193}
1194
1195long kvm_arch_vcpu_ioctl(struct file *filp,
1196 unsigned int ioctl, unsigned long arg)
1197{
1198 struct kvm_vcpu *vcpu = filp->private_data;
1199 void __user *argp = (void __user *)arg;
1200 long r;
1201
93736624
AK
1202 switch (ioctl) {
1203 case KVM_INTERRUPT: {
bbf45ba5
HB
1204 struct kvm_interrupt irq;
1205 r = -EFAULT;
1206 if (copy_from_user(&irq, argp, sizeof(irq)))
93736624 1207 goto out;
bbf45ba5 1208 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
93736624 1209 goto out;
bbf45ba5 1210 }
19483d14 1211
71fbfd5f
AG
1212 case KVM_ENABLE_CAP:
1213 {
1214 struct kvm_enable_cap cap;
1215 r = -EFAULT;
1216 if (copy_from_user(&cap, argp, sizeof(cap)))
1217 goto out;
1218 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
1219 break;
1220 }
dc83b8bc 1221
e24ed81f
AG
1222 case KVM_SET_ONE_REG:
1223 case KVM_GET_ONE_REG:
1224 {
1225 struct kvm_one_reg reg;
1226 r = -EFAULT;
1227 if (copy_from_user(&reg, argp, sizeof(reg)))
1228 goto out;
1229 if (ioctl == KVM_SET_ONE_REG)
1230 r = kvm_vcpu_ioctl_set_one_reg(vcpu, &reg);
1231 else
1232 r = kvm_vcpu_ioctl_get_one_reg(vcpu, &reg);
1233 break;
1234 }
1235
bf7ca4bd 1236#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1237 case KVM_DIRTY_TLB: {
1238 struct kvm_dirty_tlb dirty;
1239 r = -EFAULT;
1240 if (copy_from_user(&dirty, argp, sizeof(dirty)))
1241 goto out;
1242 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
1243 break;
1244 }
1245#endif
bbf45ba5
HB
1246 default:
1247 r = -EINVAL;
1248 }
1249
1250out:
1251 return r;
1252}
1253
5b1c1493
CO
1254int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
1255{
1256 return VM_FAULT_SIGBUS;
1257}
1258
15711e9c
AG
1259static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
1260{
784bafac
SY
1261 u32 inst_nop = 0x60000000;
1262#ifdef CONFIG_KVM_BOOKE_HV
1263 u32 inst_sc1 = 0x44000022;
2743103f
AG
1264 pvinfo->hcall[0] = cpu_to_be32(inst_sc1);
1265 pvinfo->hcall[1] = cpu_to_be32(inst_nop);
1266 pvinfo->hcall[2] = cpu_to_be32(inst_nop);
1267 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1268#else
15711e9c
AG
1269 u32 inst_lis = 0x3c000000;
1270 u32 inst_ori = 0x60000000;
15711e9c
AG
1271 u32 inst_sc = 0x44000002;
1272 u32 inst_imm_mask = 0xffff;
1273
1274 /*
1275 * The hypercall to get into KVM from within guest context is as
1276 * follows:
1277 *
1278 * lis r0, r0, KVM_SC_MAGIC_R0@h
1279 * ori r0, KVM_SC_MAGIC_R0@l
1280 * sc
1281 * nop
1282 */
2743103f
AG
1283 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask));
1284 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask));
1285 pvinfo->hcall[2] = cpu_to_be32(inst_sc);
1286 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1287#endif
15711e9c 1288
9202e076
LYB
1289 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE;
1290
15711e9c
AG
1291 return 0;
1292}
1293
5efdb4be
AG
1294int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
1295 bool line_status)
1296{
1297 if (!irqchip_in_kernel(kvm))
1298 return -ENXIO;
1299
1300 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1301 irq_event->irq, irq_event->level,
1302 line_status);
1303 return 0;
1304}
1305
699a0ea0
PM
1306
1307static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
1308 struct kvm_enable_cap *cap)
1309{
1310 int r;
1311
1312 if (cap->flags)
1313 return -EINVAL;
1314
1315 switch (cap->cap) {
1316#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1317 case KVM_CAP_PPC_ENABLE_HCALL: {
1318 unsigned long hcall = cap->args[0];
1319
1320 r = -EINVAL;
1321 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) ||
1322 cap->args[1] > 1)
1323 break;
ae2113a4
PM
1324 if (!kvmppc_book3s_hcall_implemented(kvm, hcall))
1325 break;
699a0ea0
PM
1326 if (cap->args[1])
1327 set_bit(hcall / 4, kvm->arch.enabled_hcalls);
1328 else
1329 clear_bit(hcall / 4, kvm->arch.enabled_hcalls);
1330 r = 0;
1331 break;
1332 }
1333#endif
1334 default:
1335 r = -EINVAL;
1336 break;
1337 }
1338
1339 return r;
1340}
1341
bbf45ba5
HB
1342long kvm_arch_vm_ioctl(struct file *filp,
1343 unsigned int ioctl, unsigned long arg)
1344{
5df554ad 1345 struct kvm *kvm __maybe_unused = filp->private_data;
15711e9c 1346 void __user *argp = (void __user *)arg;
bbf45ba5
HB
1347 long r;
1348
1349 switch (ioctl) {
15711e9c
AG
1350 case KVM_PPC_GET_PVINFO: {
1351 struct kvm_ppc_pvinfo pvinfo;
d8cdddcd 1352 memset(&pvinfo, 0, sizeof(pvinfo));
15711e9c
AG
1353 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
1354 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
1355 r = -EFAULT;
1356 goto out;
1357 }
1358
1359 break;
1360 }
699a0ea0
PM
1361 case KVM_ENABLE_CAP:
1362 {
1363 struct kvm_enable_cap cap;
1364 r = -EFAULT;
1365 if (copy_from_user(&cap, argp, sizeof(cap)))
1366 goto out;
1367 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
1368 break;
1369 }
f31e65e1 1370#ifdef CONFIG_PPC_BOOK3S_64
58ded420
AK
1371 case KVM_CREATE_SPAPR_TCE_64: {
1372 struct kvm_create_spapr_tce_64 create_tce_64;
1373
1374 r = -EFAULT;
1375 if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64)))
1376 goto out;
1377 if (create_tce_64.flags) {
1378 r = -EINVAL;
1379 goto out;
1380 }
1381 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
1382 goto out;
1383 }
54738c09
DG
1384 case KVM_CREATE_SPAPR_TCE: {
1385 struct kvm_create_spapr_tce create_tce;
58ded420 1386 struct kvm_create_spapr_tce_64 create_tce_64;
54738c09
DG
1387
1388 r = -EFAULT;
1389 if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
1390 goto out;
58ded420
AK
1391
1392 create_tce_64.liobn = create_tce.liobn;
1393 create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K;
1394 create_tce_64.offset = 0;
1395 create_tce_64.size = create_tce.window_size >>
1396 IOMMU_PAGE_SHIFT_4K;
1397 create_tce_64.flags = 0;
1398 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
54738c09
DG
1399 goto out;
1400 }
5b74716e 1401 case KVM_PPC_GET_SMMU_INFO: {
5b74716e 1402 struct kvm_ppc_smmu_info info;
cbbc58d4 1403 struct kvm *kvm = filp->private_data;
5b74716e
BH
1404
1405 memset(&info, 0, sizeof(info));
cbbc58d4 1406 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info);
5b74716e
BH
1407 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1408 r = -EFAULT;
1409 break;
1410 }
8e591cb7
ME
1411 case KVM_PPC_RTAS_DEFINE_TOKEN: {
1412 struct kvm *kvm = filp->private_data;
1413
1414 r = kvm_vm_ioctl_rtas_define_token(kvm, argp);
1415 break;
1416 }
cbbc58d4
AK
1417 default: {
1418 struct kvm *kvm = filp->private_data;
1419 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg);
1420 }
3a167bea 1421#else /* CONFIG_PPC_BOOK3S_64 */
bbf45ba5 1422 default:
367e1319 1423 r = -ENOTTY;
3a167bea 1424#endif
bbf45ba5 1425 }
15711e9c 1426out:
bbf45ba5
HB
1427 return r;
1428}
1429
043cc4d7
SW
1430static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
1431static unsigned long nr_lpids;
1432
1433long kvmppc_alloc_lpid(void)
1434{
1435 long lpid;
1436
1437 do {
1438 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
1439 if (lpid >= nr_lpids) {
1440 pr_err("%s: No LPIDs free\n", __func__);
1441 return -ENOMEM;
1442 }
1443 } while (test_and_set_bit(lpid, lpid_inuse));
1444
1445 return lpid;
1446}
2ba9f0d8 1447EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid);
043cc4d7
SW
1448
1449void kvmppc_claim_lpid(long lpid)
1450{
1451 set_bit(lpid, lpid_inuse);
1452}
2ba9f0d8 1453EXPORT_SYMBOL_GPL(kvmppc_claim_lpid);
043cc4d7
SW
1454
1455void kvmppc_free_lpid(long lpid)
1456{
1457 clear_bit(lpid, lpid_inuse);
1458}
2ba9f0d8 1459EXPORT_SYMBOL_GPL(kvmppc_free_lpid);
043cc4d7
SW
1460
1461void kvmppc_init_lpid(unsigned long nr_lpids_param)
1462{
1463 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
1464 memset(lpid_inuse, 0, sizeof(lpid_inuse));
1465}
2ba9f0d8 1466EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
043cc4d7 1467
bbf45ba5
HB
1468int kvm_arch_init(void *opaque)
1469{
1470 return 0;
1471}
1472
478d6686 1473EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr);