]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - arch/powerpc/kvm/powerpc.c
KVM: PPC: Book3S HV: Allow userspace to set the desired SMT mode
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / powerpc.c
CommitLineData
bbf45ba5
HB
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19 */
20
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/kvm_host.h>
bbf45ba5 24#include <linux/vmalloc.h>
544c6761 25#include <linux/hrtimer.h>
174cd4b1 26#include <linux/sched/signal.h>
bbf45ba5 27#include <linux/fs.h>
5a0e3ad6 28#include <linux/slab.h>
eb1e4f43 29#include <linux/file.h>
cbbc58d4 30#include <linux/module.h>
9576730d
SW
31#include <linux/irqbypass.h>
32#include <linux/kvm_irqfd.h>
bbf45ba5 33#include <asm/cputable.h>
7c0f6ba6 34#include <linux/uaccess.h>
bbf45ba5 35#include <asm/kvm_ppc.h>
83aae4a8 36#include <asm/tlbflush.h>
371fefd6 37#include <asm/cputhreads.h>
bd2be683 38#include <asm/irqflags.h>
58ded420 39#include <asm/iommu.h>
6f63e81b 40#include <asm/switch_to.h>
5af50993
BH
41#include <asm/xive.h>
42
73e75b41 43#include "timing.h"
5efdb4be 44#include "irq.h"
fad7b9b5 45#include "../mm/mmu_decl.h"
bbf45ba5 46
46f43c6e
MT
47#define CREATE_TRACE_POINTS
48#include "trace.h"
49
cbbc58d4
AK
50struct kvmppc_ops *kvmppc_hv_ops;
51EXPORT_SYMBOL_GPL(kvmppc_hv_ops);
52struct kvmppc_ops *kvmppc_pr_ops;
53EXPORT_SYMBOL_GPL(kvmppc_pr_ops);
54
3a167bea 55
bbf45ba5
HB
56int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
57{
9202e076 58 return !!(v->arch.pending_exceptions) ||
dfd4d47e 59 v->requests;
bbf45ba5
HB
60}
61
b6d33834
CD
62int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
63{
64 return 1;
65}
66
03d25c5b
AG
67/*
68 * Common checks before entering the guest world. Call with interrupts
69 * disabled.
70 *
7ee78855
AG
71 * returns:
72 *
73 * == 1 if we're ready to go into guest state
74 * <= 0 if we need to go back to the host with return value
03d25c5b
AG
75 */
76int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
77{
6c85f52b
SW
78 int r;
79
80 WARN_ON(irqs_disabled());
81 hard_irq_disable();
03d25c5b 82
03d25c5b
AG
83 while (true) {
84 if (need_resched()) {
85 local_irq_enable();
86 cond_resched();
6c85f52b 87 hard_irq_disable();
03d25c5b
AG
88 continue;
89 }
90
91 if (signal_pending(current)) {
7ee78855
AG
92 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
93 vcpu->run->exit_reason = KVM_EXIT_INTR;
94 r = -EINTR;
03d25c5b
AG
95 break;
96 }
97
5bd1cf11
SW
98 vcpu->mode = IN_GUEST_MODE;
99
100 /*
101 * Reading vcpu->requests must happen after setting vcpu->mode,
102 * so we don't miss a request because the requester sees
103 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests
104 * before next entering the guest (and thus doesn't IPI).
489153c7
LT
105 * This also orders the write to mode from any reads
106 * to the page tables done while the VCPU is running.
107 * Please see the comment in kvm_flush_remote_tlbs.
5bd1cf11 108 */
03d25c5b 109 smp_mb();
5bd1cf11 110
03d25c5b
AG
111 if (vcpu->requests) {
112 /* Make sure we process requests preemptable */
113 local_irq_enable();
114 trace_kvm_check_requests(vcpu);
7c973a2e 115 r = kvmppc_core_check_requests(vcpu);
6c85f52b 116 hard_irq_disable();
7c973a2e
AG
117 if (r > 0)
118 continue;
119 break;
03d25c5b
AG
120 }
121
122 if (kvmppc_core_prepare_to_enter(vcpu)) {
123 /* interrupts got enabled in between, so we
124 are back at square 1 */
125 continue;
126 }
127
6edaa530 128 guest_enter_irqoff();
6c85f52b 129 return 1;
03d25c5b
AG
130 }
131
6c85f52b
SW
132 /* return to host */
133 local_irq_enable();
03d25c5b
AG
134 return r;
135}
2ba9f0d8 136EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter);
03d25c5b 137
5deb8e7a
AG
138#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
139static void kvmppc_swab_shared(struct kvm_vcpu *vcpu)
140{
141 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
142 int i;
143
144 shared->sprg0 = swab64(shared->sprg0);
145 shared->sprg1 = swab64(shared->sprg1);
146 shared->sprg2 = swab64(shared->sprg2);
147 shared->sprg3 = swab64(shared->sprg3);
148 shared->srr0 = swab64(shared->srr0);
149 shared->srr1 = swab64(shared->srr1);
150 shared->dar = swab64(shared->dar);
151 shared->msr = swab64(shared->msr);
152 shared->dsisr = swab32(shared->dsisr);
153 shared->int_pending = swab32(shared->int_pending);
154 for (i = 0; i < ARRAY_SIZE(shared->sr); i++)
155 shared->sr[i] = swab32(shared->sr[i]);
156}
157#endif
158
2a342ed5
AG
159int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
160{
161 int nr = kvmppc_get_gpr(vcpu, 11);
162 int r;
163 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
164 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
165 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
166 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
167 unsigned long r2 = 0;
168
5deb8e7a 169 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
2a342ed5
AG
170 /* 32 bit mode */
171 param1 &= 0xffffffff;
172 param2 &= 0xffffffff;
173 param3 &= 0xffffffff;
174 param4 &= 0xffffffff;
175 }
176
177 switch (nr) {
fdcf8bd7 178 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE):
5fc87407 179 {
5deb8e7a
AG
180#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
181 /* Book3S can be little endian, find it out here */
182 int shared_big_endian = true;
183 if (vcpu->arch.intr_msr & MSR_LE)
184 shared_big_endian = false;
185 if (shared_big_endian != vcpu->arch.shared_big_endian)
186 kvmppc_swab_shared(vcpu);
187 vcpu->arch.shared_big_endian = shared_big_endian;
188#endif
189
f3383cf8
AG
190 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) {
191 /*
192 * Older versions of the Linux magic page code had
193 * a bug where they would map their trampoline code
194 * NX. If that's the case, remove !PR NX capability.
195 */
196 vcpu->arch.disable_kernel_nx = true;
197 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
198 }
199
200 vcpu->arch.magic_page_pa = param1 & ~0xfffULL;
201 vcpu->arch.magic_page_ea = param2 & ~0xfffULL;
5fc87407 202
89b68c96
AG
203#ifdef CONFIG_PPC_64K_PAGES
204 /*
205 * Make sure our 4k magic page is in the same window of a 64k
206 * page within the guest and within the host's page.
207 */
208 if ((vcpu->arch.magic_page_pa & 0xf000) !=
209 ((ulong)vcpu->arch.shared & 0xf000)) {
210 void *old_shared = vcpu->arch.shared;
211 ulong shared = (ulong)vcpu->arch.shared;
212 void *new_shared;
213
214 shared &= PAGE_MASK;
215 shared |= vcpu->arch.magic_page_pa & 0xf000;
216 new_shared = (void*)shared;
217 memcpy(new_shared, old_shared, 0x1000);
218 vcpu->arch.shared = new_shared;
219 }
220#endif
221
b5904972 222 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
7508e16c 223
fdcf8bd7 224 r = EV_SUCCESS;
5fc87407
AG
225 break;
226 }
fdcf8bd7
SY
227 case KVM_HCALL_TOKEN(KVM_HC_FEATURES):
228 r = EV_SUCCESS;
bf7ca4bd 229#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
5fc87407
AG
230 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
231#endif
2a342ed5
AG
232
233 /* Second return value is in r4 */
2a342ed5 234 break;
9202e076
LYB
235 case EV_HCALL_TOKEN(EV_IDLE):
236 r = EV_SUCCESS;
237 kvm_vcpu_block(vcpu);
72875d8a 238 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9202e076 239 break;
2a342ed5 240 default:
fdcf8bd7 241 r = EV_UNIMPLEMENTED;
2a342ed5
AG
242 break;
243 }
244
7508e16c
AG
245 kvmppc_set_gpr(vcpu, 4, r2);
246
2a342ed5
AG
247 return r;
248}
2ba9f0d8 249EXPORT_SYMBOL_GPL(kvmppc_kvm_pv);
bbf45ba5 250
af8f38b3
AG
251int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
252{
253 int r = false;
254
255 /* We have to know what CPU to virtualize */
256 if (!vcpu->arch.pvr)
257 goto out;
258
259 /* PAPR only works with book3s_64 */
260 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
261 goto out;
262
af8f38b3 263 /* HV KVM can only do PAPR mode for now */
a78b55d1 264 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm))
af8f38b3 265 goto out;
af8f38b3 266
d30f6e48
SW
267#ifdef CONFIG_KVM_BOOKE_HV
268 if (!cpu_has_feature(CPU_FTR_EMB_HV))
269 goto out;
270#endif
271
af8f38b3
AG
272 r = true;
273
274out:
275 vcpu->arch.sane = r;
276 return r ? 0 : -EINVAL;
277}
2ba9f0d8 278EXPORT_SYMBOL_GPL(kvmppc_sanity_check);
af8f38b3 279
bbf45ba5
HB
280int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
281{
282 enum emulation_result er;
283 int r;
284
d69614a2 285 er = kvmppc_emulate_loadstore(vcpu);
bbf45ba5
HB
286 switch (er) {
287 case EMULATE_DONE:
288 /* Future optimization: only reload non-volatiles if they were
289 * actually modified. */
290 r = RESUME_GUEST_NV;
291 break;
51f04726
MC
292 case EMULATE_AGAIN:
293 r = RESUME_GUEST;
294 break;
bbf45ba5
HB
295 case EMULATE_DO_MMIO:
296 run->exit_reason = KVM_EXIT_MMIO;
297 /* We must reload nonvolatiles because "update" load/store
298 * instructions modify register state. */
299 /* Future optimization: only reload non-volatiles if they were
300 * actually modified. */
301 r = RESUME_HOST_NV;
302 break;
303 case EMULATE_FAIL:
51f04726
MC
304 {
305 u32 last_inst;
306
8d0eff63 307 kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
bbf45ba5 308 /* XXX Deliver Program interrupt to guest. */
51f04726 309 pr_emerg("%s: emulation failed (%08x)\n", __func__, last_inst);
bbf45ba5
HB
310 r = RESUME_HOST;
311 break;
51f04726 312 }
bbf45ba5 313 default:
5a33169e
AG
314 WARN_ON(1);
315 r = RESUME_GUEST;
bbf45ba5
HB
316 }
317
318 return r;
319}
2ba9f0d8 320EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio);
bbf45ba5 321
35c4a733
AG
322int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
323 bool data)
324{
c12fb43c 325 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733
AG
326 struct kvmppc_pte pte;
327 int r;
328
329 vcpu->stat.st++;
330
331 r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
332 XLATE_WRITE, &pte);
333 if (r < 0)
334 return r;
335
336 *eaddr = pte.raddr;
337
338 if (!pte.may_write)
339 return -EPERM;
340
c12fb43c
AG
341 /* Magic page override */
342 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
343 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
344 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
345 void *magic = vcpu->arch.shared;
346 magic += pte.eaddr & 0xfff;
347 memcpy(magic, ptr, size);
348 return EMULATE_DONE;
349 }
350
35c4a733
AG
351 if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size))
352 return EMULATE_DO_MMIO;
353
354 return EMULATE_DONE;
355}
356EXPORT_SYMBOL_GPL(kvmppc_st);
357
358int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
359 bool data)
360{
c12fb43c 361 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733 362 struct kvmppc_pte pte;
35c4a733
AG
363 int rc;
364
365 vcpu->stat.ld++;
366
367 rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
368 XLATE_READ, &pte);
369 if (rc)
370 return rc;
371
372 *eaddr = pte.raddr;
373
374 if (!pte.may_read)
375 return -EPERM;
376
377 if (!data && !pte.may_execute)
378 return -ENOEXEC;
379
c12fb43c
AG
380 /* Magic page override */
381 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
382 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
383 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
384 void *magic = vcpu->arch.shared;
385 magic += pte.eaddr & 0xfff;
386 memcpy(ptr, magic, size);
387 return EMULATE_DONE;
388 }
389
c45c5514
AG
390 if (kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size))
391 return EMULATE_DO_MMIO;
35c4a733
AG
392
393 return EMULATE_DONE;
35c4a733
AG
394}
395EXPORT_SYMBOL_GPL(kvmppc_ld);
396
13a34e06 397int kvm_arch_hardware_enable(void)
bbf45ba5 398{
10474ae8 399 return 0;
bbf45ba5
HB
400}
401
bbf45ba5
HB
402int kvm_arch_hardware_setup(void)
403{
404 return 0;
405}
406
bbf45ba5
HB
407void kvm_arch_check_processor_compat(void *rtn)
408{
9dd921cf 409 *(int *)rtn = kvmppc_core_check_processor_compat();
bbf45ba5
HB
410}
411
e08b9637 412int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
bbf45ba5 413{
cbbc58d4
AK
414 struct kvmppc_ops *kvm_ops = NULL;
415 /*
416 * if we have both HV and PR enabled, default is HV
417 */
418 if (type == 0) {
419 if (kvmppc_hv_ops)
420 kvm_ops = kvmppc_hv_ops;
421 else
422 kvm_ops = kvmppc_pr_ops;
423 if (!kvm_ops)
424 goto err_out;
425 } else if (type == KVM_VM_PPC_HV) {
426 if (!kvmppc_hv_ops)
427 goto err_out;
428 kvm_ops = kvmppc_hv_ops;
429 } else if (type == KVM_VM_PPC_PR) {
430 if (!kvmppc_pr_ops)
431 goto err_out;
432 kvm_ops = kvmppc_pr_ops;
433 } else
434 goto err_out;
435
436 if (kvm_ops->owner && !try_module_get(kvm_ops->owner))
437 return -ENOENT;
438
439 kvm->arch.kvm_ops = kvm_ops;
f9e0554d 440 return kvmppc_core_init_vm(kvm);
cbbc58d4
AK
441err_out:
442 return -EINVAL;
bbf45ba5
HB
443}
444
235539b4
LC
445bool kvm_arch_has_vcpu_debugfs(void)
446{
447 return false;
448}
449
450int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
451{
452 return 0;
453}
454
d89f5eff 455void kvm_arch_destroy_vm(struct kvm *kvm)
bbf45ba5
HB
456{
457 unsigned int i;
988a2cae 458 struct kvm_vcpu *vcpu;
bbf45ba5 459
e17769eb
SW
460#ifdef CONFIG_KVM_XICS
461 /*
462 * We call kick_all_cpus_sync() to ensure that all
463 * CPUs have executed any pending IPIs before we
464 * continue and free VCPUs structures below.
465 */
466 if (is_kvmppc_hv_enabled(kvm))
467 kick_all_cpus_sync();
468#endif
469
988a2cae
GN
470 kvm_for_each_vcpu(i, vcpu, kvm)
471 kvm_arch_vcpu_free(vcpu);
472
473 mutex_lock(&kvm->lock);
474 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
475 kvm->vcpus[i] = NULL;
476
477 atomic_set(&kvm->online_vcpus, 0);
f9e0554d
PM
478
479 kvmppc_core_destroy_vm(kvm);
480
988a2cae 481 mutex_unlock(&kvm->lock);
cbbc58d4
AK
482
483 /* drop the module reference */
484 module_put(kvm->arch.kvm_ops->owner);
bbf45ba5
HB
485}
486
784aa3d7 487int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
bbf45ba5
HB
488{
489 int r;
7a58777a 490 /* Assume we're using HV mode when the HV module is loaded */
cbbc58d4 491 int hv_enabled = kvmppc_hv_ops ? 1 : 0;
bbf45ba5 492
7a58777a
AG
493 if (kvm) {
494 /*
495 * Hooray - we know which VM type we're running on. Depend on
496 * that rather than the guess above.
497 */
498 hv_enabled = is_kvmppc_hv_enabled(kvm);
499 }
500
bbf45ba5 501 switch (ext) {
5ce941ee
SW
502#ifdef CONFIG_BOOKE
503 case KVM_CAP_PPC_BOOKE_SREGS:
f61c94bb 504 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1c810636 505 case KVM_CAP_PPC_EPR:
5ce941ee 506#else
e15a1137 507 case KVM_CAP_PPC_SEGSTATE:
1022fc3d 508 case KVM_CAP_PPC_HIOR:
930b412a 509 case KVM_CAP_PPC_PAPR:
5ce941ee 510#endif
18978768 511 case KVM_CAP_PPC_UNSET_IRQ:
7b4203e8 512 case KVM_CAP_PPC_IRQ_LEVEL:
71fbfd5f 513 case KVM_CAP_ENABLE_CAP:
699a0ea0 514 case KVM_CAP_ENABLE_CAP_VM:
e24ed81f 515 case KVM_CAP_ONE_REG:
0e673fb6 516 case KVM_CAP_IOEVENTFD:
5df554ad 517 case KVM_CAP_DEVICE_CTRL:
460df4c1 518 case KVM_CAP_IMMEDIATE_EXIT:
de56a948
PM
519 r = 1;
520 break;
de56a948 521 case KVM_CAP_PPC_PAIRED_SINGLES:
ad0a048b 522 case KVM_CAP_PPC_OSI:
15711e9c 523 case KVM_CAP_PPC_GET_PVINFO:
bf7ca4bd 524#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc 525 case KVM_CAP_SW_TLB:
eb1e4f43 526#endif
699cc876 527 /* We support this only for PR */
cbbc58d4 528 r = !hv_enabled;
e15a1137 529 break;
699cc876
AK
530#ifdef CONFIG_KVM_MPIC
531 case KVM_CAP_IRQ_MPIC:
532 r = 1;
533 break;
534#endif
535
f31e65e1 536#ifdef CONFIG_PPC_BOOK3S_64
54738c09 537 case KVM_CAP_SPAPR_TCE:
58ded420 538 case KVM_CAP_SPAPR_TCE_64:
121f80ba
AK
539 /* fallthrough */
540 case KVM_CAP_SPAPR_TCE_VFIO:
8e591cb7 541 case KVM_CAP_PPC_RTAS:
f2e91042 542 case KVM_CAP_PPC_FIXUP_HCALL:
699a0ea0 543 case KVM_CAP_PPC_ENABLE_HCALL:
5975a2e0
PM
544#ifdef CONFIG_KVM_XICS
545 case KVM_CAP_IRQ_XICS:
546#endif
54738c09
DG
547 r = 1;
548 break;
a8acaece
DG
549
550 case KVM_CAP_PPC_ALLOC_HTAB:
551 r = hv_enabled;
552 break;
f31e65e1 553#endif /* CONFIG_PPC_BOOK3S_64 */
699cc876 554#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
371fefd6 555 case KVM_CAP_PPC_SMT:
45c940ba 556 r = 0;
3c313524
PM
557 if (kvm)
558 r = kvm->arch.smt_mode;
559 else if (hv_enabled) {
45c940ba
PM
560 if (cpu_has_feature(CPU_FTR_ARCH_300))
561 r = 1;
562 else
563 r = threads_per_subcore;
564 }
371fefd6 565 break;
aa04b4cc 566 case KVM_CAP_PPC_RMA:
c17b98cf 567 r = 0;
aa04b4cc 568 break;
e928e9cb
ME
569 case KVM_CAP_PPC_HWRNG:
570 r = kvmppc_hwrng_present();
571 break;
c9270132 572 case KVM_CAP_PPC_MMU_RADIX:
8cf4ecc0 573 r = !!(hv_enabled && radix_enabled());
c9270132
PM
574 break;
575 case KVM_CAP_PPC_MMU_HASH_V3:
468808bd 576 r = !!(hv_enabled && !radix_enabled() &&
c9270132
PM
577 cpu_has_feature(CPU_FTR_ARCH_300));
578 break;
f4800b1f 579#endif
342d3db7 580 case KVM_CAP_SYNC_MMU:
699cc876 581#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
c17b98cf 582 r = hv_enabled;
f4800b1f
AG
583#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
584 r = 1;
585#else
586 r = 0;
a2932923 587#endif
699cc876
AK
588 break;
589#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
a2932923 590 case KVM_CAP_PPC_HTAB_FD:
cbbc58d4 591 r = hv_enabled;
a2932923 592 break;
de56a948 593#endif
b5434032
ME
594 case KVM_CAP_NR_VCPUS:
595 /*
596 * Recommending a number of CPUs is somewhat arbitrary; we
597 * return the number of present CPUs for -HV (since a host
598 * will have secondary threads "offline"), and for other KVM
599 * implementations just count online CPUs.
600 */
cbbc58d4 601 if (hv_enabled)
699cc876
AK
602 r = num_present_cpus();
603 else
604 r = num_online_cpus();
b5434032 605 break;
bfec5c2c
ND
606 case KVM_CAP_NR_MEMSLOTS:
607 r = KVM_USER_MEM_SLOTS;
608 break;
b5434032
ME
609 case KVM_CAP_MAX_VCPUS:
610 r = KVM_MAX_VCPUS;
611 break;
5b74716e
BH
612#ifdef CONFIG_PPC_BOOK3S_64
613 case KVM_CAP_PPC_GET_SMMU_INFO:
614 r = 1;
615 break;
d3695aa4
AK
616 case KVM_CAP_SPAPR_MULTITCE:
617 r = 1;
618 break;
050f2339 619 case KVM_CAP_SPAPR_RESIZE_HPT:
bcd3bb63
PM
620 /* Disable this on POWER9 until code handles new HPTE format */
621 r = !!hv_enabled && !cpu_has_feature(CPU_FTR_ARCH_300);
050f2339 622 break;
5b74716e 623#endif
23528bb2
SB
624 case KVM_CAP_PPC_HTM:
625 r = cpu_has_feature(CPU_FTR_TM_COMP) &&
626 is_kvmppc_hv_enabled(kvm);
627 break;
bbf45ba5
HB
628 default:
629 r = 0;
630 break;
631 }
632 return r;
633
634}
635
636long kvm_arch_dev_ioctl(struct file *filp,
637 unsigned int ioctl, unsigned long arg)
638{
639 return -EINVAL;
640}
641
5587027c 642void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
db3fe4eb
TY
643 struct kvm_memory_slot *dont)
644{
5587027c 645 kvmppc_core_free_memslot(kvm, free, dont);
db3fe4eb
TY
646}
647
5587027c
AK
648int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
649 unsigned long npages)
db3fe4eb 650{
5587027c 651 return kvmppc_core_create_memslot(kvm, slot, npages);
db3fe4eb
TY
652}
653
f7784b8e 654int kvm_arch_prepare_memory_region(struct kvm *kvm,
462fce46 655 struct kvm_memory_slot *memslot,
09170a49 656 const struct kvm_userspace_memory_region *mem,
7b6195a9 657 enum kvm_mr_change change)
bbf45ba5 658{
a66b48c3 659 return kvmppc_core_prepare_memory_region(kvm, memslot, mem);
bbf45ba5
HB
660}
661
f7784b8e 662void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 663 const struct kvm_userspace_memory_region *mem,
8482644a 664 const struct kvm_memory_slot *old,
f36f3f28 665 const struct kvm_memory_slot *new,
8482644a 666 enum kvm_mr_change change)
f7784b8e 667{
f36f3f28 668 kvmppc_core_commit_memory_region(kvm, mem, old, new);
f7784b8e
MT
669}
670
2df72e9b
MT
671void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
672 struct kvm_memory_slot *slot)
34d4cb8f 673{
dfe49dbd 674 kvmppc_core_flush_memslot(kvm, slot);
34d4cb8f
MT
675}
676
bbf45ba5
HB
677struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
678{
73e75b41
HB
679 struct kvm_vcpu *vcpu;
680 vcpu = kvmppc_core_vcpu_create(kvm, id);
03cdab53
ME
681 if (!IS_ERR(vcpu)) {
682 vcpu->arch.wqp = &vcpu->wq;
06056bfb 683 kvmppc_create_vcpu_debugfs(vcpu, id);
03cdab53 684 }
73e75b41 685 return vcpu;
bbf45ba5
HB
686}
687
31928aa5 688void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
42897d86 689{
42897d86
MT
690}
691
bbf45ba5
HB
692void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
693{
a595405d
AG
694 /* Make sure we're not using the vcpu anymore */
695 hrtimer_cancel(&vcpu->arch.dec_timer);
a595405d 696
73e75b41 697 kvmppc_remove_vcpu_debugfs(vcpu);
eb1e4f43
SW
698
699 switch (vcpu->arch.irq_type) {
700 case KVMPPC_IRQ_MPIC:
701 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);
702 break;
bc5ad3f3 703 case KVMPPC_IRQ_XICS:
5af50993
BH
704 if (xive_enabled())
705 kvmppc_xive_cleanup_vcpu(vcpu);
706 else
707 kvmppc_xics_free_icp(vcpu);
bc5ad3f3 708 break;
eb1e4f43
SW
709 }
710
db93f574 711 kvmppc_core_vcpu_free(vcpu);
bbf45ba5
HB
712}
713
714void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
715{
716 kvm_arch_vcpu_free(vcpu);
717}
718
719int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
720{
9dd921cf 721 return kvmppc_core_pending_dec(vcpu);
bbf45ba5
HB
722}
723
5358a963 724static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
544c6761
AG
725{
726 struct kvm_vcpu *vcpu;
727
728 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
d02d4d15 729 kvmppc_decrementer_func(vcpu);
544c6761
AG
730
731 return HRTIMER_NORESTART;
732}
733
bbf45ba5
HB
734int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
735{
f61c94bb
BB
736 int ret;
737
544c6761 738 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
544c6761 739 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
de56a948 740 vcpu->arch.dec_expires = ~(u64)0;
bbf45ba5 741
09000adb
BB
742#ifdef CONFIG_KVM_EXIT_TIMING
743 mutex_init(&vcpu->arch.exit_timing_lock);
744#endif
f61c94bb
BB
745 ret = kvmppc_subarch_vcpu_init(vcpu);
746 return ret;
bbf45ba5
HB
747}
748
749void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
750{
ecc0981f 751 kvmppc_mmu_destroy(vcpu);
f61c94bb 752 kvmppc_subarch_vcpu_uninit(vcpu);
bbf45ba5
HB
753}
754
755void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
756{
eab17672
SW
757#ifdef CONFIG_BOOKE
758 /*
759 * vrsave (formerly usprg0) isn't used by Linux, but may
760 * be used by the guest.
761 *
762 * On non-booke this is associated with Altivec and
763 * is handled by code in book3s.c.
764 */
765 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
766#endif
9dd921cf 767 kvmppc_core_vcpu_load(vcpu, cpu);
bbf45ba5
HB
768}
769
770void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
771{
9dd921cf 772 kvmppc_core_vcpu_put(vcpu);
eab17672
SW
773#ifdef CONFIG_BOOKE
774 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
775#endif
bbf45ba5
HB
776}
777
9576730d
SW
778/*
779 * irq_bypass_add_producer and irq_bypass_del_producer are only
780 * useful if the architecture supports PCI passthrough.
781 * irq_bypass_stop and irq_bypass_start are not needed and so
782 * kvm_ops are not defined for them.
783 */
784bool kvm_arch_has_irq_bypass(void)
785{
786 return ((kvmppc_hv_ops && kvmppc_hv_ops->irq_bypass_add_producer) ||
787 (kvmppc_pr_ops && kvmppc_pr_ops->irq_bypass_add_producer));
788}
789
790int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
791 struct irq_bypass_producer *prod)
792{
793 struct kvm_kernel_irqfd *irqfd =
794 container_of(cons, struct kvm_kernel_irqfd, consumer);
795 struct kvm *kvm = irqfd->kvm;
796
797 if (kvm->arch.kvm_ops->irq_bypass_add_producer)
798 return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod);
799
800 return 0;
801}
802
803void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
804 struct irq_bypass_producer *prod)
805{
806 struct kvm_kernel_irqfd *irqfd =
807 container_of(cons, struct kvm_kernel_irqfd, consumer);
808 struct kvm *kvm = irqfd->kvm;
809
810 if (kvm->arch.kvm_ops->irq_bypass_del_producer)
811 kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod);
812}
813
6f63e81b
BL
814#ifdef CONFIG_VSX
815static inline int kvmppc_get_vsr_dword_offset(int index)
816{
817 int offset;
818
819 if ((index != 0) && (index != 1))
820 return -1;
821
822#ifdef __BIG_ENDIAN
823 offset = index;
824#else
825 offset = 1 - index;
826#endif
827
828 return offset;
829}
830
831static inline int kvmppc_get_vsr_word_offset(int index)
832{
833 int offset;
834
835 if ((index > 3) || (index < 0))
836 return -1;
837
838#ifdef __BIG_ENDIAN
839 offset = index;
840#else
841 offset = 3 - index;
842#endif
843 return offset;
844}
845
846static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu,
847 u64 gpr)
848{
849 union kvmppc_one_reg val;
850 int offset = kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset);
851 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
852
853 if (offset == -1)
854 return;
855
856 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
857 val.vval = VCPU_VSX_VR(vcpu, index);
858 val.vsxval[offset] = gpr;
859 VCPU_VSX_VR(vcpu, index) = val.vval;
860 } else {
861 VCPU_VSX_FPR(vcpu, index, offset) = gpr;
862 }
863}
864
865static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu,
866 u64 gpr)
867{
868 union kvmppc_one_reg val;
869 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
870
871 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
872 val.vval = VCPU_VSX_VR(vcpu, index);
873 val.vsxval[0] = gpr;
874 val.vsxval[1] = gpr;
875 VCPU_VSX_VR(vcpu, index) = val.vval;
876 } else {
877 VCPU_VSX_FPR(vcpu, index, 0) = gpr;
878 VCPU_VSX_FPR(vcpu, index, 1) = gpr;
879 }
880}
881
882static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu,
883 u32 gpr32)
884{
885 union kvmppc_one_reg val;
886 int offset = kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset);
887 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
888 int dword_offset, word_offset;
889
890 if (offset == -1)
891 return;
892
893 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
894 val.vval = VCPU_VSX_VR(vcpu, index);
895 val.vsx32val[offset] = gpr32;
896 VCPU_VSX_VR(vcpu, index) = val.vval;
897 } else {
898 dword_offset = offset / 2;
899 word_offset = offset % 2;
900 val.vsxval[0] = VCPU_VSX_FPR(vcpu, index, dword_offset);
901 val.vsx32val[word_offset] = gpr32;
902 VCPU_VSX_FPR(vcpu, index, dword_offset) = val.vsxval[0];
903 }
904}
905#endif /* CONFIG_VSX */
906
907#ifdef CONFIG_PPC_FPU
908static inline u64 sp_to_dp(u32 fprs)
909{
910 u64 fprd;
911
912 preempt_disable();
913 enable_kernel_fp();
914 asm ("lfs%U1%X1 0,%1; stfd%U0%X0 0,%0" : "=m" (fprd) : "m" (fprs)
915 : "fr0");
916 preempt_enable();
917 return fprd;
918}
919
920static inline u32 dp_to_sp(u64 fprd)
921{
922 u32 fprs;
923
924 preempt_disable();
925 enable_kernel_fp();
926 asm ("lfd%U1%X1 0,%1; stfs%U0%X0 0,%0" : "=m" (fprs) : "m" (fprd)
927 : "fr0");
928 preempt_enable();
929 return fprs;
930}
931
932#else
933#define sp_to_dp(x) (x)
934#define dp_to_sp(x) (x)
935#endif /* CONFIG_PPC_FPU */
936
bbf45ba5
HB
937static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
938 struct kvm_run *run)
939{
69b61833 940 u64 uninitialized_var(gpr);
bbf45ba5 941
8e5b26b5 942 if (run->mmio.len > sizeof(gpr)) {
bbf45ba5
HB
943 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
944 return;
945 }
946
d078eed3 947 if (!vcpu->arch.mmio_host_swabbed) {
bbf45ba5 948 switch (run->mmio.len) {
b104d066 949 case 8: gpr = *(u64 *)run->mmio.data; break;
8e5b26b5
AG
950 case 4: gpr = *(u32 *)run->mmio.data; break;
951 case 2: gpr = *(u16 *)run->mmio.data; break;
952 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
953 }
954 } else {
bbf45ba5 955 switch (run->mmio.len) {
d078eed3
DG
956 case 8: gpr = swab64(*(u64 *)run->mmio.data); break;
957 case 4: gpr = swab32(*(u32 *)run->mmio.data); break;
958 case 2: gpr = swab16(*(u16 *)run->mmio.data); break;
8e5b26b5 959 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
960 }
961 }
8e5b26b5 962
6f63e81b
BL
963 /* conversion between single and double precision */
964 if ((vcpu->arch.mmio_sp64_extend) && (run->mmio.len == 4))
965 gpr = sp_to_dp(gpr);
966
3587d534
AG
967 if (vcpu->arch.mmio_sign_extend) {
968 switch (run->mmio.len) {
969#ifdef CONFIG_PPC64
970 case 4:
971 gpr = (s64)(s32)gpr;
972 break;
973#endif
974 case 2:
975 gpr = (s64)(s16)gpr;
976 break;
977 case 1:
978 gpr = (s64)(s8)gpr;
979 break;
980 }
981 }
982
b3c5d3c2
AG
983 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
984 case KVM_MMIO_REG_GPR:
b104d066
AG
985 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
986 break;
b3c5d3c2 987 case KVM_MMIO_REG_FPR:
efff1912 988 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b104d066 989 break;
287d5611 990#ifdef CONFIG_PPC_BOOK3S
b3c5d3c2
AG
991 case KVM_MMIO_REG_QPR:
992 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 993 break;
b3c5d3c2 994 case KVM_MMIO_REG_FQPR:
efff1912 995 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b3c5d3c2 996 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 997 break;
6f63e81b
BL
998#endif
999#ifdef CONFIG_VSX
1000 case KVM_MMIO_REG_VSX:
1001 if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_DWORD)
1002 kvmppc_set_vsr_dword(vcpu, gpr);
1003 else if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_WORD)
1004 kvmppc_set_vsr_word(vcpu, gpr);
1005 else if (vcpu->arch.mmio_vsx_copy_type ==
1006 KVMPPC_VSX_COPY_DWORD_LOAD_DUMP)
1007 kvmppc_set_vsr_dword_dump(vcpu, gpr);
1008 break;
287d5611 1009#endif
b104d066
AG
1010 default:
1011 BUG();
1012 }
bbf45ba5
HB
1013}
1014
eb8b0560
PM
1015static int __kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1016 unsigned int rt, unsigned int bytes,
1017 int is_default_endian, int sign_extend)
bbf45ba5 1018{
ed840ee9 1019 int idx, ret;
d078eed3 1020 bool host_swabbed;
73601775 1021
d078eed3 1022 /* Pity C doesn't have a logical XOR operator */
73601775 1023 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 1024 host_swabbed = is_default_endian;
73601775 1025 } else {
d078eed3 1026 host_swabbed = !is_default_endian;
73601775 1027 }
ed840ee9 1028
bbf45ba5
HB
1029 if (bytes > sizeof(run->mmio.data)) {
1030 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
1031 run->mmio.len);
1032 }
1033
1034 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
1035 run->mmio.len = bytes;
1036 run->mmio.is_write = 0;
1037
1038 vcpu->arch.io_gpr = rt;
d078eed3 1039 vcpu->arch.mmio_host_swabbed = host_swabbed;
bbf45ba5
HB
1040 vcpu->mmio_needed = 1;
1041 vcpu->mmio_is_write = 0;
eb8b0560 1042 vcpu->arch.mmio_sign_extend = sign_extend;
bbf45ba5 1043
ed840ee9
SW
1044 idx = srcu_read_lock(&vcpu->kvm->srcu);
1045
e32edf4f 1046 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
1047 bytes, &run->mmio.data);
1048
1049 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1050
1051 if (!ret) {
0e673fb6
AG
1052 kvmppc_complete_mmio_load(vcpu, run);
1053 vcpu->mmio_needed = 0;
1054 return EMULATE_DONE;
1055 }
1056
bbf45ba5
HB
1057 return EMULATE_DO_MMIO;
1058}
eb8b0560
PM
1059
1060int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1061 unsigned int rt, unsigned int bytes,
1062 int is_default_endian)
1063{
1064 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 0);
1065}
2ba9f0d8 1066EXPORT_SYMBOL_GPL(kvmppc_handle_load);
bbf45ba5 1067
3587d534
AG
1068/* Same as above, but sign extends */
1069int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
1070 unsigned int rt, unsigned int bytes,
1071 int is_default_endian)
3587d534 1072{
eb8b0560 1073 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 1);
3587d534
AG
1074}
1075
6f63e81b
BL
1076#ifdef CONFIG_VSX
1077int kvmppc_handle_vsx_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1078 unsigned int rt, unsigned int bytes,
1079 int is_default_endian, int mmio_sign_extend)
1080{
1081 enum emulation_result emulated = EMULATE_DONE;
1082
1083 /* Currently, mmio_vsx_copy_nums only allowed to be less than 4 */
1084 if ( (vcpu->arch.mmio_vsx_copy_nums > 4) ||
1085 (vcpu->arch.mmio_vsx_copy_nums < 0) ) {
1086 return EMULATE_FAIL;
1087 }
1088
1089 while (vcpu->arch.mmio_vsx_copy_nums) {
1090 emulated = __kvmppc_handle_load(run, vcpu, rt, bytes,
1091 is_default_endian, mmio_sign_extend);
1092
1093 if (emulated != EMULATE_DONE)
1094 break;
1095
1096 vcpu->arch.paddr_accessed += run->mmio.len;
1097
1098 vcpu->arch.mmio_vsx_copy_nums--;
1099 vcpu->arch.mmio_vsx_offset++;
1100 }
1101 return emulated;
1102}
1103#endif /* CONFIG_VSX */
1104
bbf45ba5 1105int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775 1106 u64 val, unsigned int bytes, int is_default_endian)
bbf45ba5
HB
1107{
1108 void *data = run->mmio.data;
ed840ee9 1109 int idx, ret;
d078eed3 1110 bool host_swabbed;
73601775 1111
d078eed3 1112 /* Pity C doesn't have a logical XOR operator */
73601775 1113 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 1114 host_swabbed = is_default_endian;
73601775 1115 } else {
d078eed3 1116 host_swabbed = !is_default_endian;
73601775 1117 }
bbf45ba5
HB
1118
1119 if (bytes > sizeof(run->mmio.data)) {
1120 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
1121 run->mmio.len);
1122 }
1123
1124 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
1125 run->mmio.len = bytes;
1126 run->mmio.is_write = 1;
1127 vcpu->mmio_needed = 1;
1128 vcpu->mmio_is_write = 1;
1129
6f63e81b
BL
1130 if ((vcpu->arch.mmio_sp64_extend) && (bytes == 4))
1131 val = dp_to_sp(val);
1132
bbf45ba5 1133 /* Store the value at the lowest bytes in 'data'. */
d078eed3 1134 if (!host_swabbed) {
bbf45ba5 1135 switch (bytes) {
b104d066 1136 case 8: *(u64 *)data = val; break;
bbf45ba5
HB
1137 case 4: *(u32 *)data = val; break;
1138 case 2: *(u16 *)data = val; break;
1139 case 1: *(u8 *)data = val; break;
1140 }
1141 } else {
bbf45ba5 1142 switch (bytes) {
d078eed3
DG
1143 case 8: *(u64 *)data = swab64(val); break;
1144 case 4: *(u32 *)data = swab32(val); break;
1145 case 2: *(u16 *)data = swab16(val); break;
1146 case 1: *(u8 *)data = val; break;
bbf45ba5
HB
1147 }
1148 }
1149
ed840ee9
SW
1150 idx = srcu_read_lock(&vcpu->kvm->srcu);
1151
e32edf4f 1152 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
1153 bytes, &run->mmio.data);
1154
1155 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1156
1157 if (!ret) {
0e673fb6
AG
1158 vcpu->mmio_needed = 0;
1159 return EMULATE_DONE;
1160 }
1161
bbf45ba5
HB
1162 return EMULATE_DO_MMIO;
1163}
2ba9f0d8 1164EXPORT_SYMBOL_GPL(kvmppc_handle_store);
bbf45ba5 1165
6f63e81b
BL
1166#ifdef CONFIG_VSX
1167static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
1168{
1169 u32 dword_offset, word_offset;
1170 union kvmppc_one_reg reg;
1171 int vsx_offset = 0;
1172 int copy_type = vcpu->arch.mmio_vsx_copy_type;
1173 int result = 0;
1174
1175 switch (copy_type) {
1176 case KVMPPC_VSX_COPY_DWORD:
1177 vsx_offset =
1178 kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset);
1179
1180 if (vsx_offset == -1) {
1181 result = -1;
1182 break;
1183 }
1184
1185 if (!vcpu->arch.mmio_vsx_tx_sx_enabled) {
1186 *val = VCPU_VSX_FPR(vcpu, rs, vsx_offset);
1187 } else {
1188 reg.vval = VCPU_VSX_VR(vcpu, rs);
1189 *val = reg.vsxval[vsx_offset];
1190 }
1191 break;
1192
1193 case KVMPPC_VSX_COPY_WORD:
1194 vsx_offset =
1195 kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset);
1196
1197 if (vsx_offset == -1) {
1198 result = -1;
1199 break;
1200 }
1201
1202 if (!vcpu->arch.mmio_vsx_tx_sx_enabled) {
1203 dword_offset = vsx_offset / 2;
1204 word_offset = vsx_offset % 2;
1205 reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset);
1206 *val = reg.vsx32val[word_offset];
1207 } else {
1208 reg.vval = VCPU_VSX_VR(vcpu, rs);
1209 *val = reg.vsx32val[vsx_offset];
1210 }
1211 break;
1212
1213 default:
1214 result = -1;
1215 break;
1216 }
1217
1218 return result;
1219}
1220
1221int kvmppc_handle_vsx_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
1222 int rs, unsigned int bytes, int is_default_endian)
1223{
1224 u64 val;
1225 enum emulation_result emulated = EMULATE_DONE;
1226
1227 vcpu->arch.io_gpr = rs;
1228
1229 /* Currently, mmio_vsx_copy_nums only allowed to be less than 4 */
1230 if ( (vcpu->arch.mmio_vsx_copy_nums > 4) ||
1231 (vcpu->arch.mmio_vsx_copy_nums < 0) ) {
1232 return EMULATE_FAIL;
1233 }
1234
1235 while (vcpu->arch.mmio_vsx_copy_nums) {
1236 if (kvmppc_get_vsr_data(vcpu, rs, &val) == -1)
1237 return EMULATE_FAIL;
1238
1239 emulated = kvmppc_handle_store(run, vcpu,
1240 val, bytes, is_default_endian);
1241
1242 if (emulated != EMULATE_DONE)
1243 break;
1244
1245 vcpu->arch.paddr_accessed += run->mmio.len;
1246
1247 vcpu->arch.mmio_vsx_copy_nums--;
1248 vcpu->arch.mmio_vsx_offset++;
1249 }
1250
1251 return emulated;
1252}
1253
1254static int kvmppc_emulate_mmio_vsx_loadstore(struct kvm_vcpu *vcpu,
1255 struct kvm_run *run)
1256{
1257 enum emulation_result emulated = EMULATE_FAIL;
1258 int r;
1259
1260 vcpu->arch.paddr_accessed += run->mmio.len;
1261
1262 if (!vcpu->mmio_is_write) {
1263 emulated = kvmppc_handle_vsx_load(run, vcpu, vcpu->arch.io_gpr,
1264 run->mmio.len, 1, vcpu->arch.mmio_sign_extend);
1265 } else {
1266 emulated = kvmppc_handle_vsx_store(run, vcpu,
1267 vcpu->arch.io_gpr, run->mmio.len, 1);
1268 }
1269
1270 switch (emulated) {
1271 case EMULATE_DO_MMIO:
1272 run->exit_reason = KVM_EXIT_MMIO;
1273 r = RESUME_HOST;
1274 break;
1275 case EMULATE_FAIL:
1276 pr_info("KVM: MMIO emulation failed (VSX repeat)\n");
1277 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1278 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
1279 r = RESUME_HOST;
1280 break;
1281 default:
1282 r = RESUME_GUEST;
1283 break;
1284 }
1285 return r;
1286}
1287#endif /* CONFIG_VSX */
1288
8a41ea53
MC
1289int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1290{
1291 int r = 0;
1292 union kvmppc_one_reg val;
1293 int size;
1294
1295 size = one_reg_size(reg->id);
1296 if (size > sizeof(val))
1297 return -EINVAL;
1298
1299 r = kvmppc_get_one_reg(vcpu, reg->id, &val);
1300 if (r == -EINVAL) {
1301 r = 0;
1302 switch (reg->id) {
3840edc8
MC
1303#ifdef CONFIG_ALTIVEC
1304 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1305 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1306 r = -ENXIO;
1307 break;
1308 }
b4d7f161 1309 val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
3840edc8
MC
1310 break;
1311 case KVM_REG_PPC_VSCR:
1312 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1313 r = -ENXIO;
1314 break;
1315 }
b4d7f161 1316 val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
3840edc8
MC
1317 break;
1318 case KVM_REG_PPC_VRSAVE:
b4d7f161 1319 val = get_reg_val(reg->id, vcpu->arch.vrsave);
3840edc8
MC
1320 break;
1321#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1322 default:
1323 r = -EINVAL;
1324 break;
1325 }
1326 }
1327
1328 if (r)
1329 return r;
1330
1331 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1332 r = -EFAULT;
1333
1334 return r;
1335}
1336
1337int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1338{
1339 int r;
1340 union kvmppc_one_reg val;
1341 int size;
1342
1343 size = one_reg_size(reg->id);
1344 if (size > sizeof(val))
1345 return -EINVAL;
1346
1347 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1348 return -EFAULT;
1349
1350 r = kvmppc_set_one_reg(vcpu, reg->id, &val);
1351 if (r == -EINVAL) {
1352 r = 0;
1353 switch (reg->id) {
3840edc8
MC
1354#ifdef CONFIG_ALTIVEC
1355 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1356 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1357 r = -ENXIO;
1358 break;
1359 }
b4d7f161 1360 vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
3840edc8
MC
1361 break;
1362 case KVM_REG_PPC_VSCR:
1363 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1364 r = -ENXIO;
1365 break;
1366 }
b4d7f161 1367 vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
3840edc8
MC
1368 break;
1369 case KVM_REG_PPC_VRSAVE:
b4d7f161
GK
1370 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1371 r = -ENXIO;
1372 break;
1373 }
1374 vcpu->arch.vrsave = set_reg_val(reg->id, val);
3840edc8
MC
1375 break;
1376#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1377 default:
1378 r = -EINVAL;
1379 break;
1380 }
1381 }
1382
1383 return r;
1384}
1385
bbf45ba5
HB
1386int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
1387{
1388 int r;
1389 sigset_t sigsaved;
1390
bbf45ba5 1391 if (vcpu->mmio_needed) {
6f63e81b 1392 vcpu->mmio_needed = 0;
bbf45ba5
HB
1393 if (!vcpu->mmio_is_write)
1394 kvmppc_complete_mmio_load(vcpu, run);
6f63e81b
BL
1395#ifdef CONFIG_VSX
1396 if (vcpu->arch.mmio_vsx_copy_nums > 0) {
1397 vcpu->arch.mmio_vsx_copy_nums--;
1398 vcpu->arch.mmio_vsx_offset++;
1399 }
1400
1401 if (vcpu->arch.mmio_vsx_copy_nums > 0) {
1402 r = kvmppc_emulate_mmio_vsx_loadstore(vcpu, run);
1403 if (r == RESUME_HOST) {
1404 vcpu->mmio_needed = 1;
1405 return r;
1406 }
1407 }
1408#endif
ad0a048b
AG
1409 } else if (vcpu->arch.osi_needed) {
1410 u64 *gprs = run->osi.gprs;
1411 int i;
1412
1413 for (i = 0; i < 32; i++)
1414 kvmppc_set_gpr(vcpu, i, gprs[i]);
1415 vcpu->arch.osi_needed = 0;
de56a948
PM
1416 } else if (vcpu->arch.hcall_needed) {
1417 int i;
1418
1419 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
1420 for (i = 0; i < 9; ++i)
1421 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
1422 vcpu->arch.hcall_needed = 0;
1c810636
AG
1423#ifdef CONFIG_BOOKE
1424 } else if (vcpu->arch.epr_needed) {
1425 kvmppc_set_epr(vcpu, run->epr.epr);
1426 vcpu->arch.epr_needed = 0;
1427#endif
bbf45ba5
HB
1428 }
1429
6f63e81b
BL
1430 if (vcpu->sigset_active)
1431 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
1432
460df4c1
PB
1433 if (run->immediate_exit)
1434 r = -EINTR;
1435 else
1436 r = kvmppc_vcpu_run(run, vcpu);
bbf45ba5
HB
1437
1438 if (vcpu->sigset_active)
1439 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
1440
1441 return r;
1442}
1443
1444int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
1445{
19ccb76a 1446 if (irq->irq == KVM_INTERRUPT_UNSET) {
4fe27d2a 1447 kvmppc_core_dequeue_external(vcpu);
19ccb76a
PM
1448 return 0;
1449 }
1450
1451 kvmppc_core_queue_external(vcpu, irq);
b6d33834 1452
dfd4d47e 1453 kvm_vcpu_kick(vcpu);
45c5eb67 1454
bbf45ba5
HB
1455 return 0;
1456}
1457
71fbfd5f
AG
1458static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
1459 struct kvm_enable_cap *cap)
1460{
1461 int r;
1462
1463 if (cap->flags)
1464 return -EINVAL;
1465
1466 switch (cap->cap) {
ad0a048b
AG
1467 case KVM_CAP_PPC_OSI:
1468 r = 0;
1469 vcpu->arch.osi_enabled = true;
1470 break;
930b412a
AG
1471 case KVM_CAP_PPC_PAPR:
1472 r = 0;
1473 vcpu->arch.papr_enabled = true;
1474 break;
1c810636
AG
1475 case KVM_CAP_PPC_EPR:
1476 r = 0;
5df554ad
SW
1477 if (cap->args[0])
1478 vcpu->arch.epr_flags |= KVMPPC_EPR_USER;
1479 else
1480 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER;
1c810636 1481 break;
f61c94bb
BB
1482#ifdef CONFIG_BOOKE
1483 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1484 r = 0;
1485 vcpu->arch.watchdog_enabled = true;
1486 break;
1487#endif
bf7ca4bd 1488#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1489 case KVM_CAP_SW_TLB: {
1490 struct kvm_config_tlb cfg;
1491 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
1492
1493 r = -EFAULT;
1494 if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
1495 break;
1496
1497 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
1498 break;
eb1e4f43
SW
1499 }
1500#endif
1501#ifdef CONFIG_KVM_MPIC
1502 case KVM_CAP_IRQ_MPIC: {
70abaded 1503 struct fd f;
eb1e4f43
SW
1504 struct kvm_device *dev;
1505
1506 r = -EBADF;
70abaded
AV
1507 f = fdget(cap->args[0]);
1508 if (!f.file)
eb1e4f43
SW
1509 break;
1510
1511 r = -EPERM;
70abaded 1512 dev = kvm_device_from_filp(f.file);
eb1e4f43
SW
1513 if (dev)
1514 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]);
1515
70abaded 1516 fdput(f);
eb1e4f43 1517 break;
dc83b8bc
SW
1518 }
1519#endif
5975a2e0
PM
1520#ifdef CONFIG_KVM_XICS
1521 case KVM_CAP_IRQ_XICS: {
70abaded 1522 struct fd f;
5975a2e0
PM
1523 struct kvm_device *dev;
1524
1525 r = -EBADF;
70abaded
AV
1526 f = fdget(cap->args[0]);
1527 if (!f.file)
5975a2e0
PM
1528 break;
1529
1530 r = -EPERM;
70abaded 1531 dev = kvm_device_from_filp(f.file);
5af50993
BH
1532 if (dev) {
1533 if (xive_enabled())
1534 r = kvmppc_xive_connect_vcpu(dev, vcpu, cap->args[1]);
1535 else
1536 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]);
1537 }
5975a2e0 1538
70abaded 1539 fdput(f);
5975a2e0
PM
1540 break;
1541 }
1542#endif /* CONFIG_KVM_XICS */
71fbfd5f
AG
1543 default:
1544 r = -EINVAL;
1545 break;
1546 }
1547
af8f38b3
AG
1548 if (!r)
1549 r = kvmppc_sanity_check(vcpu);
1550
71fbfd5f
AG
1551 return r;
1552}
1553
34a75b0f
PM
1554bool kvm_arch_intc_initialized(struct kvm *kvm)
1555{
1556#ifdef CONFIG_KVM_MPIC
1557 if (kvm->arch.mpic)
1558 return true;
1559#endif
1560#ifdef CONFIG_KVM_XICS
5af50993 1561 if (kvm->arch.xics || kvm->arch.xive)
34a75b0f
PM
1562 return true;
1563#endif
1564 return false;
1565}
1566
bbf45ba5
HB
1567int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
1568 struct kvm_mp_state *mp_state)
1569{
1570 return -EINVAL;
1571}
1572
1573int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
1574 struct kvm_mp_state *mp_state)
1575{
1576 return -EINVAL;
1577}
1578
1579long kvm_arch_vcpu_ioctl(struct file *filp,
1580 unsigned int ioctl, unsigned long arg)
1581{
1582 struct kvm_vcpu *vcpu = filp->private_data;
1583 void __user *argp = (void __user *)arg;
1584 long r;
1585
93736624
AK
1586 switch (ioctl) {
1587 case KVM_INTERRUPT: {
bbf45ba5
HB
1588 struct kvm_interrupt irq;
1589 r = -EFAULT;
1590 if (copy_from_user(&irq, argp, sizeof(irq)))
93736624 1591 goto out;
bbf45ba5 1592 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
93736624 1593 goto out;
bbf45ba5 1594 }
19483d14 1595
71fbfd5f
AG
1596 case KVM_ENABLE_CAP:
1597 {
1598 struct kvm_enable_cap cap;
1599 r = -EFAULT;
1600 if (copy_from_user(&cap, argp, sizeof(cap)))
1601 goto out;
1602 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
1603 break;
1604 }
dc83b8bc 1605
e24ed81f
AG
1606 case KVM_SET_ONE_REG:
1607 case KVM_GET_ONE_REG:
1608 {
1609 struct kvm_one_reg reg;
1610 r = -EFAULT;
1611 if (copy_from_user(&reg, argp, sizeof(reg)))
1612 goto out;
1613 if (ioctl == KVM_SET_ONE_REG)
1614 r = kvm_vcpu_ioctl_set_one_reg(vcpu, &reg);
1615 else
1616 r = kvm_vcpu_ioctl_get_one_reg(vcpu, &reg);
1617 break;
1618 }
1619
bf7ca4bd 1620#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1621 case KVM_DIRTY_TLB: {
1622 struct kvm_dirty_tlb dirty;
1623 r = -EFAULT;
1624 if (copy_from_user(&dirty, argp, sizeof(dirty)))
1625 goto out;
1626 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
1627 break;
1628 }
1629#endif
bbf45ba5
HB
1630 default:
1631 r = -EINVAL;
1632 }
1633
1634out:
1635 return r;
1636}
1637
5b1c1493
CO
1638int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
1639{
1640 return VM_FAULT_SIGBUS;
1641}
1642
15711e9c
AG
1643static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
1644{
784bafac
SY
1645 u32 inst_nop = 0x60000000;
1646#ifdef CONFIG_KVM_BOOKE_HV
1647 u32 inst_sc1 = 0x44000022;
2743103f
AG
1648 pvinfo->hcall[0] = cpu_to_be32(inst_sc1);
1649 pvinfo->hcall[1] = cpu_to_be32(inst_nop);
1650 pvinfo->hcall[2] = cpu_to_be32(inst_nop);
1651 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1652#else
15711e9c
AG
1653 u32 inst_lis = 0x3c000000;
1654 u32 inst_ori = 0x60000000;
15711e9c
AG
1655 u32 inst_sc = 0x44000002;
1656 u32 inst_imm_mask = 0xffff;
1657
1658 /*
1659 * The hypercall to get into KVM from within guest context is as
1660 * follows:
1661 *
1662 * lis r0, r0, KVM_SC_MAGIC_R0@h
1663 * ori r0, KVM_SC_MAGIC_R0@l
1664 * sc
1665 * nop
1666 */
2743103f
AG
1667 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask));
1668 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask));
1669 pvinfo->hcall[2] = cpu_to_be32(inst_sc);
1670 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1671#endif
15711e9c 1672
9202e076
LYB
1673 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE;
1674
15711e9c
AG
1675 return 0;
1676}
1677
5efdb4be
AG
1678int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
1679 bool line_status)
1680{
1681 if (!irqchip_in_kernel(kvm))
1682 return -ENXIO;
1683
1684 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1685 irq_event->irq, irq_event->level,
1686 line_status);
1687 return 0;
1688}
1689
699a0ea0
PM
1690
1691static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
1692 struct kvm_enable_cap *cap)
1693{
1694 int r;
1695
1696 if (cap->flags)
1697 return -EINVAL;
1698
1699 switch (cap->cap) {
1700#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1701 case KVM_CAP_PPC_ENABLE_HCALL: {
1702 unsigned long hcall = cap->args[0];
1703
1704 r = -EINVAL;
1705 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) ||
1706 cap->args[1] > 1)
1707 break;
ae2113a4
PM
1708 if (!kvmppc_book3s_hcall_implemented(kvm, hcall))
1709 break;
699a0ea0
PM
1710 if (cap->args[1])
1711 set_bit(hcall / 4, kvm->arch.enabled_hcalls);
1712 else
1713 clear_bit(hcall / 4, kvm->arch.enabled_hcalls);
1714 r = 0;
1715 break;
1716 }
3c313524
PM
1717 case KVM_CAP_PPC_SMT: {
1718 unsigned long mode = cap->args[0];
1719 unsigned long flags = cap->args[1];
1720
1721 r = -EINVAL;
1722 if (kvm->arch.kvm_ops->set_smt_mode)
1723 r = kvm->arch.kvm_ops->set_smt_mode(kvm, mode, flags);
1724 break;
1725 }
699a0ea0
PM
1726#endif
1727 default:
1728 r = -EINVAL;
1729 break;
1730 }
1731
1732 return r;
1733}
1734
bbf45ba5
HB
1735long kvm_arch_vm_ioctl(struct file *filp,
1736 unsigned int ioctl, unsigned long arg)
1737{
5df554ad 1738 struct kvm *kvm __maybe_unused = filp->private_data;
15711e9c 1739 void __user *argp = (void __user *)arg;
bbf45ba5
HB
1740 long r;
1741
1742 switch (ioctl) {
15711e9c
AG
1743 case KVM_PPC_GET_PVINFO: {
1744 struct kvm_ppc_pvinfo pvinfo;
d8cdddcd 1745 memset(&pvinfo, 0, sizeof(pvinfo));
15711e9c
AG
1746 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
1747 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
1748 r = -EFAULT;
1749 goto out;
1750 }
1751
1752 break;
1753 }
699a0ea0
PM
1754 case KVM_ENABLE_CAP:
1755 {
1756 struct kvm_enable_cap cap;
1757 r = -EFAULT;
1758 if (copy_from_user(&cap, argp, sizeof(cap)))
1759 goto out;
1760 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
1761 break;
1762 }
76d837a4 1763#ifdef CONFIG_SPAPR_TCE_IOMMU
58ded420
AK
1764 case KVM_CREATE_SPAPR_TCE_64: {
1765 struct kvm_create_spapr_tce_64 create_tce_64;
1766
1767 r = -EFAULT;
1768 if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64)))
1769 goto out;
1770 if (create_tce_64.flags) {
1771 r = -EINVAL;
1772 goto out;
1773 }
1774 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
1775 goto out;
1776 }
54738c09
DG
1777 case KVM_CREATE_SPAPR_TCE: {
1778 struct kvm_create_spapr_tce create_tce;
58ded420 1779 struct kvm_create_spapr_tce_64 create_tce_64;
54738c09
DG
1780
1781 r = -EFAULT;
1782 if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
1783 goto out;
58ded420
AK
1784
1785 create_tce_64.liobn = create_tce.liobn;
1786 create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K;
1787 create_tce_64.offset = 0;
1788 create_tce_64.size = create_tce.window_size >>
1789 IOMMU_PAGE_SHIFT_4K;
1790 create_tce_64.flags = 0;
1791 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
54738c09
DG
1792 goto out;
1793 }
76d837a4
PM
1794#endif
1795#ifdef CONFIG_PPC_BOOK3S_64
5b74716e 1796 case KVM_PPC_GET_SMMU_INFO: {
5b74716e 1797 struct kvm_ppc_smmu_info info;
cbbc58d4 1798 struct kvm *kvm = filp->private_data;
5b74716e
BH
1799
1800 memset(&info, 0, sizeof(info));
cbbc58d4 1801 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info);
5b74716e
BH
1802 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1803 r = -EFAULT;
1804 break;
1805 }
8e591cb7
ME
1806 case KVM_PPC_RTAS_DEFINE_TOKEN: {
1807 struct kvm *kvm = filp->private_data;
1808
1809 r = kvm_vm_ioctl_rtas_define_token(kvm, argp);
1810 break;
1811 }
c9270132
PM
1812 case KVM_PPC_CONFIGURE_V3_MMU: {
1813 struct kvm *kvm = filp->private_data;
1814 struct kvm_ppc_mmuv3_cfg cfg;
1815
1816 r = -EINVAL;
1817 if (!kvm->arch.kvm_ops->configure_mmu)
1818 goto out;
1819 r = -EFAULT;
1820 if (copy_from_user(&cfg, argp, sizeof(cfg)))
1821 goto out;
1822 r = kvm->arch.kvm_ops->configure_mmu(kvm, &cfg);
1823 break;
1824 }
1825 case KVM_PPC_GET_RMMU_INFO: {
1826 struct kvm *kvm = filp->private_data;
1827 struct kvm_ppc_rmmu_info info;
1828
1829 r = -EINVAL;
1830 if (!kvm->arch.kvm_ops->get_rmmu_info)
1831 goto out;
1832 r = kvm->arch.kvm_ops->get_rmmu_info(kvm, &info);
1833 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1834 r = -EFAULT;
1835 break;
1836 }
cbbc58d4
AK
1837 default: {
1838 struct kvm *kvm = filp->private_data;
1839 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg);
1840 }
3a167bea 1841#else /* CONFIG_PPC_BOOK3S_64 */
bbf45ba5 1842 default:
367e1319 1843 r = -ENOTTY;
3a167bea 1844#endif
bbf45ba5 1845 }
15711e9c 1846out:
bbf45ba5
HB
1847 return r;
1848}
1849
043cc4d7
SW
1850static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
1851static unsigned long nr_lpids;
1852
1853long kvmppc_alloc_lpid(void)
1854{
1855 long lpid;
1856
1857 do {
1858 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
1859 if (lpid >= nr_lpids) {
1860 pr_err("%s: No LPIDs free\n", __func__);
1861 return -ENOMEM;
1862 }
1863 } while (test_and_set_bit(lpid, lpid_inuse));
1864
1865 return lpid;
1866}
2ba9f0d8 1867EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid);
043cc4d7
SW
1868
1869void kvmppc_claim_lpid(long lpid)
1870{
1871 set_bit(lpid, lpid_inuse);
1872}
2ba9f0d8 1873EXPORT_SYMBOL_GPL(kvmppc_claim_lpid);
043cc4d7
SW
1874
1875void kvmppc_free_lpid(long lpid)
1876{
1877 clear_bit(lpid, lpid_inuse);
1878}
2ba9f0d8 1879EXPORT_SYMBOL_GPL(kvmppc_free_lpid);
043cc4d7
SW
1880
1881void kvmppc_init_lpid(unsigned long nr_lpids_param)
1882{
1883 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
1884 memset(lpid_inuse, 0, sizeof(lpid_inuse));
1885}
2ba9f0d8 1886EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
043cc4d7 1887
bbf45ba5
HB
1888int kvm_arch_init(void *opaque)
1889{
1890 return 0;
1891}
1892
478d6686 1893EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr);