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KVM: PPC: Book3S HV: Native usage of the XIVE interrupt controller
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / kvm / powerpc.c
CommitLineData
bbf45ba5
HB
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19 */
20
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/kvm_host.h>
bbf45ba5 24#include <linux/vmalloc.h>
544c6761 25#include <linux/hrtimer.h>
174cd4b1 26#include <linux/sched/signal.h>
bbf45ba5 27#include <linux/fs.h>
5a0e3ad6 28#include <linux/slab.h>
eb1e4f43 29#include <linux/file.h>
cbbc58d4 30#include <linux/module.h>
9576730d
SW
31#include <linux/irqbypass.h>
32#include <linux/kvm_irqfd.h>
bbf45ba5 33#include <asm/cputable.h>
7c0f6ba6 34#include <linux/uaccess.h>
bbf45ba5 35#include <asm/kvm_ppc.h>
83aae4a8 36#include <asm/tlbflush.h>
371fefd6 37#include <asm/cputhreads.h>
bd2be683 38#include <asm/irqflags.h>
58ded420 39#include <asm/iommu.h>
5af50993
BH
40#include <asm/xive.h>
41
73e75b41 42#include "timing.h"
5efdb4be 43#include "irq.h"
fad7b9b5 44#include "../mm/mmu_decl.h"
bbf45ba5 45
46f43c6e
MT
46#define CREATE_TRACE_POINTS
47#include "trace.h"
48
cbbc58d4
AK
49struct kvmppc_ops *kvmppc_hv_ops;
50EXPORT_SYMBOL_GPL(kvmppc_hv_ops);
51struct kvmppc_ops *kvmppc_pr_ops;
52EXPORT_SYMBOL_GPL(kvmppc_pr_ops);
53
3a167bea 54
bbf45ba5
HB
55int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
56{
9202e076 57 return !!(v->arch.pending_exceptions) ||
dfd4d47e 58 v->requests;
bbf45ba5
HB
59}
60
b6d33834
CD
61int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
62{
63 return 1;
64}
65
03d25c5b
AG
66/*
67 * Common checks before entering the guest world. Call with interrupts
68 * disabled.
69 *
7ee78855
AG
70 * returns:
71 *
72 * == 1 if we're ready to go into guest state
73 * <= 0 if we need to go back to the host with return value
03d25c5b
AG
74 */
75int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
76{
6c85f52b
SW
77 int r;
78
79 WARN_ON(irqs_disabled());
80 hard_irq_disable();
03d25c5b 81
03d25c5b
AG
82 while (true) {
83 if (need_resched()) {
84 local_irq_enable();
85 cond_resched();
6c85f52b 86 hard_irq_disable();
03d25c5b
AG
87 continue;
88 }
89
90 if (signal_pending(current)) {
7ee78855
AG
91 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
92 vcpu->run->exit_reason = KVM_EXIT_INTR;
93 r = -EINTR;
03d25c5b
AG
94 break;
95 }
96
5bd1cf11
SW
97 vcpu->mode = IN_GUEST_MODE;
98
99 /*
100 * Reading vcpu->requests must happen after setting vcpu->mode,
101 * so we don't miss a request because the requester sees
102 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests
103 * before next entering the guest (and thus doesn't IPI).
489153c7
LT
104 * This also orders the write to mode from any reads
105 * to the page tables done while the VCPU is running.
106 * Please see the comment in kvm_flush_remote_tlbs.
5bd1cf11 107 */
03d25c5b 108 smp_mb();
5bd1cf11 109
03d25c5b
AG
110 if (vcpu->requests) {
111 /* Make sure we process requests preemptable */
112 local_irq_enable();
113 trace_kvm_check_requests(vcpu);
7c973a2e 114 r = kvmppc_core_check_requests(vcpu);
6c85f52b 115 hard_irq_disable();
7c973a2e
AG
116 if (r > 0)
117 continue;
118 break;
03d25c5b
AG
119 }
120
121 if (kvmppc_core_prepare_to_enter(vcpu)) {
122 /* interrupts got enabled in between, so we
123 are back at square 1 */
124 continue;
125 }
126
6edaa530 127 guest_enter_irqoff();
6c85f52b 128 return 1;
03d25c5b
AG
129 }
130
6c85f52b
SW
131 /* return to host */
132 local_irq_enable();
03d25c5b
AG
133 return r;
134}
2ba9f0d8 135EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter);
03d25c5b 136
5deb8e7a
AG
137#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
138static void kvmppc_swab_shared(struct kvm_vcpu *vcpu)
139{
140 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
141 int i;
142
143 shared->sprg0 = swab64(shared->sprg0);
144 shared->sprg1 = swab64(shared->sprg1);
145 shared->sprg2 = swab64(shared->sprg2);
146 shared->sprg3 = swab64(shared->sprg3);
147 shared->srr0 = swab64(shared->srr0);
148 shared->srr1 = swab64(shared->srr1);
149 shared->dar = swab64(shared->dar);
150 shared->msr = swab64(shared->msr);
151 shared->dsisr = swab32(shared->dsisr);
152 shared->int_pending = swab32(shared->int_pending);
153 for (i = 0; i < ARRAY_SIZE(shared->sr); i++)
154 shared->sr[i] = swab32(shared->sr[i]);
155}
156#endif
157
2a342ed5
AG
158int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
159{
160 int nr = kvmppc_get_gpr(vcpu, 11);
161 int r;
162 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
163 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
164 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
165 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
166 unsigned long r2 = 0;
167
5deb8e7a 168 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
2a342ed5
AG
169 /* 32 bit mode */
170 param1 &= 0xffffffff;
171 param2 &= 0xffffffff;
172 param3 &= 0xffffffff;
173 param4 &= 0xffffffff;
174 }
175
176 switch (nr) {
fdcf8bd7 177 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE):
5fc87407 178 {
5deb8e7a
AG
179#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
180 /* Book3S can be little endian, find it out here */
181 int shared_big_endian = true;
182 if (vcpu->arch.intr_msr & MSR_LE)
183 shared_big_endian = false;
184 if (shared_big_endian != vcpu->arch.shared_big_endian)
185 kvmppc_swab_shared(vcpu);
186 vcpu->arch.shared_big_endian = shared_big_endian;
187#endif
188
f3383cf8
AG
189 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) {
190 /*
191 * Older versions of the Linux magic page code had
192 * a bug where they would map their trampoline code
193 * NX. If that's the case, remove !PR NX capability.
194 */
195 vcpu->arch.disable_kernel_nx = true;
196 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
197 }
198
199 vcpu->arch.magic_page_pa = param1 & ~0xfffULL;
200 vcpu->arch.magic_page_ea = param2 & ~0xfffULL;
5fc87407 201
89b68c96
AG
202#ifdef CONFIG_PPC_64K_PAGES
203 /*
204 * Make sure our 4k magic page is in the same window of a 64k
205 * page within the guest and within the host's page.
206 */
207 if ((vcpu->arch.magic_page_pa & 0xf000) !=
208 ((ulong)vcpu->arch.shared & 0xf000)) {
209 void *old_shared = vcpu->arch.shared;
210 ulong shared = (ulong)vcpu->arch.shared;
211 void *new_shared;
212
213 shared &= PAGE_MASK;
214 shared |= vcpu->arch.magic_page_pa & 0xf000;
215 new_shared = (void*)shared;
216 memcpy(new_shared, old_shared, 0x1000);
217 vcpu->arch.shared = new_shared;
218 }
219#endif
220
b5904972 221 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
7508e16c 222
fdcf8bd7 223 r = EV_SUCCESS;
5fc87407
AG
224 break;
225 }
fdcf8bd7
SY
226 case KVM_HCALL_TOKEN(KVM_HC_FEATURES):
227 r = EV_SUCCESS;
bf7ca4bd 228#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
5fc87407
AG
229 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
230#endif
2a342ed5
AG
231
232 /* Second return value is in r4 */
2a342ed5 233 break;
9202e076
LYB
234 case EV_HCALL_TOKEN(EV_IDLE):
235 r = EV_SUCCESS;
236 kvm_vcpu_block(vcpu);
237 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
238 break;
2a342ed5 239 default:
fdcf8bd7 240 r = EV_UNIMPLEMENTED;
2a342ed5
AG
241 break;
242 }
243
7508e16c
AG
244 kvmppc_set_gpr(vcpu, 4, r2);
245
2a342ed5
AG
246 return r;
247}
2ba9f0d8 248EXPORT_SYMBOL_GPL(kvmppc_kvm_pv);
bbf45ba5 249
af8f38b3
AG
250int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
251{
252 int r = false;
253
254 /* We have to know what CPU to virtualize */
255 if (!vcpu->arch.pvr)
256 goto out;
257
258 /* PAPR only works with book3s_64 */
259 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
260 goto out;
261
af8f38b3 262 /* HV KVM can only do PAPR mode for now */
a78b55d1 263 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm))
af8f38b3 264 goto out;
af8f38b3 265
d30f6e48
SW
266#ifdef CONFIG_KVM_BOOKE_HV
267 if (!cpu_has_feature(CPU_FTR_EMB_HV))
268 goto out;
269#endif
270
af8f38b3
AG
271 r = true;
272
273out:
274 vcpu->arch.sane = r;
275 return r ? 0 : -EINVAL;
276}
2ba9f0d8 277EXPORT_SYMBOL_GPL(kvmppc_sanity_check);
af8f38b3 278
bbf45ba5
HB
279int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
280{
281 enum emulation_result er;
282 int r;
283
d69614a2 284 er = kvmppc_emulate_loadstore(vcpu);
bbf45ba5
HB
285 switch (er) {
286 case EMULATE_DONE:
287 /* Future optimization: only reload non-volatiles if they were
288 * actually modified. */
289 r = RESUME_GUEST_NV;
290 break;
51f04726
MC
291 case EMULATE_AGAIN:
292 r = RESUME_GUEST;
293 break;
bbf45ba5
HB
294 case EMULATE_DO_MMIO:
295 run->exit_reason = KVM_EXIT_MMIO;
296 /* We must reload nonvolatiles because "update" load/store
297 * instructions modify register state. */
298 /* Future optimization: only reload non-volatiles if they were
299 * actually modified. */
300 r = RESUME_HOST_NV;
301 break;
302 case EMULATE_FAIL:
51f04726
MC
303 {
304 u32 last_inst;
305
8d0eff63 306 kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
bbf45ba5 307 /* XXX Deliver Program interrupt to guest. */
51f04726 308 pr_emerg("%s: emulation failed (%08x)\n", __func__, last_inst);
bbf45ba5
HB
309 r = RESUME_HOST;
310 break;
51f04726 311 }
bbf45ba5 312 default:
5a33169e
AG
313 WARN_ON(1);
314 r = RESUME_GUEST;
bbf45ba5
HB
315 }
316
317 return r;
318}
2ba9f0d8 319EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio);
bbf45ba5 320
35c4a733
AG
321int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
322 bool data)
323{
c12fb43c 324 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733
AG
325 struct kvmppc_pte pte;
326 int r;
327
328 vcpu->stat.st++;
329
330 r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
331 XLATE_WRITE, &pte);
332 if (r < 0)
333 return r;
334
335 *eaddr = pte.raddr;
336
337 if (!pte.may_write)
338 return -EPERM;
339
c12fb43c
AG
340 /* Magic page override */
341 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
342 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
343 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
344 void *magic = vcpu->arch.shared;
345 magic += pte.eaddr & 0xfff;
346 memcpy(magic, ptr, size);
347 return EMULATE_DONE;
348 }
349
35c4a733
AG
350 if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size))
351 return EMULATE_DO_MMIO;
352
353 return EMULATE_DONE;
354}
355EXPORT_SYMBOL_GPL(kvmppc_st);
356
357int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
358 bool data)
359{
c12fb43c 360 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733 361 struct kvmppc_pte pte;
35c4a733
AG
362 int rc;
363
364 vcpu->stat.ld++;
365
366 rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
367 XLATE_READ, &pte);
368 if (rc)
369 return rc;
370
371 *eaddr = pte.raddr;
372
373 if (!pte.may_read)
374 return -EPERM;
375
376 if (!data && !pte.may_execute)
377 return -ENOEXEC;
378
c12fb43c
AG
379 /* Magic page override */
380 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
381 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
382 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
383 void *magic = vcpu->arch.shared;
384 magic += pte.eaddr & 0xfff;
385 memcpy(ptr, magic, size);
386 return EMULATE_DONE;
387 }
388
c45c5514
AG
389 if (kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size))
390 return EMULATE_DO_MMIO;
35c4a733
AG
391
392 return EMULATE_DONE;
35c4a733
AG
393}
394EXPORT_SYMBOL_GPL(kvmppc_ld);
395
13a34e06 396int kvm_arch_hardware_enable(void)
bbf45ba5 397{
10474ae8 398 return 0;
bbf45ba5
HB
399}
400
bbf45ba5
HB
401int kvm_arch_hardware_setup(void)
402{
403 return 0;
404}
405
bbf45ba5
HB
406void kvm_arch_check_processor_compat(void *rtn)
407{
9dd921cf 408 *(int *)rtn = kvmppc_core_check_processor_compat();
bbf45ba5
HB
409}
410
e08b9637 411int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
bbf45ba5 412{
cbbc58d4
AK
413 struct kvmppc_ops *kvm_ops = NULL;
414 /*
415 * if we have both HV and PR enabled, default is HV
416 */
417 if (type == 0) {
418 if (kvmppc_hv_ops)
419 kvm_ops = kvmppc_hv_ops;
420 else
421 kvm_ops = kvmppc_pr_ops;
422 if (!kvm_ops)
423 goto err_out;
424 } else if (type == KVM_VM_PPC_HV) {
425 if (!kvmppc_hv_ops)
426 goto err_out;
427 kvm_ops = kvmppc_hv_ops;
428 } else if (type == KVM_VM_PPC_PR) {
429 if (!kvmppc_pr_ops)
430 goto err_out;
431 kvm_ops = kvmppc_pr_ops;
432 } else
433 goto err_out;
434
435 if (kvm_ops->owner && !try_module_get(kvm_ops->owner))
436 return -ENOENT;
437
438 kvm->arch.kvm_ops = kvm_ops;
f9e0554d 439 return kvmppc_core_init_vm(kvm);
cbbc58d4
AK
440err_out:
441 return -EINVAL;
bbf45ba5
HB
442}
443
235539b4
LC
444bool kvm_arch_has_vcpu_debugfs(void)
445{
446 return false;
447}
448
449int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
450{
451 return 0;
452}
453
d89f5eff 454void kvm_arch_destroy_vm(struct kvm *kvm)
bbf45ba5
HB
455{
456 unsigned int i;
988a2cae 457 struct kvm_vcpu *vcpu;
bbf45ba5 458
e17769eb
SW
459#ifdef CONFIG_KVM_XICS
460 /*
461 * We call kick_all_cpus_sync() to ensure that all
462 * CPUs have executed any pending IPIs before we
463 * continue and free VCPUs structures below.
464 */
465 if (is_kvmppc_hv_enabled(kvm))
466 kick_all_cpus_sync();
467#endif
468
988a2cae
GN
469 kvm_for_each_vcpu(i, vcpu, kvm)
470 kvm_arch_vcpu_free(vcpu);
471
472 mutex_lock(&kvm->lock);
473 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
474 kvm->vcpus[i] = NULL;
475
476 atomic_set(&kvm->online_vcpus, 0);
f9e0554d
PM
477
478 kvmppc_core_destroy_vm(kvm);
479
988a2cae 480 mutex_unlock(&kvm->lock);
cbbc58d4
AK
481
482 /* drop the module reference */
483 module_put(kvm->arch.kvm_ops->owner);
bbf45ba5
HB
484}
485
784aa3d7 486int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
bbf45ba5
HB
487{
488 int r;
7a58777a 489 /* Assume we're using HV mode when the HV module is loaded */
cbbc58d4 490 int hv_enabled = kvmppc_hv_ops ? 1 : 0;
bbf45ba5 491
7a58777a
AG
492 if (kvm) {
493 /*
494 * Hooray - we know which VM type we're running on. Depend on
495 * that rather than the guess above.
496 */
497 hv_enabled = is_kvmppc_hv_enabled(kvm);
498 }
499
bbf45ba5 500 switch (ext) {
5ce941ee
SW
501#ifdef CONFIG_BOOKE
502 case KVM_CAP_PPC_BOOKE_SREGS:
f61c94bb 503 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1c810636 504 case KVM_CAP_PPC_EPR:
5ce941ee 505#else
e15a1137 506 case KVM_CAP_PPC_SEGSTATE:
1022fc3d 507 case KVM_CAP_PPC_HIOR:
930b412a 508 case KVM_CAP_PPC_PAPR:
5ce941ee 509#endif
18978768 510 case KVM_CAP_PPC_UNSET_IRQ:
7b4203e8 511 case KVM_CAP_PPC_IRQ_LEVEL:
71fbfd5f 512 case KVM_CAP_ENABLE_CAP:
699a0ea0 513 case KVM_CAP_ENABLE_CAP_VM:
e24ed81f 514 case KVM_CAP_ONE_REG:
0e673fb6 515 case KVM_CAP_IOEVENTFD:
5df554ad 516 case KVM_CAP_DEVICE_CTRL:
460df4c1 517 case KVM_CAP_IMMEDIATE_EXIT:
de56a948
PM
518 r = 1;
519 break;
de56a948 520 case KVM_CAP_PPC_PAIRED_SINGLES:
ad0a048b 521 case KVM_CAP_PPC_OSI:
15711e9c 522 case KVM_CAP_PPC_GET_PVINFO:
bf7ca4bd 523#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc 524 case KVM_CAP_SW_TLB:
eb1e4f43 525#endif
699cc876 526 /* We support this only for PR */
cbbc58d4 527 r = !hv_enabled;
e15a1137 528 break;
699cc876 529#ifdef CONFIG_KVM_MMIO
588968b6
LV
530 case KVM_CAP_COALESCED_MMIO:
531 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
532 break;
54738c09 533#endif
699cc876
AK
534#ifdef CONFIG_KVM_MPIC
535 case KVM_CAP_IRQ_MPIC:
536 r = 1;
537 break;
538#endif
539
f31e65e1 540#ifdef CONFIG_PPC_BOOK3S_64
54738c09 541 case KVM_CAP_SPAPR_TCE:
58ded420 542 case KVM_CAP_SPAPR_TCE_64:
8e591cb7 543 case KVM_CAP_PPC_RTAS:
f2e91042 544 case KVM_CAP_PPC_FIXUP_HCALL:
699a0ea0 545 case KVM_CAP_PPC_ENABLE_HCALL:
5975a2e0
PM
546#ifdef CONFIG_KVM_XICS
547 case KVM_CAP_IRQ_XICS:
548#endif
54738c09
DG
549 r = 1;
550 break;
a8acaece
DG
551
552 case KVM_CAP_PPC_ALLOC_HTAB:
553 r = hv_enabled;
554 break;
f31e65e1 555#endif /* CONFIG_PPC_BOOK3S_64 */
699cc876 556#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
371fefd6 557 case KVM_CAP_PPC_SMT:
45c940ba
PM
558 r = 0;
559 if (hv_enabled) {
560 if (cpu_has_feature(CPU_FTR_ARCH_300))
561 r = 1;
562 else
563 r = threads_per_subcore;
564 }
371fefd6 565 break;
aa04b4cc 566 case KVM_CAP_PPC_RMA:
c17b98cf 567 r = 0;
aa04b4cc 568 break;
e928e9cb
ME
569 case KVM_CAP_PPC_HWRNG:
570 r = kvmppc_hwrng_present();
571 break;
c9270132 572 case KVM_CAP_PPC_MMU_RADIX:
8cf4ecc0 573 r = !!(hv_enabled && radix_enabled());
c9270132
PM
574 break;
575 case KVM_CAP_PPC_MMU_HASH_V3:
468808bd 576 r = !!(hv_enabled && !radix_enabled() &&
c9270132
PM
577 cpu_has_feature(CPU_FTR_ARCH_300));
578 break;
f4800b1f 579#endif
342d3db7 580 case KVM_CAP_SYNC_MMU:
699cc876 581#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
c17b98cf 582 r = hv_enabled;
f4800b1f
AG
583#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
584 r = 1;
585#else
586 r = 0;
a2932923 587#endif
699cc876
AK
588 break;
589#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
a2932923 590 case KVM_CAP_PPC_HTAB_FD:
cbbc58d4 591 r = hv_enabled;
a2932923 592 break;
de56a948 593#endif
b5434032
ME
594 case KVM_CAP_NR_VCPUS:
595 /*
596 * Recommending a number of CPUs is somewhat arbitrary; we
597 * return the number of present CPUs for -HV (since a host
598 * will have secondary threads "offline"), and for other KVM
599 * implementations just count online CPUs.
600 */
cbbc58d4 601 if (hv_enabled)
699cc876
AK
602 r = num_present_cpus();
603 else
604 r = num_online_cpus();
b5434032 605 break;
bfec5c2c
ND
606 case KVM_CAP_NR_MEMSLOTS:
607 r = KVM_USER_MEM_SLOTS;
608 break;
b5434032
ME
609 case KVM_CAP_MAX_VCPUS:
610 r = KVM_MAX_VCPUS;
611 break;
5b74716e
BH
612#ifdef CONFIG_PPC_BOOK3S_64
613 case KVM_CAP_PPC_GET_SMMU_INFO:
614 r = 1;
615 break;
d3695aa4
AK
616 case KVM_CAP_SPAPR_MULTITCE:
617 r = 1;
618 break;
050f2339 619 case KVM_CAP_SPAPR_RESIZE_HPT:
bcd3bb63
PM
620 /* Disable this on POWER9 until code handles new HPTE format */
621 r = !!hv_enabled && !cpu_has_feature(CPU_FTR_ARCH_300);
050f2339 622 break;
5b74716e 623#endif
23528bb2
SB
624 case KVM_CAP_PPC_HTM:
625 r = cpu_has_feature(CPU_FTR_TM_COMP) &&
626 is_kvmppc_hv_enabled(kvm);
627 break;
bbf45ba5
HB
628 default:
629 r = 0;
630 break;
631 }
632 return r;
633
634}
635
636long kvm_arch_dev_ioctl(struct file *filp,
637 unsigned int ioctl, unsigned long arg)
638{
639 return -EINVAL;
640}
641
5587027c 642void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
db3fe4eb
TY
643 struct kvm_memory_slot *dont)
644{
5587027c 645 kvmppc_core_free_memslot(kvm, free, dont);
db3fe4eb
TY
646}
647
5587027c
AK
648int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
649 unsigned long npages)
db3fe4eb 650{
5587027c 651 return kvmppc_core_create_memslot(kvm, slot, npages);
db3fe4eb
TY
652}
653
f7784b8e 654int kvm_arch_prepare_memory_region(struct kvm *kvm,
462fce46 655 struct kvm_memory_slot *memslot,
09170a49 656 const struct kvm_userspace_memory_region *mem,
7b6195a9 657 enum kvm_mr_change change)
bbf45ba5 658{
a66b48c3 659 return kvmppc_core_prepare_memory_region(kvm, memslot, mem);
bbf45ba5
HB
660}
661
f7784b8e 662void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 663 const struct kvm_userspace_memory_region *mem,
8482644a 664 const struct kvm_memory_slot *old,
f36f3f28 665 const struct kvm_memory_slot *new,
8482644a 666 enum kvm_mr_change change)
f7784b8e 667{
f36f3f28 668 kvmppc_core_commit_memory_region(kvm, mem, old, new);
f7784b8e
MT
669}
670
2df72e9b
MT
671void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
672 struct kvm_memory_slot *slot)
34d4cb8f 673{
dfe49dbd 674 kvmppc_core_flush_memslot(kvm, slot);
34d4cb8f
MT
675}
676
bbf45ba5
HB
677struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
678{
73e75b41
HB
679 struct kvm_vcpu *vcpu;
680 vcpu = kvmppc_core_vcpu_create(kvm, id);
03cdab53
ME
681 if (!IS_ERR(vcpu)) {
682 vcpu->arch.wqp = &vcpu->wq;
06056bfb 683 kvmppc_create_vcpu_debugfs(vcpu, id);
03cdab53 684 }
73e75b41 685 return vcpu;
bbf45ba5
HB
686}
687
31928aa5 688void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
42897d86 689{
42897d86
MT
690}
691
bbf45ba5
HB
692void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
693{
a595405d
AG
694 /* Make sure we're not using the vcpu anymore */
695 hrtimer_cancel(&vcpu->arch.dec_timer);
a595405d 696
73e75b41 697 kvmppc_remove_vcpu_debugfs(vcpu);
eb1e4f43
SW
698
699 switch (vcpu->arch.irq_type) {
700 case KVMPPC_IRQ_MPIC:
701 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);
702 break;
bc5ad3f3 703 case KVMPPC_IRQ_XICS:
5af50993
BH
704 if (xive_enabled())
705 kvmppc_xive_cleanup_vcpu(vcpu);
706 else
707 kvmppc_xics_free_icp(vcpu);
bc5ad3f3 708 break;
eb1e4f43
SW
709 }
710
db93f574 711 kvmppc_core_vcpu_free(vcpu);
bbf45ba5
HB
712}
713
714void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
715{
716 kvm_arch_vcpu_free(vcpu);
717}
718
719int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
720{
9dd921cf 721 return kvmppc_core_pending_dec(vcpu);
bbf45ba5
HB
722}
723
5358a963 724static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
544c6761
AG
725{
726 struct kvm_vcpu *vcpu;
727
728 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
d02d4d15 729 kvmppc_decrementer_func(vcpu);
544c6761
AG
730
731 return HRTIMER_NORESTART;
732}
733
bbf45ba5
HB
734int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
735{
f61c94bb
BB
736 int ret;
737
544c6761 738 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
544c6761 739 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
de56a948 740 vcpu->arch.dec_expires = ~(u64)0;
bbf45ba5 741
09000adb
BB
742#ifdef CONFIG_KVM_EXIT_TIMING
743 mutex_init(&vcpu->arch.exit_timing_lock);
744#endif
f61c94bb
BB
745 ret = kvmppc_subarch_vcpu_init(vcpu);
746 return ret;
bbf45ba5
HB
747}
748
749void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
750{
ecc0981f 751 kvmppc_mmu_destroy(vcpu);
f61c94bb 752 kvmppc_subarch_vcpu_uninit(vcpu);
bbf45ba5
HB
753}
754
755void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
756{
eab17672
SW
757#ifdef CONFIG_BOOKE
758 /*
759 * vrsave (formerly usprg0) isn't used by Linux, but may
760 * be used by the guest.
761 *
762 * On non-booke this is associated with Altivec and
763 * is handled by code in book3s.c.
764 */
765 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
766#endif
9dd921cf 767 kvmppc_core_vcpu_load(vcpu, cpu);
bbf45ba5
HB
768}
769
770void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
771{
9dd921cf 772 kvmppc_core_vcpu_put(vcpu);
eab17672
SW
773#ifdef CONFIG_BOOKE
774 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
775#endif
bbf45ba5
HB
776}
777
9576730d
SW
778/*
779 * irq_bypass_add_producer and irq_bypass_del_producer are only
780 * useful if the architecture supports PCI passthrough.
781 * irq_bypass_stop and irq_bypass_start are not needed and so
782 * kvm_ops are not defined for them.
783 */
784bool kvm_arch_has_irq_bypass(void)
785{
786 return ((kvmppc_hv_ops && kvmppc_hv_ops->irq_bypass_add_producer) ||
787 (kvmppc_pr_ops && kvmppc_pr_ops->irq_bypass_add_producer));
788}
789
790int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
791 struct irq_bypass_producer *prod)
792{
793 struct kvm_kernel_irqfd *irqfd =
794 container_of(cons, struct kvm_kernel_irqfd, consumer);
795 struct kvm *kvm = irqfd->kvm;
796
797 if (kvm->arch.kvm_ops->irq_bypass_add_producer)
798 return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod);
799
800 return 0;
801}
802
803void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
804 struct irq_bypass_producer *prod)
805{
806 struct kvm_kernel_irqfd *irqfd =
807 container_of(cons, struct kvm_kernel_irqfd, consumer);
808 struct kvm *kvm = irqfd->kvm;
809
810 if (kvm->arch.kvm_ops->irq_bypass_del_producer)
811 kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod);
812}
813
bbf45ba5
HB
814static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
815 struct kvm_run *run)
816{
69b61833 817 u64 uninitialized_var(gpr);
bbf45ba5 818
8e5b26b5 819 if (run->mmio.len > sizeof(gpr)) {
bbf45ba5
HB
820 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
821 return;
822 }
823
d078eed3 824 if (!vcpu->arch.mmio_host_swabbed) {
bbf45ba5 825 switch (run->mmio.len) {
b104d066 826 case 8: gpr = *(u64 *)run->mmio.data; break;
8e5b26b5
AG
827 case 4: gpr = *(u32 *)run->mmio.data; break;
828 case 2: gpr = *(u16 *)run->mmio.data; break;
829 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
830 }
831 } else {
bbf45ba5 832 switch (run->mmio.len) {
d078eed3
DG
833 case 8: gpr = swab64(*(u64 *)run->mmio.data); break;
834 case 4: gpr = swab32(*(u32 *)run->mmio.data); break;
835 case 2: gpr = swab16(*(u16 *)run->mmio.data); break;
8e5b26b5 836 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
837 }
838 }
8e5b26b5 839
3587d534
AG
840 if (vcpu->arch.mmio_sign_extend) {
841 switch (run->mmio.len) {
842#ifdef CONFIG_PPC64
843 case 4:
844 gpr = (s64)(s32)gpr;
845 break;
846#endif
847 case 2:
848 gpr = (s64)(s16)gpr;
849 break;
850 case 1:
851 gpr = (s64)(s8)gpr;
852 break;
853 }
854 }
855
8e5b26b5 856 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
b104d066 857
b3c5d3c2
AG
858 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
859 case KVM_MMIO_REG_GPR:
b104d066
AG
860 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
861 break;
b3c5d3c2 862 case KVM_MMIO_REG_FPR:
efff1912 863 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b104d066 864 break;
287d5611 865#ifdef CONFIG_PPC_BOOK3S
b3c5d3c2
AG
866 case KVM_MMIO_REG_QPR:
867 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 868 break;
b3c5d3c2 869 case KVM_MMIO_REG_FQPR:
efff1912 870 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b3c5d3c2 871 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 872 break;
287d5611 873#endif
b104d066
AG
874 default:
875 BUG();
876 }
bbf45ba5
HB
877}
878
eb8b0560
PM
879static int __kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
880 unsigned int rt, unsigned int bytes,
881 int is_default_endian, int sign_extend)
bbf45ba5 882{
ed840ee9 883 int idx, ret;
d078eed3 884 bool host_swabbed;
73601775 885
d078eed3 886 /* Pity C doesn't have a logical XOR operator */
73601775 887 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 888 host_swabbed = is_default_endian;
73601775 889 } else {
d078eed3 890 host_swabbed = !is_default_endian;
73601775 891 }
ed840ee9 892
bbf45ba5
HB
893 if (bytes > sizeof(run->mmio.data)) {
894 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
895 run->mmio.len);
896 }
897
898 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
899 run->mmio.len = bytes;
900 run->mmio.is_write = 0;
901
902 vcpu->arch.io_gpr = rt;
d078eed3 903 vcpu->arch.mmio_host_swabbed = host_swabbed;
bbf45ba5
HB
904 vcpu->mmio_needed = 1;
905 vcpu->mmio_is_write = 0;
eb8b0560 906 vcpu->arch.mmio_sign_extend = sign_extend;
bbf45ba5 907
ed840ee9
SW
908 idx = srcu_read_lock(&vcpu->kvm->srcu);
909
e32edf4f 910 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
911 bytes, &run->mmio.data);
912
913 srcu_read_unlock(&vcpu->kvm->srcu, idx);
914
915 if (!ret) {
0e673fb6
AG
916 kvmppc_complete_mmio_load(vcpu, run);
917 vcpu->mmio_needed = 0;
918 return EMULATE_DONE;
919 }
920
bbf45ba5
HB
921 return EMULATE_DO_MMIO;
922}
eb8b0560
PM
923
924int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
925 unsigned int rt, unsigned int bytes,
926 int is_default_endian)
927{
928 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 0);
929}
2ba9f0d8 930EXPORT_SYMBOL_GPL(kvmppc_handle_load);
bbf45ba5 931
3587d534
AG
932/* Same as above, but sign extends */
933int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
934 unsigned int rt, unsigned int bytes,
935 int is_default_endian)
3587d534 936{
eb8b0560 937 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 1);
3587d534
AG
938}
939
bbf45ba5 940int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775 941 u64 val, unsigned int bytes, int is_default_endian)
bbf45ba5
HB
942{
943 void *data = run->mmio.data;
ed840ee9 944 int idx, ret;
d078eed3 945 bool host_swabbed;
73601775 946
d078eed3 947 /* Pity C doesn't have a logical XOR operator */
73601775 948 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 949 host_swabbed = is_default_endian;
73601775 950 } else {
d078eed3 951 host_swabbed = !is_default_endian;
73601775 952 }
bbf45ba5
HB
953
954 if (bytes > sizeof(run->mmio.data)) {
955 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
956 run->mmio.len);
957 }
958
959 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
960 run->mmio.len = bytes;
961 run->mmio.is_write = 1;
962 vcpu->mmio_needed = 1;
963 vcpu->mmio_is_write = 1;
964
965 /* Store the value at the lowest bytes in 'data'. */
d078eed3 966 if (!host_swabbed) {
bbf45ba5 967 switch (bytes) {
b104d066 968 case 8: *(u64 *)data = val; break;
bbf45ba5
HB
969 case 4: *(u32 *)data = val; break;
970 case 2: *(u16 *)data = val; break;
971 case 1: *(u8 *)data = val; break;
972 }
973 } else {
bbf45ba5 974 switch (bytes) {
d078eed3
DG
975 case 8: *(u64 *)data = swab64(val); break;
976 case 4: *(u32 *)data = swab32(val); break;
977 case 2: *(u16 *)data = swab16(val); break;
978 case 1: *(u8 *)data = val; break;
bbf45ba5
HB
979 }
980 }
981
ed840ee9
SW
982 idx = srcu_read_lock(&vcpu->kvm->srcu);
983
e32edf4f 984 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
985 bytes, &run->mmio.data);
986
987 srcu_read_unlock(&vcpu->kvm->srcu, idx);
988
989 if (!ret) {
0e673fb6
AG
990 vcpu->mmio_needed = 0;
991 return EMULATE_DONE;
992 }
993
bbf45ba5
HB
994 return EMULATE_DO_MMIO;
995}
2ba9f0d8 996EXPORT_SYMBOL_GPL(kvmppc_handle_store);
bbf45ba5 997
8a41ea53
MC
998int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
999{
1000 int r = 0;
1001 union kvmppc_one_reg val;
1002 int size;
1003
1004 size = one_reg_size(reg->id);
1005 if (size > sizeof(val))
1006 return -EINVAL;
1007
1008 r = kvmppc_get_one_reg(vcpu, reg->id, &val);
1009 if (r == -EINVAL) {
1010 r = 0;
1011 switch (reg->id) {
3840edc8
MC
1012#ifdef CONFIG_ALTIVEC
1013 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1014 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1015 r = -ENXIO;
1016 break;
1017 }
b4d7f161 1018 val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
3840edc8
MC
1019 break;
1020 case KVM_REG_PPC_VSCR:
1021 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1022 r = -ENXIO;
1023 break;
1024 }
b4d7f161 1025 val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
3840edc8
MC
1026 break;
1027 case KVM_REG_PPC_VRSAVE:
b4d7f161 1028 val = get_reg_val(reg->id, vcpu->arch.vrsave);
3840edc8
MC
1029 break;
1030#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1031 default:
1032 r = -EINVAL;
1033 break;
1034 }
1035 }
1036
1037 if (r)
1038 return r;
1039
1040 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1041 r = -EFAULT;
1042
1043 return r;
1044}
1045
1046int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1047{
1048 int r;
1049 union kvmppc_one_reg val;
1050 int size;
1051
1052 size = one_reg_size(reg->id);
1053 if (size > sizeof(val))
1054 return -EINVAL;
1055
1056 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1057 return -EFAULT;
1058
1059 r = kvmppc_set_one_reg(vcpu, reg->id, &val);
1060 if (r == -EINVAL) {
1061 r = 0;
1062 switch (reg->id) {
3840edc8
MC
1063#ifdef CONFIG_ALTIVEC
1064 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1065 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1066 r = -ENXIO;
1067 break;
1068 }
b4d7f161 1069 vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
3840edc8
MC
1070 break;
1071 case KVM_REG_PPC_VSCR:
1072 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1073 r = -ENXIO;
1074 break;
1075 }
b4d7f161 1076 vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
3840edc8
MC
1077 break;
1078 case KVM_REG_PPC_VRSAVE:
b4d7f161
GK
1079 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1080 r = -ENXIO;
1081 break;
1082 }
1083 vcpu->arch.vrsave = set_reg_val(reg->id, val);
3840edc8
MC
1084 break;
1085#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1086 default:
1087 r = -EINVAL;
1088 break;
1089 }
1090 }
1091
1092 return r;
1093}
1094
bbf45ba5
HB
1095int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
1096{
1097 int r;
1098 sigset_t sigsaved;
1099
1100 if (vcpu->sigset_active)
1101 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
1102
1103 if (vcpu->mmio_needed) {
1104 if (!vcpu->mmio_is_write)
1105 kvmppc_complete_mmio_load(vcpu, run);
1106 vcpu->mmio_needed = 0;
ad0a048b
AG
1107 } else if (vcpu->arch.osi_needed) {
1108 u64 *gprs = run->osi.gprs;
1109 int i;
1110
1111 for (i = 0; i < 32; i++)
1112 kvmppc_set_gpr(vcpu, i, gprs[i]);
1113 vcpu->arch.osi_needed = 0;
de56a948
PM
1114 } else if (vcpu->arch.hcall_needed) {
1115 int i;
1116
1117 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
1118 for (i = 0; i < 9; ++i)
1119 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
1120 vcpu->arch.hcall_needed = 0;
1c810636
AG
1121#ifdef CONFIG_BOOKE
1122 } else if (vcpu->arch.epr_needed) {
1123 kvmppc_set_epr(vcpu, run->epr.epr);
1124 vcpu->arch.epr_needed = 0;
1125#endif
bbf45ba5
HB
1126 }
1127
460df4c1
PB
1128 if (run->immediate_exit)
1129 r = -EINTR;
1130 else
1131 r = kvmppc_vcpu_run(run, vcpu);
bbf45ba5
HB
1132
1133 if (vcpu->sigset_active)
1134 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
1135
1136 return r;
1137}
1138
1139int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
1140{
19ccb76a 1141 if (irq->irq == KVM_INTERRUPT_UNSET) {
4fe27d2a 1142 kvmppc_core_dequeue_external(vcpu);
19ccb76a
PM
1143 return 0;
1144 }
1145
1146 kvmppc_core_queue_external(vcpu, irq);
b6d33834 1147
dfd4d47e 1148 kvm_vcpu_kick(vcpu);
45c5eb67 1149
bbf45ba5
HB
1150 return 0;
1151}
1152
71fbfd5f
AG
1153static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
1154 struct kvm_enable_cap *cap)
1155{
1156 int r;
1157
1158 if (cap->flags)
1159 return -EINVAL;
1160
1161 switch (cap->cap) {
ad0a048b
AG
1162 case KVM_CAP_PPC_OSI:
1163 r = 0;
1164 vcpu->arch.osi_enabled = true;
1165 break;
930b412a
AG
1166 case KVM_CAP_PPC_PAPR:
1167 r = 0;
1168 vcpu->arch.papr_enabled = true;
1169 break;
1c810636
AG
1170 case KVM_CAP_PPC_EPR:
1171 r = 0;
5df554ad
SW
1172 if (cap->args[0])
1173 vcpu->arch.epr_flags |= KVMPPC_EPR_USER;
1174 else
1175 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER;
1c810636 1176 break;
f61c94bb
BB
1177#ifdef CONFIG_BOOKE
1178 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1179 r = 0;
1180 vcpu->arch.watchdog_enabled = true;
1181 break;
1182#endif
bf7ca4bd 1183#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1184 case KVM_CAP_SW_TLB: {
1185 struct kvm_config_tlb cfg;
1186 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
1187
1188 r = -EFAULT;
1189 if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
1190 break;
1191
1192 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
1193 break;
eb1e4f43
SW
1194 }
1195#endif
1196#ifdef CONFIG_KVM_MPIC
1197 case KVM_CAP_IRQ_MPIC: {
70abaded 1198 struct fd f;
eb1e4f43
SW
1199 struct kvm_device *dev;
1200
1201 r = -EBADF;
70abaded
AV
1202 f = fdget(cap->args[0]);
1203 if (!f.file)
eb1e4f43
SW
1204 break;
1205
1206 r = -EPERM;
70abaded 1207 dev = kvm_device_from_filp(f.file);
eb1e4f43
SW
1208 if (dev)
1209 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]);
1210
70abaded 1211 fdput(f);
eb1e4f43 1212 break;
dc83b8bc
SW
1213 }
1214#endif
5975a2e0
PM
1215#ifdef CONFIG_KVM_XICS
1216 case KVM_CAP_IRQ_XICS: {
70abaded 1217 struct fd f;
5975a2e0
PM
1218 struct kvm_device *dev;
1219
1220 r = -EBADF;
70abaded
AV
1221 f = fdget(cap->args[0]);
1222 if (!f.file)
5975a2e0
PM
1223 break;
1224
1225 r = -EPERM;
70abaded 1226 dev = kvm_device_from_filp(f.file);
5af50993
BH
1227 if (dev) {
1228 if (xive_enabled())
1229 r = kvmppc_xive_connect_vcpu(dev, vcpu, cap->args[1]);
1230 else
1231 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]);
1232 }
5975a2e0 1233
70abaded 1234 fdput(f);
5975a2e0
PM
1235 break;
1236 }
1237#endif /* CONFIG_KVM_XICS */
71fbfd5f
AG
1238 default:
1239 r = -EINVAL;
1240 break;
1241 }
1242
af8f38b3
AG
1243 if (!r)
1244 r = kvmppc_sanity_check(vcpu);
1245
71fbfd5f
AG
1246 return r;
1247}
1248
34a75b0f
PM
1249bool kvm_arch_intc_initialized(struct kvm *kvm)
1250{
1251#ifdef CONFIG_KVM_MPIC
1252 if (kvm->arch.mpic)
1253 return true;
1254#endif
1255#ifdef CONFIG_KVM_XICS
5af50993 1256 if (kvm->arch.xics || kvm->arch.xive)
34a75b0f
PM
1257 return true;
1258#endif
1259 return false;
1260}
1261
bbf45ba5
HB
1262int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
1263 struct kvm_mp_state *mp_state)
1264{
1265 return -EINVAL;
1266}
1267
1268int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
1269 struct kvm_mp_state *mp_state)
1270{
1271 return -EINVAL;
1272}
1273
1274long kvm_arch_vcpu_ioctl(struct file *filp,
1275 unsigned int ioctl, unsigned long arg)
1276{
1277 struct kvm_vcpu *vcpu = filp->private_data;
1278 void __user *argp = (void __user *)arg;
1279 long r;
1280
93736624
AK
1281 switch (ioctl) {
1282 case KVM_INTERRUPT: {
bbf45ba5
HB
1283 struct kvm_interrupt irq;
1284 r = -EFAULT;
1285 if (copy_from_user(&irq, argp, sizeof(irq)))
93736624 1286 goto out;
bbf45ba5 1287 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
93736624 1288 goto out;
bbf45ba5 1289 }
19483d14 1290
71fbfd5f
AG
1291 case KVM_ENABLE_CAP:
1292 {
1293 struct kvm_enable_cap cap;
1294 r = -EFAULT;
1295 if (copy_from_user(&cap, argp, sizeof(cap)))
1296 goto out;
1297 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
1298 break;
1299 }
dc83b8bc 1300
e24ed81f
AG
1301 case KVM_SET_ONE_REG:
1302 case KVM_GET_ONE_REG:
1303 {
1304 struct kvm_one_reg reg;
1305 r = -EFAULT;
1306 if (copy_from_user(&reg, argp, sizeof(reg)))
1307 goto out;
1308 if (ioctl == KVM_SET_ONE_REG)
1309 r = kvm_vcpu_ioctl_set_one_reg(vcpu, &reg);
1310 else
1311 r = kvm_vcpu_ioctl_get_one_reg(vcpu, &reg);
1312 break;
1313 }
1314
bf7ca4bd 1315#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1316 case KVM_DIRTY_TLB: {
1317 struct kvm_dirty_tlb dirty;
1318 r = -EFAULT;
1319 if (copy_from_user(&dirty, argp, sizeof(dirty)))
1320 goto out;
1321 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
1322 break;
1323 }
1324#endif
bbf45ba5
HB
1325 default:
1326 r = -EINVAL;
1327 }
1328
1329out:
1330 return r;
1331}
1332
5b1c1493
CO
1333int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
1334{
1335 return VM_FAULT_SIGBUS;
1336}
1337
15711e9c
AG
1338static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
1339{
784bafac
SY
1340 u32 inst_nop = 0x60000000;
1341#ifdef CONFIG_KVM_BOOKE_HV
1342 u32 inst_sc1 = 0x44000022;
2743103f
AG
1343 pvinfo->hcall[0] = cpu_to_be32(inst_sc1);
1344 pvinfo->hcall[1] = cpu_to_be32(inst_nop);
1345 pvinfo->hcall[2] = cpu_to_be32(inst_nop);
1346 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1347#else
15711e9c
AG
1348 u32 inst_lis = 0x3c000000;
1349 u32 inst_ori = 0x60000000;
15711e9c
AG
1350 u32 inst_sc = 0x44000002;
1351 u32 inst_imm_mask = 0xffff;
1352
1353 /*
1354 * The hypercall to get into KVM from within guest context is as
1355 * follows:
1356 *
1357 * lis r0, r0, KVM_SC_MAGIC_R0@h
1358 * ori r0, KVM_SC_MAGIC_R0@l
1359 * sc
1360 * nop
1361 */
2743103f
AG
1362 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask));
1363 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask));
1364 pvinfo->hcall[2] = cpu_to_be32(inst_sc);
1365 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1366#endif
15711e9c 1367
9202e076
LYB
1368 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE;
1369
15711e9c
AG
1370 return 0;
1371}
1372
5efdb4be
AG
1373int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
1374 bool line_status)
1375{
1376 if (!irqchip_in_kernel(kvm))
1377 return -ENXIO;
1378
1379 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1380 irq_event->irq, irq_event->level,
1381 line_status);
1382 return 0;
1383}
1384
699a0ea0
PM
1385
1386static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
1387 struct kvm_enable_cap *cap)
1388{
1389 int r;
1390
1391 if (cap->flags)
1392 return -EINVAL;
1393
1394 switch (cap->cap) {
1395#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1396 case KVM_CAP_PPC_ENABLE_HCALL: {
1397 unsigned long hcall = cap->args[0];
1398
1399 r = -EINVAL;
1400 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) ||
1401 cap->args[1] > 1)
1402 break;
ae2113a4
PM
1403 if (!kvmppc_book3s_hcall_implemented(kvm, hcall))
1404 break;
699a0ea0
PM
1405 if (cap->args[1])
1406 set_bit(hcall / 4, kvm->arch.enabled_hcalls);
1407 else
1408 clear_bit(hcall / 4, kvm->arch.enabled_hcalls);
1409 r = 0;
1410 break;
1411 }
1412#endif
1413 default:
1414 r = -EINVAL;
1415 break;
1416 }
1417
1418 return r;
1419}
1420
bbf45ba5
HB
1421long kvm_arch_vm_ioctl(struct file *filp,
1422 unsigned int ioctl, unsigned long arg)
1423{
5df554ad 1424 struct kvm *kvm __maybe_unused = filp->private_data;
15711e9c 1425 void __user *argp = (void __user *)arg;
bbf45ba5
HB
1426 long r;
1427
1428 switch (ioctl) {
15711e9c
AG
1429 case KVM_PPC_GET_PVINFO: {
1430 struct kvm_ppc_pvinfo pvinfo;
d8cdddcd 1431 memset(&pvinfo, 0, sizeof(pvinfo));
15711e9c
AG
1432 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
1433 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
1434 r = -EFAULT;
1435 goto out;
1436 }
1437
1438 break;
1439 }
699a0ea0
PM
1440 case KVM_ENABLE_CAP:
1441 {
1442 struct kvm_enable_cap cap;
1443 r = -EFAULT;
1444 if (copy_from_user(&cap, argp, sizeof(cap)))
1445 goto out;
1446 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
1447 break;
1448 }
f31e65e1 1449#ifdef CONFIG_PPC_BOOK3S_64
58ded420
AK
1450 case KVM_CREATE_SPAPR_TCE_64: {
1451 struct kvm_create_spapr_tce_64 create_tce_64;
1452
1453 r = -EFAULT;
1454 if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64)))
1455 goto out;
1456 if (create_tce_64.flags) {
1457 r = -EINVAL;
1458 goto out;
1459 }
1460 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
1461 goto out;
1462 }
54738c09
DG
1463 case KVM_CREATE_SPAPR_TCE: {
1464 struct kvm_create_spapr_tce create_tce;
58ded420 1465 struct kvm_create_spapr_tce_64 create_tce_64;
54738c09
DG
1466
1467 r = -EFAULT;
1468 if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
1469 goto out;
58ded420
AK
1470
1471 create_tce_64.liobn = create_tce.liobn;
1472 create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K;
1473 create_tce_64.offset = 0;
1474 create_tce_64.size = create_tce.window_size >>
1475 IOMMU_PAGE_SHIFT_4K;
1476 create_tce_64.flags = 0;
1477 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
54738c09
DG
1478 goto out;
1479 }
5b74716e 1480 case KVM_PPC_GET_SMMU_INFO: {
5b74716e 1481 struct kvm_ppc_smmu_info info;
cbbc58d4 1482 struct kvm *kvm = filp->private_data;
5b74716e
BH
1483
1484 memset(&info, 0, sizeof(info));
cbbc58d4 1485 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info);
5b74716e
BH
1486 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1487 r = -EFAULT;
1488 break;
1489 }
8e591cb7
ME
1490 case KVM_PPC_RTAS_DEFINE_TOKEN: {
1491 struct kvm *kvm = filp->private_data;
1492
1493 r = kvm_vm_ioctl_rtas_define_token(kvm, argp);
1494 break;
1495 }
c9270132
PM
1496 case KVM_PPC_CONFIGURE_V3_MMU: {
1497 struct kvm *kvm = filp->private_data;
1498 struct kvm_ppc_mmuv3_cfg cfg;
1499
1500 r = -EINVAL;
1501 if (!kvm->arch.kvm_ops->configure_mmu)
1502 goto out;
1503 r = -EFAULT;
1504 if (copy_from_user(&cfg, argp, sizeof(cfg)))
1505 goto out;
1506 r = kvm->arch.kvm_ops->configure_mmu(kvm, &cfg);
1507 break;
1508 }
1509 case KVM_PPC_GET_RMMU_INFO: {
1510 struct kvm *kvm = filp->private_data;
1511 struct kvm_ppc_rmmu_info info;
1512
1513 r = -EINVAL;
1514 if (!kvm->arch.kvm_ops->get_rmmu_info)
1515 goto out;
1516 r = kvm->arch.kvm_ops->get_rmmu_info(kvm, &info);
1517 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1518 r = -EFAULT;
1519 break;
1520 }
cbbc58d4
AK
1521 default: {
1522 struct kvm *kvm = filp->private_data;
1523 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg);
1524 }
3a167bea 1525#else /* CONFIG_PPC_BOOK3S_64 */
bbf45ba5 1526 default:
367e1319 1527 r = -ENOTTY;
3a167bea 1528#endif
bbf45ba5 1529 }
15711e9c 1530out:
bbf45ba5
HB
1531 return r;
1532}
1533
043cc4d7
SW
1534static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
1535static unsigned long nr_lpids;
1536
1537long kvmppc_alloc_lpid(void)
1538{
1539 long lpid;
1540
1541 do {
1542 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
1543 if (lpid >= nr_lpids) {
1544 pr_err("%s: No LPIDs free\n", __func__);
1545 return -ENOMEM;
1546 }
1547 } while (test_and_set_bit(lpid, lpid_inuse));
1548
1549 return lpid;
1550}
2ba9f0d8 1551EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid);
043cc4d7
SW
1552
1553void kvmppc_claim_lpid(long lpid)
1554{
1555 set_bit(lpid, lpid_inuse);
1556}
2ba9f0d8 1557EXPORT_SYMBOL_GPL(kvmppc_claim_lpid);
043cc4d7
SW
1558
1559void kvmppc_free_lpid(long lpid)
1560{
1561 clear_bit(lpid, lpid_inuse);
1562}
2ba9f0d8 1563EXPORT_SYMBOL_GPL(kvmppc_free_lpid);
043cc4d7
SW
1564
1565void kvmppc_init_lpid(unsigned long nr_lpids_param)
1566{
1567 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
1568 memset(lpid_inuse, 0, sizeof(lpid_inuse));
1569}
2ba9f0d8 1570EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
043cc4d7 1571
bbf45ba5
HB
1572int kvm_arch_init(void *opaque)
1573{
1574 return 0;
1575}
1576
478d6686 1577EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr);