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KVM: PPC: Book3S: Controls for in-kernel sPAPR hypercall handling
[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / kvm / powerpc.c
CommitLineData
bbf45ba5
HB
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19 */
20
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/kvm_host.h>
bbf45ba5 24#include <linux/vmalloc.h>
544c6761 25#include <linux/hrtimer.h>
bbf45ba5 26#include <linux/fs.h>
5a0e3ad6 27#include <linux/slab.h>
eb1e4f43 28#include <linux/file.h>
cbbc58d4 29#include <linux/module.h>
bbf45ba5
HB
30#include <asm/cputable.h>
31#include <asm/uaccess.h>
32#include <asm/kvm_ppc.h>
83aae4a8 33#include <asm/tlbflush.h>
371fefd6 34#include <asm/cputhreads.h>
bd2be683 35#include <asm/irqflags.h>
73e75b41 36#include "timing.h"
5efdb4be 37#include "irq.h"
fad7b9b5 38#include "../mm/mmu_decl.h"
bbf45ba5 39
46f43c6e
MT
40#define CREATE_TRACE_POINTS
41#include "trace.h"
42
cbbc58d4
AK
43struct kvmppc_ops *kvmppc_hv_ops;
44EXPORT_SYMBOL_GPL(kvmppc_hv_ops);
45struct kvmppc_ops *kvmppc_pr_ops;
46EXPORT_SYMBOL_GPL(kvmppc_pr_ops);
47
3a167bea 48
bbf45ba5
HB
49int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
50{
9202e076 51 return !!(v->arch.pending_exceptions) ||
dfd4d47e 52 v->requests;
bbf45ba5
HB
53}
54
b6d33834
CD
55int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
56{
57 return 1;
58}
59
03d25c5b
AG
60/*
61 * Common checks before entering the guest world. Call with interrupts
62 * disabled.
63 *
7ee78855
AG
64 * returns:
65 *
66 * == 1 if we're ready to go into guest state
67 * <= 0 if we need to go back to the host with return value
03d25c5b
AG
68 */
69int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
70{
6c85f52b
SW
71 int r;
72
73 WARN_ON(irqs_disabled());
74 hard_irq_disable();
03d25c5b 75
03d25c5b
AG
76 while (true) {
77 if (need_resched()) {
78 local_irq_enable();
79 cond_resched();
6c85f52b 80 hard_irq_disable();
03d25c5b
AG
81 continue;
82 }
83
84 if (signal_pending(current)) {
7ee78855
AG
85 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
86 vcpu->run->exit_reason = KVM_EXIT_INTR;
87 r = -EINTR;
03d25c5b
AG
88 break;
89 }
90
5bd1cf11
SW
91 vcpu->mode = IN_GUEST_MODE;
92
93 /*
94 * Reading vcpu->requests must happen after setting vcpu->mode,
95 * so we don't miss a request because the requester sees
96 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests
97 * before next entering the guest (and thus doesn't IPI).
98 */
03d25c5b 99 smp_mb();
5bd1cf11 100
03d25c5b
AG
101 if (vcpu->requests) {
102 /* Make sure we process requests preemptable */
103 local_irq_enable();
104 trace_kvm_check_requests(vcpu);
7c973a2e 105 r = kvmppc_core_check_requests(vcpu);
6c85f52b 106 hard_irq_disable();
7c973a2e
AG
107 if (r > 0)
108 continue;
109 break;
03d25c5b
AG
110 }
111
112 if (kvmppc_core_prepare_to_enter(vcpu)) {
113 /* interrupts got enabled in between, so we
114 are back at square 1 */
115 continue;
116 }
117
3766a4c6 118 kvm_guest_enter();
6c85f52b 119 return 1;
03d25c5b
AG
120 }
121
6c85f52b
SW
122 /* return to host */
123 local_irq_enable();
03d25c5b
AG
124 return r;
125}
2ba9f0d8 126EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter);
03d25c5b 127
5deb8e7a
AG
128#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
129static void kvmppc_swab_shared(struct kvm_vcpu *vcpu)
130{
131 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
132 int i;
133
134 shared->sprg0 = swab64(shared->sprg0);
135 shared->sprg1 = swab64(shared->sprg1);
136 shared->sprg2 = swab64(shared->sprg2);
137 shared->sprg3 = swab64(shared->sprg3);
138 shared->srr0 = swab64(shared->srr0);
139 shared->srr1 = swab64(shared->srr1);
140 shared->dar = swab64(shared->dar);
141 shared->msr = swab64(shared->msr);
142 shared->dsisr = swab32(shared->dsisr);
143 shared->int_pending = swab32(shared->int_pending);
144 for (i = 0; i < ARRAY_SIZE(shared->sr); i++)
145 shared->sr[i] = swab32(shared->sr[i]);
146}
147#endif
148
2a342ed5
AG
149int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
150{
151 int nr = kvmppc_get_gpr(vcpu, 11);
152 int r;
153 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
154 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
155 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
156 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
157 unsigned long r2 = 0;
158
5deb8e7a 159 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
2a342ed5
AG
160 /* 32 bit mode */
161 param1 &= 0xffffffff;
162 param2 &= 0xffffffff;
163 param3 &= 0xffffffff;
164 param4 &= 0xffffffff;
165 }
166
167 switch (nr) {
fdcf8bd7 168 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE):
5fc87407 169 {
5deb8e7a
AG
170#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
171 /* Book3S can be little endian, find it out here */
172 int shared_big_endian = true;
173 if (vcpu->arch.intr_msr & MSR_LE)
174 shared_big_endian = false;
175 if (shared_big_endian != vcpu->arch.shared_big_endian)
176 kvmppc_swab_shared(vcpu);
177 vcpu->arch.shared_big_endian = shared_big_endian;
178#endif
179
f3383cf8
AG
180 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) {
181 /*
182 * Older versions of the Linux magic page code had
183 * a bug where they would map their trampoline code
184 * NX. If that's the case, remove !PR NX capability.
185 */
186 vcpu->arch.disable_kernel_nx = true;
187 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
188 }
189
190 vcpu->arch.magic_page_pa = param1 & ~0xfffULL;
191 vcpu->arch.magic_page_ea = param2 & ~0xfffULL;
5fc87407 192
b5904972 193 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
7508e16c 194
fdcf8bd7 195 r = EV_SUCCESS;
5fc87407
AG
196 break;
197 }
fdcf8bd7
SY
198 case KVM_HCALL_TOKEN(KVM_HC_FEATURES):
199 r = EV_SUCCESS;
bf7ca4bd 200#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
a4cd8b23 201 /* XXX Missing magic page on 44x */
5fc87407
AG
202 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
203#endif
2a342ed5
AG
204
205 /* Second return value is in r4 */
2a342ed5 206 break;
9202e076
LYB
207 case EV_HCALL_TOKEN(EV_IDLE):
208 r = EV_SUCCESS;
209 kvm_vcpu_block(vcpu);
210 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
211 break;
2a342ed5 212 default:
fdcf8bd7 213 r = EV_UNIMPLEMENTED;
2a342ed5
AG
214 break;
215 }
216
7508e16c
AG
217 kvmppc_set_gpr(vcpu, 4, r2);
218
2a342ed5
AG
219 return r;
220}
2ba9f0d8 221EXPORT_SYMBOL_GPL(kvmppc_kvm_pv);
bbf45ba5 222
af8f38b3
AG
223int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
224{
225 int r = false;
226
227 /* We have to know what CPU to virtualize */
228 if (!vcpu->arch.pvr)
229 goto out;
230
231 /* PAPR only works with book3s_64 */
232 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
233 goto out;
234
af8f38b3 235 /* HV KVM can only do PAPR mode for now */
a78b55d1 236 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm))
af8f38b3 237 goto out;
af8f38b3 238
d30f6e48
SW
239#ifdef CONFIG_KVM_BOOKE_HV
240 if (!cpu_has_feature(CPU_FTR_EMB_HV))
241 goto out;
242#endif
243
af8f38b3
AG
244 r = true;
245
246out:
247 vcpu->arch.sane = r;
248 return r ? 0 : -EINVAL;
249}
2ba9f0d8 250EXPORT_SYMBOL_GPL(kvmppc_sanity_check);
af8f38b3 251
bbf45ba5
HB
252int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
253{
254 enum emulation_result er;
255 int r;
256
257 er = kvmppc_emulate_instruction(run, vcpu);
258 switch (er) {
259 case EMULATE_DONE:
260 /* Future optimization: only reload non-volatiles if they were
261 * actually modified. */
262 r = RESUME_GUEST_NV;
263 break;
264 case EMULATE_DO_MMIO:
265 run->exit_reason = KVM_EXIT_MMIO;
266 /* We must reload nonvolatiles because "update" load/store
267 * instructions modify register state. */
268 /* Future optimization: only reload non-volatiles if they were
269 * actually modified. */
270 r = RESUME_HOST_NV;
271 break;
272 case EMULATE_FAIL:
273 /* XXX Deliver Program interrupt to guest. */
274 printk(KERN_EMERG "%s: emulation failed (%08x)\n", __func__,
c7f38f46 275 kvmppc_get_last_inst(vcpu));
bbf45ba5
HB
276 r = RESUME_HOST;
277 break;
278 default:
5a33169e
AG
279 WARN_ON(1);
280 r = RESUME_GUEST;
bbf45ba5
HB
281 }
282
283 return r;
284}
2ba9f0d8 285EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio);
bbf45ba5 286
10474ae8 287int kvm_arch_hardware_enable(void *garbage)
bbf45ba5 288{
10474ae8 289 return 0;
bbf45ba5
HB
290}
291
292void kvm_arch_hardware_disable(void *garbage)
293{
294}
295
296int kvm_arch_hardware_setup(void)
297{
298 return 0;
299}
300
301void kvm_arch_hardware_unsetup(void)
302{
303}
304
305void kvm_arch_check_processor_compat(void *rtn)
306{
9dd921cf 307 *(int *)rtn = kvmppc_core_check_processor_compat();
bbf45ba5
HB
308}
309
e08b9637 310int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
bbf45ba5 311{
cbbc58d4
AK
312 struct kvmppc_ops *kvm_ops = NULL;
313 /*
314 * if we have both HV and PR enabled, default is HV
315 */
316 if (type == 0) {
317 if (kvmppc_hv_ops)
318 kvm_ops = kvmppc_hv_ops;
319 else
320 kvm_ops = kvmppc_pr_ops;
321 if (!kvm_ops)
322 goto err_out;
323 } else if (type == KVM_VM_PPC_HV) {
324 if (!kvmppc_hv_ops)
325 goto err_out;
326 kvm_ops = kvmppc_hv_ops;
327 } else if (type == KVM_VM_PPC_PR) {
328 if (!kvmppc_pr_ops)
329 goto err_out;
330 kvm_ops = kvmppc_pr_ops;
331 } else
332 goto err_out;
333
334 if (kvm_ops->owner && !try_module_get(kvm_ops->owner))
335 return -ENOENT;
336
337 kvm->arch.kvm_ops = kvm_ops;
f9e0554d 338 return kvmppc_core_init_vm(kvm);
cbbc58d4
AK
339err_out:
340 return -EINVAL;
bbf45ba5
HB
341}
342
d89f5eff 343void kvm_arch_destroy_vm(struct kvm *kvm)
bbf45ba5
HB
344{
345 unsigned int i;
988a2cae 346 struct kvm_vcpu *vcpu;
bbf45ba5 347
988a2cae
GN
348 kvm_for_each_vcpu(i, vcpu, kvm)
349 kvm_arch_vcpu_free(vcpu);
350
351 mutex_lock(&kvm->lock);
352 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
353 kvm->vcpus[i] = NULL;
354
355 atomic_set(&kvm->online_vcpus, 0);
f9e0554d
PM
356
357 kvmppc_core_destroy_vm(kvm);
358
988a2cae 359 mutex_unlock(&kvm->lock);
cbbc58d4
AK
360
361 /* drop the module reference */
362 module_put(kvm->arch.kvm_ops->owner);
bbf45ba5
HB
363}
364
ad8ba2cd
SY
365void kvm_arch_sync_events(struct kvm *kvm)
366{
367}
368
bbf45ba5
HB
369int kvm_dev_ioctl_check_extension(long ext)
370{
371 int r;
cbbc58d4
AK
372 /* FIXME!!
373 * Should some of this be vm ioctl ? is it possible now ?
374 */
375 int hv_enabled = kvmppc_hv_ops ? 1 : 0;
bbf45ba5
HB
376
377 switch (ext) {
5ce941ee
SW
378#ifdef CONFIG_BOOKE
379 case KVM_CAP_PPC_BOOKE_SREGS:
f61c94bb 380 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1c810636 381 case KVM_CAP_PPC_EPR:
5ce941ee 382#else
e15a1137 383 case KVM_CAP_PPC_SEGSTATE:
1022fc3d 384 case KVM_CAP_PPC_HIOR:
930b412a 385 case KVM_CAP_PPC_PAPR:
5ce941ee 386#endif
18978768 387 case KVM_CAP_PPC_UNSET_IRQ:
7b4203e8 388 case KVM_CAP_PPC_IRQ_LEVEL:
71fbfd5f 389 case KVM_CAP_ENABLE_CAP:
699a0ea0 390 case KVM_CAP_ENABLE_CAP_VM:
e24ed81f 391 case KVM_CAP_ONE_REG:
0e673fb6 392 case KVM_CAP_IOEVENTFD:
5df554ad 393 case KVM_CAP_DEVICE_CTRL:
de56a948
PM
394 r = 1;
395 break;
de56a948 396 case KVM_CAP_PPC_PAIRED_SINGLES:
ad0a048b 397 case KVM_CAP_PPC_OSI:
15711e9c 398 case KVM_CAP_PPC_GET_PVINFO:
bf7ca4bd 399#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc 400 case KVM_CAP_SW_TLB:
eb1e4f43 401#endif
699cc876 402 /* We support this only for PR */
cbbc58d4 403 r = !hv_enabled;
e15a1137 404 break;
699cc876 405#ifdef CONFIG_KVM_MMIO
588968b6
LV
406 case KVM_CAP_COALESCED_MMIO:
407 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
408 break;
54738c09 409#endif
699cc876
AK
410#ifdef CONFIG_KVM_MPIC
411 case KVM_CAP_IRQ_MPIC:
412 r = 1;
413 break;
414#endif
415
f31e65e1 416#ifdef CONFIG_PPC_BOOK3S_64
54738c09 417 case KVM_CAP_SPAPR_TCE:
32fad281 418 case KVM_CAP_PPC_ALLOC_HTAB:
8e591cb7 419 case KVM_CAP_PPC_RTAS:
f2e91042 420 case KVM_CAP_PPC_FIXUP_HCALL:
699a0ea0 421 case KVM_CAP_PPC_ENABLE_HCALL:
5975a2e0
PM
422#ifdef CONFIG_KVM_XICS
423 case KVM_CAP_IRQ_XICS:
424#endif
54738c09
DG
425 r = 1;
426 break;
f31e65e1 427#endif /* CONFIG_PPC_BOOK3S_64 */
699cc876 428#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
371fefd6 429 case KVM_CAP_PPC_SMT:
cbbc58d4 430 if (hv_enabled)
3102f784 431 r = threads_per_subcore;
699cc876
AK
432 else
433 r = 0;
371fefd6 434 break;
aa04b4cc 435 case KVM_CAP_PPC_RMA:
cbbc58d4 436 r = hv_enabled;
9e368f29 437 /* PPC970 requires an RMA */
699cc876 438 if (r && cpu_has_feature(CPU_FTR_ARCH_201))
9e368f29 439 r = 2;
aa04b4cc 440 break;
f4800b1f 441#endif
342d3db7 442 case KVM_CAP_SYNC_MMU:
699cc876 443#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
cbbc58d4 444 if (hv_enabled)
699cc876
AK
445 r = cpu_has_feature(CPU_FTR_ARCH_206) ? 1 : 0;
446 else
447 r = 0;
f4800b1f
AG
448#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
449 r = 1;
450#else
451 r = 0;
a2932923 452#endif
699cc876
AK
453 break;
454#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
a2932923 455 case KVM_CAP_PPC_HTAB_FD:
cbbc58d4 456 r = hv_enabled;
a2932923 457 break;
de56a948 458#endif
b5434032
ME
459 case KVM_CAP_NR_VCPUS:
460 /*
461 * Recommending a number of CPUs is somewhat arbitrary; we
462 * return the number of present CPUs for -HV (since a host
463 * will have secondary threads "offline"), and for other KVM
464 * implementations just count online CPUs.
465 */
cbbc58d4 466 if (hv_enabled)
699cc876
AK
467 r = num_present_cpus();
468 else
469 r = num_online_cpus();
b5434032
ME
470 break;
471 case KVM_CAP_MAX_VCPUS:
472 r = KVM_MAX_VCPUS;
473 break;
5b74716e
BH
474#ifdef CONFIG_PPC_BOOK3S_64
475 case KVM_CAP_PPC_GET_SMMU_INFO:
476 r = 1;
477 break;
478#endif
bbf45ba5
HB
479 default:
480 r = 0;
481 break;
482 }
483 return r;
484
485}
486
487long kvm_arch_dev_ioctl(struct file *filp,
488 unsigned int ioctl, unsigned long arg)
489{
490 return -EINVAL;
491}
492
5587027c 493void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
db3fe4eb
TY
494 struct kvm_memory_slot *dont)
495{
5587027c 496 kvmppc_core_free_memslot(kvm, free, dont);
db3fe4eb
TY
497}
498
5587027c
AK
499int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
500 unsigned long npages)
db3fe4eb 501{
5587027c 502 return kvmppc_core_create_memslot(kvm, slot, npages);
db3fe4eb
TY
503}
504
e59dbe09
TY
505void kvm_arch_memslots_updated(struct kvm *kvm)
506{
507}
508
f7784b8e 509int kvm_arch_prepare_memory_region(struct kvm *kvm,
462fce46 510 struct kvm_memory_slot *memslot,
7b6195a9
TY
511 struct kvm_userspace_memory_region *mem,
512 enum kvm_mr_change change)
bbf45ba5 513{
a66b48c3 514 return kvmppc_core_prepare_memory_region(kvm, memslot, mem);
bbf45ba5
HB
515}
516
f7784b8e 517void kvm_arch_commit_memory_region(struct kvm *kvm,
462fce46 518 struct kvm_userspace_memory_region *mem,
8482644a
TY
519 const struct kvm_memory_slot *old,
520 enum kvm_mr_change change)
f7784b8e 521{
dfe49dbd 522 kvmppc_core_commit_memory_region(kvm, mem, old);
f7784b8e
MT
523}
524
2df72e9b
MT
525void kvm_arch_flush_shadow_all(struct kvm *kvm)
526{
527}
f7784b8e 528
2df72e9b
MT
529void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
530 struct kvm_memory_slot *slot)
34d4cb8f 531{
dfe49dbd 532 kvmppc_core_flush_memslot(kvm, slot);
34d4cb8f
MT
533}
534
bbf45ba5
HB
535struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
536{
73e75b41
HB
537 struct kvm_vcpu *vcpu;
538 vcpu = kvmppc_core_vcpu_create(kvm, id);
03cdab53
ME
539 if (!IS_ERR(vcpu)) {
540 vcpu->arch.wqp = &vcpu->wq;
06056bfb 541 kvmppc_create_vcpu_debugfs(vcpu, id);
03cdab53 542 }
73e75b41 543 return vcpu;
bbf45ba5
HB
544}
545
42897d86
MT
546int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
547{
548 return 0;
549}
550
bbf45ba5
HB
551void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
552{
a595405d
AG
553 /* Make sure we're not using the vcpu anymore */
554 hrtimer_cancel(&vcpu->arch.dec_timer);
555 tasklet_kill(&vcpu->arch.tasklet);
556
73e75b41 557 kvmppc_remove_vcpu_debugfs(vcpu);
eb1e4f43
SW
558
559 switch (vcpu->arch.irq_type) {
560 case KVMPPC_IRQ_MPIC:
561 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);
562 break;
bc5ad3f3
BH
563 case KVMPPC_IRQ_XICS:
564 kvmppc_xics_free_icp(vcpu);
565 break;
eb1e4f43
SW
566 }
567
db93f574 568 kvmppc_core_vcpu_free(vcpu);
bbf45ba5
HB
569}
570
571void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
572{
573 kvm_arch_vcpu_free(vcpu);
574}
575
576int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
577{
9dd921cf 578 return kvmppc_core_pending_dec(vcpu);
bbf45ba5
HB
579}
580
544c6761
AG
581/*
582 * low level hrtimer wake routine. Because this runs in hardirq context
583 * we schedule a tasklet to do the real work.
584 */
585enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
586{
587 struct kvm_vcpu *vcpu;
588
589 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
590 tasklet_schedule(&vcpu->arch.tasklet);
591
592 return HRTIMER_NORESTART;
593}
594
bbf45ba5
HB
595int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
596{
f61c94bb
BB
597 int ret;
598
544c6761
AG
599 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
600 tasklet_init(&vcpu->arch.tasklet, kvmppc_decrementer_func, (ulong)vcpu);
601 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
de56a948 602 vcpu->arch.dec_expires = ~(u64)0;
bbf45ba5 603
09000adb
BB
604#ifdef CONFIG_KVM_EXIT_TIMING
605 mutex_init(&vcpu->arch.exit_timing_lock);
606#endif
f61c94bb
BB
607 ret = kvmppc_subarch_vcpu_init(vcpu);
608 return ret;
bbf45ba5
HB
609}
610
611void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
612{
ecc0981f 613 kvmppc_mmu_destroy(vcpu);
f61c94bb 614 kvmppc_subarch_vcpu_uninit(vcpu);
bbf45ba5
HB
615}
616
617void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
618{
eab17672
SW
619#ifdef CONFIG_BOOKE
620 /*
621 * vrsave (formerly usprg0) isn't used by Linux, but may
622 * be used by the guest.
623 *
624 * On non-booke this is associated with Altivec and
625 * is handled by code in book3s.c.
626 */
627 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
628#endif
9dd921cf 629 kvmppc_core_vcpu_load(vcpu, cpu);
bbf45ba5
HB
630}
631
632void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
633{
9dd921cf 634 kvmppc_core_vcpu_put(vcpu);
eab17672
SW
635#ifdef CONFIG_BOOKE
636 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
637#endif
bbf45ba5
HB
638}
639
bbf45ba5
HB
640static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
641 struct kvm_run *run)
642{
8e5b26b5 643 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, run->dcr.data);
bbf45ba5
HB
644}
645
646static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
647 struct kvm_run *run)
648{
69b61833 649 u64 uninitialized_var(gpr);
bbf45ba5 650
8e5b26b5 651 if (run->mmio.len > sizeof(gpr)) {
bbf45ba5
HB
652 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
653 return;
654 }
655
656 if (vcpu->arch.mmio_is_bigendian) {
657 switch (run->mmio.len) {
b104d066 658 case 8: gpr = *(u64 *)run->mmio.data; break;
8e5b26b5
AG
659 case 4: gpr = *(u32 *)run->mmio.data; break;
660 case 2: gpr = *(u16 *)run->mmio.data; break;
661 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
662 }
663 } else {
664 /* Convert BE data from userland back to LE. */
665 switch (run->mmio.len) {
8e5b26b5
AG
666 case 4: gpr = ld_le32((u32 *)run->mmio.data); break;
667 case 2: gpr = ld_le16((u16 *)run->mmio.data); break;
668 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
669 }
670 }
8e5b26b5 671
3587d534
AG
672 if (vcpu->arch.mmio_sign_extend) {
673 switch (run->mmio.len) {
674#ifdef CONFIG_PPC64
675 case 4:
676 gpr = (s64)(s32)gpr;
677 break;
678#endif
679 case 2:
680 gpr = (s64)(s16)gpr;
681 break;
682 case 1:
683 gpr = (s64)(s8)gpr;
684 break;
685 }
686 }
687
8e5b26b5 688 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
b104d066 689
b3c5d3c2
AG
690 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
691 case KVM_MMIO_REG_GPR:
b104d066
AG
692 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
693 break;
b3c5d3c2 694 case KVM_MMIO_REG_FPR:
efff1912 695 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b104d066 696 break;
287d5611 697#ifdef CONFIG_PPC_BOOK3S
b3c5d3c2
AG
698 case KVM_MMIO_REG_QPR:
699 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 700 break;
b3c5d3c2 701 case KVM_MMIO_REG_FQPR:
efff1912 702 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b3c5d3c2 703 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 704 break;
287d5611 705#endif
b104d066
AG
706 default:
707 BUG();
708 }
bbf45ba5
HB
709}
710
711int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
712 unsigned int rt, unsigned int bytes,
713 int is_default_endian)
bbf45ba5 714{
ed840ee9 715 int idx, ret;
73601775
CLG
716 int is_bigendian;
717
718 if (kvmppc_need_byteswap(vcpu)) {
719 /* Default endianness is "little endian". */
720 is_bigendian = !is_default_endian;
721 } else {
722 /* Default endianness is "big endian". */
723 is_bigendian = is_default_endian;
724 }
ed840ee9 725
bbf45ba5
HB
726 if (bytes > sizeof(run->mmio.data)) {
727 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
728 run->mmio.len);
729 }
730
731 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
732 run->mmio.len = bytes;
733 run->mmio.is_write = 0;
734
735 vcpu->arch.io_gpr = rt;
736 vcpu->arch.mmio_is_bigendian = is_bigendian;
737 vcpu->mmio_needed = 1;
738 vcpu->mmio_is_write = 0;
3587d534 739 vcpu->arch.mmio_sign_extend = 0;
bbf45ba5 740
ed840ee9
SW
741 idx = srcu_read_lock(&vcpu->kvm->srcu);
742
743 ret = kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, run->mmio.phys_addr,
744 bytes, &run->mmio.data);
745
746 srcu_read_unlock(&vcpu->kvm->srcu, idx);
747
748 if (!ret) {
0e673fb6
AG
749 kvmppc_complete_mmio_load(vcpu, run);
750 vcpu->mmio_needed = 0;
751 return EMULATE_DONE;
752 }
753
bbf45ba5
HB
754 return EMULATE_DO_MMIO;
755}
2ba9f0d8 756EXPORT_SYMBOL_GPL(kvmppc_handle_load);
bbf45ba5 757
3587d534
AG
758/* Same as above, but sign extends */
759int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
760 unsigned int rt, unsigned int bytes,
761 int is_default_endian)
3587d534
AG
762{
763 int r;
764
3587d534 765 vcpu->arch.mmio_sign_extend = 1;
73601775 766 r = kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian);
3587d534
AG
767
768 return r;
769}
770
bbf45ba5 771int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775 772 u64 val, unsigned int bytes, int is_default_endian)
bbf45ba5
HB
773{
774 void *data = run->mmio.data;
ed840ee9 775 int idx, ret;
73601775
CLG
776 int is_bigendian;
777
778 if (kvmppc_need_byteswap(vcpu)) {
779 /* Default endianness is "little endian". */
780 is_bigendian = !is_default_endian;
781 } else {
782 /* Default endianness is "big endian". */
783 is_bigendian = is_default_endian;
784 }
bbf45ba5
HB
785
786 if (bytes > sizeof(run->mmio.data)) {
787 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
788 run->mmio.len);
789 }
790
791 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
792 run->mmio.len = bytes;
793 run->mmio.is_write = 1;
794 vcpu->mmio_needed = 1;
795 vcpu->mmio_is_write = 1;
796
797 /* Store the value at the lowest bytes in 'data'. */
798 if (is_bigendian) {
799 switch (bytes) {
b104d066 800 case 8: *(u64 *)data = val; break;
bbf45ba5
HB
801 case 4: *(u32 *)data = val; break;
802 case 2: *(u16 *)data = val; break;
803 case 1: *(u8 *)data = val; break;
804 }
805 } else {
806 /* Store LE value into 'data'. */
807 switch (bytes) {
808 case 4: st_le32(data, val); break;
809 case 2: st_le16(data, val); break;
810 case 1: *(u8 *)data = val; break;
811 }
812 }
813
ed840ee9
SW
814 idx = srcu_read_lock(&vcpu->kvm->srcu);
815
816 ret = kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, run->mmio.phys_addr,
817 bytes, &run->mmio.data);
818
819 srcu_read_unlock(&vcpu->kvm->srcu, idx);
820
821 if (!ret) {
0e673fb6
AG
822 vcpu->mmio_needed = 0;
823 return EMULATE_DONE;
824 }
825
bbf45ba5
HB
826 return EMULATE_DO_MMIO;
827}
2ba9f0d8 828EXPORT_SYMBOL_GPL(kvmppc_handle_store);
bbf45ba5
HB
829
830int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
831{
832 int r;
833 sigset_t sigsaved;
834
835 if (vcpu->sigset_active)
836 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
837
838 if (vcpu->mmio_needed) {
839 if (!vcpu->mmio_is_write)
840 kvmppc_complete_mmio_load(vcpu, run);
841 vcpu->mmio_needed = 0;
842 } else if (vcpu->arch.dcr_needed) {
843 if (!vcpu->arch.dcr_is_write)
844 kvmppc_complete_dcr_load(vcpu, run);
845 vcpu->arch.dcr_needed = 0;
ad0a048b
AG
846 } else if (vcpu->arch.osi_needed) {
847 u64 *gprs = run->osi.gprs;
848 int i;
849
850 for (i = 0; i < 32; i++)
851 kvmppc_set_gpr(vcpu, i, gprs[i]);
852 vcpu->arch.osi_needed = 0;
de56a948
PM
853 } else if (vcpu->arch.hcall_needed) {
854 int i;
855
856 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
857 for (i = 0; i < 9; ++i)
858 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
859 vcpu->arch.hcall_needed = 0;
1c810636
AG
860#ifdef CONFIG_BOOKE
861 } else if (vcpu->arch.epr_needed) {
862 kvmppc_set_epr(vcpu, run->epr.epr);
863 vcpu->arch.epr_needed = 0;
864#endif
bbf45ba5
HB
865 }
866
df6909e5 867 r = kvmppc_vcpu_run(run, vcpu);
bbf45ba5
HB
868
869 if (vcpu->sigset_active)
870 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
871
872 return r;
873}
874
875int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
876{
19ccb76a 877 if (irq->irq == KVM_INTERRUPT_UNSET) {
4fe27d2a 878 kvmppc_core_dequeue_external(vcpu);
19ccb76a
PM
879 return 0;
880 }
881
882 kvmppc_core_queue_external(vcpu, irq);
b6d33834 883
dfd4d47e 884 kvm_vcpu_kick(vcpu);
45c5eb67 885
bbf45ba5
HB
886 return 0;
887}
888
71fbfd5f
AG
889static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
890 struct kvm_enable_cap *cap)
891{
892 int r;
893
894 if (cap->flags)
895 return -EINVAL;
896
897 switch (cap->cap) {
ad0a048b
AG
898 case KVM_CAP_PPC_OSI:
899 r = 0;
900 vcpu->arch.osi_enabled = true;
901 break;
930b412a
AG
902 case KVM_CAP_PPC_PAPR:
903 r = 0;
904 vcpu->arch.papr_enabled = true;
905 break;
1c810636
AG
906 case KVM_CAP_PPC_EPR:
907 r = 0;
5df554ad
SW
908 if (cap->args[0])
909 vcpu->arch.epr_flags |= KVMPPC_EPR_USER;
910 else
911 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER;
1c810636 912 break;
f61c94bb
BB
913#ifdef CONFIG_BOOKE
914 case KVM_CAP_PPC_BOOKE_WATCHDOG:
915 r = 0;
916 vcpu->arch.watchdog_enabled = true;
917 break;
918#endif
bf7ca4bd 919#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
920 case KVM_CAP_SW_TLB: {
921 struct kvm_config_tlb cfg;
922 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
923
924 r = -EFAULT;
925 if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
926 break;
927
928 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
929 break;
eb1e4f43
SW
930 }
931#endif
932#ifdef CONFIG_KVM_MPIC
933 case KVM_CAP_IRQ_MPIC: {
70abaded 934 struct fd f;
eb1e4f43
SW
935 struct kvm_device *dev;
936
937 r = -EBADF;
70abaded
AV
938 f = fdget(cap->args[0]);
939 if (!f.file)
eb1e4f43
SW
940 break;
941
942 r = -EPERM;
70abaded 943 dev = kvm_device_from_filp(f.file);
eb1e4f43
SW
944 if (dev)
945 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]);
946
70abaded 947 fdput(f);
eb1e4f43 948 break;
dc83b8bc
SW
949 }
950#endif
5975a2e0
PM
951#ifdef CONFIG_KVM_XICS
952 case KVM_CAP_IRQ_XICS: {
70abaded 953 struct fd f;
5975a2e0
PM
954 struct kvm_device *dev;
955
956 r = -EBADF;
70abaded
AV
957 f = fdget(cap->args[0]);
958 if (!f.file)
5975a2e0
PM
959 break;
960
961 r = -EPERM;
70abaded 962 dev = kvm_device_from_filp(f.file);
5975a2e0
PM
963 if (dev)
964 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]);
965
70abaded 966 fdput(f);
5975a2e0
PM
967 break;
968 }
969#endif /* CONFIG_KVM_XICS */
71fbfd5f
AG
970 default:
971 r = -EINVAL;
972 break;
973 }
974
af8f38b3
AG
975 if (!r)
976 r = kvmppc_sanity_check(vcpu);
977
71fbfd5f
AG
978 return r;
979}
980
bbf45ba5
HB
981int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
982 struct kvm_mp_state *mp_state)
983{
984 return -EINVAL;
985}
986
987int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
988 struct kvm_mp_state *mp_state)
989{
990 return -EINVAL;
991}
992
993long kvm_arch_vcpu_ioctl(struct file *filp,
994 unsigned int ioctl, unsigned long arg)
995{
996 struct kvm_vcpu *vcpu = filp->private_data;
997 void __user *argp = (void __user *)arg;
998 long r;
999
93736624
AK
1000 switch (ioctl) {
1001 case KVM_INTERRUPT: {
bbf45ba5
HB
1002 struct kvm_interrupt irq;
1003 r = -EFAULT;
1004 if (copy_from_user(&irq, argp, sizeof(irq)))
93736624 1005 goto out;
bbf45ba5 1006 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
93736624 1007 goto out;
bbf45ba5 1008 }
19483d14 1009
71fbfd5f
AG
1010 case KVM_ENABLE_CAP:
1011 {
1012 struct kvm_enable_cap cap;
1013 r = -EFAULT;
1014 if (copy_from_user(&cap, argp, sizeof(cap)))
1015 goto out;
1016 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
1017 break;
1018 }
dc83b8bc 1019
e24ed81f
AG
1020 case KVM_SET_ONE_REG:
1021 case KVM_GET_ONE_REG:
1022 {
1023 struct kvm_one_reg reg;
1024 r = -EFAULT;
1025 if (copy_from_user(&reg, argp, sizeof(reg)))
1026 goto out;
1027 if (ioctl == KVM_SET_ONE_REG)
1028 r = kvm_vcpu_ioctl_set_one_reg(vcpu, &reg);
1029 else
1030 r = kvm_vcpu_ioctl_get_one_reg(vcpu, &reg);
1031 break;
1032 }
1033
bf7ca4bd 1034#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1035 case KVM_DIRTY_TLB: {
1036 struct kvm_dirty_tlb dirty;
1037 r = -EFAULT;
1038 if (copy_from_user(&dirty, argp, sizeof(dirty)))
1039 goto out;
1040 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
1041 break;
1042 }
1043#endif
bbf45ba5
HB
1044 default:
1045 r = -EINVAL;
1046 }
1047
1048out:
1049 return r;
1050}
1051
5b1c1493
CO
1052int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
1053{
1054 return VM_FAULT_SIGBUS;
1055}
1056
15711e9c
AG
1057static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
1058{
784bafac
SY
1059 u32 inst_nop = 0x60000000;
1060#ifdef CONFIG_KVM_BOOKE_HV
1061 u32 inst_sc1 = 0x44000022;
2743103f
AG
1062 pvinfo->hcall[0] = cpu_to_be32(inst_sc1);
1063 pvinfo->hcall[1] = cpu_to_be32(inst_nop);
1064 pvinfo->hcall[2] = cpu_to_be32(inst_nop);
1065 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1066#else
15711e9c
AG
1067 u32 inst_lis = 0x3c000000;
1068 u32 inst_ori = 0x60000000;
15711e9c
AG
1069 u32 inst_sc = 0x44000002;
1070 u32 inst_imm_mask = 0xffff;
1071
1072 /*
1073 * The hypercall to get into KVM from within guest context is as
1074 * follows:
1075 *
1076 * lis r0, r0, KVM_SC_MAGIC_R0@h
1077 * ori r0, KVM_SC_MAGIC_R0@l
1078 * sc
1079 * nop
1080 */
2743103f
AG
1081 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask));
1082 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask));
1083 pvinfo->hcall[2] = cpu_to_be32(inst_sc);
1084 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1085#endif
15711e9c 1086
9202e076
LYB
1087 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE;
1088
15711e9c
AG
1089 return 0;
1090}
1091
5efdb4be
AG
1092int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
1093 bool line_status)
1094{
1095 if (!irqchip_in_kernel(kvm))
1096 return -ENXIO;
1097
1098 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1099 irq_event->irq, irq_event->level,
1100 line_status);
1101 return 0;
1102}
1103
699a0ea0
PM
1104
1105static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
1106 struct kvm_enable_cap *cap)
1107{
1108 int r;
1109
1110 if (cap->flags)
1111 return -EINVAL;
1112
1113 switch (cap->cap) {
1114#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1115 case KVM_CAP_PPC_ENABLE_HCALL: {
1116 unsigned long hcall = cap->args[0];
1117
1118 r = -EINVAL;
1119 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) ||
1120 cap->args[1] > 1)
1121 break;
1122 if (cap->args[1])
1123 set_bit(hcall / 4, kvm->arch.enabled_hcalls);
1124 else
1125 clear_bit(hcall / 4, kvm->arch.enabled_hcalls);
1126 r = 0;
1127 break;
1128 }
1129#endif
1130 default:
1131 r = -EINVAL;
1132 break;
1133 }
1134
1135 return r;
1136}
1137
bbf45ba5
HB
1138long kvm_arch_vm_ioctl(struct file *filp,
1139 unsigned int ioctl, unsigned long arg)
1140{
5df554ad 1141 struct kvm *kvm __maybe_unused = filp->private_data;
15711e9c 1142 void __user *argp = (void __user *)arg;
bbf45ba5
HB
1143 long r;
1144
1145 switch (ioctl) {
15711e9c
AG
1146 case KVM_PPC_GET_PVINFO: {
1147 struct kvm_ppc_pvinfo pvinfo;
d8cdddcd 1148 memset(&pvinfo, 0, sizeof(pvinfo));
15711e9c
AG
1149 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
1150 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
1151 r = -EFAULT;
1152 goto out;
1153 }
1154
1155 break;
1156 }
699a0ea0
PM
1157 case KVM_ENABLE_CAP:
1158 {
1159 struct kvm_enable_cap cap;
1160 r = -EFAULT;
1161 if (copy_from_user(&cap, argp, sizeof(cap)))
1162 goto out;
1163 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
1164 break;
1165 }
f31e65e1 1166#ifdef CONFIG_PPC_BOOK3S_64
54738c09
DG
1167 case KVM_CREATE_SPAPR_TCE: {
1168 struct kvm_create_spapr_tce create_tce;
54738c09
DG
1169
1170 r = -EFAULT;
1171 if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
1172 goto out;
1173 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce);
1174 goto out;
1175 }
5b74716e 1176 case KVM_PPC_GET_SMMU_INFO: {
5b74716e 1177 struct kvm_ppc_smmu_info info;
cbbc58d4 1178 struct kvm *kvm = filp->private_data;
5b74716e
BH
1179
1180 memset(&info, 0, sizeof(info));
cbbc58d4 1181 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info);
5b74716e
BH
1182 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1183 r = -EFAULT;
1184 break;
1185 }
8e591cb7
ME
1186 case KVM_PPC_RTAS_DEFINE_TOKEN: {
1187 struct kvm *kvm = filp->private_data;
1188
1189 r = kvm_vm_ioctl_rtas_define_token(kvm, argp);
1190 break;
1191 }
cbbc58d4
AK
1192 default: {
1193 struct kvm *kvm = filp->private_data;
1194 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg);
1195 }
3a167bea 1196#else /* CONFIG_PPC_BOOK3S_64 */
bbf45ba5 1197 default:
367e1319 1198 r = -ENOTTY;
3a167bea 1199#endif
bbf45ba5 1200 }
15711e9c 1201out:
bbf45ba5
HB
1202 return r;
1203}
1204
043cc4d7
SW
1205static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
1206static unsigned long nr_lpids;
1207
1208long kvmppc_alloc_lpid(void)
1209{
1210 long lpid;
1211
1212 do {
1213 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
1214 if (lpid >= nr_lpids) {
1215 pr_err("%s: No LPIDs free\n", __func__);
1216 return -ENOMEM;
1217 }
1218 } while (test_and_set_bit(lpid, lpid_inuse));
1219
1220 return lpid;
1221}
2ba9f0d8 1222EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid);
043cc4d7
SW
1223
1224void kvmppc_claim_lpid(long lpid)
1225{
1226 set_bit(lpid, lpid_inuse);
1227}
2ba9f0d8 1228EXPORT_SYMBOL_GPL(kvmppc_claim_lpid);
043cc4d7
SW
1229
1230void kvmppc_free_lpid(long lpid)
1231{
1232 clear_bit(lpid, lpid_inuse);
1233}
2ba9f0d8 1234EXPORT_SYMBOL_GPL(kvmppc_free_lpid);
043cc4d7
SW
1235
1236void kvmppc_init_lpid(unsigned long nr_lpids_param)
1237{
1238 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
1239 memset(lpid_inuse, 0, sizeof(lpid_inuse));
1240}
2ba9f0d8 1241EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
043cc4d7 1242
bbf45ba5
HB
1243int kvm_arch_init(void *opaque)
1244{
1245 return 0;
1246}
1247
1248void kvm_arch_exit(void)
1249{
cbbc58d4 1250
bbf45ba5 1251}