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KVM: s390: Do not report unusabled IDs via KVM_CAP_MAX_VCPU_ID
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CommitLineData
bbf45ba5
HB
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19 */
20
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/kvm_host.h>
bbf45ba5 24#include <linux/vmalloc.h>
544c6761 25#include <linux/hrtimer.h>
174cd4b1 26#include <linux/sched/signal.h>
bbf45ba5 27#include <linux/fs.h>
5a0e3ad6 28#include <linux/slab.h>
eb1e4f43 29#include <linux/file.h>
cbbc58d4 30#include <linux/module.h>
9576730d
SW
31#include <linux/irqbypass.h>
32#include <linux/kvm_irqfd.h>
bbf45ba5 33#include <asm/cputable.h>
7c0f6ba6 34#include <linux/uaccess.h>
bbf45ba5 35#include <asm/kvm_ppc.h>
83aae4a8 36#include <asm/tlbflush.h>
371fefd6 37#include <asm/cputhreads.h>
bd2be683 38#include <asm/irqflags.h>
58ded420 39#include <asm/iommu.h>
6f63e81b 40#include <asm/switch_to.h>
5af50993 41#include <asm/xive.h>
3214d01f
PM
42#ifdef CONFIG_PPC_PSERIES
43#include <asm/hvcall.h>
44#include <asm/plpar_wrappers.h>
45#endif
5af50993 46
73e75b41 47#include "timing.h"
5efdb4be 48#include "irq.h"
fad7b9b5 49#include "../mm/mmu_decl.h"
bbf45ba5 50
46f43c6e
MT
51#define CREATE_TRACE_POINTS
52#include "trace.h"
53
cbbc58d4
AK
54struct kvmppc_ops *kvmppc_hv_ops;
55EXPORT_SYMBOL_GPL(kvmppc_hv_ops);
56struct kvmppc_ops *kvmppc_pr_ops;
57EXPORT_SYMBOL_GPL(kvmppc_pr_ops);
58
3a167bea 59
bbf45ba5
HB
60int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
61{
2fa6e1e1 62 return !!(v->arch.pending_exceptions) || kvm_request_pending(v);
bbf45ba5
HB
63}
64
199b5763
LM
65bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
66{
67 return false;
68}
69
b6d33834
CD
70int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
71{
72 return 1;
73}
74
03d25c5b
AG
75/*
76 * Common checks before entering the guest world. Call with interrupts
77 * disabled.
78 *
7ee78855
AG
79 * returns:
80 *
81 * == 1 if we're ready to go into guest state
82 * <= 0 if we need to go back to the host with return value
03d25c5b
AG
83 */
84int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
85{
6c85f52b
SW
86 int r;
87
88 WARN_ON(irqs_disabled());
89 hard_irq_disable();
03d25c5b 90
03d25c5b
AG
91 while (true) {
92 if (need_resched()) {
93 local_irq_enable();
94 cond_resched();
6c85f52b 95 hard_irq_disable();
03d25c5b
AG
96 continue;
97 }
98
99 if (signal_pending(current)) {
7ee78855
AG
100 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
101 vcpu->run->exit_reason = KVM_EXIT_INTR;
102 r = -EINTR;
03d25c5b
AG
103 break;
104 }
105
5bd1cf11
SW
106 vcpu->mode = IN_GUEST_MODE;
107
108 /*
109 * Reading vcpu->requests must happen after setting vcpu->mode,
110 * so we don't miss a request because the requester sees
111 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests
112 * before next entering the guest (and thus doesn't IPI).
489153c7
LT
113 * This also orders the write to mode from any reads
114 * to the page tables done while the VCPU is running.
115 * Please see the comment in kvm_flush_remote_tlbs.
5bd1cf11 116 */
03d25c5b 117 smp_mb();
5bd1cf11 118
2fa6e1e1 119 if (kvm_request_pending(vcpu)) {
03d25c5b
AG
120 /* Make sure we process requests preemptable */
121 local_irq_enable();
122 trace_kvm_check_requests(vcpu);
7c973a2e 123 r = kvmppc_core_check_requests(vcpu);
6c85f52b 124 hard_irq_disable();
7c973a2e
AG
125 if (r > 0)
126 continue;
127 break;
03d25c5b
AG
128 }
129
130 if (kvmppc_core_prepare_to_enter(vcpu)) {
131 /* interrupts got enabled in between, so we
132 are back at square 1 */
133 continue;
134 }
135
6edaa530 136 guest_enter_irqoff();
6c85f52b 137 return 1;
03d25c5b
AG
138 }
139
6c85f52b
SW
140 /* return to host */
141 local_irq_enable();
03d25c5b
AG
142 return r;
143}
2ba9f0d8 144EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter);
03d25c5b 145
5deb8e7a
AG
146#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
147static void kvmppc_swab_shared(struct kvm_vcpu *vcpu)
148{
149 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
150 int i;
151
152 shared->sprg0 = swab64(shared->sprg0);
153 shared->sprg1 = swab64(shared->sprg1);
154 shared->sprg2 = swab64(shared->sprg2);
155 shared->sprg3 = swab64(shared->sprg3);
156 shared->srr0 = swab64(shared->srr0);
157 shared->srr1 = swab64(shared->srr1);
158 shared->dar = swab64(shared->dar);
159 shared->msr = swab64(shared->msr);
160 shared->dsisr = swab32(shared->dsisr);
161 shared->int_pending = swab32(shared->int_pending);
162 for (i = 0; i < ARRAY_SIZE(shared->sr); i++)
163 shared->sr[i] = swab32(shared->sr[i]);
164}
165#endif
166
2a342ed5
AG
167int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
168{
169 int nr = kvmppc_get_gpr(vcpu, 11);
170 int r;
171 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
172 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
173 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
174 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
175 unsigned long r2 = 0;
176
5deb8e7a 177 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
2a342ed5
AG
178 /* 32 bit mode */
179 param1 &= 0xffffffff;
180 param2 &= 0xffffffff;
181 param3 &= 0xffffffff;
182 param4 &= 0xffffffff;
183 }
184
185 switch (nr) {
fdcf8bd7 186 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE):
5fc87407 187 {
5deb8e7a
AG
188#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
189 /* Book3S can be little endian, find it out here */
190 int shared_big_endian = true;
191 if (vcpu->arch.intr_msr & MSR_LE)
192 shared_big_endian = false;
193 if (shared_big_endian != vcpu->arch.shared_big_endian)
194 kvmppc_swab_shared(vcpu);
195 vcpu->arch.shared_big_endian = shared_big_endian;
196#endif
197
f3383cf8
AG
198 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) {
199 /*
200 * Older versions of the Linux magic page code had
201 * a bug where they would map their trampoline code
202 * NX. If that's the case, remove !PR NX capability.
203 */
204 vcpu->arch.disable_kernel_nx = true;
205 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
206 }
207
208 vcpu->arch.magic_page_pa = param1 & ~0xfffULL;
209 vcpu->arch.magic_page_ea = param2 & ~0xfffULL;
5fc87407 210
89b68c96
AG
211#ifdef CONFIG_PPC_64K_PAGES
212 /*
213 * Make sure our 4k magic page is in the same window of a 64k
214 * page within the guest and within the host's page.
215 */
216 if ((vcpu->arch.magic_page_pa & 0xf000) !=
217 ((ulong)vcpu->arch.shared & 0xf000)) {
218 void *old_shared = vcpu->arch.shared;
219 ulong shared = (ulong)vcpu->arch.shared;
220 void *new_shared;
221
222 shared &= PAGE_MASK;
223 shared |= vcpu->arch.magic_page_pa & 0xf000;
224 new_shared = (void*)shared;
225 memcpy(new_shared, old_shared, 0x1000);
226 vcpu->arch.shared = new_shared;
227 }
228#endif
229
b5904972 230 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
7508e16c 231
fdcf8bd7 232 r = EV_SUCCESS;
5fc87407
AG
233 break;
234 }
fdcf8bd7
SY
235 case KVM_HCALL_TOKEN(KVM_HC_FEATURES):
236 r = EV_SUCCESS;
bf7ca4bd 237#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
5fc87407
AG
238 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
239#endif
2a342ed5
AG
240
241 /* Second return value is in r4 */
2a342ed5 242 break;
9202e076
LYB
243 case EV_HCALL_TOKEN(EV_IDLE):
244 r = EV_SUCCESS;
245 kvm_vcpu_block(vcpu);
72875d8a 246 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9202e076 247 break;
2a342ed5 248 default:
fdcf8bd7 249 r = EV_UNIMPLEMENTED;
2a342ed5
AG
250 break;
251 }
252
7508e16c
AG
253 kvmppc_set_gpr(vcpu, 4, r2);
254
2a342ed5
AG
255 return r;
256}
2ba9f0d8 257EXPORT_SYMBOL_GPL(kvmppc_kvm_pv);
bbf45ba5 258
af8f38b3
AG
259int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
260{
261 int r = false;
262
263 /* We have to know what CPU to virtualize */
264 if (!vcpu->arch.pvr)
265 goto out;
266
267 /* PAPR only works with book3s_64 */
268 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
269 goto out;
270
af8f38b3 271 /* HV KVM can only do PAPR mode for now */
a78b55d1 272 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm))
af8f38b3 273 goto out;
af8f38b3 274
d30f6e48
SW
275#ifdef CONFIG_KVM_BOOKE_HV
276 if (!cpu_has_feature(CPU_FTR_EMB_HV))
277 goto out;
278#endif
279
af8f38b3
AG
280 r = true;
281
282out:
283 vcpu->arch.sane = r;
284 return r ? 0 : -EINVAL;
285}
2ba9f0d8 286EXPORT_SYMBOL_GPL(kvmppc_sanity_check);
af8f38b3 287
bbf45ba5
HB
288int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
289{
290 enum emulation_result er;
291 int r;
292
d69614a2 293 er = kvmppc_emulate_loadstore(vcpu);
bbf45ba5
HB
294 switch (er) {
295 case EMULATE_DONE:
296 /* Future optimization: only reload non-volatiles if they were
297 * actually modified. */
298 r = RESUME_GUEST_NV;
299 break;
51f04726
MC
300 case EMULATE_AGAIN:
301 r = RESUME_GUEST;
302 break;
bbf45ba5
HB
303 case EMULATE_DO_MMIO:
304 run->exit_reason = KVM_EXIT_MMIO;
305 /* We must reload nonvolatiles because "update" load/store
306 * instructions modify register state. */
307 /* Future optimization: only reload non-volatiles if they were
308 * actually modified. */
309 r = RESUME_HOST_NV;
310 break;
311 case EMULATE_FAIL:
51f04726
MC
312 {
313 u32 last_inst;
314
8d0eff63 315 kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
bbf45ba5 316 /* XXX Deliver Program interrupt to guest. */
51f04726 317 pr_emerg("%s: emulation failed (%08x)\n", __func__, last_inst);
bbf45ba5
HB
318 r = RESUME_HOST;
319 break;
51f04726 320 }
bbf45ba5 321 default:
5a33169e
AG
322 WARN_ON(1);
323 r = RESUME_GUEST;
bbf45ba5
HB
324 }
325
326 return r;
327}
2ba9f0d8 328EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio);
bbf45ba5 329
35c4a733
AG
330int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
331 bool data)
332{
c12fb43c 333 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733
AG
334 struct kvmppc_pte pte;
335 int r;
336
337 vcpu->stat.st++;
338
339 r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
340 XLATE_WRITE, &pte);
341 if (r < 0)
342 return r;
343
344 *eaddr = pte.raddr;
345
346 if (!pte.may_write)
347 return -EPERM;
348
c12fb43c
AG
349 /* Magic page override */
350 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
351 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
352 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
353 void *magic = vcpu->arch.shared;
354 magic += pte.eaddr & 0xfff;
355 memcpy(magic, ptr, size);
356 return EMULATE_DONE;
357 }
358
35c4a733
AG
359 if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size))
360 return EMULATE_DO_MMIO;
361
362 return EMULATE_DONE;
363}
364EXPORT_SYMBOL_GPL(kvmppc_st);
365
366int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
367 bool data)
368{
c12fb43c 369 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733 370 struct kvmppc_pte pte;
35c4a733
AG
371 int rc;
372
373 vcpu->stat.ld++;
374
375 rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
376 XLATE_READ, &pte);
377 if (rc)
378 return rc;
379
380 *eaddr = pte.raddr;
381
382 if (!pte.may_read)
383 return -EPERM;
384
385 if (!data && !pte.may_execute)
386 return -ENOEXEC;
387
c12fb43c
AG
388 /* Magic page override */
389 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
390 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
391 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
392 void *magic = vcpu->arch.shared;
393 magic += pte.eaddr & 0xfff;
394 memcpy(ptr, magic, size);
395 return EMULATE_DONE;
396 }
397
c45c5514
AG
398 if (kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size))
399 return EMULATE_DO_MMIO;
35c4a733
AG
400
401 return EMULATE_DONE;
35c4a733
AG
402}
403EXPORT_SYMBOL_GPL(kvmppc_ld);
404
13a34e06 405int kvm_arch_hardware_enable(void)
bbf45ba5 406{
10474ae8 407 return 0;
bbf45ba5
HB
408}
409
bbf45ba5
HB
410int kvm_arch_hardware_setup(void)
411{
412 return 0;
413}
414
bbf45ba5
HB
415void kvm_arch_check_processor_compat(void *rtn)
416{
9dd921cf 417 *(int *)rtn = kvmppc_core_check_processor_compat();
bbf45ba5
HB
418}
419
e08b9637 420int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
bbf45ba5 421{
cbbc58d4
AK
422 struct kvmppc_ops *kvm_ops = NULL;
423 /*
424 * if we have both HV and PR enabled, default is HV
425 */
426 if (type == 0) {
427 if (kvmppc_hv_ops)
428 kvm_ops = kvmppc_hv_ops;
429 else
430 kvm_ops = kvmppc_pr_ops;
431 if (!kvm_ops)
432 goto err_out;
433 } else if (type == KVM_VM_PPC_HV) {
434 if (!kvmppc_hv_ops)
435 goto err_out;
436 kvm_ops = kvmppc_hv_ops;
437 } else if (type == KVM_VM_PPC_PR) {
438 if (!kvmppc_pr_ops)
439 goto err_out;
440 kvm_ops = kvmppc_pr_ops;
441 } else
442 goto err_out;
443
444 if (kvm_ops->owner && !try_module_get(kvm_ops->owner))
445 return -ENOENT;
446
447 kvm->arch.kvm_ops = kvm_ops;
f9e0554d 448 return kvmppc_core_init_vm(kvm);
cbbc58d4
AK
449err_out:
450 return -EINVAL;
bbf45ba5
HB
451}
452
235539b4
LC
453bool kvm_arch_has_vcpu_debugfs(void)
454{
455 return false;
456}
457
458int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
459{
460 return 0;
461}
462
d89f5eff 463void kvm_arch_destroy_vm(struct kvm *kvm)
bbf45ba5
HB
464{
465 unsigned int i;
988a2cae 466 struct kvm_vcpu *vcpu;
bbf45ba5 467
e17769eb
SW
468#ifdef CONFIG_KVM_XICS
469 /*
470 * We call kick_all_cpus_sync() to ensure that all
471 * CPUs have executed any pending IPIs before we
472 * continue and free VCPUs structures below.
473 */
474 if (is_kvmppc_hv_enabled(kvm))
475 kick_all_cpus_sync();
476#endif
477
988a2cae
GN
478 kvm_for_each_vcpu(i, vcpu, kvm)
479 kvm_arch_vcpu_free(vcpu);
480
481 mutex_lock(&kvm->lock);
482 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
483 kvm->vcpus[i] = NULL;
484
485 atomic_set(&kvm->online_vcpus, 0);
f9e0554d
PM
486
487 kvmppc_core_destroy_vm(kvm);
488
988a2cae 489 mutex_unlock(&kvm->lock);
cbbc58d4
AK
490
491 /* drop the module reference */
492 module_put(kvm->arch.kvm_ops->owner);
bbf45ba5
HB
493}
494
784aa3d7 495int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
bbf45ba5
HB
496{
497 int r;
7a58777a 498 /* Assume we're using HV mode when the HV module is loaded */
cbbc58d4 499 int hv_enabled = kvmppc_hv_ops ? 1 : 0;
bbf45ba5 500
7a58777a
AG
501 if (kvm) {
502 /*
503 * Hooray - we know which VM type we're running on. Depend on
504 * that rather than the guess above.
505 */
506 hv_enabled = is_kvmppc_hv_enabled(kvm);
507 }
508
bbf45ba5 509 switch (ext) {
5ce941ee
SW
510#ifdef CONFIG_BOOKE
511 case KVM_CAP_PPC_BOOKE_SREGS:
f61c94bb 512 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1c810636 513 case KVM_CAP_PPC_EPR:
5ce941ee 514#else
e15a1137 515 case KVM_CAP_PPC_SEGSTATE:
1022fc3d 516 case KVM_CAP_PPC_HIOR:
930b412a 517 case KVM_CAP_PPC_PAPR:
5ce941ee 518#endif
18978768 519 case KVM_CAP_PPC_UNSET_IRQ:
7b4203e8 520 case KVM_CAP_PPC_IRQ_LEVEL:
71fbfd5f 521 case KVM_CAP_ENABLE_CAP:
699a0ea0 522 case KVM_CAP_ENABLE_CAP_VM:
e24ed81f 523 case KVM_CAP_ONE_REG:
0e673fb6 524 case KVM_CAP_IOEVENTFD:
5df554ad 525 case KVM_CAP_DEVICE_CTRL:
460df4c1 526 case KVM_CAP_IMMEDIATE_EXIT:
de56a948
PM
527 r = 1;
528 break;
de56a948 529 case KVM_CAP_PPC_PAIRED_SINGLES:
ad0a048b 530 case KVM_CAP_PPC_OSI:
15711e9c 531 case KVM_CAP_PPC_GET_PVINFO:
bf7ca4bd 532#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc 533 case KVM_CAP_SW_TLB:
eb1e4f43 534#endif
699cc876 535 /* We support this only for PR */
cbbc58d4 536 r = !hv_enabled;
e15a1137 537 break;
699cc876
AK
538#ifdef CONFIG_KVM_MPIC
539 case KVM_CAP_IRQ_MPIC:
540 r = 1;
541 break;
542#endif
543
f31e65e1 544#ifdef CONFIG_PPC_BOOK3S_64
54738c09 545 case KVM_CAP_SPAPR_TCE:
58ded420 546 case KVM_CAP_SPAPR_TCE_64:
a0f7e6af
SJS
547 r = 1;
548 break;
121f80ba 549 case KVM_CAP_SPAPR_TCE_VFIO:
a0f7e6af
SJS
550 r = !!cpu_has_feature(CPU_FTR_HVMODE);
551 break;
8e591cb7 552 case KVM_CAP_PPC_RTAS:
f2e91042 553 case KVM_CAP_PPC_FIXUP_HCALL:
699a0ea0 554 case KVM_CAP_PPC_ENABLE_HCALL:
5975a2e0
PM
555#ifdef CONFIG_KVM_XICS
556 case KVM_CAP_IRQ_XICS:
557#endif
3214d01f 558 case KVM_CAP_PPC_GET_CPU_CHAR:
54738c09
DG
559 r = 1;
560 break;
a8acaece
DG
561
562 case KVM_CAP_PPC_ALLOC_HTAB:
563 r = hv_enabled;
564 break;
f31e65e1 565#endif /* CONFIG_PPC_BOOK3S_64 */
699cc876 566#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
371fefd6 567 case KVM_CAP_PPC_SMT:
45c940ba 568 r = 0;
57900694
PM
569 if (kvm) {
570 if (kvm->arch.emul_smt_mode > 1)
571 r = kvm->arch.emul_smt_mode;
572 else
573 r = kvm->arch.smt_mode;
574 } else if (hv_enabled) {
45c940ba
PM
575 if (cpu_has_feature(CPU_FTR_ARCH_300))
576 r = 1;
577 else
578 r = threads_per_subcore;
579 }
371fefd6 580 break;
2ed4f9dd
PM
581 case KVM_CAP_PPC_SMT_POSSIBLE:
582 r = 1;
583 if (hv_enabled) {
584 if (!cpu_has_feature(CPU_FTR_ARCH_300))
585 r = ((threads_per_subcore << 1) - 1);
586 else
587 /* P9 can emulate dbells, so allow any mode */
588 r = 8 | 4 | 2 | 1;
589 }
590 break;
aa04b4cc 591 case KVM_CAP_PPC_RMA:
c17b98cf 592 r = 0;
aa04b4cc 593 break;
e928e9cb
ME
594 case KVM_CAP_PPC_HWRNG:
595 r = kvmppc_hwrng_present();
596 break;
c9270132 597 case KVM_CAP_PPC_MMU_RADIX:
8cf4ecc0 598 r = !!(hv_enabled && radix_enabled());
c9270132
PM
599 break;
600 case KVM_CAP_PPC_MMU_HASH_V3:
18c3640c 601 r = !!(hv_enabled && cpu_has_feature(CPU_FTR_ARCH_300));
c9270132 602 break;
f4800b1f 603#endif
342d3db7 604 case KVM_CAP_SYNC_MMU:
699cc876 605#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
c17b98cf 606 r = hv_enabled;
f4800b1f
AG
607#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
608 r = 1;
609#else
610 r = 0;
a2932923 611#endif
699cc876
AK
612 break;
613#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
a2932923 614 case KVM_CAP_PPC_HTAB_FD:
cbbc58d4 615 r = hv_enabled;
a2932923 616 break;
de56a948 617#endif
b5434032
ME
618 case KVM_CAP_NR_VCPUS:
619 /*
620 * Recommending a number of CPUs is somewhat arbitrary; we
621 * return the number of present CPUs for -HV (since a host
622 * will have secondary threads "offline"), and for other KVM
623 * implementations just count online CPUs.
624 */
cbbc58d4 625 if (hv_enabled)
699cc876
AK
626 r = num_present_cpus();
627 else
628 r = num_online_cpus();
b5434032 629 break;
bfec5c2c
ND
630 case KVM_CAP_NR_MEMSLOTS:
631 r = KVM_USER_MEM_SLOTS;
632 break;
b5434032
ME
633 case KVM_CAP_MAX_VCPUS:
634 r = KVM_MAX_VCPUS;
635 break;
83df27fd
TH
636 case KVM_CAP_MAX_VCPU_ID:
637 r = KVM_MAX_VCPU_ID;
638 break;
5b74716e
BH
639#ifdef CONFIG_PPC_BOOK3S_64
640 case KVM_CAP_PPC_GET_SMMU_INFO:
641 r = 1;
642 break;
d3695aa4
AK
643 case KVM_CAP_SPAPR_MULTITCE:
644 r = 1;
645 break;
050f2339 646 case KVM_CAP_SPAPR_RESIZE_HPT:
334bd226 647 r = !!hv_enabled;
050f2339 648 break;
134764ed
AP
649#endif
650#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
651 case KVM_CAP_PPC_FWNMI:
652 r = hv_enabled;
653 break;
5b74716e 654#endif
f175c5ce 655#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
23528bb2 656 case KVM_CAP_PPC_HTM:
072df813 657 r = hv_enabled &&
f175c5ce
PM
658 (!!(cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_HTM) ||
659 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST));
23528bb2 660 break;
f175c5ce 661#endif
bbf45ba5
HB
662 default:
663 r = 0;
664 break;
665 }
666 return r;
667
668}
669
670long kvm_arch_dev_ioctl(struct file *filp,
671 unsigned int ioctl, unsigned long arg)
672{
673 return -EINVAL;
674}
675
5587027c 676void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
db3fe4eb
TY
677 struct kvm_memory_slot *dont)
678{
5587027c 679 kvmppc_core_free_memslot(kvm, free, dont);
db3fe4eb
TY
680}
681
5587027c
AK
682int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
683 unsigned long npages)
db3fe4eb 684{
5587027c 685 return kvmppc_core_create_memslot(kvm, slot, npages);
db3fe4eb
TY
686}
687
f7784b8e 688int kvm_arch_prepare_memory_region(struct kvm *kvm,
462fce46 689 struct kvm_memory_slot *memslot,
09170a49 690 const struct kvm_userspace_memory_region *mem,
7b6195a9 691 enum kvm_mr_change change)
bbf45ba5 692{
a66b48c3 693 return kvmppc_core_prepare_memory_region(kvm, memslot, mem);
bbf45ba5
HB
694}
695
f7784b8e 696void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 697 const struct kvm_userspace_memory_region *mem,
8482644a 698 const struct kvm_memory_slot *old,
f36f3f28 699 const struct kvm_memory_slot *new,
8482644a 700 enum kvm_mr_change change)
f7784b8e 701{
f36f3f28 702 kvmppc_core_commit_memory_region(kvm, mem, old, new);
f7784b8e
MT
703}
704
2df72e9b
MT
705void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
706 struct kvm_memory_slot *slot)
34d4cb8f 707{
dfe49dbd 708 kvmppc_core_flush_memslot(kvm, slot);
34d4cb8f
MT
709}
710
bbf45ba5
HB
711struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
712{
73e75b41
HB
713 struct kvm_vcpu *vcpu;
714 vcpu = kvmppc_core_vcpu_create(kvm, id);
03cdab53
ME
715 if (!IS_ERR(vcpu)) {
716 vcpu->arch.wqp = &vcpu->wq;
06056bfb 717 kvmppc_create_vcpu_debugfs(vcpu, id);
03cdab53 718 }
73e75b41 719 return vcpu;
bbf45ba5
HB
720}
721
31928aa5 722void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
42897d86 723{
42897d86
MT
724}
725
bbf45ba5
HB
726void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
727{
a595405d
AG
728 /* Make sure we're not using the vcpu anymore */
729 hrtimer_cancel(&vcpu->arch.dec_timer);
a595405d 730
73e75b41 731 kvmppc_remove_vcpu_debugfs(vcpu);
eb1e4f43
SW
732
733 switch (vcpu->arch.irq_type) {
734 case KVMPPC_IRQ_MPIC:
735 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);
736 break;
bc5ad3f3 737 case KVMPPC_IRQ_XICS:
5af50993
BH
738 if (xive_enabled())
739 kvmppc_xive_cleanup_vcpu(vcpu);
740 else
741 kvmppc_xics_free_icp(vcpu);
bc5ad3f3 742 break;
eb1e4f43
SW
743 }
744
db93f574 745 kvmppc_core_vcpu_free(vcpu);
bbf45ba5
HB
746}
747
748void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
749{
750 kvm_arch_vcpu_free(vcpu);
751}
752
753int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
754{
9dd921cf 755 return kvmppc_core_pending_dec(vcpu);
bbf45ba5
HB
756}
757
5358a963 758static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
544c6761
AG
759{
760 struct kvm_vcpu *vcpu;
761
762 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
d02d4d15 763 kvmppc_decrementer_func(vcpu);
544c6761
AG
764
765 return HRTIMER_NORESTART;
766}
767
bbf45ba5
HB
768int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
769{
f61c94bb
BB
770 int ret;
771
544c6761 772 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
544c6761 773 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
cc560695 774 vcpu->arch.dec_expires = get_tb();
bbf45ba5 775
09000adb
BB
776#ifdef CONFIG_KVM_EXIT_TIMING
777 mutex_init(&vcpu->arch.exit_timing_lock);
778#endif
f61c94bb
BB
779 ret = kvmppc_subarch_vcpu_init(vcpu);
780 return ret;
bbf45ba5
HB
781}
782
783void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
784{
ecc0981f 785 kvmppc_mmu_destroy(vcpu);
f61c94bb 786 kvmppc_subarch_vcpu_uninit(vcpu);
bbf45ba5
HB
787}
788
789void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
790{
eab17672
SW
791#ifdef CONFIG_BOOKE
792 /*
793 * vrsave (formerly usprg0) isn't used by Linux, but may
794 * be used by the guest.
795 *
796 * On non-booke this is associated with Altivec and
797 * is handled by code in book3s.c.
798 */
799 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
800#endif
9dd921cf 801 kvmppc_core_vcpu_load(vcpu, cpu);
bbf45ba5
HB
802}
803
804void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
805{
9dd921cf 806 kvmppc_core_vcpu_put(vcpu);
eab17672
SW
807#ifdef CONFIG_BOOKE
808 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
809#endif
bbf45ba5
HB
810}
811
9576730d
SW
812/*
813 * irq_bypass_add_producer and irq_bypass_del_producer are only
814 * useful if the architecture supports PCI passthrough.
815 * irq_bypass_stop and irq_bypass_start are not needed and so
816 * kvm_ops are not defined for them.
817 */
818bool kvm_arch_has_irq_bypass(void)
819{
820 return ((kvmppc_hv_ops && kvmppc_hv_ops->irq_bypass_add_producer) ||
821 (kvmppc_pr_ops && kvmppc_pr_ops->irq_bypass_add_producer));
822}
823
824int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
825 struct irq_bypass_producer *prod)
826{
827 struct kvm_kernel_irqfd *irqfd =
828 container_of(cons, struct kvm_kernel_irqfd, consumer);
829 struct kvm *kvm = irqfd->kvm;
830
831 if (kvm->arch.kvm_ops->irq_bypass_add_producer)
832 return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod);
833
834 return 0;
835}
836
837void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
838 struct irq_bypass_producer *prod)
839{
840 struct kvm_kernel_irqfd *irqfd =
841 container_of(cons, struct kvm_kernel_irqfd, consumer);
842 struct kvm *kvm = irqfd->kvm;
843
844 if (kvm->arch.kvm_ops->irq_bypass_del_producer)
845 kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod);
846}
847
6f63e81b
BL
848#ifdef CONFIG_VSX
849static inline int kvmppc_get_vsr_dword_offset(int index)
850{
851 int offset;
852
853 if ((index != 0) && (index != 1))
854 return -1;
855
856#ifdef __BIG_ENDIAN
857 offset = index;
858#else
859 offset = 1 - index;
860#endif
861
862 return offset;
863}
864
865static inline int kvmppc_get_vsr_word_offset(int index)
866{
867 int offset;
868
869 if ((index > 3) || (index < 0))
870 return -1;
871
872#ifdef __BIG_ENDIAN
873 offset = index;
874#else
875 offset = 3 - index;
876#endif
877 return offset;
878}
879
880static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu,
881 u64 gpr)
882{
883 union kvmppc_one_reg val;
884 int offset = kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset);
885 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
886
887 if (offset == -1)
888 return;
889
890 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
891 val.vval = VCPU_VSX_VR(vcpu, index);
892 val.vsxval[offset] = gpr;
893 VCPU_VSX_VR(vcpu, index) = val.vval;
894 } else {
895 VCPU_VSX_FPR(vcpu, index, offset) = gpr;
896 }
897}
898
899static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu,
900 u64 gpr)
901{
902 union kvmppc_one_reg val;
903 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
904
905 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
906 val.vval = VCPU_VSX_VR(vcpu, index);
907 val.vsxval[0] = gpr;
908 val.vsxval[1] = gpr;
909 VCPU_VSX_VR(vcpu, index) = val.vval;
910 } else {
911 VCPU_VSX_FPR(vcpu, index, 0) = gpr;
912 VCPU_VSX_FPR(vcpu, index, 1) = gpr;
913 }
914}
915
916static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu,
917 u32 gpr32)
918{
919 union kvmppc_one_reg val;
920 int offset = kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset);
921 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
922 int dword_offset, word_offset;
923
924 if (offset == -1)
925 return;
926
927 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
928 val.vval = VCPU_VSX_VR(vcpu, index);
929 val.vsx32val[offset] = gpr32;
930 VCPU_VSX_VR(vcpu, index) = val.vval;
931 } else {
932 dword_offset = offset / 2;
933 word_offset = offset % 2;
934 val.vsxval[0] = VCPU_VSX_FPR(vcpu, index, dword_offset);
935 val.vsx32val[word_offset] = gpr32;
936 VCPU_VSX_FPR(vcpu, index, dword_offset) = val.vsxval[0];
937 }
938}
939#endif /* CONFIG_VSX */
940
b540072a
JRZ
941#ifdef CONFIG_ALTIVEC
942static inline void kvmppc_set_vmx_dword(struct kvm_vcpu *vcpu,
943 u64 gpr)
944{
945 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
946 u32 hi, lo;
947 u32 di;
948
949#ifdef __BIG_ENDIAN
950 hi = gpr >> 32;
951 lo = gpr & 0xffffffff;
952#else
953 lo = gpr >> 32;
954 hi = gpr & 0xffffffff;
955#endif
956
957 di = 2 - vcpu->arch.mmio_vmx_copy_nums; /* doubleword index */
958 if (di > 1)
959 return;
960
961 if (vcpu->arch.mmio_host_swabbed)
962 di = 1 - di;
963
964 VCPU_VSX_VR(vcpu, index).u[di * 2] = hi;
965 VCPU_VSX_VR(vcpu, index).u[di * 2 + 1] = lo;
966}
967#endif /* CONFIG_ALTIVEC */
968
6f63e81b
BL
969#ifdef CONFIG_PPC_FPU
970static inline u64 sp_to_dp(u32 fprs)
971{
972 u64 fprd;
973
974 preempt_disable();
975 enable_kernel_fp();
976 asm ("lfs%U1%X1 0,%1; stfd%U0%X0 0,%0" : "=m" (fprd) : "m" (fprs)
977 : "fr0");
978 preempt_enable();
979 return fprd;
980}
981
982static inline u32 dp_to_sp(u64 fprd)
983{
984 u32 fprs;
985
986 preempt_disable();
987 enable_kernel_fp();
988 asm ("lfd%U1%X1 0,%1; stfs%U0%X0 0,%0" : "=m" (fprs) : "m" (fprd)
989 : "fr0");
990 preempt_enable();
991 return fprs;
992}
993
994#else
995#define sp_to_dp(x) (x)
996#define dp_to_sp(x) (x)
997#endif /* CONFIG_PPC_FPU */
998
bbf45ba5
HB
999static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
1000 struct kvm_run *run)
1001{
69b61833 1002 u64 uninitialized_var(gpr);
bbf45ba5 1003
8e5b26b5 1004 if (run->mmio.len > sizeof(gpr)) {
bbf45ba5
HB
1005 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
1006 return;
1007 }
1008
d078eed3 1009 if (!vcpu->arch.mmio_host_swabbed) {
bbf45ba5 1010 switch (run->mmio.len) {
b104d066 1011 case 8: gpr = *(u64 *)run->mmio.data; break;
8e5b26b5
AG
1012 case 4: gpr = *(u32 *)run->mmio.data; break;
1013 case 2: gpr = *(u16 *)run->mmio.data; break;
1014 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
1015 }
1016 } else {
bbf45ba5 1017 switch (run->mmio.len) {
d078eed3
DG
1018 case 8: gpr = swab64(*(u64 *)run->mmio.data); break;
1019 case 4: gpr = swab32(*(u32 *)run->mmio.data); break;
1020 case 2: gpr = swab16(*(u16 *)run->mmio.data); break;
8e5b26b5 1021 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
1022 }
1023 }
8e5b26b5 1024
6f63e81b
BL
1025 /* conversion between single and double precision */
1026 if ((vcpu->arch.mmio_sp64_extend) && (run->mmio.len == 4))
1027 gpr = sp_to_dp(gpr);
1028
3587d534
AG
1029 if (vcpu->arch.mmio_sign_extend) {
1030 switch (run->mmio.len) {
1031#ifdef CONFIG_PPC64
1032 case 4:
1033 gpr = (s64)(s32)gpr;
1034 break;
1035#endif
1036 case 2:
1037 gpr = (s64)(s16)gpr;
1038 break;
1039 case 1:
1040 gpr = (s64)(s8)gpr;
1041 break;
1042 }
1043 }
1044
b3c5d3c2
AG
1045 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
1046 case KVM_MMIO_REG_GPR:
b104d066
AG
1047 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
1048 break;
b3c5d3c2 1049 case KVM_MMIO_REG_FPR:
efff1912 1050 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b104d066 1051 break;
287d5611 1052#ifdef CONFIG_PPC_BOOK3S
b3c5d3c2
AG
1053 case KVM_MMIO_REG_QPR:
1054 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 1055 break;
b3c5d3c2 1056 case KVM_MMIO_REG_FQPR:
efff1912 1057 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b3c5d3c2 1058 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 1059 break;
6f63e81b
BL
1060#endif
1061#ifdef CONFIG_VSX
1062 case KVM_MMIO_REG_VSX:
1063 if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_DWORD)
1064 kvmppc_set_vsr_dword(vcpu, gpr);
1065 else if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_WORD)
1066 kvmppc_set_vsr_word(vcpu, gpr);
1067 else if (vcpu->arch.mmio_vsx_copy_type ==
1068 KVMPPC_VSX_COPY_DWORD_LOAD_DUMP)
1069 kvmppc_set_vsr_dword_dump(vcpu, gpr);
1070 break;
b540072a
JRZ
1071#endif
1072#ifdef CONFIG_ALTIVEC
1073 case KVM_MMIO_REG_VMX:
1074 kvmppc_set_vmx_dword(vcpu, gpr);
1075 break;
287d5611 1076#endif
b104d066
AG
1077 default:
1078 BUG();
1079 }
bbf45ba5
HB
1080}
1081
eb8b0560
PM
1082static int __kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1083 unsigned int rt, unsigned int bytes,
1084 int is_default_endian, int sign_extend)
bbf45ba5 1085{
ed840ee9 1086 int idx, ret;
d078eed3 1087 bool host_swabbed;
73601775 1088
d078eed3 1089 /* Pity C doesn't have a logical XOR operator */
73601775 1090 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 1091 host_swabbed = is_default_endian;
73601775 1092 } else {
d078eed3 1093 host_swabbed = !is_default_endian;
73601775 1094 }
ed840ee9 1095
bbf45ba5
HB
1096 if (bytes > sizeof(run->mmio.data)) {
1097 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
1098 run->mmio.len);
1099 }
1100
1101 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
1102 run->mmio.len = bytes;
1103 run->mmio.is_write = 0;
1104
1105 vcpu->arch.io_gpr = rt;
d078eed3 1106 vcpu->arch.mmio_host_swabbed = host_swabbed;
bbf45ba5
HB
1107 vcpu->mmio_needed = 1;
1108 vcpu->mmio_is_write = 0;
eb8b0560 1109 vcpu->arch.mmio_sign_extend = sign_extend;
bbf45ba5 1110
ed840ee9
SW
1111 idx = srcu_read_lock(&vcpu->kvm->srcu);
1112
e32edf4f 1113 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
1114 bytes, &run->mmio.data);
1115
1116 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1117
1118 if (!ret) {
0e673fb6
AG
1119 kvmppc_complete_mmio_load(vcpu, run);
1120 vcpu->mmio_needed = 0;
1121 return EMULATE_DONE;
1122 }
1123
bbf45ba5
HB
1124 return EMULATE_DO_MMIO;
1125}
eb8b0560
PM
1126
1127int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1128 unsigned int rt, unsigned int bytes,
1129 int is_default_endian)
1130{
1131 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 0);
1132}
2ba9f0d8 1133EXPORT_SYMBOL_GPL(kvmppc_handle_load);
bbf45ba5 1134
3587d534
AG
1135/* Same as above, but sign extends */
1136int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
1137 unsigned int rt, unsigned int bytes,
1138 int is_default_endian)
3587d534 1139{
eb8b0560 1140 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 1);
3587d534
AG
1141}
1142
6f63e81b
BL
1143#ifdef CONFIG_VSX
1144int kvmppc_handle_vsx_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1145 unsigned int rt, unsigned int bytes,
1146 int is_default_endian, int mmio_sign_extend)
1147{
1148 enum emulation_result emulated = EMULATE_DONE;
1149
1150 /* Currently, mmio_vsx_copy_nums only allowed to be less than 4 */
1151 if ( (vcpu->arch.mmio_vsx_copy_nums > 4) ||
1152 (vcpu->arch.mmio_vsx_copy_nums < 0) ) {
1153 return EMULATE_FAIL;
1154 }
1155
1156 while (vcpu->arch.mmio_vsx_copy_nums) {
1157 emulated = __kvmppc_handle_load(run, vcpu, rt, bytes,
1158 is_default_endian, mmio_sign_extend);
1159
1160 if (emulated != EMULATE_DONE)
1161 break;
1162
1163 vcpu->arch.paddr_accessed += run->mmio.len;
1164
1165 vcpu->arch.mmio_vsx_copy_nums--;
1166 vcpu->arch.mmio_vsx_offset++;
1167 }
1168 return emulated;
1169}
1170#endif /* CONFIG_VSX */
1171
bbf45ba5 1172int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775 1173 u64 val, unsigned int bytes, int is_default_endian)
bbf45ba5
HB
1174{
1175 void *data = run->mmio.data;
ed840ee9 1176 int idx, ret;
d078eed3 1177 bool host_swabbed;
73601775 1178
d078eed3 1179 /* Pity C doesn't have a logical XOR operator */
73601775 1180 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 1181 host_swabbed = is_default_endian;
73601775 1182 } else {
d078eed3 1183 host_swabbed = !is_default_endian;
73601775 1184 }
bbf45ba5
HB
1185
1186 if (bytes > sizeof(run->mmio.data)) {
1187 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
1188 run->mmio.len);
1189 }
1190
1191 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
1192 run->mmio.len = bytes;
1193 run->mmio.is_write = 1;
1194 vcpu->mmio_needed = 1;
1195 vcpu->mmio_is_write = 1;
1196
6f63e81b
BL
1197 if ((vcpu->arch.mmio_sp64_extend) && (bytes == 4))
1198 val = dp_to_sp(val);
1199
bbf45ba5 1200 /* Store the value at the lowest bytes in 'data'. */
d078eed3 1201 if (!host_swabbed) {
bbf45ba5 1202 switch (bytes) {
b104d066 1203 case 8: *(u64 *)data = val; break;
bbf45ba5
HB
1204 case 4: *(u32 *)data = val; break;
1205 case 2: *(u16 *)data = val; break;
1206 case 1: *(u8 *)data = val; break;
1207 }
1208 } else {
bbf45ba5 1209 switch (bytes) {
d078eed3
DG
1210 case 8: *(u64 *)data = swab64(val); break;
1211 case 4: *(u32 *)data = swab32(val); break;
1212 case 2: *(u16 *)data = swab16(val); break;
1213 case 1: *(u8 *)data = val; break;
bbf45ba5
HB
1214 }
1215 }
1216
ed840ee9
SW
1217 idx = srcu_read_lock(&vcpu->kvm->srcu);
1218
e32edf4f 1219 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
1220 bytes, &run->mmio.data);
1221
1222 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1223
1224 if (!ret) {
0e673fb6
AG
1225 vcpu->mmio_needed = 0;
1226 return EMULATE_DONE;
1227 }
1228
bbf45ba5
HB
1229 return EMULATE_DO_MMIO;
1230}
2ba9f0d8 1231EXPORT_SYMBOL_GPL(kvmppc_handle_store);
bbf45ba5 1232
6f63e81b
BL
1233#ifdef CONFIG_VSX
1234static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
1235{
1236 u32 dword_offset, word_offset;
1237 union kvmppc_one_reg reg;
1238 int vsx_offset = 0;
1239 int copy_type = vcpu->arch.mmio_vsx_copy_type;
1240 int result = 0;
1241
1242 switch (copy_type) {
1243 case KVMPPC_VSX_COPY_DWORD:
1244 vsx_offset =
1245 kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset);
1246
1247 if (vsx_offset == -1) {
1248 result = -1;
1249 break;
1250 }
1251
1252 if (!vcpu->arch.mmio_vsx_tx_sx_enabled) {
1253 *val = VCPU_VSX_FPR(vcpu, rs, vsx_offset);
1254 } else {
1255 reg.vval = VCPU_VSX_VR(vcpu, rs);
1256 *val = reg.vsxval[vsx_offset];
1257 }
1258 break;
1259
1260 case KVMPPC_VSX_COPY_WORD:
1261 vsx_offset =
1262 kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset);
1263
1264 if (vsx_offset == -1) {
1265 result = -1;
1266 break;
1267 }
1268
1269 if (!vcpu->arch.mmio_vsx_tx_sx_enabled) {
1270 dword_offset = vsx_offset / 2;
1271 word_offset = vsx_offset % 2;
1272 reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset);
1273 *val = reg.vsx32val[word_offset];
1274 } else {
1275 reg.vval = VCPU_VSX_VR(vcpu, rs);
1276 *val = reg.vsx32val[vsx_offset];
1277 }
1278 break;
1279
1280 default:
1281 result = -1;
1282 break;
1283 }
1284
1285 return result;
1286}
1287
1288int kvmppc_handle_vsx_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
1289 int rs, unsigned int bytes, int is_default_endian)
1290{
1291 u64 val;
1292 enum emulation_result emulated = EMULATE_DONE;
1293
1294 vcpu->arch.io_gpr = rs;
1295
1296 /* Currently, mmio_vsx_copy_nums only allowed to be less than 4 */
1297 if ( (vcpu->arch.mmio_vsx_copy_nums > 4) ||
1298 (vcpu->arch.mmio_vsx_copy_nums < 0) ) {
1299 return EMULATE_FAIL;
1300 }
1301
1302 while (vcpu->arch.mmio_vsx_copy_nums) {
1303 if (kvmppc_get_vsr_data(vcpu, rs, &val) == -1)
1304 return EMULATE_FAIL;
1305
1306 emulated = kvmppc_handle_store(run, vcpu,
1307 val, bytes, is_default_endian);
1308
1309 if (emulated != EMULATE_DONE)
1310 break;
1311
1312 vcpu->arch.paddr_accessed += run->mmio.len;
1313
1314 vcpu->arch.mmio_vsx_copy_nums--;
1315 vcpu->arch.mmio_vsx_offset++;
1316 }
1317
1318 return emulated;
1319}
1320
1321static int kvmppc_emulate_mmio_vsx_loadstore(struct kvm_vcpu *vcpu,
1322 struct kvm_run *run)
1323{
1324 enum emulation_result emulated = EMULATE_FAIL;
1325 int r;
1326
1327 vcpu->arch.paddr_accessed += run->mmio.len;
1328
1329 if (!vcpu->mmio_is_write) {
1330 emulated = kvmppc_handle_vsx_load(run, vcpu, vcpu->arch.io_gpr,
1331 run->mmio.len, 1, vcpu->arch.mmio_sign_extend);
1332 } else {
1333 emulated = kvmppc_handle_vsx_store(run, vcpu,
1334 vcpu->arch.io_gpr, run->mmio.len, 1);
1335 }
1336
1337 switch (emulated) {
1338 case EMULATE_DO_MMIO:
1339 run->exit_reason = KVM_EXIT_MMIO;
1340 r = RESUME_HOST;
1341 break;
1342 case EMULATE_FAIL:
1343 pr_info("KVM: MMIO emulation failed (VSX repeat)\n");
1344 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1345 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
1346 r = RESUME_HOST;
1347 break;
1348 default:
1349 r = RESUME_GUEST;
1350 break;
1351 }
1352 return r;
1353}
1354#endif /* CONFIG_VSX */
1355
b540072a
JRZ
1356#ifdef CONFIG_ALTIVEC
1357/* handle quadword load access in two halves */
1358int kvmppc_handle_load128_by2x64(struct kvm_run *run, struct kvm_vcpu *vcpu,
1359 unsigned int rt, int is_default_endian)
1360{
2301c034 1361 enum emulation_result emulated = EMULATE_DONE;
b540072a
JRZ
1362
1363 while (vcpu->arch.mmio_vmx_copy_nums) {
1364 emulated = __kvmppc_handle_load(run, vcpu, rt, 8,
1365 is_default_endian, 0);
1366
1367 if (emulated != EMULATE_DONE)
1368 break;
1369
1370 vcpu->arch.paddr_accessed += run->mmio.len;
1371 vcpu->arch.mmio_vmx_copy_nums--;
1372 }
1373
1374 return emulated;
1375}
1376
1377static inline int kvmppc_get_vmx_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
1378{
1379 vector128 vrs = VCPU_VSX_VR(vcpu, rs);
1380 u32 di;
1381 u64 w0, w1;
1382
1383 di = 2 - vcpu->arch.mmio_vmx_copy_nums; /* doubleword index */
1384 if (di > 1)
1385 return -1;
1386
1387 if (vcpu->arch.mmio_host_swabbed)
1388 di = 1 - di;
1389
1390 w0 = vrs.u[di * 2];
1391 w1 = vrs.u[di * 2 + 1];
1392
1393#ifdef __BIG_ENDIAN
1394 *val = (w0 << 32) | w1;
1395#else
1396 *val = (w1 << 32) | w0;
1397#endif
1398 return 0;
1399}
1400
1401/* handle quadword store in two halves */
1402int kvmppc_handle_store128_by2x64(struct kvm_run *run, struct kvm_vcpu *vcpu,
1403 unsigned int rs, int is_default_endian)
1404{
1405 u64 val = 0;
1406 enum emulation_result emulated = EMULATE_DONE;
1407
1408 vcpu->arch.io_gpr = rs;
1409
1410 while (vcpu->arch.mmio_vmx_copy_nums) {
1411 if (kvmppc_get_vmx_data(vcpu, rs, &val) == -1)
1412 return EMULATE_FAIL;
1413
1414 emulated = kvmppc_handle_store(run, vcpu, val, 8,
1415 is_default_endian);
1416 if (emulated != EMULATE_DONE)
1417 break;
1418
1419 vcpu->arch.paddr_accessed += run->mmio.len;
1420 vcpu->arch.mmio_vmx_copy_nums--;
1421 }
1422
1423 return emulated;
1424}
1425
1426static int kvmppc_emulate_mmio_vmx_loadstore(struct kvm_vcpu *vcpu,
1427 struct kvm_run *run)
1428{
1429 enum emulation_result emulated = EMULATE_FAIL;
1430 int r;
1431
1432 vcpu->arch.paddr_accessed += run->mmio.len;
1433
1434 if (!vcpu->mmio_is_write) {
1435 emulated = kvmppc_handle_load128_by2x64(run, vcpu,
1436 vcpu->arch.io_gpr, 1);
1437 } else {
1438 emulated = kvmppc_handle_store128_by2x64(run, vcpu,
1439 vcpu->arch.io_gpr, 1);
1440 }
1441
1442 switch (emulated) {
1443 case EMULATE_DO_MMIO:
1444 run->exit_reason = KVM_EXIT_MMIO;
1445 r = RESUME_HOST;
1446 break;
1447 case EMULATE_FAIL:
1448 pr_info("KVM: MMIO emulation failed (VMX repeat)\n");
1449 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1450 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
1451 r = RESUME_HOST;
1452 break;
1453 default:
1454 r = RESUME_GUEST;
1455 break;
1456 }
1457 return r;
1458}
1459#endif /* CONFIG_ALTIVEC */
1460
8a41ea53
MC
1461int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1462{
1463 int r = 0;
1464 union kvmppc_one_reg val;
1465 int size;
1466
1467 size = one_reg_size(reg->id);
1468 if (size > sizeof(val))
1469 return -EINVAL;
1470
1471 r = kvmppc_get_one_reg(vcpu, reg->id, &val);
1472 if (r == -EINVAL) {
1473 r = 0;
1474 switch (reg->id) {
3840edc8
MC
1475#ifdef CONFIG_ALTIVEC
1476 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1477 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1478 r = -ENXIO;
1479 break;
1480 }
b4d7f161 1481 val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
3840edc8
MC
1482 break;
1483 case KVM_REG_PPC_VSCR:
1484 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1485 r = -ENXIO;
1486 break;
1487 }
b4d7f161 1488 val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
3840edc8
MC
1489 break;
1490 case KVM_REG_PPC_VRSAVE:
b4d7f161 1491 val = get_reg_val(reg->id, vcpu->arch.vrsave);
3840edc8
MC
1492 break;
1493#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1494 default:
1495 r = -EINVAL;
1496 break;
1497 }
1498 }
1499
1500 if (r)
1501 return r;
1502
1503 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1504 r = -EFAULT;
1505
1506 return r;
1507}
1508
1509int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1510{
1511 int r;
1512 union kvmppc_one_reg val;
1513 int size;
1514
1515 size = one_reg_size(reg->id);
1516 if (size > sizeof(val))
1517 return -EINVAL;
1518
1519 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1520 return -EFAULT;
1521
1522 r = kvmppc_set_one_reg(vcpu, reg->id, &val);
1523 if (r == -EINVAL) {
1524 r = 0;
1525 switch (reg->id) {
3840edc8
MC
1526#ifdef CONFIG_ALTIVEC
1527 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1528 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1529 r = -ENXIO;
1530 break;
1531 }
b4d7f161 1532 vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
3840edc8
MC
1533 break;
1534 case KVM_REG_PPC_VSCR:
1535 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1536 r = -ENXIO;
1537 break;
1538 }
b4d7f161 1539 vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
3840edc8
MC
1540 break;
1541 case KVM_REG_PPC_VRSAVE:
b4d7f161
GK
1542 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1543 r = -ENXIO;
1544 break;
1545 }
1546 vcpu->arch.vrsave = set_reg_val(reg->id, val);
3840edc8
MC
1547 break;
1548#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1549 default:
1550 r = -EINVAL;
1551 break;
1552 }
1553 }
1554
1555 return r;
1556}
1557
bbf45ba5
HB
1558int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
1559{
1560 int r;
bbf45ba5 1561
bbf45ba5 1562 if (vcpu->mmio_needed) {
6f63e81b 1563 vcpu->mmio_needed = 0;
bbf45ba5
HB
1564 if (!vcpu->mmio_is_write)
1565 kvmppc_complete_mmio_load(vcpu, run);
6f63e81b
BL
1566#ifdef CONFIG_VSX
1567 if (vcpu->arch.mmio_vsx_copy_nums > 0) {
1568 vcpu->arch.mmio_vsx_copy_nums--;
1569 vcpu->arch.mmio_vsx_offset++;
1570 }
1571
1572 if (vcpu->arch.mmio_vsx_copy_nums > 0) {
1573 r = kvmppc_emulate_mmio_vsx_loadstore(vcpu, run);
b540072a
JRZ
1574 if (r == RESUME_HOST) {
1575 vcpu->mmio_needed = 1;
1576 return r;
1577 }
1578 }
1579#endif
1580#ifdef CONFIG_ALTIVEC
1581 if (vcpu->arch.mmio_vmx_copy_nums > 0)
1582 vcpu->arch.mmio_vmx_copy_nums--;
1583
1584 if (vcpu->arch.mmio_vmx_copy_nums > 0) {
1585 r = kvmppc_emulate_mmio_vmx_loadstore(vcpu, run);
6f63e81b
BL
1586 if (r == RESUME_HOST) {
1587 vcpu->mmio_needed = 1;
1588 return r;
1589 }
1590 }
1591#endif
ad0a048b
AG
1592 } else if (vcpu->arch.osi_needed) {
1593 u64 *gprs = run->osi.gprs;
1594 int i;
1595
1596 for (i = 0; i < 32; i++)
1597 kvmppc_set_gpr(vcpu, i, gprs[i]);
1598 vcpu->arch.osi_needed = 0;
de56a948
PM
1599 } else if (vcpu->arch.hcall_needed) {
1600 int i;
1601
1602 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
1603 for (i = 0; i < 9; ++i)
1604 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
1605 vcpu->arch.hcall_needed = 0;
1c810636
AG
1606#ifdef CONFIG_BOOKE
1607 } else if (vcpu->arch.epr_needed) {
1608 kvmppc_set_epr(vcpu, run->epr.epr);
1609 vcpu->arch.epr_needed = 0;
1610#endif
bbf45ba5
HB
1611 }
1612
20b7035c 1613 kvm_sigset_activate(vcpu);
6f63e81b 1614
460df4c1
PB
1615 if (run->immediate_exit)
1616 r = -EINTR;
1617 else
1618 r = kvmppc_vcpu_run(run, vcpu);
bbf45ba5 1619
20b7035c 1620 kvm_sigset_deactivate(vcpu);
bbf45ba5
HB
1621
1622 return r;
1623}
1624
1625int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
1626{
19ccb76a 1627 if (irq->irq == KVM_INTERRUPT_UNSET) {
4fe27d2a 1628 kvmppc_core_dequeue_external(vcpu);
19ccb76a
PM
1629 return 0;
1630 }
1631
1632 kvmppc_core_queue_external(vcpu, irq);
b6d33834 1633
dfd4d47e 1634 kvm_vcpu_kick(vcpu);
45c5eb67 1635
bbf45ba5
HB
1636 return 0;
1637}
1638
71fbfd5f
AG
1639static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
1640 struct kvm_enable_cap *cap)
1641{
1642 int r;
1643
1644 if (cap->flags)
1645 return -EINVAL;
1646
1647 switch (cap->cap) {
ad0a048b
AG
1648 case KVM_CAP_PPC_OSI:
1649 r = 0;
1650 vcpu->arch.osi_enabled = true;
1651 break;
930b412a
AG
1652 case KVM_CAP_PPC_PAPR:
1653 r = 0;
1654 vcpu->arch.papr_enabled = true;
1655 break;
1c810636
AG
1656 case KVM_CAP_PPC_EPR:
1657 r = 0;
5df554ad
SW
1658 if (cap->args[0])
1659 vcpu->arch.epr_flags |= KVMPPC_EPR_USER;
1660 else
1661 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER;
1c810636 1662 break;
f61c94bb
BB
1663#ifdef CONFIG_BOOKE
1664 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1665 r = 0;
1666 vcpu->arch.watchdog_enabled = true;
1667 break;
1668#endif
bf7ca4bd 1669#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1670 case KVM_CAP_SW_TLB: {
1671 struct kvm_config_tlb cfg;
1672 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
1673
1674 r = -EFAULT;
1675 if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
1676 break;
1677
1678 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
1679 break;
eb1e4f43
SW
1680 }
1681#endif
1682#ifdef CONFIG_KVM_MPIC
1683 case KVM_CAP_IRQ_MPIC: {
70abaded 1684 struct fd f;
eb1e4f43
SW
1685 struct kvm_device *dev;
1686
1687 r = -EBADF;
70abaded
AV
1688 f = fdget(cap->args[0]);
1689 if (!f.file)
eb1e4f43
SW
1690 break;
1691
1692 r = -EPERM;
70abaded 1693 dev = kvm_device_from_filp(f.file);
eb1e4f43
SW
1694 if (dev)
1695 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]);
1696
70abaded 1697 fdput(f);
eb1e4f43 1698 break;
dc83b8bc
SW
1699 }
1700#endif
5975a2e0
PM
1701#ifdef CONFIG_KVM_XICS
1702 case KVM_CAP_IRQ_XICS: {
70abaded 1703 struct fd f;
5975a2e0
PM
1704 struct kvm_device *dev;
1705
1706 r = -EBADF;
70abaded
AV
1707 f = fdget(cap->args[0]);
1708 if (!f.file)
5975a2e0
PM
1709 break;
1710
1711 r = -EPERM;
70abaded 1712 dev = kvm_device_from_filp(f.file);
5af50993
BH
1713 if (dev) {
1714 if (xive_enabled())
1715 r = kvmppc_xive_connect_vcpu(dev, vcpu, cap->args[1]);
1716 else
1717 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]);
1718 }
5975a2e0 1719
70abaded 1720 fdput(f);
5975a2e0
PM
1721 break;
1722 }
1723#endif /* CONFIG_KVM_XICS */
134764ed
AP
1724#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
1725 case KVM_CAP_PPC_FWNMI:
1726 r = -EINVAL;
1727 if (!is_kvmppc_hv_enabled(vcpu->kvm))
1728 break;
1729 r = 0;
1730 vcpu->kvm->arch.fwnmi_enabled = true;
1731 break;
1732#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
71fbfd5f
AG
1733 default:
1734 r = -EINVAL;
1735 break;
1736 }
1737
af8f38b3
AG
1738 if (!r)
1739 r = kvmppc_sanity_check(vcpu);
1740
71fbfd5f
AG
1741 return r;
1742}
1743
34a75b0f
PM
1744bool kvm_arch_intc_initialized(struct kvm *kvm)
1745{
1746#ifdef CONFIG_KVM_MPIC
1747 if (kvm->arch.mpic)
1748 return true;
1749#endif
1750#ifdef CONFIG_KVM_XICS
5af50993 1751 if (kvm->arch.xics || kvm->arch.xive)
34a75b0f
PM
1752 return true;
1753#endif
1754 return false;
1755}
1756
bbf45ba5
HB
1757int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
1758 struct kvm_mp_state *mp_state)
1759{
1760 return -EINVAL;
1761}
1762
1763int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
1764 struct kvm_mp_state *mp_state)
1765{
1766 return -EINVAL;
1767}
1768
1769long kvm_arch_vcpu_ioctl(struct file *filp,
1770 unsigned int ioctl, unsigned long arg)
1771{
1772 struct kvm_vcpu *vcpu = filp->private_data;
1773 void __user *argp = (void __user *)arg;
1774 long r;
1775
93736624
AK
1776 switch (ioctl) {
1777 case KVM_INTERRUPT: {
bbf45ba5
HB
1778 struct kvm_interrupt irq;
1779 r = -EFAULT;
1780 if (copy_from_user(&irq, argp, sizeof(irq)))
93736624 1781 goto out;
bbf45ba5 1782 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
93736624 1783 goto out;
bbf45ba5 1784 }
19483d14 1785
71fbfd5f
AG
1786 case KVM_ENABLE_CAP:
1787 {
1788 struct kvm_enable_cap cap;
1789 r = -EFAULT;
1790 if (copy_from_user(&cap, argp, sizeof(cap)))
1791 goto out;
1792 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
1793 break;
1794 }
dc83b8bc 1795
e24ed81f
AG
1796 case KVM_SET_ONE_REG:
1797 case KVM_GET_ONE_REG:
1798 {
1799 struct kvm_one_reg reg;
1800 r = -EFAULT;
1801 if (copy_from_user(&reg, argp, sizeof(reg)))
1802 goto out;
1803 if (ioctl == KVM_SET_ONE_REG)
1804 r = kvm_vcpu_ioctl_set_one_reg(vcpu, &reg);
1805 else
1806 r = kvm_vcpu_ioctl_get_one_reg(vcpu, &reg);
1807 break;
1808 }
1809
bf7ca4bd 1810#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1811 case KVM_DIRTY_TLB: {
1812 struct kvm_dirty_tlb dirty;
1813 r = -EFAULT;
1814 if (copy_from_user(&dirty, argp, sizeof(dirty)))
1815 goto out;
1816 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
1817 break;
1818 }
1819#endif
bbf45ba5
HB
1820 default:
1821 r = -EINVAL;
1822 }
1823
1824out:
1825 return r;
1826}
1827
5b1c1493
CO
1828int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
1829{
1830 return VM_FAULT_SIGBUS;
1831}
1832
15711e9c
AG
1833static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
1834{
784bafac
SY
1835 u32 inst_nop = 0x60000000;
1836#ifdef CONFIG_KVM_BOOKE_HV
1837 u32 inst_sc1 = 0x44000022;
2743103f
AG
1838 pvinfo->hcall[0] = cpu_to_be32(inst_sc1);
1839 pvinfo->hcall[1] = cpu_to_be32(inst_nop);
1840 pvinfo->hcall[2] = cpu_to_be32(inst_nop);
1841 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1842#else
15711e9c
AG
1843 u32 inst_lis = 0x3c000000;
1844 u32 inst_ori = 0x60000000;
15711e9c
AG
1845 u32 inst_sc = 0x44000002;
1846 u32 inst_imm_mask = 0xffff;
1847
1848 /*
1849 * The hypercall to get into KVM from within guest context is as
1850 * follows:
1851 *
1852 * lis r0, r0, KVM_SC_MAGIC_R0@h
1853 * ori r0, KVM_SC_MAGIC_R0@l
1854 * sc
1855 * nop
1856 */
2743103f
AG
1857 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask));
1858 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask));
1859 pvinfo->hcall[2] = cpu_to_be32(inst_sc);
1860 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1861#endif
15711e9c 1862
9202e076
LYB
1863 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE;
1864
15711e9c
AG
1865 return 0;
1866}
1867
5efdb4be
AG
1868int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
1869 bool line_status)
1870{
1871 if (!irqchip_in_kernel(kvm))
1872 return -ENXIO;
1873
1874 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1875 irq_event->irq, irq_event->level,
1876 line_status);
1877 return 0;
1878}
1879
699a0ea0
PM
1880
1881static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
1882 struct kvm_enable_cap *cap)
1883{
1884 int r;
1885
1886 if (cap->flags)
1887 return -EINVAL;
1888
1889 switch (cap->cap) {
1890#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1891 case KVM_CAP_PPC_ENABLE_HCALL: {
1892 unsigned long hcall = cap->args[0];
1893
1894 r = -EINVAL;
1895 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) ||
1896 cap->args[1] > 1)
1897 break;
ae2113a4
PM
1898 if (!kvmppc_book3s_hcall_implemented(kvm, hcall))
1899 break;
699a0ea0
PM
1900 if (cap->args[1])
1901 set_bit(hcall / 4, kvm->arch.enabled_hcalls);
1902 else
1903 clear_bit(hcall / 4, kvm->arch.enabled_hcalls);
1904 r = 0;
1905 break;
1906 }
3c313524
PM
1907 case KVM_CAP_PPC_SMT: {
1908 unsigned long mode = cap->args[0];
1909 unsigned long flags = cap->args[1];
1910
1911 r = -EINVAL;
1912 if (kvm->arch.kvm_ops->set_smt_mode)
1913 r = kvm->arch.kvm_ops->set_smt_mode(kvm, mode, flags);
1914 break;
1915 }
699a0ea0
PM
1916#endif
1917 default:
1918 r = -EINVAL;
1919 break;
1920 }
1921
1922 return r;
1923}
1924
3214d01f
PM
1925#ifdef CONFIG_PPC_BOOK3S_64
1926/*
1927 * These functions check whether the underlying hardware is safe
1928 * against attacks based on observing the effects of speculatively
1929 * executed instructions, and whether it supplies instructions for
1930 * use in workarounds. The information comes from firmware, either
1931 * via the device tree on powernv platforms or from an hcall on
1932 * pseries platforms.
1933 */
1934#ifdef CONFIG_PPC_PSERIES
1935static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp)
1936{
1937 struct h_cpu_char_result c;
1938 unsigned long rc;
1939
1940 if (!machine_is(pseries))
1941 return -ENOTTY;
1942
1943 rc = plpar_get_cpu_characteristics(&c);
1944 if (rc == H_SUCCESS) {
1945 cp->character = c.character;
1946 cp->behaviour = c.behaviour;
1947 cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 |
1948 KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED |
1949 KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 |
1950 KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 |
1951 KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV |
1952 KVM_PPC_CPU_CHAR_BR_HINT_HONOURED |
1953 KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF |
400b7e53
SJS
1954 KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS |
1955 KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST;
3214d01f
PM
1956 cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY |
1957 KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR |
400b7e53
SJS
1958 KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR |
1959 KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE;
3214d01f
PM
1960 }
1961 return 0;
1962}
1963#else
1964static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp)
1965{
1966 return -ENOTTY;
1967}
1968#endif
1969
1970static inline bool have_fw_feat(struct device_node *fw_features,
1971 const char *state, const char *name)
1972{
1973 struct device_node *np;
1974 bool r = false;
1975
1976 np = of_get_child_by_name(fw_features, name);
1977 if (np) {
1978 r = of_property_read_bool(np, state);
1979 of_node_put(np);
1980 }
1981 return r;
1982}
1983
1984static int kvmppc_get_cpu_char(struct kvm_ppc_cpu_char *cp)
1985{
1986 struct device_node *np, *fw_features;
1987 int r;
1988
1989 memset(cp, 0, sizeof(*cp));
1990 r = pseries_get_cpu_char(cp);
1991 if (r != -ENOTTY)
1992 return r;
1993
1994 np = of_find_node_by_name(NULL, "ibm,opal");
1995 if (np) {
1996 fw_features = of_get_child_by_name(np, "fw-features");
1997 of_node_put(np);
1998 if (!fw_features)
1999 return 0;
2000 if (have_fw_feat(fw_features, "enabled",
2001 "inst-spec-barrier-ori31,31,0"))
2002 cp->character |= KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31;
2003 if (have_fw_feat(fw_features, "enabled",
2004 "fw-bcctrl-serialized"))
2005 cp->character |= KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED;
2006 if (have_fw_feat(fw_features, "enabled",
2007 "inst-l1d-flush-ori30,30,0"))
2008 cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30;
2009 if (have_fw_feat(fw_features, "enabled",
2010 "inst-l1d-flush-trig2"))
2011 cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2;
2012 if (have_fw_feat(fw_features, "enabled",
2013 "fw-l1d-thread-split"))
2014 cp->character |= KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV;
2015 if (have_fw_feat(fw_features, "enabled",
2016 "fw-count-cache-disabled"))
2017 cp->character |= KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS;
400b7e53
SJS
2018 if (have_fw_feat(fw_features, "enabled",
2019 "fw-count-cache-flush-bcctr2,0,0"))
2020 cp->character |= KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST;
3214d01f
PM
2021 cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 |
2022 KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED |
2023 KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 |
2024 KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 |
2025 KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV |
400b7e53
SJS
2026 KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS |
2027 KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST;
3214d01f
PM
2028
2029 if (have_fw_feat(fw_features, "enabled",
2030 "speculation-policy-favor-security"))
2031 cp->behaviour |= KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY;
2032 if (!have_fw_feat(fw_features, "disabled",
2033 "needs-l1d-flush-msr-pr-0-to-1"))
2034 cp->behaviour |= KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR;
2035 if (!have_fw_feat(fw_features, "disabled",
2036 "needs-spec-barrier-for-bound-checks"))
2037 cp->behaviour |= KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR;
400b7e53
SJS
2038 if (have_fw_feat(fw_features, "enabled",
2039 "needs-count-cache-flush-on-context-switch"))
2040 cp->behaviour |= KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE;
3214d01f
PM
2041 cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY |
2042 KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR |
400b7e53
SJS
2043 KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR |
2044 KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE;
3214d01f
PM
2045
2046 of_node_put(fw_features);
2047 }
2048
2049 return 0;
2050}
2051#endif
2052
bbf45ba5
HB
2053long kvm_arch_vm_ioctl(struct file *filp,
2054 unsigned int ioctl, unsigned long arg)
2055{
5df554ad 2056 struct kvm *kvm __maybe_unused = filp->private_data;
15711e9c 2057 void __user *argp = (void __user *)arg;
bbf45ba5
HB
2058 long r;
2059
2060 switch (ioctl) {
15711e9c
AG
2061 case KVM_PPC_GET_PVINFO: {
2062 struct kvm_ppc_pvinfo pvinfo;
d8cdddcd 2063 memset(&pvinfo, 0, sizeof(pvinfo));
15711e9c
AG
2064 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
2065 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
2066 r = -EFAULT;
2067 goto out;
2068 }
2069
2070 break;
2071 }
699a0ea0
PM
2072 case KVM_ENABLE_CAP:
2073 {
2074 struct kvm_enable_cap cap;
2075 r = -EFAULT;
2076 if (copy_from_user(&cap, argp, sizeof(cap)))
2077 goto out;
2078 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
2079 break;
2080 }
76d837a4 2081#ifdef CONFIG_SPAPR_TCE_IOMMU
58ded420
AK
2082 case KVM_CREATE_SPAPR_TCE_64: {
2083 struct kvm_create_spapr_tce_64 create_tce_64;
2084
2085 r = -EFAULT;
2086 if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64)))
2087 goto out;
2088 if (create_tce_64.flags) {
2089 r = -EINVAL;
2090 goto out;
2091 }
2092 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
2093 goto out;
2094 }
54738c09
DG
2095 case KVM_CREATE_SPAPR_TCE: {
2096 struct kvm_create_spapr_tce create_tce;
58ded420 2097 struct kvm_create_spapr_tce_64 create_tce_64;
54738c09
DG
2098
2099 r = -EFAULT;
2100 if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
2101 goto out;
58ded420
AK
2102
2103 create_tce_64.liobn = create_tce.liobn;
2104 create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K;
2105 create_tce_64.offset = 0;
2106 create_tce_64.size = create_tce.window_size >>
2107 IOMMU_PAGE_SHIFT_4K;
2108 create_tce_64.flags = 0;
2109 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
54738c09
DG
2110 goto out;
2111 }
76d837a4
PM
2112#endif
2113#ifdef CONFIG_PPC_BOOK3S_64
5b74716e 2114 case KVM_PPC_GET_SMMU_INFO: {
5b74716e 2115 struct kvm_ppc_smmu_info info;
cbbc58d4 2116 struct kvm *kvm = filp->private_data;
5b74716e
BH
2117
2118 memset(&info, 0, sizeof(info));
cbbc58d4 2119 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info);
5b74716e
BH
2120 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
2121 r = -EFAULT;
2122 break;
2123 }
8e591cb7
ME
2124 case KVM_PPC_RTAS_DEFINE_TOKEN: {
2125 struct kvm *kvm = filp->private_data;
2126
2127 r = kvm_vm_ioctl_rtas_define_token(kvm, argp);
2128 break;
2129 }
c9270132
PM
2130 case KVM_PPC_CONFIGURE_V3_MMU: {
2131 struct kvm *kvm = filp->private_data;
2132 struct kvm_ppc_mmuv3_cfg cfg;
2133
2134 r = -EINVAL;
2135 if (!kvm->arch.kvm_ops->configure_mmu)
2136 goto out;
2137 r = -EFAULT;
2138 if (copy_from_user(&cfg, argp, sizeof(cfg)))
2139 goto out;
2140 r = kvm->arch.kvm_ops->configure_mmu(kvm, &cfg);
2141 break;
2142 }
2143 case KVM_PPC_GET_RMMU_INFO: {
2144 struct kvm *kvm = filp->private_data;
2145 struct kvm_ppc_rmmu_info info;
2146
2147 r = -EINVAL;
2148 if (!kvm->arch.kvm_ops->get_rmmu_info)
2149 goto out;
2150 r = kvm->arch.kvm_ops->get_rmmu_info(kvm, &info);
2151 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
2152 r = -EFAULT;
2153 break;
2154 }
3214d01f
PM
2155 case KVM_PPC_GET_CPU_CHAR: {
2156 struct kvm_ppc_cpu_char cpuchar;
2157
2158 r = kvmppc_get_cpu_char(&cpuchar);
2159 if (r >= 0 && copy_to_user(argp, &cpuchar, sizeof(cpuchar)))
2160 r = -EFAULT;
2161 break;
2162 }
cbbc58d4
AK
2163 default: {
2164 struct kvm *kvm = filp->private_data;
2165 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg);
2166 }
3a167bea 2167#else /* CONFIG_PPC_BOOK3S_64 */
bbf45ba5 2168 default:
367e1319 2169 r = -ENOTTY;
3a167bea 2170#endif
bbf45ba5 2171 }
15711e9c 2172out:
bbf45ba5
HB
2173 return r;
2174}
2175
043cc4d7
SW
2176static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
2177static unsigned long nr_lpids;
2178
2179long kvmppc_alloc_lpid(void)
2180{
2181 long lpid;
2182
2183 do {
2184 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
2185 if (lpid >= nr_lpids) {
2186 pr_err("%s: No LPIDs free\n", __func__);
2187 return -ENOMEM;
2188 }
2189 } while (test_and_set_bit(lpid, lpid_inuse));
2190
2191 return lpid;
2192}
2ba9f0d8 2193EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid);
043cc4d7
SW
2194
2195void kvmppc_claim_lpid(long lpid)
2196{
2197 set_bit(lpid, lpid_inuse);
2198}
2ba9f0d8 2199EXPORT_SYMBOL_GPL(kvmppc_claim_lpid);
043cc4d7
SW
2200
2201void kvmppc_free_lpid(long lpid)
2202{
2203 clear_bit(lpid, lpid_inuse);
2204}
2ba9f0d8 2205EXPORT_SYMBOL_GPL(kvmppc_free_lpid);
043cc4d7
SW
2206
2207void kvmppc_init_lpid(unsigned long nr_lpids_param)
2208{
2209 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
2210 memset(lpid_inuse, 0, sizeof(lpid_inuse));
2211}
2ba9f0d8 2212EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
043cc4d7 2213
bbf45ba5
HB
2214int kvm_arch_init(void *opaque)
2215{
2216 return 0;
2217}
2218
478d6686 2219EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr);