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KVM: PPC: MPIC: Reset IRQ source private members
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CommitLineData
bbf45ba5
HB
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19 */
20
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/kvm_host.h>
bbf45ba5 24#include <linux/vmalloc.h>
544c6761 25#include <linux/hrtimer.h>
bbf45ba5 26#include <linux/fs.h>
5a0e3ad6 27#include <linux/slab.h>
eb1e4f43 28#include <linux/file.h>
cbbc58d4 29#include <linux/module.h>
bbf45ba5
HB
30#include <asm/cputable.h>
31#include <asm/uaccess.h>
32#include <asm/kvm_ppc.h>
83aae4a8 33#include <asm/tlbflush.h>
371fefd6 34#include <asm/cputhreads.h>
bd2be683 35#include <asm/irqflags.h>
73e75b41 36#include "timing.h"
5efdb4be 37#include "irq.h"
fad7b9b5 38#include "../mm/mmu_decl.h"
bbf45ba5 39
46f43c6e
MT
40#define CREATE_TRACE_POINTS
41#include "trace.h"
42
cbbc58d4
AK
43struct kvmppc_ops *kvmppc_hv_ops;
44EXPORT_SYMBOL_GPL(kvmppc_hv_ops);
45struct kvmppc_ops *kvmppc_pr_ops;
46EXPORT_SYMBOL_GPL(kvmppc_pr_ops);
47
3a167bea 48
bbf45ba5
HB
49int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
50{
9202e076 51 return !!(v->arch.pending_exceptions) ||
dfd4d47e 52 v->requests;
bbf45ba5
HB
53}
54
b6d33834
CD
55int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
56{
57 return 1;
58}
59
03d25c5b
AG
60/*
61 * Common checks before entering the guest world. Call with interrupts
62 * disabled.
63 *
7ee78855
AG
64 * returns:
65 *
66 * == 1 if we're ready to go into guest state
67 * <= 0 if we need to go back to the host with return value
03d25c5b
AG
68 */
69int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
70{
6c85f52b
SW
71 int r;
72
73 WARN_ON(irqs_disabled());
74 hard_irq_disable();
03d25c5b 75
03d25c5b
AG
76 while (true) {
77 if (need_resched()) {
78 local_irq_enable();
79 cond_resched();
6c85f52b 80 hard_irq_disable();
03d25c5b
AG
81 continue;
82 }
83
84 if (signal_pending(current)) {
7ee78855
AG
85 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
86 vcpu->run->exit_reason = KVM_EXIT_INTR;
87 r = -EINTR;
03d25c5b
AG
88 break;
89 }
90
5bd1cf11
SW
91 vcpu->mode = IN_GUEST_MODE;
92
93 /*
94 * Reading vcpu->requests must happen after setting vcpu->mode,
95 * so we don't miss a request because the requester sees
96 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests
97 * before next entering the guest (and thus doesn't IPI).
98 */
03d25c5b 99 smp_mb();
5bd1cf11 100
03d25c5b
AG
101 if (vcpu->requests) {
102 /* Make sure we process requests preemptable */
103 local_irq_enable();
104 trace_kvm_check_requests(vcpu);
7c973a2e 105 r = kvmppc_core_check_requests(vcpu);
6c85f52b 106 hard_irq_disable();
7c973a2e
AG
107 if (r > 0)
108 continue;
109 break;
03d25c5b
AG
110 }
111
112 if (kvmppc_core_prepare_to_enter(vcpu)) {
113 /* interrupts got enabled in between, so we
114 are back at square 1 */
115 continue;
116 }
117
3766a4c6 118 kvm_guest_enter();
6c85f52b 119 return 1;
03d25c5b
AG
120 }
121
6c85f52b
SW
122 /* return to host */
123 local_irq_enable();
03d25c5b
AG
124 return r;
125}
2ba9f0d8 126EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter);
03d25c5b 127
5deb8e7a
AG
128#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
129static void kvmppc_swab_shared(struct kvm_vcpu *vcpu)
130{
131 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
132 int i;
133
134 shared->sprg0 = swab64(shared->sprg0);
135 shared->sprg1 = swab64(shared->sprg1);
136 shared->sprg2 = swab64(shared->sprg2);
137 shared->sprg3 = swab64(shared->sprg3);
138 shared->srr0 = swab64(shared->srr0);
139 shared->srr1 = swab64(shared->srr1);
140 shared->dar = swab64(shared->dar);
141 shared->msr = swab64(shared->msr);
142 shared->dsisr = swab32(shared->dsisr);
143 shared->int_pending = swab32(shared->int_pending);
144 for (i = 0; i < ARRAY_SIZE(shared->sr); i++)
145 shared->sr[i] = swab32(shared->sr[i]);
146}
147#endif
148
2a342ed5
AG
149int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
150{
151 int nr = kvmppc_get_gpr(vcpu, 11);
152 int r;
153 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
154 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
155 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
156 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
157 unsigned long r2 = 0;
158
5deb8e7a 159 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
2a342ed5
AG
160 /* 32 bit mode */
161 param1 &= 0xffffffff;
162 param2 &= 0xffffffff;
163 param3 &= 0xffffffff;
164 param4 &= 0xffffffff;
165 }
166
167 switch (nr) {
fdcf8bd7 168 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE):
5fc87407 169 {
5deb8e7a
AG
170#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
171 /* Book3S can be little endian, find it out here */
172 int shared_big_endian = true;
173 if (vcpu->arch.intr_msr & MSR_LE)
174 shared_big_endian = false;
175 if (shared_big_endian != vcpu->arch.shared_big_endian)
176 kvmppc_swab_shared(vcpu);
177 vcpu->arch.shared_big_endian = shared_big_endian;
178#endif
179
f3383cf8
AG
180 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) {
181 /*
182 * Older versions of the Linux magic page code had
183 * a bug where they would map their trampoline code
184 * NX. If that's the case, remove !PR NX capability.
185 */
186 vcpu->arch.disable_kernel_nx = true;
187 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
188 }
189
190 vcpu->arch.magic_page_pa = param1 & ~0xfffULL;
191 vcpu->arch.magic_page_ea = param2 & ~0xfffULL;
5fc87407 192
b5904972 193 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
7508e16c 194
fdcf8bd7 195 r = EV_SUCCESS;
5fc87407
AG
196 break;
197 }
fdcf8bd7
SY
198 case KVM_HCALL_TOKEN(KVM_HC_FEATURES):
199 r = EV_SUCCESS;
bf7ca4bd 200#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
a4cd8b23 201 /* XXX Missing magic page on 44x */
5fc87407
AG
202 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
203#endif
2a342ed5
AG
204
205 /* Second return value is in r4 */
2a342ed5 206 break;
9202e076
LYB
207 case EV_HCALL_TOKEN(EV_IDLE):
208 r = EV_SUCCESS;
209 kvm_vcpu_block(vcpu);
210 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
211 break;
2a342ed5 212 default:
fdcf8bd7 213 r = EV_UNIMPLEMENTED;
2a342ed5
AG
214 break;
215 }
216
7508e16c
AG
217 kvmppc_set_gpr(vcpu, 4, r2);
218
2a342ed5
AG
219 return r;
220}
2ba9f0d8 221EXPORT_SYMBOL_GPL(kvmppc_kvm_pv);
bbf45ba5 222
af8f38b3
AG
223int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
224{
225 int r = false;
226
227 /* We have to know what CPU to virtualize */
228 if (!vcpu->arch.pvr)
229 goto out;
230
231 /* PAPR only works with book3s_64 */
232 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
233 goto out;
234
af8f38b3 235 /* HV KVM can only do PAPR mode for now */
a78b55d1 236 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm))
af8f38b3 237 goto out;
af8f38b3 238
d30f6e48
SW
239#ifdef CONFIG_KVM_BOOKE_HV
240 if (!cpu_has_feature(CPU_FTR_EMB_HV))
241 goto out;
242#endif
243
af8f38b3
AG
244 r = true;
245
246out:
247 vcpu->arch.sane = r;
248 return r ? 0 : -EINVAL;
249}
2ba9f0d8 250EXPORT_SYMBOL_GPL(kvmppc_sanity_check);
af8f38b3 251
bbf45ba5
HB
252int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
253{
254 enum emulation_result er;
255 int r;
256
257 er = kvmppc_emulate_instruction(run, vcpu);
258 switch (er) {
259 case EMULATE_DONE:
260 /* Future optimization: only reload non-volatiles if they were
261 * actually modified. */
262 r = RESUME_GUEST_NV;
263 break;
264 case EMULATE_DO_MMIO:
265 run->exit_reason = KVM_EXIT_MMIO;
266 /* We must reload nonvolatiles because "update" load/store
267 * instructions modify register state. */
268 /* Future optimization: only reload non-volatiles if they were
269 * actually modified. */
270 r = RESUME_HOST_NV;
271 break;
272 case EMULATE_FAIL:
273 /* XXX Deliver Program interrupt to guest. */
274 printk(KERN_EMERG "%s: emulation failed (%08x)\n", __func__,
c7f38f46 275 kvmppc_get_last_inst(vcpu));
bbf45ba5
HB
276 r = RESUME_HOST;
277 break;
278 default:
5a33169e
AG
279 WARN_ON(1);
280 r = RESUME_GUEST;
bbf45ba5
HB
281 }
282
283 return r;
284}
2ba9f0d8 285EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio);
bbf45ba5 286
10474ae8 287int kvm_arch_hardware_enable(void *garbage)
bbf45ba5 288{
10474ae8 289 return 0;
bbf45ba5
HB
290}
291
292void kvm_arch_hardware_disable(void *garbage)
293{
294}
295
296int kvm_arch_hardware_setup(void)
297{
298 return 0;
299}
300
301void kvm_arch_hardware_unsetup(void)
302{
303}
304
305void kvm_arch_check_processor_compat(void *rtn)
306{
9dd921cf 307 *(int *)rtn = kvmppc_core_check_processor_compat();
bbf45ba5
HB
308}
309
e08b9637 310int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
bbf45ba5 311{
cbbc58d4
AK
312 struct kvmppc_ops *kvm_ops = NULL;
313 /*
314 * if we have both HV and PR enabled, default is HV
315 */
316 if (type == 0) {
317 if (kvmppc_hv_ops)
318 kvm_ops = kvmppc_hv_ops;
319 else
320 kvm_ops = kvmppc_pr_ops;
321 if (!kvm_ops)
322 goto err_out;
323 } else if (type == KVM_VM_PPC_HV) {
324 if (!kvmppc_hv_ops)
325 goto err_out;
326 kvm_ops = kvmppc_hv_ops;
327 } else if (type == KVM_VM_PPC_PR) {
328 if (!kvmppc_pr_ops)
329 goto err_out;
330 kvm_ops = kvmppc_pr_ops;
331 } else
332 goto err_out;
333
334 if (kvm_ops->owner && !try_module_get(kvm_ops->owner))
335 return -ENOENT;
336
337 kvm->arch.kvm_ops = kvm_ops;
f9e0554d 338 return kvmppc_core_init_vm(kvm);
cbbc58d4
AK
339err_out:
340 return -EINVAL;
bbf45ba5
HB
341}
342
d89f5eff 343void kvm_arch_destroy_vm(struct kvm *kvm)
bbf45ba5
HB
344{
345 unsigned int i;
988a2cae 346 struct kvm_vcpu *vcpu;
bbf45ba5 347
988a2cae
GN
348 kvm_for_each_vcpu(i, vcpu, kvm)
349 kvm_arch_vcpu_free(vcpu);
350
351 mutex_lock(&kvm->lock);
352 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
353 kvm->vcpus[i] = NULL;
354
355 atomic_set(&kvm->online_vcpus, 0);
f9e0554d
PM
356
357 kvmppc_core_destroy_vm(kvm);
358
988a2cae 359 mutex_unlock(&kvm->lock);
cbbc58d4
AK
360
361 /* drop the module reference */
362 module_put(kvm->arch.kvm_ops->owner);
bbf45ba5
HB
363}
364
ad8ba2cd
SY
365void kvm_arch_sync_events(struct kvm *kvm)
366{
367}
368
bbf45ba5
HB
369int kvm_dev_ioctl_check_extension(long ext)
370{
371 int r;
cbbc58d4
AK
372 /* FIXME!!
373 * Should some of this be vm ioctl ? is it possible now ?
374 */
375 int hv_enabled = kvmppc_hv_ops ? 1 : 0;
bbf45ba5
HB
376
377 switch (ext) {
5ce941ee
SW
378#ifdef CONFIG_BOOKE
379 case KVM_CAP_PPC_BOOKE_SREGS:
f61c94bb 380 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1c810636 381 case KVM_CAP_PPC_EPR:
5ce941ee 382#else
e15a1137 383 case KVM_CAP_PPC_SEGSTATE:
1022fc3d 384 case KVM_CAP_PPC_HIOR:
930b412a 385 case KVM_CAP_PPC_PAPR:
5ce941ee 386#endif
18978768 387 case KVM_CAP_PPC_UNSET_IRQ:
7b4203e8 388 case KVM_CAP_PPC_IRQ_LEVEL:
71fbfd5f 389 case KVM_CAP_ENABLE_CAP:
e24ed81f 390 case KVM_CAP_ONE_REG:
0e673fb6 391 case KVM_CAP_IOEVENTFD:
5df554ad 392 case KVM_CAP_DEVICE_CTRL:
de56a948
PM
393 r = 1;
394 break;
de56a948 395 case KVM_CAP_PPC_PAIRED_SINGLES:
ad0a048b 396 case KVM_CAP_PPC_OSI:
15711e9c 397 case KVM_CAP_PPC_GET_PVINFO:
bf7ca4bd 398#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc 399 case KVM_CAP_SW_TLB:
eb1e4f43 400#endif
699cc876 401 /* We support this only for PR */
cbbc58d4 402 r = !hv_enabled;
e15a1137 403 break;
699cc876 404#ifdef CONFIG_KVM_MMIO
588968b6
LV
405 case KVM_CAP_COALESCED_MMIO:
406 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
407 break;
54738c09 408#endif
699cc876
AK
409#ifdef CONFIG_KVM_MPIC
410 case KVM_CAP_IRQ_MPIC:
411 r = 1;
412 break;
413#endif
414
f31e65e1 415#ifdef CONFIG_PPC_BOOK3S_64
54738c09 416 case KVM_CAP_SPAPR_TCE:
32fad281 417 case KVM_CAP_PPC_ALLOC_HTAB:
8e591cb7 418 case KVM_CAP_PPC_RTAS:
5975a2e0
PM
419#ifdef CONFIG_KVM_XICS
420 case KVM_CAP_IRQ_XICS:
421#endif
54738c09
DG
422 r = 1;
423 break;
f31e65e1 424#endif /* CONFIG_PPC_BOOK3S_64 */
699cc876 425#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
371fefd6 426 case KVM_CAP_PPC_SMT:
cbbc58d4 427 if (hv_enabled)
699cc876
AK
428 r = threads_per_core;
429 else
430 r = 0;
371fefd6 431 break;
aa04b4cc 432 case KVM_CAP_PPC_RMA:
cbbc58d4 433 r = hv_enabled;
9e368f29 434 /* PPC970 requires an RMA */
699cc876 435 if (r && cpu_has_feature(CPU_FTR_ARCH_201))
9e368f29 436 r = 2;
aa04b4cc 437 break;
f4800b1f 438#endif
342d3db7 439 case KVM_CAP_SYNC_MMU:
699cc876 440#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
cbbc58d4 441 if (hv_enabled)
699cc876
AK
442 r = cpu_has_feature(CPU_FTR_ARCH_206) ? 1 : 0;
443 else
444 r = 0;
f4800b1f
AG
445#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
446 r = 1;
447#else
448 r = 0;
a2932923 449#endif
699cc876
AK
450 break;
451#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
a2932923 452 case KVM_CAP_PPC_HTAB_FD:
cbbc58d4 453 r = hv_enabled;
a2932923 454 break;
de56a948 455#endif
b5434032
ME
456 case KVM_CAP_NR_VCPUS:
457 /*
458 * Recommending a number of CPUs is somewhat arbitrary; we
459 * return the number of present CPUs for -HV (since a host
460 * will have secondary threads "offline"), and for other KVM
461 * implementations just count online CPUs.
462 */
cbbc58d4 463 if (hv_enabled)
699cc876
AK
464 r = num_present_cpus();
465 else
466 r = num_online_cpus();
b5434032
ME
467 break;
468 case KVM_CAP_MAX_VCPUS:
469 r = KVM_MAX_VCPUS;
470 break;
5b74716e
BH
471#ifdef CONFIG_PPC_BOOK3S_64
472 case KVM_CAP_PPC_GET_SMMU_INFO:
473 r = 1;
474 break;
475#endif
bbf45ba5
HB
476 default:
477 r = 0;
478 break;
479 }
480 return r;
481
482}
483
484long kvm_arch_dev_ioctl(struct file *filp,
485 unsigned int ioctl, unsigned long arg)
486{
487 return -EINVAL;
488}
489
5587027c 490void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
db3fe4eb
TY
491 struct kvm_memory_slot *dont)
492{
5587027c 493 kvmppc_core_free_memslot(kvm, free, dont);
db3fe4eb
TY
494}
495
5587027c
AK
496int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
497 unsigned long npages)
db3fe4eb 498{
5587027c 499 return kvmppc_core_create_memslot(kvm, slot, npages);
db3fe4eb
TY
500}
501
e59dbe09
TY
502void kvm_arch_memslots_updated(struct kvm *kvm)
503{
504}
505
f7784b8e 506int kvm_arch_prepare_memory_region(struct kvm *kvm,
462fce46 507 struct kvm_memory_slot *memslot,
7b6195a9
TY
508 struct kvm_userspace_memory_region *mem,
509 enum kvm_mr_change change)
bbf45ba5 510{
a66b48c3 511 return kvmppc_core_prepare_memory_region(kvm, memslot, mem);
bbf45ba5
HB
512}
513
f7784b8e 514void kvm_arch_commit_memory_region(struct kvm *kvm,
462fce46 515 struct kvm_userspace_memory_region *mem,
8482644a
TY
516 const struct kvm_memory_slot *old,
517 enum kvm_mr_change change)
f7784b8e 518{
dfe49dbd 519 kvmppc_core_commit_memory_region(kvm, mem, old);
f7784b8e
MT
520}
521
2df72e9b
MT
522void kvm_arch_flush_shadow_all(struct kvm *kvm)
523{
524}
f7784b8e 525
2df72e9b
MT
526void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
527 struct kvm_memory_slot *slot)
34d4cb8f 528{
dfe49dbd 529 kvmppc_core_flush_memslot(kvm, slot);
34d4cb8f
MT
530}
531
bbf45ba5
HB
532struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
533{
73e75b41
HB
534 struct kvm_vcpu *vcpu;
535 vcpu = kvmppc_core_vcpu_create(kvm, id);
03cdab53
ME
536 if (!IS_ERR(vcpu)) {
537 vcpu->arch.wqp = &vcpu->wq;
06056bfb 538 kvmppc_create_vcpu_debugfs(vcpu, id);
03cdab53 539 }
73e75b41 540 return vcpu;
bbf45ba5
HB
541}
542
42897d86
MT
543int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
544{
545 return 0;
546}
547
bbf45ba5
HB
548void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
549{
a595405d
AG
550 /* Make sure we're not using the vcpu anymore */
551 hrtimer_cancel(&vcpu->arch.dec_timer);
552 tasklet_kill(&vcpu->arch.tasklet);
553
73e75b41 554 kvmppc_remove_vcpu_debugfs(vcpu);
eb1e4f43
SW
555
556 switch (vcpu->arch.irq_type) {
557 case KVMPPC_IRQ_MPIC:
558 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);
559 break;
bc5ad3f3
BH
560 case KVMPPC_IRQ_XICS:
561 kvmppc_xics_free_icp(vcpu);
562 break;
eb1e4f43
SW
563 }
564
db93f574 565 kvmppc_core_vcpu_free(vcpu);
bbf45ba5
HB
566}
567
568void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
569{
570 kvm_arch_vcpu_free(vcpu);
571}
572
573int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
574{
9dd921cf 575 return kvmppc_core_pending_dec(vcpu);
bbf45ba5
HB
576}
577
544c6761
AG
578/*
579 * low level hrtimer wake routine. Because this runs in hardirq context
580 * we schedule a tasklet to do the real work.
581 */
582enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
583{
584 struct kvm_vcpu *vcpu;
585
586 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
587 tasklet_schedule(&vcpu->arch.tasklet);
588
589 return HRTIMER_NORESTART;
590}
591
bbf45ba5
HB
592int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
593{
f61c94bb
BB
594 int ret;
595
544c6761
AG
596 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
597 tasklet_init(&vcpu->arch.tasklet, kvmppc_decrementer_func, (ulong)vcpu);
598 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
de56a948 599 vcpu->arch.dec_expires = ~(u64)0;
bbf45ba5 600
09000adb
BB
601#ifdef CONFIG_KVM_EXIT_TIMING
602 mutex_init(&vcpu->arch.exit_timing_lock);
603#endif
f61c94bb
BB
604 ret = kvmppc_subarch_vcpu_init(vcpu);
605 return ret;
bbf45ba5
HB
606}
607
608void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
609{
ecc0981f 610 kvmppc_mmu_destroy(vcpu);
f61c94bb 611 kvmppc_subarch_vcpu_uninit(vcpu);
bbf45ba5
HB
612}
613
614void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
615{
eab17672
SW
616#ifdef CONFIG_BOOKE
617 /*
618 * vrsave (formerly usprg0) isn't used by Linux, but may
619 * be used by the guest.
620 *
621 * On non-booke this is associated with Altivec and
622 * is handled by code in book3s.c.
623 */
624 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
625#endif
9dd921cf 626 kvmppc_core_vcpu_load(vcpu, cpu);
bbf45ba5
HB
627}
628
629void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
630{
9dd921cf 631 kvmppc_core_vcpu_put(vcpu);
eab17672
SW
632#ifdef CONFIG_BOOKE
633 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
634#endif
bbf45ba5
HB
635}
636
bbf45ba5
HB
637static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
638 struct kvm_run *run)
639{
8e5b26b5 640 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, run->dcr.data);
bbf45ba5
HB
641}
642
643static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
644 struct kvm_run *run)
645{
69b61833 646 u64 uninitialized_var(gpr);
bbf45ba5 647
8e5b26b5 648 if (run->mmio.len > sizeof(gpr)) {
bbf45ba5
HB
649 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
650 return;
651 }
652
653 if (vcpu->arch.mmio_is_bigendian) {
654 switch (run->mmio.len) {
b104d066 655 case 8: gpr = *(u64 *)run->mmio.data; break;
8e5b26b5
AG
656 case 4: gpr = *(u32 *)run->mmio.data; break;
657 case 2: gpr = *(u16 *)run->mmio.data; break;
658 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
659 }
660 } else {
661 /* Convert BE data from userland back to LE. */
662 switch (run->mmio.len) {
8e5b26b5
AG
663 case 4: gpr = ld_le32((u32 *)run->mmio.data); break;
664 case 2: gpr = ld_le16((u16 *)run->mmio.data); break;
665 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
666 }
667 }
8e5b26b5 668
3587d534
AG
669 if (vcpu->arch.mmio_sign_extend) {
670 switch (run->mmio.len) {
671#ifdef CONFIG_PPC64
672 case 4:
673 gpr = (s64)(s32)gpr;
674 break;
675#endif
676 case 2:
677 gpr = (s64)(s16)gpr;
678 break;
679 case 1:
680 gpr = (s64)(s8)gpr;
681 break;
682 }
683 }
684
8e5b26b5 685 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
b104d066 686
b3c5d3c2
AG
687 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
688 case KVM_MMIO_REG_GPR:
b104d066
AG
689 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
690 break;
b3c5d3c2 691 case KVM_MMIO_REG_FPR:
efff1912 692 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b104d066 693 break;
287d5611 694#ifdef CONFIG_PPC_BOOK3S
b3c5d3c2
AG
695 case KVM_MMIO_REG_QPR:
696 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 697 break;
b3c5d3c2 698 case KVM_MMIO_REG_FQPR:
efff1912 699 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b3c5d3c2 700 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 701 break;
287d5611 702#endif
b104d066
AG
703 default:
704 BUG();
705 }
bbf45ba5
HB
706}
707
708int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
709 unsigned int rt, unsigned int bytes,
710 int is_default_endian)
bbf45ba5 711{
ed840ee9 712 int idx, ret;
73601775
CLG
713 int is_bigendian;
714
715 if (kvmppc_need_byteswap(vcpu)) {
716 /* Default endianness is "little endian". */
717 is_bigendian = !is_default_endian;
718 } else {
719 /* Default endianness is "big endian". */
720 is_bigendian = is_default_endian;
721 }
ed840ee9 722
bbf45ba5
HB
723 if (bytes > sizeof(run->mmio.data)) {
724 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
725 run->mmio.len);
726 }
727
728 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
729 run->mmio.len = bytes;
730 run->mmio.is_write = 0;
731
732 vcpu->arch.io_gpr = rt;
733 vcpu->arch.mmio_is_bigendian = is_bigendian;
734 vcpu->mmio_needed = 1;
735 vcpu->mmio_is_write = 0;
3587d534 736 vcpu->arch.mmio_sign_extend = 0;
bbf45ba5 737
ed840ee9
SW
738 idx = srcu_read_lock(&vcpu->kvm->srcu);
739
740 ret = kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, run->mmio.phys_addr,
741 bytes, &run->mmio.data);
742
743 srcu_read_unlock(&vcpu->kvm->srcu, idx);
744
745 if (!ret) {
0e673fb6
AG
746 kvmppc_complete_mmio_load(vcpu, run);
747 vcpu->mmio_needed = 0;
748 return EMULATE_DONE;
749 }
750
bbf45ba5
HB
751 return EMULATE_DO_MMIO;
752}
2ba9f0d8 753EXPORT_SYMBOL_GPL(kvmppc_handle_load);
bbf45ba5 754
3587d534
AG
755/* Same as above, but sign extends */
756int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
757 unsigned int rt, unsigned int bytes,
758 int is_default_endian)
3587d534
AG
759{
760 int r;
761
3587d534 762 vcpu->arch.mmio_sign_extend = 1;
73601775 763 r = kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian);
3587d534
AG
764
765 return r;
766}
767
bbf45ba5 768int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775 769 u64 val, unsigned int bytes, int is_default_endian)
bbf45ba5
HB
770{
771 void *data = run->mmio.data;
ed840ee9 772 int idx, ret;
73601775
CLG
773 int is_bigendian;
774
775 if (kvmppc_need_byteswap(vcpu)) {
776 /* Default endianness is "little endian". */
777 is_bigendian = !is_default_endian;
778 } else {
779 /* Default endianness is "big endian". */
780 is_bigendian = is_default_endian;
781 }
bbf45ba5
HB
782
783 if (bytes > sizeof(run->mmio.data)) {
784 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
785 run->mmio.len);
786 }
787
788 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
789 run->mmio.len = bytes;
790 run->mmio.is_write = 1;
791 vcpu->mmio_needed = 1;
792 vcpu->mmio_is_write = 1;
793
794 /* Store the value at the lowest bytes in 'data'. */
795 if (is_bigendian) {
796 switch (bytes) {
b104d066 797 case 8: *(u64 *)data = val; break;
bbf45ba5
HB
798 case 4: *(u32 *)data = val; break;
799 case 2: *(u16 *)data = val; break;
800 case 1: *(u8 *)data = val; break;
801 }
802 } else {
803 /* Store LE value into 'data'. */
804 switch (bytes) {
805 case 4: st_le32(data, val); break;
806 case 2: st_le16(data, val); break;
807 case 1: *(u8 *)data = val; break;
808 }
809 }
810
ed840ee9
SW
811 idx = srcu_read_lock(&vcpu->kvm->srcu);
812
813 ret = kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, run->mmio.phys_addr,
814 bytes, &run->mmio.data);
815
816 srcu_read_unlock(&vcpu->kvm->srcu, idx);
817
818 if (!ret) {
0e673fb6
AG
819 vcpu->mmio_needed = 0;
820 return EMULATE_DONE;
821 }
822
bbf45ba5
HB
823 return EMULATE_DO_MMIO;
824}
2ba9f0d8 825EXPORT_SYMBOL_GPL(kvmppc_handle_store);
bbf45ba5
HB
826
827int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
828{
829 int r;
830 sigset_t sigsaved;
831
832 if (vcpu->sigset_active)
833 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
834
835 if (vcpu->mmio_needed) {
836 if (!vcpu->mmio_is_write)
837 kvmppc_complete_mmio_load(vcpu, run);
838 vcpu->mmio_needed = 0;
839 } else if (vcpu->arch.dcr_needed) {
840 if (!vcpu->arch.dcr_is_write)
841 kvmppc_complete_dcr_load(vcpu, run);
842 vcpu->arch.dcr_needed = 0;
ad0a048b
AG
843 } else if (vcpu->arch.osi_needed) {
844 u64 *gprs = run->osi.gprs;
845 int i;
846
847 for (i = 0; i < 32; i++)
848 kvmppc_set_gpr(vcpu, i, gprs[i]);
849 vcpu->arch.osi_needed = 0;
de56a948
PM
850 } else if (vcpu->arch.hcall_needed) {
851 int i;
852
853 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
854 for (i = 0; i < 9; ++i)
855 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
856 vcpu->arch.hcall_needed = 0;
1c810636
AG
857#ifdef CONFIG_BOOKE
858 } else if (vcpu->arch.epr_needed) {
859 kvmppc_set_epr(vcpu, run->epr.epr);
860 vcpu->arch.epr_needed = 0;
861#endif
bbf45ba5
HB
862 }
863
df6909e5 864 r = kvmppc_vcpu_run(run, vcpu);
bbf45ba5
HB
865
866 if (vcpu->sigset_active)
867 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
868
869 return r;
870}
871
872int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
873{
19ccb76a 874 if (irq->irq == KVM_INTERRUPT_UNSET) {
4fe27d2a 875 kvmppc_core_dequeue_external(vcpu);
19ccb76a
PM
876 return 0;
877 }
878
879 kvmppc_core_queue_external(vcpu, irq);
b6d33834 880
dfd4d47e 881 kvm_vcpu_kick(vcpu);
45c5eb67 882
bbf45ba5
HB
883 return 0;
884}
885
71fbfd5f
AG
886static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
887 struct kvm_enable_cap *cap)
888{
889 int r;
890
891 if (cap->flags)
892 return -EINVAL;
893
894 switch (cap->cap) {
ad0a048b
AG
895 case KVM_CAP_PPC_OSI:
896 r = 0;
897 vcpu->arch.osi_enabled = true;
898 break;
930b412a
AG
899 case KVM_CAP_PPC_PAPR:
900 r = 0;
901 vcpu->arch.papr_enabled = true;
902 break;
1c810636
AG
903 case KVM_CAP_PPC_EPR:
904 r = 0;
5df554ad
SW
905 if (cap->args[0])
906 vcpu->arch.epr_flags |= KVMPPC_EPR_USER;
907 else
908 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER;
1c810636 909 break;
f61c94bb
BB
910#ifdef CONFIG_BOOKE
911 case KVM_CAP_PPC_BOOKE_WATCHDOG:
912 r = 0;
913 vcpu->arch.watchdog_enabled = true;
914 break;
915#endif
bf7ca4bd 916#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
917 case KVM_CAP_SW_TLB: {
918 struct kvm_config_tlb cfg;
919 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
920
921 r = -EFAULT;
922 if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
923 break;
924
925 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
926 break;
eb1e4f43
SW
927 }
928#endif
929#ifdef CONFIG_KVM_MPIC
930 case KVM_CAP_IRQ_MPIC: {
70abaded 931 struct fd f;
eb1e4f43
SW
932 struct kvm_device *dev;
933
934 r = -EBADF;
70abaded
AV
935 f = fdget(cap->args[0]);
936 if (!f.file)
eb1e4f43
SW
937 break;
938
939 r = -EPERM;
70abaded 940 dev = kvm_device_from_filp(f.file);
eb1e4f43
SW
941 if (dev)
942 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]);
943
70abaded 944 fdput(f);
eb1e4f43 945 break;
dc83b8bc
SW
946 }
947#endif
5975a2e0
PM
948#ifdef CONFIG_KVM_XICS
949 case KVM_CAP_IRQ_XICS: {
70abaded 950 struct fd f;
5975a2e0
PM
951 struct kvm_device *dev;
952
953 r = -EBADF;
70abaded
AV
954 f = fdget(cap->args[0]);
955 if (!f.file)
5975a2e0
PM
956 break;
957
958 r = -EPERM;
70abaded 959 dev = kvm_device_from_filp(f.file);
5975a2e0
PM
960 if (dev)
961 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]);
962
70abaded 963 fdput(f);
5975a2e0
PM
964 break;
965 }
966#endif /* CONFIG_KVM_XICS */
71fbfd5f
AG
967 default:
968 r = -EINVAL;
969 break;
970 }
971
af8f38b3
AG
972 if (!r)
973 r = kvmppc_sanity_check(vcpu);
974
71fbfd5f
AG
975 return r;
976}
977
bbf45ba5
HB
978int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
979 struct kvm_mp_state *mp_state)
980{
981 return -EINVAL;
982}
983
984int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
985 struct kvm_mp_state *mp_state)
986{
987 return -EINVAL;
988}
989
990long kvm_arch_vcpu_ioctl(struct file *filp,
991 unsigned int ioctl, unsigned long arg)
992{
993 struct kvm_vcpu *vcpu = filp->private_data;
994 void __user *argp = (void __user *)arg;
995 long r;
996
93736624
AK
997 switch (ioctl) {
998 case KVM_INTERRUPT: {
bbf45ba5
HB
999 struct kvm_interrupt irq;
1000 r = -EFAULT;
1001 if (copy_from_user(&irq, argp, sizeof(irq)))
93736624 1002 goto out;
bbf45ba5 1003 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
93736624 1004 goto out;
bbf45ba5 1005 }
19483d14 1006
71fbfd5f
AG
1007 case KVM_ENABLE_CAP:
1008 {
1009 struct kvm_enable_cap cap;
1010 r = -EFAULT;
1011 if (copy_from_user(&cap, argp, sizeof(cap)))
1012 goto out;
1013 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
1014 break;
1015 }
dc83b8bc 1016
e24ed81f
AG
1017 case KVM_SET_ONE_REG:
1018 case KVM_GET_ONE_REG:
1019 {
1020 struct kvm_one_reg reg;
1021 r = -EFAULT;
1022 if (copy_from_user(&reg, argp, sizeof(reg)))
1023 goto out;
1024 if (ioctl == KVM_SET_ONE_REG)
1025 r = kvm_vcpu_ioctl_set_one_reg(vcpu, &reg);
1026 else
1027 r = kvm_vcpu_ioctl_get_one_reg(vcpu, &reg);
1028 break;
1029 }
1030
bf7ca4bd 1031#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1032 case KVM_DIRTY_TLB: {
1033 struct kvm_dirty_tlb dirty;
1034 r = -EFAULT;
1035 if (copy_from_user(&dirty, argp, sizeof(dirty)))
1036 goto out;
1037 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
1038 break;
1039 }
1040#endif
bbf45ba5
HB
1041 default:
1042 r = -EINVAL;
1043 }
1044
1045out:
1046 return r;
1047}
1048
5b1c1493
CO
1049int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
1050{
1051 return VM_FAULT_SIGBUS;
1052}
1053
15711e9c
AG
1054static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
1055{
784bafac
SY
1056 u32 inst_nop = 0x60000000;
1057#ifdef CONFIG_KVM_BOOKE_HV
1058 u32 inst_sc1 = 0x44000022;
2743103f
AG
1059 pvinfo->hcall[0] = cpu_to_be32(inst_sc1);
1060 pvinfo->hcall[1] = cpu_to_be32(inst_nop);
1061 pvinfo->hcall[2] = cpu_to_be32(inst_nop);
1062 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1063#else
15711e9c
AG
1064 u32 inst_lis = 0x3c000000;
1065 u32 inst_ori = 0x60000000;
15711e9c
AG
1066 u32 inst_sc = 0x44000002;
1067 u32 inst_imm_mask = 0xffff;
1068
1069 /*
1070 * The hypercall to get into KVM from within guest context is as
1071 * follows:
1072 *
1073 * lis r0, r0, KVM_SC_MAGIC_R0@h
1074 * ori r0, KVM_SC_MAGIC_R0@l
1075 * sc
1076 * nop
1077 */
2743103f
AG
1078 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask));
1079 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask));
1080 pvinfo->hcall[2] = cpu_to_be32(inst_sc);
1081 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1082#endif
15711e9c 1083
9202e076
LYB
1084 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE;
1085
15711e9c
AG
1086 return 0;
1087}
1088
5efdb4be
AG
1089int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
1090 bool line_status)
1091{
1092 if (!irqchip_in_kernel(kvm))
1093 return -ENXIO;
1094
1095 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1096 irq_event->irq, irq_event->level,
1097 line_status);
1098 return 0;
1099}
1100
bbf45ba5
HB
1101long kvm_arch_vm_ioctl(struct file *filp,
1102 unsigned int ioctl, unsigned long arg)
1103{
5df554ad 1104 struct kvm *kvm __maybe_unused = filp->private_data;
15711e9c 1105 void __user *argp = (void __user *)arg;
bbf45ba5
HB
1106 long r;
1107
1108 switch (ioctl) {
15711e9c
AG
1109 case KVM_PPC_GET_PVINFO: {
1110 struct kvm_ppc_pvinfo pvinfo;
d8cdddcd 1111 memset(&pvinfo, 0, sizeof(pvinfo));
15711e9c
AG
1112 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
1113 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
1114 r = -EFAULT;
1115 goto out;
1116 }
1117
1118 break;
1119 }
f31e65e1 1120#ifdef CONFIG_PPC_BOOK3S_64
54738c09
DG
1121 case KVM_CREATE_SPAPR_TCE: {
1122 struct kvm_create_spapr_tce create_tce;
54738c09
DG
1123
1124 r = -EFAULT;
1125 if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
1126 goto out;
1127 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce);
1128 goto out;
1129 }
5b74716e 1130 case KVM_PPC_GET_SMMU_INFO: {
5b74716e 1131 struct kvm_ppc_smmu_info info;
cbbc58d4 1132 struct kvm *kvm = filp->private_data;
5b74716e
BH
1133
1134 memset(&info, 0, sizeof(info));
cbbc58d4 1135 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info);
5b74716e
BH
1136 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1137 r = -EFAULT;
1138 break;
1139 }
8e591cb7
ME
1140 case KVM_PPC_RTAS_DEFINE_TOKEN: {
1141 struct kvm *kvm = filp->private_data;
1142
1143 r = kvm_vm_ioctl_rtas_define_token(kvm, argp);
1144 break;
1145 }
cbbc58d4
AK
1146 default: {
1147 struct kvm *kvm = filp->private_data;
1148 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg);
1149 }
3a167bea 1150#else /* CONFIG_PPC_BOOK3S_64 */
bbf45ba5 1151 default:
367e1319 1152 r = -ENOTTY;
3a167bea 1153#endif
bbf45ba5 1154 }
15711e9c 1155out:
bbf45ba5
HB
1156 return r;
1157}
1158
043cc4d7
SW
1159static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
1160static unsigned long nr_lpids;
1161
1162long kvmppc_alloc_lpid(void)
1163{
1164 long lpid;
1165
1166 do {
1167 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
1168 if (lpid >= nr_lpids) {
1169 pr_err("%s: No LPIDs free\n", __func__);
1170 return -ENOMEM;
1171 }
1172 } while (test_and_set_bit(lpid, lpid_inuse));
1173
1174 return lpid;
1175}
2ba9f0d8 1176EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid);
043cc4d7
SW
1177
1178void kvmppc_claim_lpid(long lpid)
1179{
1180 set_bit(lpid, lpid_inuse);
1181}
2ba9f0d8 1182EXPORT_SYMBOL_GPL(kvmppc_claim_lpid);
043cc4d7
SW
1183
1184void kvmppc_free_lpid(long lpid)
1185{
1186 clear_bit(lpid, lpid_inuse);
1187}
2ba9f0d8 1188EXPORT_SYMBOL_GPL(kvmppc_free_lpid);
043cc4d7
SW
1189
1190void kvmppc_init_lpid(unsigned long nr_lpids_param)
1191{
1192 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
1193 memset(lpid_inuse, 0, sizeof(lpid_inuse));
1194}
2ba9f0d8 1195EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
043cc4d7 1196
bbf45ba5
HB
1197int kvm_arch_init(void *opaque)
1198{
1199 return 0;
1200}
1201
1202void kvm_arch_exit(void)
1203{
cbbc58d4 1204
bbf45ba5 1205}