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Commit | Line | Data |
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bbf45ba5 HB |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright IBM Corp. 2007 | |
16 | * | |
17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | |
18 | * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> | |
19 | */ | |
20 | ||
21 | #include <linux/errno.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/kvm_host.h> | |
bbf45ba5 | 24 | #include <linux/vmalloc.h> |
544c6761 | 25 | #include <linux/hrtimer.h> |
bbf45ba5 | 26 | #include <linux/fs.h> |
5a0e3ad6 | 27 | #include <linux/slab.h> |
eb1e4f43 | 28 | #include <linux/file.h> |
cbbc58d4 | 29 | #include <linux/module.h> |
bbf45ba5 HB |
30 | #include <asm/cputable.h> |
31 | #include <asm/uaccess.h> | |
32 | #include <asm/kvm_ppc.h> | |
83aae4a8 | 33 | #include <asm/tlbflush.h> |
371fefd6 | 34 | #include <asm/cputhreads.h> |
bd2be683 | 35 | #include <asm/irqflags.h> |
58ded420 | 36 | #include <asm/iommu.h> |
73e75b41 | 37 | #include "timing.h" |
5efdb4be | 38 | #include "irq.h" |
fad7b9b5 | 39 | #include "../mm/mmu_decl.h" |
bbf45ba5 | 40 | |
46f43c6e MT |
41 | #define CREATE_TRACE_POINTS |
42 | #include "trace.h" | |
43 | ||
cbbc58d4 AK |
44 | struct kvmppc_ops *kvmppc_hv_ops; |
45 | EXPORT_SYMBOL_GPL(kvmppc_hv_ops); | |
46 | struct kvmppc_ops *kvmppc_pr_ops; | |
47 | EXPORT_SYMBOL_GPL(kvmppc_pr_ops); | |
48 | ||
3a167bea | 49 | |
bbf45ba5 HB |
50 | int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) |
51 | { | |
9202e076 | 52 | return !!(v->arch.pending_exceptions) || |
dfd4d47e | 53 | v->requests; |
bbf45ba5 HB |
54 | } |
55 | ||
b6d33834 CD |
56 | int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) |
57 | { | |
58 | return 1; | |
59 | } | |
60 | ||
03d25c5b AG |
61 | /* |
62 | * Common checks before entering the guest world. Call with interrupts | |
63 | * disabled. | |
64 | * | |
7ee78855 AG |
65 | * returns: |
66 | * | |
67 | * == 1 if we're ready to go into guest state | |
68 | * <= 0 if we need to go back to the host with return value | |
03d25c5b AG |
69 | */ |
70 | int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu) | |
71 | { | |
6c85f52b SW |
72 | int r; |
73 | ||
74 | WARN_ON(irqs_disabled()); | |
75 | hard_irq_disable(); | |
03d25c5b | 76 | |
03d25c5b AG |
77 | while (true) { |
78 | if (need_resched()) { | |
79 | local_irq_enable(); | |
80 | cond_resched(); | |
6c85f52b | 81 | hard_irq_disable(); |
03d25c5b AG |
82 | continue; |
83 | } | |
84 | ||
85 | if (signal_pending(current)) { | |
7ee78855 AG |
86 | kvmppc_account_exit(vcpu, SIGNAL_EXITS); |
87 | vcpu->run->exit_reason = KVM_EXIT_INTR; | |
88 | r = -EINTR; | |
03d25c5b AG |
89 | break; |
90 | } | |
91 | ||
5bd1cf11 SW |
92 | vcpu->mode = IN_GUEST_MODE; |
93 | ||
94 | /* | |
95 | * Reading vcpu->requests must happen after setting vcpu->mode, | |
96 | * so we don't miss a request because the requester sees | |
97 | * OUTSIDE_GUEST_MODE and assumes we'll be checking requests | |
98 | * before next entering the guest (and thus doesn't IPI). | |
489153c7 LT |
99 | * This also orders the write to mode from any reads |
100 | * to the page tables done while the VCPU is running. | |
101 | * Please see the comment in kvm_flush_remote_tlbs. | |
5bd1cf11 | 102 | */ |
03d25c5b | 103 | smp_mb(); |
5bd1cf11 | 104 | |
03d25c5b AG |
105 | if (vcpu->requests) { |
106 | /* Make sure we process requests preemptable */ | |
107 | local_irq_enable(); | |
108 | trace_kvm_check_requests(vcpu); | |
7c973a2e | 109 | r = kvmppc_core_check_requests(vcpu); |
6c85f52b | 110 | hard_irq_disable(); |
7c973a2e AG |
111 | if (r > 0) |
112 | continue; | |
113 | break; | |
03d25c5b AG |
114 | } |
115 | ||
116 | if (kvmppc_core_prepare_to_enter(vcpu)) { | |
117 | /* interrupts got enabled in between, so we | |
118 | are back at square 1 */ | |
119 | continue; | |
120 | } | |
121 | ||
ccf73aaf | 122 | __kvm_guest_enter(); |
6c85f52b | 123 | return 1; |
03d25c5b AG |
124 | } |
125 | ||
6c85f52b SW |
126 | /* return to host */ |
127 | local_irq_enable(); | |
03d25c5b AG |
128 | return r; |
129 | } | |
2ba9f0d8 | 130 | EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter); |
03d25c5b | 131 | |
5deb8e7a AG |
132 | #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) |
133 | static void kvmppc_swab_shared(struct kvm_vcpu *vcpu) | |
134 | { | |
135 | struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared; | |
136 | int i; | |
137 | ||
138 | shared->sprg0 = swab64(shared->sprg0); | |
139 | shared->sprg1 = swab64(shared->sprg1); | |
140 | shared->sprg2 = swab64(shared->sprg2); | |
141 | shared->sprg3 = swab64(shared->sprg3); | |
142 | shared->srr0 = swab64(shared->srr0); | |
143 | shared->srr1 = swab64(shared->srr1); | |
144 | shared->dar = swab64(shared->dar); | |
145 | shared->msr = swab64(shared->msr); | |
146 | shared->dsisr = swab32(shared->dsisr); | |
147 | shared->int_pending = swab32(shared->int_pending); | |
148 | for (i = 0; i < ARRAY_SIZE(shared->sr); i++) | |
149 | shared->sr[i] = swab32(shared->sr[i]); | |
150 | } | |
151 | #endif | |
152 | ||
2a342ed5 AG |
153 | int kvmppc_kvm_pv(struct kvm_vcpu *vcpu) |
154 | { | |
155 | int nr = kvmppc_get_gpr(vcpu, 11); | |
156 | int r; | |
157 | unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3); | |
158 | unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4); | |
159 | unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5); | |
160 | unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6); | |
161 | unsigned long r2 = 0; | |
162 | ||
5deb8e7a | 163 | if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { |
2a342ed5 AG |
164 | /* 32 bit mode */ |
165 | param1 &= 0xffffffff; | |
166 | param2 &= 0xffffffff; | |
167 | param3 &= 0xffffffff; | |
168 | param4 &= 0xffffffff; | |
169 | } | |
170 | ||
171 | switch (nr) { | |
fdcf8bd7 | 172 | case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE): |
5fc87407 | 173 | { |
5deb8e7a AG |
174 | #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) |
175 | /* Book3S can be little endian, find it out here */ | |
176 | int shared_big_endian = true; | |
177 | if (vcpu->arch.intr_msr & MSR_LE) | |
178 | shared_big_endian = false; | |
179 | if (shared_big_endian != vcpu->arch.shared_big_endian) | |
180 | kvmppc_swab_shared(vcpu); | |
181 | vcpu->arch.shared_big_endian = shared_big_endian; | |
182 | #endif | |
183 | ||
f3383cf8 AG |
184 | if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) { |
185 | /* | |
186 | * Older versions of the Linux magic page code had | |
187 | * a bug where they would map their trampoline code | |
188 | * NX. If that's the case, remove !PR NX capability. | |
189 | */ | |
190 | vcpu->arch.disable_kernel_nx = true; | |
191 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); | |
192 | } | |
193 | ||
194 | vcpu->arch.magic_page_pa = param1 & ~0xfffULL; | |
195 | vcpu->arch.magic_page_ea = param2 & ~0xfffULL; | |
5fc87407 | 196 | |
89b68c96 AG |
197 | #ifdef CONFIG_PPC_64K_PAGES |
198 | /* | |
199 | * Make sure our 4k magic page is in the same window of a 64k | |
200 | * page within the guest and within the host's page. | |
201 | */ | |
202 | if ((vcpu->arch.magic_page_pa & 0xf000) != | |
203 | ((ulong)vcpu->arch.shared & 0xf000)) { | |
204 | void *old_shared = vcpu->arch.shared; | |
205 | ulong shared = (ulong)vcpu->arch.shared; | |
206 | void *new_shared; | |
207 | ||
208 | shared &= PAGE_MASK; | |
209 | shared |= vcpu->arch.magic_page_pa & 0xf000; | |
210 | new_shared = (void*)shared; | |
211 | memcpy(new_shared, old_shared, 0x1000); | |
212 | vcpu->arch.shared = new_shared; | |
213 | } | |
214 | #endif | |
215 | ||
b5904972 | 216 | r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7; |
7508e16c | 217 | |
fdcf8bd7 | 218 | r = EV_SUCCESS; |
5fc87407 AG |
219 | break; |
220 | } | |
fdcf8bd7 SY |
221 | case KVM_HCALL_TOKEN(KVM_HC_FEATURES): |
222 | r = EV_SUCCESS; | |
bf7ca4bd | 223 | #if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2) |
5fc87407 AG |
224 | r2 |= (1 << KVM_FEATURE_MAGIC_PAGE); |
225 | #endif | |
2a342ed5 AG |
226 | |
227 | /* Second return value is in r4 */ | |
2a342ed5 | 228 | break; |
9202e076 LYB |
229 | case EV_HCALL_TOKEN(EV_IDLE): |
230 | r = EV_SUCCESS; | |
231 | kvm_vcpu_block(vcpu); | |
232 | clear_bit(KVM_REQ_UNHALT, &vcpu->requests); | |
233 | break; | |
2a342ed5 | 234 | default: |
fdcf8bd7 | 235 | r = EV_UNIMPLEMENTED; |
2a342ed5 AG |
236 | break; |
237 | } | |
238 | ||
7508e16c AG |
239 | kvmppc_set_gpr(vcpu, 4, r2); |
240 | ||
2a342ed5 AG |
241 | return r; |
242 | } | |
2ba9f0d8 | 243 | EXPORT_SYMBOL_GPL(kvmppc_kvm_pv); |
bbf45ba5 | 244 | |
af8f38b3 AG |
245 | int kvmppc_sanity_check(struct kvm_vcpu *vcpu) |
246 | { | |
247 | int r = false; | |
248 | ||
249 | /* We have to know what CPU to virtualize */ | |
250 | if (!vcpu->arch.pvr) | |
251 | goto out; | |
252 | ||
253 | /* PAPR only works with book3s_64 */ | |
254 | if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled) | |
255 | goto out; | |
256 | ||
af8f38b3 | 257 | /* HV KVM can only do PAPR mode for now */ |
a78b55d1 | 258 | if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm)) |
af8f38b3 | 259 | goto out; |
af8f38b3 | 260 | |
d30f6e48 SW |
261 | #ifdef CONFIG_KVM_BOOKE_HV |
262 | if (!cpu_has_feature(CPU_FTR_EMB_HV)) | |
263 | goto out; | |
264 | #endif | |
265 | ||
af8f38b3 AG |
266 | r = true; |
267 | ||
268 | out: | |
269 | vcpu->arch.sane = r; | |
270 | return r ? 0 : -EINVAL; | |
271 | } | |
2ba9f0d8 | 272 | EXPORT_SYMBOL_GPL(kvmppc_sanity_check); |
af8f38b3 | 273 | |
bbf45ba5 HB |
274 | int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu) |
275 | { | |
276 | enum emulation_result er; | |
277 | int r; | |
278 | ||
d69614a2 | 279 | er = kvmppc_emulate_loadstore(vcpu); |
bbf45ba5 HB |
280 | switch (er) { |
281 | case EMULATE_DONE: | |
282 | /* Future optimization: only reload non-volatiles if they were | |
283 | * actually modified. */ | |
284 | r = RESUME_GUEST_NV; | |
285 | break; | |
51f04726 MC |
286 | case EMULATE_AGAIN: |
287 | r = RESUME_GUEST; | |
288 | break; | |
bbf45ba5 HB |
289 | case EMULATE_DO_MMIO: |
290 | run->exit_reason = KVM_EXIT_MMIO; | |
291 | /* We must reload nonvolatiles because "update" load/store | |
292 | * instructions modify register state. */ | |
293 | /* Future optimization: only reload non-volatiles if they were | |
294 | * actually modified. */ | |
295 | r = RESUME_HOST_NV; | |
296 | break; | |
297 | case EMULATE_FAIL: | |
51f04726 MC |
298 | { |
299 | u32 last_inst; | |
300 | ||
8d0eff63 | 301 | kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); |
bbf45ba5 | 302 | /* XXX Deliver Program interrupt to guest. */ |
51f04726 | 303 | pr_emerg("%s: emulation failed (%08x)\n", __func__, last_inst); |
bbf45ba5 HB |
304 | r = RESUME_HOST; |
305 | break; | |
51f04726 | 306 | } |
bbf45ba5 | 307 | default: |
5a33169e AG |
308 | WARN_ON(1); |
309 | r = RESUME_GUEST; | |
bbf45ba5 HB |
310 | } |
311 | ||
312 | return r; | |
313 | } | |
2ba9f0d8 | 314 | EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio); |
bbf45ba5 | 315 | |
35c4a733 AG |
316 | int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
317 | bool data) | |
318 | { | |
c12fb43c | 319 | ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; |
35c4a733 AG |
320 | struct kvmppc_pte pte; |
321 | int r; | |
322 | ||
323 | vcpu->stat.st++; | |
324 | ||
325 | r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, | |
326 | XLATE_WRITE, &pte); | |
327 | if (r < 0) | |
328 | return r; | |
329 | ||
330 | *eaddr = pte.raddr; | |
331 | ||
332 | if (!pte.may_write) | |
333 | return -EPERM; | |
334 | ||
c12fb43c AG |
335 | /* Magic page override */ |
336 | if (kvmppc_supports_magic_page(vcpu) && mp_pa && | |
337 | ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && | |
338 | !(kvmppc_get_msr(vcpu) & MSR_PR)) { | |
339 | void *magic = vcpu->arch.shared; | |
340 | magic += pte.eaddr & 0xfff; | |
341 | memcpy(magic, ptr, size); | |
342 | return EMULATE_DONE; | |
343 | } | |
344 | ||
35c4a733 AG |
345 | if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) |
346 | return EMULATE_DO_MMIO; | |
347 | ||
348 | return EMULATE_DONE; | |
349 | } | |
350 | EXPORT_SYMBOL_GPL(kvmppc_st); | |
351 | ||
352 | int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, | |
353 | bool data) | |
354 | { | |
c12fb43c | 355 | ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; |
35c4a733 | 356 | struct kvmppc_pte pte; |
35c4a733 AG |
357 | int rc; |
358 | ||
359 | vcpu->stat.ld++; | |
360 | ||
361 | rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, | |
362 | XLATE_READ, &pte); | |
363 | if (rc) | |
364 | return rc; | |
365 | ||
366 | *eaddr = pte.raddr; | |
367 | ||
368 | if (!pte.may_read) | |
369 | return -EPERM; | |
370 | ||
371 | if (!data && !pte.may_execute) | |
372 | return -ENOEXEC; | |
373 | ||
c12fb43c AG |
374 | /* Magic page override */ |
375 | if (kvmppc_supports_magic_page(vcpu) && mp_pa && | |
376 | ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && | |
377 | !(kvmppc_get_msr(vcpu) & MSR_PR)) { | |
378 | void *magic = vcpu->arch.shared; | |
379 | magic += pte.eaddr & 0xfff; | |
380 | memcpy(ptr, magic, size); | |
381 | return EMULATE_DONE; | |
382 | } | |
383 | ||
c45c5514 AG |
384 | if (kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size)) |
385 | return EMULATE_DO_MMIO; | |
35c4a733 AG |
386 | |
387 | return EMULATE_DONE; | |
35c4a733 AG |
388 | } |
389 | EXPORT_SYMBOL_GPL(kvmppc_ld); | |
390 | ||
13a34e06 | 391 | int kvm_arch_hardware_enable(void) |
bbf45ba5 | 392 | { |
10474ae8 | 393 | return 0; |
bbf45ba5 HB |
394 | } |
395 | ||
bbf45ba5 HB |
396 | int kvm_arch_hardware_setup(void) |
397 | { | |
398 | return 0; | |
399 | } | |
400 | ||
bbf45ba5 HB |
401 | void kvm_arch_check_processor_compat(void *rtn) |
402 | { | |
9dd921cf | 403 | *(int *)rtn = kvmppc_core_check_processor_compat(); |
bbf45ba5 HB |
404 | } |
405 | ||
e08b9637 | 406 | int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) |
bbf45ba5 | 407 | { |
cbbc58d4 AK |
408 | struct kvmppc_ops *kvm_ops = NULL; |
409 | /* | |
410 | * if we have both HV and PR enabled, default is HV | |
411 | */ | |
412 | if (type == 0) { | |
413 | if (kvmppc_hv_ops) | |
414 | kvm_ops = kvmppc_hv_ops; | |
415 | else | |
416 | kvm_ops = kvmppc_pr_ops; | |
417 | if (!kvm_ops) | |
418 | goto err_out; | |
419 | } else if (type == KVM_VM_PPC_HV) { | |
420 | if (!kvmppc_hv_ops) | |
421 | goto err_out; | |
422 | kvm_ops = kvmppc_hv_ops; | |
423 | } else if (type == KVM_VM_PPC_PR) { | |
424 | if (!kvmppc_pr_ops) | |
425 | goto err_out; | |
426 | kvm_ops = kvmppc_pr_ops; | |
427 | } else | |
428 | goto err_out; | |
429 | ||
430 | if (kvm_ops->owner && !try_module_get(kvm_ops->owner)) | |
431 | return -ENOENT; | |
432 | ||
433 | kvm->arch.kvm_ops = kvm_ops; | |
f9e0554d | 434 | return kvmppc_core_init_vm(kvm); |
cbbc58d4 AK |
435 | err_out: |
436 | return -EINVAL; | |
bbf45ba5 HB |
437 | } |
438 | ||
d89f5eff | 439 | void kvm_arch_destroy_vm(struct kvm *kvm) |
bbf45ba5 HB |
440 | { |
441 | unsigned int i; | |
988a2cae | 442 | struct kvm_vcpu *vcpu; |
bbf45ba5 | 443 | |
e17769eb SW |
444 | #ifdef CONFIG_KVM_XICS |
445 | /* | |
446 | * We call kick_all_cpus_sync() to ensure that all | |
447 | * CPUs have executed any pending IPIs before we | |
448 | * continue and free VCPUs structures below. | |
449 | */ | |
450 | if (is_kvmppc_hv_enabled(kvm)) | |
451 | kick_all_cpus_sync(); | |
452 | #endif | |
453 | ||
988a2cae GN |
454 | kvm_for_each_vcpu(i, vcpu, kvm) |
455 | kvm_arch_vcpu_free(vcpu); | |
456 | ||
457 | mutex_lock(&kvm->lock); | |
458 | for (i = 0; i < atomic_read(&kvm->online_vcpus); i++) | |
459 | kvm->vcpus[i] = NULL; | |
460 | ||
461 | atomic_set(&kvm->online_vcpus, 0); | |
f9e0554d PM |
462 | |
463 | kvmppc_core_destroy_vm(kvm); | |
464 | ||
988a2cae | 465 | mutex_unlock(&kvm->lock); |
cbbc58d4 AK |
466 | |
467 | /* drop the module reference */ | |
468 | module_put(kvm->arch.kvm_ops->owner); | |
bbf45ba5 HB |
469 | } |
470 | ||
784aa3d7 | 471 | int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) |
bbf45ba5 HB |
472 | { |
473 | int r; | |
7a58777a | 474 | /* Assume we're using HV mode when the HV module is loaded */ |
cbbc58d4 | 475 | int hv_enabled = kvmppc_hv_ops ? 1 : 0; |
bbf45ba5 | 476 | |
7a58777a AG |
477 | if (kvm) { |
478 | /* | |
479 | * Hooray - we know which VM type we're running on. Depend on | |
480 | * that rather than the guess above. | |
481 | */ | |
482 | hv_enabled = is_kvmppc_hv_enabled(kvm); | |
483 | } | |
484 | ||
bbf45ba5 | 485 | switch (ext) { |
5ce941ee SW |
486 | #ifdef CONFIG_BOOKE |
487 | case KVM_CAP_PPC_BOOKE_SREGS: | |
f61c94bb | 488 | case KVM_CAP_PPC_BOOKE_WATCHDOG: |
1c810636 | 489 | case KVM_CAP_PPC_EPR: |
5ce941ee | 490 | #else |
e15a1137 | 491 | case KVM_CAP_PPC_SEGSTATE: |
1022fc3d | 492 | case KVM_CAP_PPC_HIOR: |
930b412a | 493 | case KVM_CAP_PPC_PAPR: |
5ce941ee | 494 | #endif |
18978768 | 495 | case KVM_CAP_PPC_UNSET_IRQ: |
7b4203e8 | 496 | case KVM_CAP_PPC_IRQ_LEVEL: |
71fbfd5f | 497 | case KVM_CAP_ENABLE_CAP: |
699a0ea0 | 498 | case KVM_CAP_ENABLE_CAP_VM: |
e24ed81f | 499 | case KVM_CAP_ONE_REG: |
0e673fb6 | 500 | case KVM_CAP_IOEVENTFD: |
5df554ad | 501 | case KVM_CAP_DEVICE_CTRL: |
de56a948 PM |
502 | r = 1; |
503 | break; | |
de56a948 | 504 | case KVM_CAP_PPC_PAIRED_SINGLES: |
ad0a048b | 505 | case KVM_CAP_PPC_OSI: |
15711e9c | 506 | case KVM_CAP_PPC_GET_PVINFO: |
bf7ca4bd | 507 | #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) |
dc83b8bc | 508 | case KVM_CAP_SW_TLB: |
eb1e4f43 | 509 | #endif |
699cc876 | 510 | /* We support this only for PR */ |
cbbc58d4 | 511 | r = !hv_enabled; |
e15a1137 | 512 | break; |
699cc876 | 513 | #ifdef CONFIG_KVM_MMIO |
588968b6 LV |
514 | case KVM_CAP_COALESCED_MMIO: |
515 | r = KVM_COALESCED_MMIO_PAGE_OFFSET; | |
516 | break; | |
54738c09 | 517 | #endif |
699cc876 AK |
518 | #ifdef CONFIG_KVM_MPIC |
519 | case KVM_CAP_IRQ_MPIC: | |
520 | r = 1; | |
521 | break; | |
522 | #endif | |
523 | ||
f31e65e1 | 524 | #ifdef CONFIG_PPC_BOOK3S_64 |
54738c09 | 525 | case KVM_CAP_SPAPR_TCE: |
58ded420 | 526 | case KVM_CAP_SPAPR_TCE_64: |
32fad281 | 527 | case KVM_CAP_PPC_ALLOC_HTAB: |
8e591cb7 | 528 | case KVM_CAP_PPC_RTAS: |
f2e91042 | 529 | case KVM_CAP_PPC_FIXUP_HCALL: |
699a0ea0 | 530 | case KVM_CAP_PPC_ENABLE_HCALL: |
5975a2e0 PM |
531 | #ifdef CONFIG_KVM_XICS |
532 | case KVM_CAP_IRQ_XICS: | |
533 | #endif | |
54738c09 DG |
534 | r = 1; |
535 | break; | |
f31e65e1 | 536 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
699cc876 | 537 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
371fefd6 | 538 | case KVM_CAP_PPC_SMT: |
cbbc58d4 | 539 | if (hv_enabled) |
3102f784 | 540 | r = threads_per_subcore; |
699cc876 AK |
541 | else |
542 | r = 0; | |
371fefd6 | 543 | break; |
aa04b4cc | 544 | case KVM_CAP_PPC_RMA: |
c17b98cf | 545 | r = 0; |
aa04b4cc | 546 | break; |
e928e9cb ME |
547 | case KVM_CAP_PPC_HWRNG: |
548 | r = kvmppc_hwrng_present(); | |
549 | break; | |
f4800b1f | 550 | #endif |
342d3db7 | 551 | case KVM_CAP_SYNC_MMU: |
699cc876 | 552 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
c17b98cf | 553 | r = hv_enabled; |
f4800b1f AG |
554 | #elif defined(KVM_ARCH_WANT_MMU_NOTIFIER) |
555 | r = 1; | |
556 | #else | |
557 | r = 0; | |
a2932923 | 558 | #endif |
699cc876 AK |
559 | break; |
560 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE | |
a2932923 | 561 | case KVM_CAP_PPC_HTAB_FD: |
cbbc58d4 | 562 | r = hv_enabled; |
a2932923 | 563 | break; |
de56a948 | 564 | #endif |
b5434032 ME |
565 | case KVM_CAP_NR_VCPUS: |
566 | /* | |
567 | * Recommending a number of CPUs is somewhat arbitrary; we | |
568 | * return the number of present CPUs for -HV (since a host | |
569 | * will have secondary threads "offline"), and for other KVM | |
570 | * implementations just count online CPUs. | |
571 | */ | |
cbbc58d4 | 572 | if (hv_enabled) |
699cc876 AK |
573 | r = num_present_cpus(); |
574 | else | |
575 | r = num_online_cpus(); | |
b5434032 | 576 | break; |
bfec5c2c ND |
577 | case KVM_CAP_NR_MEMSLOTS: |
578 | r = KVM_USER_MEM_SLOTS; | |
579 | break; | |
b5434032 ME |
580 | case KVM_CAP_MAX_VCPUS: |
581 | r = KVM_MAX_VCPUS; | |
582 | break; | |
5b74716e BH |
583 | #ifdef CONFIG_PPC_BOOK3S_64 |
584 | case KVM_CAP_PPC_GET_SMMU_INFO: | |
585 | r = 1; | |
586 | break; | |
d3695aa4 AK |
587 | case KVM_CAP_SPAPR_MULTITCE: |
588 | r = 1; | |
589 | break; | |
5b74716e | 590 | #endif |
bbf45ba5 HB |
591 | default: |
592 | r = 0; | |
593 | break; | |
594 | } | |
595 | return r; | |
596 | ||
597 | } | |
598 | ||
599 | long kvm_arch_dev_ioctl(struct file *filp, | |
600 | unsigned int ioctl, unsigned long arg) | |
601 | { | |
602 | return -EINVAL; | |
603 | } | |
604 | ||
5587027c | 605 | void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, |
db3fe4eb TY |
606 | struct kvm_memory_slot *dont) |
607 | { | |
5587027c | 608 | kvmppc_core_free_memslot(kvm, free, dont); |
db3fe4eb TY |
609 | } |
610 | ||
5587027c AK |
611 | int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, |
612 | unsigned long npages) | |
db3fe4eb | 613 | { |
5587027c | 614 | return kvmppc_core_create_memslot(kvm, slot, npages); |
db3fe4eb TY |
615 | } |
616 | ||
f7784b8e | 617 | int kvm_arch_prepare_memory_region(struct kvm *kvm, |
462fce46 | 618 | struct kvm_memory_slot *memslot, |
09170a49 | 619 | const struct kvm_userspace_memory_region *mem, |
7b6195a9 | 620 | enum kvm_mr_change change) |
bbf45ba5 | 621 | { |
a66b48c3 | 622 | return kvmppc_core_prepare_memory_region(kvm, memslot, mem); |
bbf45ba5 HB |
623 | } |
624 | ||
f7784b8e | 625 | void kvm_arch_commit_memory_region(struct kvm *kvm, |
09170a49 | 626 | const struct kvm_userspace_memory_region *mem, |
8482644a | 627 | const struct kvm_memory_slot *old, |
f36f3f28 | 628 | const struct kvm_memory_slot *new, |
8482644a | 629 | enum kvm_mr_change change) |
f7784b8e | 630 | { |
f36f3f28 | 631 | kvmppc_core_commit_memory_region(kvm, mem, old, new); |
f7784b8e MT |
632 | } |
633 | ||
2df72e9b MT |
634 | void kvm_arch_flush_shadow_memslot(struct kvm *kvm, |
635 | struct kvm_memory_slot *slot) | |
34d4cb8f | 636 | { |
dfe49dbd | 637 | kvmppc_core_flush_memslot(kvm, slot); |
34d4cb8f MT |
638 | } |
639 | ||
bbf45ba5 HB |
640 | struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id) |
641 | { | |
73e75b41 HB |
642 | struct kvm_vcpu *vcpu; |
643 | vcpu = kvmppc_core_vcpu_create(kvm, id); | |
03cdab53 ME |
644 | if (!IS_ERR(vcpu)) { |
645 | vcpu->arch.wqp = &vcpu->wq; | |
06056bfb | 646 | kvmppc_create_vcpu_debugfs(vcpu, id); |
03cdab53 | 647 | } |
73e75b41 | 648 | return vcpu; |
bbf45ba5 HB |
649 | } |
650 | ||
31928aa5 | 651 | void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) |
42897d86 | 652 | { |
42897d86 MT |
653 | } |
654 | ||
bbf45ba5 HB |
655 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) |
656 | { | |
a595405d AG |
657 | /* Make sure we're not using the vcpu anymore */ |
658 | hrtimer_cancel(&vcpu->arch.dec_timer); | |
a595405d | 659 | |
73e75b41 | 660 | kvmppc_remove_vcpu_debugfs(vcpu); |
eb1e4f43 SW |
661 | |
662 | switch (vcpu->arch.irq_type) { | |
663 | case KVMPPC_IRQ_MPIC: | |
664 | kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu); | |
665 | break; | |
bc5ad3f3 BH |
666 | case KVMPPC_IRQ_XICS: |
667 | kvmppc_xics_free_icp(vcpu); | |
668 | break; | |
eb1e4f43 SW |
669 | } |
670 | ||
db93f574 | 671 | kvmppc_core_vcpu_free(vcpu); |
bbf45ba5 HB |
672 | } |
673 | ||
674 | void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) | |
675 | { | |
676 | kvm_arch_vcpu_free(vcpu); | |
677 | } | |
678 | ||
679 | int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) | |
680 | { | |
9dd921cf | 681 | return kvmppc_core_pending_dec(vcpu); |
bbf45ba5 HB |
682 | } |
683 | ||
5358a963 | 684 | static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer) |
544c6761 AG |
685 | { |
686 | struct kvm_vcpu *vcpu; | |
687 | ||
688 | vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer); | |
d02d4d15 | 689 | kvmppc_decrementer_func(vcpu); |
544c6761 AG |
690 | |
691 | return HRTIMER_NORESTART; | |
692 | } | |
693 | ||
bbf45ba5 HB |
694 | int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) |
695 | { | |
f61c94bb BB |
696 | int ret; |
697 | ||
544c6761 | 698 | hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS); |
544c6761 | 699 | vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup; |
de56a948 | 700 | vcpu->arch.dec_expires = ~(u64)0; |
bbf45ba5 | 701 | |
09000adb BB |
702 | #ifdef CONFIG_KVM_EXIT_TIMING |
703 | mutex_init(&vcpu->arch.exit_timing_lock); | |
704 | #endif | |
f61c94bb BB |
705 | ret = kvmppc_subarch_vcpu_init(vcpu); |
706 | return ret; | |
bbf45ba5 HB |
707 | } |
708 | ||
709 | void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) | |
710 | { | |
ecc0981f | 711 | kvmppc_mmu_destroy(vcpu); |
f61c94bb | 712 | kvmppc_subarch_vcpu_uninit(vcpu); |
bbf45ba5 HB |
713 | } |
714 | ||
715 | void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | |
716 | { | |
eab17672 SW |
717 | #ifdef CONFIG_BOOKE |
718 | /* | |
719 | * vrsave (formerly usprg0) isn't used by Linux, but may | |
720 | * be used by the guest. | |
721 | * | |
722 | * On non-booke this is associated with Altivec and | |
723 | * is handled by code in book3s.c. | |
724 | */ | |
725 | mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); | |
726 | #endif | |
9dd921cf | 727 | kvmppc_core_vcpu_load(vcpu, cpu); |
bbf45ba5 HB |
728 | } |
729 | ||
730 | void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) | |
731 | { | |
9dd921cf | 732 | kvmppc_core_vcpu_put(vcpu); |
eab17672 SW |
733 | #ifdef CONFIG_BOOKE |
734 | vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); | |
735 | #endif | |
bbf45ba5 HB |
736 | } |
737 | ||
bbf45ba5 HB |
738 | static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, |
739 | struct kvm_run *run) | |
740 | { | |
69b61833 | 741 | u64 uninitialized_var(gpr); |
bbf45ba5 | 742 | |
8e5b26b5 | 743 | if (run->mmio.len > sizeof(gpr)) { |
bbf45ba5 HB |
744 | printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len); |
745 | return; | |
746 | } | |
747 | ||
d078eed3 | 748 | if (!vcpu->arch.mmio_host_swabbed) { |
bbf45ba5 | 749 | switch (run->mmio.len) { |
b104d066 | 750 | case 8: gpr = *(u64 *)run->mmio.data; break; |
8e5b26b5 AG |
751 | case 4: gpr = *(u32 *)run->mmio.data; break; |
752 | case 2: gpr = *(u16 *)run->mmio.data; break; | |
753 | case 1: gpr = *(u8 *)run->mmio.data; break; | |
bbf45ba5 HB |
754 | } |
755 | } else { | |
bbf45ba5 | 756 | switch (run->mmio.len) { |
d078eed3 DG |
757 | case 8: gpr = swab64(*(u64 *)run->mmio.data); break; |
758 | case 4: gpr = swab32(*(u32 *)run->mmio.data); break; | |
759 | case 2: gpr = swab16(*(u16 *)run->mmio.data); break; | |
8e5b26b5 | 760 | case 1: gpr = *(u8 *)run->mmio.data; break; |
bbf45ba5 HB |
761 | } |
762 | } | |
8e5b26b5 | 763 | |
3587d534 AG |
764 | if (vcpu->arch.mmio_sign_extend) { |
765 | switch (run->mmio.len) { | |
766 | #ifdef CONFIG_PPC64 | |
767 | case 4: | |
768 | gpr = (s64)(s32)gpr; | |
769 | break; | |
770 | #endif | |
771 | case 2: | |
772 | gpr = (s64)(s16)gpr; | |
773 | break; | |
774 | case 1: | |
775 | gpr = (s64)(s8)gpr; | |
776 | break; | |
777 | } | |
778 | } | |
779 | ||
8e5b26b5 | 780 | kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); |
b104d066 | 781 | |
b3c5d3c2 AG |
782 | switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) { |
783 | case KVM_MMIO_REG_GPR: | |
b104d066 AG |
784 | kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); |
785 | break; | |
b3c5d3c2 | 786 | case KVM_MMIO_REG_FPR: |
efff1912 | 787 | VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; |
b104d066 | 788 | break; |
287d5611 | 789 | #ifdef CONFIG_PPC_BOOK3S |
b3c5d3c2 AG |
790 | case KVM_MMIO_REG_QPR: |
791 | vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; | |
b104d066 | 792 | break; |
b3c5d3c2 | 793 | case KVM_MMIO_REG_FQPR: |
efff1912 | 794 | VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; |
b3c5d3c2 | 795 | vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; |
b104d066 | 796 | break; |
287d5611 | 797 | #endif |
b104d066 AG |
798 | default: |
799 | BUG(); | |
800 | } | |
bbf45ba5 HB |
801 | } |
802 | ||
803 | int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
73601775 CLG |
804 | unsigned int rt, unsigned int bytes, |
805 | int is_default_endian) | |
bbf45ba5 | 806 | { |
ed840ee9 | 807 | int idx, ret; |
d078eed3 | 808 | bool host_swabbed; |
73601775 | 809 | |
d078eed3 | 810 | /* Pity C doesn't have a logical XOR operator */ |
73601775 | 811 | if (kvmppc_need_byteswap(vcpu)) { |
d078eed3 | 812 | host_swabbed = is_default_endian; |
73601775 | 813 | } else { |
d078eed3 | 814 | host_swabbed = !is_default_endian; |
73601775 | 815 | } |
ed840ee9 | 816 | |
bbf45ba5 HB |
817 | if (bytes > sizeof(run->mmio.data)) { |
818 | printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__, | |
819 | run->mmio.len); | |
820 | } | |
821 | ||
822 | run->mmio.phys_addr = vcpu->arch.paddr_accessed; | |
823 | run->mmio.len = bytes; | |
824 | run->mmio.is_write = 0; | |
825 | ||
826 | vcpu->arch.io_gpr = rt; | |
d078eed3 | 827 | vcpu->arch.mmio_host_swabbed = host_swabbed; |
bbf45ba5 HB |
828 | vcpu->mmio_needed = 1; |
829 | vcpu->mmio_is_write = 0; | |
3587d534 | 830 | vcpu->arch.mmio_sign_extend = 0; |
bbf45ba5 | 831 | |
ed840ee9 SW |
832 | idx = srcu_read_lock(&vcpu->kvm->srcu); |
833 | ||
e32edf4f | 834 | ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, |
ed840ee9 SW |
835 | bytes, &run->mmio.data); |
836 | ||
837 | srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
838 | ||
839 | if (!ret) { | |
0e673fb6 AG |
840 | kvmppc_complete_mmio_load(vcpu, run); |
841 | vcpu->mmio_needed = 0; | |
842 | return EMULATE_DONE; | |
843 | } | |
844 | ||
bbf45ba5 HB |
845 | return EMULATE_DO_MMIO; |
846 | } | |
2ba9f0d8 | 847 | EXPORT_SYMBOL_GPL(kvmppc_handle_load); |
bbf45ba5 | 848 | |
3587d534 AG |
849 | /* Same as above, but sign extends */ |
850 | int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
73601775 CLG |
851 | unsigned int rt, unsigned int bytes, |
852 | int is_default_endian) | |
3587d534 AG |
853 | { |
854 | int r; | |
855 | ||
3587d534 | 856 | vcpu->arch.mmio_sign_extend = 1; |
73601775 | 857 | r = kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian); |
3587d534 AG |
858 | |
859 | return r; | |
860 | } | |
861 | ||
bbf45ba5 | 862 | int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, |
73601775 | 863 | u64 val, unsigned int bytes, int is_default_endian) |
bbf45ba5 HB |
864 | { |
865 | void *data = run->mmio.data; | |
ed840ee9 | 866 | int idx, ret; |
d078eed3 | 867 | bool host_swabbed; |
73601775 | 868 | |
d078eed3 | 869 | /* Pity C doesn't have a logical XOR operator */ |
73601775 | 870 | if (kvmppc_need_byteswap(vcpu)) { |
d078eed3 | 871 | host_swabbed = is_default_endian; |
73601775 | 872 | } else { |
d078eed3 | 873 | host_swabbed = !is_default_endian; |
73601775 | 874 | } |
bbf45ba5 HB |
875 | |
876 | if (bytes > sizeof(run->mmio.data)) { | |
877 | printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__, | |
878 | run->mmio.len); | |
879 | } | |
880 | ||
881 | run->mmio.phys_addr = vcpu->arch.paddr_accessed; | |
882 | run->mmio.len = bytes; | |
883 | run->mmio.is_write = 1; | |
884 | vcpu->mmio_needed = 1; | |
885 | vcpu->mmio_is_write = 1; | |
886 | ||
887 | /* Store the value at the lowest bytes in 'data'. */ | |
d078eed3 | 888 | if (!host_swabbed) { |
bbf45ba5 | 889 | switch (bytes) { |
b104d066 | 890 | case 8: *(u64 *)data = val; break; |
bbf45ba5 HB |
891 | case 4: *(u32 *)data = val; break; |
892 | case 2: *(u16 *)data = val; break; | |
893 | case 1: *(u8 *)data = val; break; | |
894 | } | |
895 | } else { | |
bbf45ba5 | 896 | switch (bytes) { |
d078eed3 DG |
897 | case 8: *(u64 *)data = swab64(val); break; |
898 | case 4: *(u32 *)data = swab32(val); break; | |
899 | case 2: *(u16 *)data = swab16(val); break; | |
900 | case 1: *(u8 *)data = val; break; | |
bbf45ba5 HB |
901 | } |
902 | } | |
903 | ||
ed840ee9 SW |
904 | idx = srcu_read_lock(&vcpu->kvm->srcu); |
905 | ||
e32edf4f | 906 | ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, |
ed840ee9 SW |
907 | bytes, &run->mmio.data); |
908 | ||
909 | srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
910 | ||
911 | if (!ret) { | |
0e673fb6 AG |
912 | vcpu->mmio_needed = 0; |
913 | return EMULATE_DONE; | |
914 | } | |
915 | ||
bbf45ba5 HB |
916 | return EMULATE_DO_MMIO; |
917 | } | |
2ba9f0d8 | 918 | EXPORT_SYMBOL_GPL(kvmppc_handle_store); |
bbf45ba5 | 919 | |
8a41ea53 MC |
920 | int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) |
921 | { | |
922 | int r = 0; | |
923 | union kvmppc_one_reg val; | |
924 | int size; | |
925 | ||
926 | size = one_reg_size(reg->id); | |
927 | if (size > sizeof(val)) | |
928 | return -EINVAL; | |
929 | ||
930 | r = kvmppc_get_one_reg(vcpu, reg->id, &val); | |
931 | if (r == -EINVAL) { | |
932 | r = 0; | |
933 | switch (reg->id) { | |
3840edc8 MC |
934 | #ifdef CONFIG_ALTIVEC |
935 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: | |
936 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
937 | r = -ENXIO; | |
938 | break; | |
939 | } | |
b4d7f161 | 940 | val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0]; |
3840edc8 MC |
941 | break; |
942 | case KVM_REG_PPC_VSCR: | |
943 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
944 | r = -ENXIO; | |
945 | break; | |
946 | } | |
b4d7f161 | 947 | val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]); |
3840edc8 MC |
948 | break; |
949 | case KVM_REG_PPC_VRSAVE: | |
b4d7f161 | 950 | val = get_reg_val(reg->id, vcpu->arch.vrsave); |
3840edc8 MC |
951 | break; |
952 | #endif /* CONFIG_ALTIVEC */ | |
8a41ea53 MC |
953 | default: |
954 | r = -EINVAL; | |
955 | break; | |
956 | } | |
957 | } | |
958 | ||
959 | if (r) | |
960 | return r; | |
961 | ||
962 | if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) | |
963 | r = -EFAULT; | |
964 | ||
965 | return r; | |
966 | } | |
967 | ||
968 | int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) | |
969 | { | |
970 | int r; | |
971 | union kvmppc_one_reg val; | |
972 | int size; | |
973 | ||
974 | size = one_reg_size(reg->id); | |
975 | if (size > sizeof(val)) | |
976 | return -EINVAL; | |
977 | ||
978 | if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) | |
979 | return -EFAULT; | |
980 | ||
981 | r = kvmppc_set_one_reg(vcpu, reg->id, &val); | |
982 | if (r == -EINVAL) { | |
983 | r = 0; | |
984 | switch (reg->id) { | |
3840edc8 MC |
985 | #ifdef CONFIG_ALTIVEC |
986 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: | |
987 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
988 | r = -ENXIO; | |
989 | break; | |
990 | } | |
b4d7f161 | 991 | vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval; |
3840edc8 MC |
992 | break; |
993 | case KVM_REG_PPC_VSCR: | |
994 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { | |
995 | r = -ENXIO; | |
996 | break; | |
997 | } | |
b4d7f161 | 998 | vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val); |
3840edc8 MC |
999 | break; |
1000 | case KVM_REG_PPC_VRSAVE: | |
b4d7f161 GK |
1001 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { |
1002 | r = -ENXIO; | |
1003 | break; | |
1004 | } | |
1005 | vcpu->arch.vrsave = set_reg_val(reg->id, val); | |
3840edc8 MC |
1006 | break; |
1007 | #endif /* CONFIG_ALTIVEC */ | |
8a41ea53 MC |
1008 | default: |
1009 | r = -EINVAL; | |
1010 | break; | |
1011 | } | |
1012 | } | |
1013 | ||
1014 | return r; | |
1015 | } | |
1016 | ||
bbf45ba5 HB |
1017 | int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) |
1018 | { | |
1019 | int r; | |
1020 | sigset_t sigsaved; | |
1021 | ||
1022 | if (vcpu->sigset_active) | |
1023 | sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved); | |
1024 | ||
1025 | if (vcpu->mmio_needed) { | |
1026 | if (!vcpu->mmio_is_write) | |
1027 | kvmppc_complete_mmio_load(vcpu, run); | |
1028 | vcpu->mmio_needed = 0; | |
ad0a048b AG |
1029 | } else if (vcpu->arch.osi_needed) { |
1030 | u64 *gprs = run->osi.gprs; | |
1031 | int i; | |
1032 | ||
1033 | for (i = 0; i < 32; i++) | |
1034 | kvmppc_set_gpr(vcpu, i, gprs[i]); | |
1035 | vcpu->arch.osi_needed = 0; | |
de56a948 PM |
1036 | } else if (vcpu->arch.hcall_needed) { |
1037 | int i; | |
1038 | ||
1039 | kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret); | |
1040 | for (i = 0; i < 9; ++i) | |
1041 | kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]); | |
1042 | vcpu->arch.hcall_needed = 0; | |
1c810636 AG |
1043 | #ifdef CONFIG_BOOKE |
1044 | } else if (vcpu->arch.epr_needed) { | |
1045 | kvmppc_set_epr(vcpu, run->epr.epr); | |
1046 | vcpu->arch.epr_needed = 0; | |
1047 | #endif | |
bbf45ba5 HB |
1048 | } |
1049 | ||
df6909e5 | 1050 | r = kvmppc_vcpu_run(run, vcpu); |
bbf45ba5 HB |
1051 | |
1052 | if (vcpu->sigset_active) | |
1053 | sigprocmask(SIG_SETMASK, &sigsaved, NULL); | |
1054 | ||
1055 | return r; | |
1056 | } | |
1057 | ||
1058 | int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq) | |
1059 | { | |
19ccb76a | 1060 | if (irq->irq == KVM_INTERRUPT_UNSET) { |
4fe27d2a | 1061 | kvmppc_core_dequeue_external(vcpu); |
19ccb76a PM |
1062 | return 0; |
1063 | } | |
1064 | ||
1065 | kvmppc_core_queue_external(vcpu, irq); | |
b6d33834 | 1066 | |
dfd4d47e | 1067 | kvm_vcpu_kick(vcpu); |
45c5eb67 | 1068 | |
bbf45ba5 HB |
1069 | return 0; |
1070 | } | |
1071 | ||
71fbfd5f AG |
1072 | static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, |
1073 | struct kvm_enable_cap *cap) | |
1074 | { | |
1075 | int r; | |
1076 | ||
1077 | if (cap->flags) | |
1078 | return -EINVAL; | |
1079 | ||
1080 | switch (cap->cap) { | |
ad0a048b AG |
1081 | case KVM_CAP_PPC_OSI: |
1082 | r = 0; | |
1083 | vcpu->arch.osi_enabled = true; | |
1084 | break; | |
930b412a AG |
1085 | case KVM_CAP_PPC_PAPR: |
1086 | r = 0; | |
1087 | vcpu->arch.papr_enabled = true; | |
1088 | break; | |
1c810636 AG |
1089 | case KVM_CAP_PPC_EPR: |
1090 | r = 0; | |
5df554ad SW |
1091 | if (cap->args[0]) |
1092 | vcpu->arch.epr_flags |= KVMPPC_EPR_USER; | |
1093 | else | |
1094 | vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER; | |
1c810636 | 1095 | break; |
f61c94bb BB |
1096 | #ifdef CONFIG_BOOKE |
1097 | case KVM_CAP_PPC_BOOKE_WATCHDOG: | |
1098 | r = 0; | |
1099 | vcpu->arch.watchdog_enabled = true; | |
1100 | break; | |
1101 | #endif | |
bf7ca4bd | 1102 | #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) |
dc83b8bc SW |
1103 | case KVM_CAP_SW_TLB: { |
1104 | struct kvm_config_tlb cfg; | |
1105 | void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0]; | |
1106 | ||
1107 | r = -EFAULT; | |
1108 | if (copy_from_user(&cfg, user_ptr, sizeof(cfg))) | |
1109 | break; | |
1110 | ||
1111 | r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg); | |
1112 | break; | |
eb1e4f43 SW |
1113 | } |
1114 | #endif | |
1115 | #ifdef CONFIG_KVM_MPIC | |
1116 | case KVM_CAP_IRQ_MPIC: { | |
70abaded | 1117 | struct fd f; |
eb1e4f43 SW |
1118 | struct kvm_device *dev; |
1119 | ||
1120 | r = -EBADF; | |
70abaded AV |
1121 | f = fdget(cap->args[0]); |
1122 | if (!f.file) | |
eb1e4f43 SW |
1123 | break; |
1124 | ||
1125 | r = -EPERM; | |
70abaded | 1126 | dev = kvm_device_from_filp(f.file); |
eb1e4f43 SW |
1127 | if (dev) |
1128 | r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]); | |
1129 | ||
70abaded | 1130 | fdput(f); |
eb1e4f43 | 1131 | break; |
dc83b8bc SW |
1132 | } |
1133 | #endif | |
5975a2e0 PM |
1134 | #ifdef CONFIG_KVM_XICS |
1135 | case KVM_CAP_IRQ_XICS: { | |
70abaded | 1136 | struct fd f; |
5975a2e0 PM |
1137 | struct kvm_device *dev; |
1138 | ||
1139 | r = -EBADF; | |
70abaded AV |
1140 | f = fdget(cap->args[0]); |
1141 | if (!f.file) | |
5975a2e0 PM |
1142 | break; |
1143 | ||
1144 | r = -EPERM; | |
70abaded | 1145 | dev = kvm_device_from_filp(f.file); |
5975a2e0 PM |
1146 | if (dev) |
1147 | r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]); | |
1148 | ||
70abaded | 1149 | fdput(f); |
5975a2e0 PM |
1150 | break; |
1151 | } | |
1152 | #endif /* CONFIG_KVM_XICS */ | |
71fbfd5f AG |
1153 | default: |
1154 | r = -EINVAL; | |
1155 | break; | |
1156 | } | |
1157 | ||
af8f38b3 AG |
1158 | if (!r) |
1159 | r = kvmppc_sanity_check(vcpu); | |
1160 | ||
71fbfd5f AG |
1161 | return r; |
1162 | } | |
1163 | ||
bbf45ba5 HB |
1164 | int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, |
1165 | struct kvm_mp_state *mp_state) | |
1166 | { | |
1167 | return -EINVAL; | |
1168 | } | |
1169 | ||
1170 | int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, | |
1171 | struct kvm_mp_state *mp_state) | |
1172 | { | |
1173 | return -EINVAL; | |
1174 | } | |
1175 | ||
1176 | long kvm_arch_vcpu_ioctl(struct file *filp, | |
1177 | unsigned int ioctl, unsigned long arg) | |
1178 | { | |
1179 | struct kvm_vcpu *vcpu = filp->private_data; | |
1180 | void __user *argp = (void __user *)arg; | |
1181 | long r; | |
1182 | ||
93736624 AK |
1183 | switch (ioctl) { |
1184 | case KVM_INTERRUPT: { | |
bbf45ba5 HB |
1185 | struct kvm_interrupt irq; |
1186 | r = -EFAULT; | |
1187 | if (copy_from_user(&irq, argp, sizeof(irq))) | |
93736624 | 1188 | goto out; |
bbf45ba5 | 1189 | r = kvm_vcpu_ioctl_interrupt(vcpu, &irq); |
93736624 | 1190 | goto out; |
bbf45ba5 | 1191 | } |
19483d14 | 1192 | |
71fbfd5f AG |
1193 | case KVM_ENABLE_CAP: |
1194 | { | |
1195 | struct kvm_enable_cap cap; | |
1196 | r = -EFAULT; | |
1197 | if (copy_from_user(&cap, argp, sizeof(cap))) | |
1198 | goto out; | |
1199 | r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap); | |
1200 | break; | |
1201 | } | |
dc83b8bc | 1202 | |
e24ed81f AG |
1203 | case KVM_SET_ONE_REG: |
1204 | case KVM_GET_ONE_REG: | |
1205 | { | |
1206 | struct kvm_one_reg reg; | |
1207 | r = -EFAULT; | |
1208 | if (copy_from_user(®, argp, sizeof(reg))) | |
1209 | goto out; | |
1210 | if (ioctl == KVM_SET_ONE_REG) | |
1211 | r = kvm_vcpu_ioctl_set_one_reg(vcpu, ®); | |
1212 | else | |
1213 | r = kvm_vcpu_ioctl_get_one_reg(vcpu, ®); | |
1214 | break; | |
1215 | } | |
1216 | ||
bf7ca4bd | 1217 | #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) |
dc83b8bc SW |
1218 | case KVM_DIRTY_TLB: { |
1219 | struct kvm_dirty_tlb dirty; | |
1220 | r = -EFAULT; | |
1221 | if (copy_from_user(&dirty, argp, sizeof(dirty))) | |
1222 | goto out; | |
1223 | r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty); | |
1224 | break; | |
1225 | } | |
1226 | #endif | |
bbf45ba5 HB |
1227 | default: |
1228 | r = -EINVAL; | |
1229 | } | |
1230 | ||
1231 | out: | |
1232 | return r; | |
1233 | } | |
1234 | ||
5b1c1493 CO |
1235 | int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) |
1236 | { | |
1237 | return VM_FAULT_SIGBUS; | |
1238 | } | |
1239 | ||
15711e9c AG |
1240 | static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo) |
1241 | { | |
784bafac SY |
1242 | u32 inst_nop = 0x60000000; |
1243 | #ifdef CONFIG_KVM_BOOKE_HV | |
1244 | u32 inst_sc1 = 0x44000022; | |
2743103f AG |
1245 | pvinfo->hcall[0] = cpu_to_be32(inst_sc1); |
1246 | pvinfo->hcall[1] = cpu_to_be32(inst_nop); | |
1247 | pvinfo->hcall[2] = cpu_to_be32(inst_nop); | |
1248 | pvinfo->hcall[3] = cpu_to_be32(inst_nop); | |
784bafac | 1249 | #else |
15711e9c AG |
1250 | u32 inst_lis = 0x3c000000; |
1251 | u32 inst_ori = 0x60000000; | |
15711e9c AG |
1252 | u32 inst_sc = 0x44000002; |
1253 | u32 inst_imm_mask = 0xffff; | |
1254 | ||
1255 | /* | |
1256 | * The hypercall to get into KVM from within guest context is as | |
1257 | * follows: | |
1258 | * | |
1259 | * lis r0, r0, KVM_SC_MAGIC_R0@h | |
1260 | * ori r0, KVM_SC_MAGIC_R0@l | |
1261 | * sc | |
1262 | * nop | |
1263 | */ | |
2743103f AG |
1264 | pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask)); |
1265 | pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask)); | |
1266 | pvinfo->hcall[2] = cpu_to_be32(inst_sc); | |
1267 | pvinfo->hcall[3] = cpu_to_be32(inst_nop); | |
784bafac | 1268 | #endif |
15711e9c | 1269 | |
9202e076 LYB |
1270 | pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE; |
1271 | ||
15711e9c AG |
1272 | return 0; |
1273 | } | |
1274 | ||
5efdb4be AG |
1275 | int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event, |
1276 | bool line_status) | |
1277 | { | |
1278 | if (!irqchip_in_kernel(kvm)) | |
1279 | return -ENXIO; | |
1280 | ||
1281 | irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, | |
1282 | irq_event->irq, irq_event->level, | |
1283 | line_status); | |
1284 | return 0; | |
1285 | } | |
1286 | ||
699a0ea0 PM |
1287 | |
1288 | static int kvm_vm_ioctl_enable_cap(struct kvm *kvm, | |
1289 | struct kvm_enable_cap *cap) | |
1290 | { | |
1291 | int r; | |
1292 | ||
1293 | if (cap->flags) | |
1294 | return -EINVAL; | |
1295 | ||
1296 | switch (cap->cap) { | |
1297 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | |
1298 | case KVM_CAP_PPC_ENABLE_HCALL: { | |
1299 | unsigned long hcall = cap->args[0]; | |
1300 | ||
1301 | r = -EINVAL; | |
1302 | if (hcall > MAX_HCALL_OPCODE || (hcall & 3) || | |
1303 | cap->args[1] > 1) | |
1304 | break; | |
ae2113a4 PM |
1305 | if (!kvmppc_book3s_hcall_implemented(kvm, hcall)) |
1306 | break; | |
699a0ea0 PM |
1307 | if (cap->args[1]) |
1308 | set_bit(hcall / 4, kvm->arch.enabled_hcalls); | |
1309 | else | |
1310 | clear_bit(hcall / 4, kvm->arch.enabled_hcalls); | |
1311 | r = 0; | |
1312 | break; | |
1313 | } | |
1314 | #endif | |
1315 | default: | |
1316 | r = -EINVAL; | |
1317 | break; | |
1318 | } | |
1319 | ||
1320 | return r; | |
1321 | } | |
1322 | ||
bbf45ba5 HB |
1323 | long kvm_arch_vm_ioctl(struct file *filp, |
1324 | unsigned int ioctl, unsigned long arg) | |
1325 | { | |
5df554ad | 1326 | struct kvm *kvm __maybe_unused = filp->private_data; |
15711e9c | 1327 | void __user *argp = (void __user *)arg; |
bbf45ba5 HB |
1328 | long r; |
1329 | ||
1330 | switch (ioctl) { | |
15711e9c AG |
1331 | case KVM_PPC_GET_PVINFO: { |
1332 | struct kvm_ppc_pvinfo pvinfo; | |
d8cdddcd | 1333 | memset(&pvinfo, 0, sizeof(pvinfo)); |
15711e9c AG |
1334 | r = kvm_vm_ioctl_get_pvinfo(&pvinfo); |
1335 | if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) { | |
1336 | r = -EFAULT; | |
1337 | goto out; | |
1338 | } | |
1339 | ||
1340 | break; | |
1341 | } | |
699a0ea0 PM |
1342 | case KVM_ENABLE_CAP: |
1343 | { | |
1344 | struct kvm_enable_cap cap; | |
1345 | r = -EFAULT; | |
1346 | if (copy_from_user(&cap, argp, sizeof(cap))) | |
1347 | goto out; | |
1348 | r = kvm_vm_ioctl_enable_cap(kvm, &cap); | |
1349 | break; | |
1350 | } | |
f31e65e1 | 1351 | #ifdef CONFIG_PPC_BOOK3S_64 |
58ded420 AK |
1352 | case KVM_CREATE_SPAPR_TCE_64: { |
1353 | struct kvm_create_spapr_tce_64 create_tce_64; | |
1354 | ||
1355 | r = -EFAULT; | |
1356 | if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64))) | |
1357 | goto out; | |
1358 | if (create_tce_64.flags) { | |
1359 | r = -EINVAL; | |
1360 | goto out; | |
1361 | } | |
1362 | r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); | |
1363 | goto out; | |
1364 | } | |
54738c09 DG |
1365 | case KVM_CREATE_SPAPR_TCE: { |
1366 | struct kvm_create_spapr_tce create_tce; | |
58ded420 | 1367 | struct kvm_create_spapr_tce_64 create_tce_64; |
54738c09 DG |
1368 | |
1369 | r = -EFAULT; | |
1370 | if (copy_from_user(&create_tce, argp, sizeof(create_tce))) | |
1371 | goto out; | |
58ded420 AK |
1372 | |
1373 | create_tce_64.liobn = create_tce.liobn; | |
1374 | create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K; | |
1375 | create_tce_64.offset = 0; | |
1376 | create_tce_64.size = create_tce.window_size >> | |
1377 | IOMMU_PAGE_SHIFT_4K; | |
1378 | create_tce_64.flags = 0; | |
1379 | r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); | |
54738c09 DG |
1380 | goto out; |
1381 | } | |
5b74716e | 1382 | case KVM_PPC_GET_SMMU_INFO: { |
5b74716e | 1383 | struct kvm_ppc_smmu_info info; |
cbbc58d4 | 1384 | struct kvm *kvm = filp->private_data; |
5b74716e BH |
1385 | |
1386 | memset(&info, 0, sizeof(info)); | |
cbbc58d4 | 1387 | r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info); |
5b74716e BH |
1388 | if (r >= 0 && copy_to_user(argp, &info, sizeof(info))) |
1389 | r = -EFAULT; | |
1390 | break; | |
1391 | } | |
8e591cb7 ME |
1392 | case KVM_PPC_RTAS_DEFINE_TOKEN: { |
1393 | struct kvm *kvm = filp->private_data; | |
1394 | ||
1395 | r = kvm_vm_ioctl_rtas_define_token(kvm, argp); | |
1396 | break; | |
1397 | } | |
cbbc58d4 AK |
1398 | default: { |
1399 | struct kvm *kvm = filp->private_data; | |
1400 | r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg); | |
1401 | } | |
3a167bea | 1402 | #else /* CONFIG_PPC_BOOK3S_64 */ |
bbf45ba5 | 1403 | default: |
367e1319 | 1404 | r = -ENOTTY; |
3a167bea | 1405 | #endif |
bbf45ba5 | 1406 | } |
15711e9c | 1407 | out: |
bbf45ba5 HB |
1408 | return r; |
1409 | } | |
1410 | ||
043cc4d7 SW |
1411 | static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)]; |
1412 | static unsigned long nr_lpids; | |
1413 | ||
1414 | long kvmppc_alloc_lpid(void) | |
1415 | { | |
1416 | long lpid; | |
1417 | ||
1418 | do { | |
1419 | lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS); | |
1420 | if (lpid >= nr_lpids) { | |
1421 | pr_err("%s: No LPIDs free\n", __func__); | |
1422 | return -ENOMEM; | |
1423 | } | |
1424 | } while (test_and_set_bit(lpid, lpid_inuse)); | |
1425 | ||
1426 | return lpid; | |
1427 | } | |
2ba9f0d8 | 1428 | EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid); |
043cc4d7 SW |
1429 | |
1430 | void kvmppc_claim_lpid(long lpid) | |
1431 | { | |
1432 | set_bit(lpid, lpid_inuse); | |
1433 | } | |
2ba9f0d8 | 1434 | EXPORT_SYMBOL_GPL(kvmppc_claim_lpid); |
043cc4d7 SW |
1435 | |
1436 | void kvmppc_free_lpid(long lpid) | |
1437 | { | |
1438 | clear_bit(lpid, lpid_inuse); | |
1439 | } | |
2ba9f0d8 | 1440 | EXPORT_SYMBOL_GPL(kvmppc_free_lpid); |
043cc4d7 SW |
1441 | |
1442 | void kvmppc_init_lpid(unsigned long nr_lpids_param) | |
1443 | { | |
1444 | nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param); | |
1445 | memset(lpid_inuse, 0, sizeof(lpid_inuse)); | |
1446 | } | |
2ba9f0d8 | 1447 | EXPORT_SYMBOL_GPL(kvmppc_init_lpid); |
043cc4d7 | 1448 | |
bbf45ba5 HB |
1449 | int kvm_arch_init(void *opaque) |
1450 | { | |
1451 | return 0; | |
1452 | } | |
1453 | ||
478d6686 | 1454 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr); |