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KVM: PPC: Book3S HV: Don't sleep if XIVE interrupt pending on POWER9
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CommitLineData
bbf45ba5
HB
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19 */
20
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/kvm_host.h>
bbf45ba5 24#include <linux/vmalloc.h>
544c6761 25#include <linux/hrtimer.h>
174cd4b1 26#include <linux/sched/signal.h>
bbf45ba5 27#include <linux/fs.h>
5a0e3ad6 28#include <linux/slab.h>
eb1e4f43 29#include <linux/file.h>
cbbc58d4 30#include <linux/module.h>
9576730d
SW
31#include <linux/irqbypass.h>
32#include <linux/kvm_irqfd.h>
bbf45ba5 33#include <asm/cputable.h>
7c0f6ba6 34#include <linux/uaccess.h>
bbf45ba5 35#include <asm/kvm_ppc.h>
83aae4a8 36#include <asm/tlbflush.h>
371fefd6 37#include <asm/cputhreads.h>
bd2be683 38#include <asm/irqflags.h>
58ded420 39#include <asm/iommu.h>
6f63e81b 40#include <asm/switch_to.h>
5af50993
BH
41#include <asm/xive.h>
42
73e75b41 43#include "timing.h"
5efdb4be 44#include "irq.h"
fad7b9b5 45#include "../mm/mmu_decl.h"
bbf45ba5 46
46f43c6e
MT
47#define CREATE_TRACE_POINTS
48#include "trace.h"
49
cbbc58d4
AK
50struct kvmppc_ops *kvmppc_hv_ops;
51EXPORT_SYMBOL_GPL(kvmppc_hv_ops);
52struct kvmppc_ops *kvmppc_pr_ops;
53EXPORT_SYMBOL_GPL(kvmppc_pr_ops);
54
3a167bea 55
bbf45ba5
HB
56int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
57{
9202e076 58 return !!(v->arch.pending_exceptions) ||
dfd4d47e 59 v->requests;
bbf45ba5
HB
60}
61
b6d33834
CD
62int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
63{
64 return 1;
65}
66
03d25c5b
AG
67/*
68 * Common checks before entering the guest world. Call with interrupts
69 * disabled.
70 *
7ee78855
AG
71 * returns:
72 *
73 * == 1 if we're ready to go into guest state
74 * <= 0 if we need to go back to the host with return value
03d25c5b
AG
75 */
76int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
77{
6c85f52b
SW
78 int r;
79
80 WARN_ON(irqs_disabled());
81 hard_irq_disable();
03d25c5b 82
03d25c5b
AG
83 while (true) {
84 if (need_resched()) {
85 local_irq_enable();
86 cond_resched();
6c85f52b 87 hard_irq_disable();
03d25c5b
AG
88 continue;
89 }
90
91 if (signal_pending(current)) {
7ee78855
AG
92 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
93 vcpu->run->exit_reason = KVM_EXIT_INTR;
94 r = -EINTR;
03d25c5b
AG
95 break;
96 }
97
5bd1cf11
SW
98 vcpu->mode = IN_GUEST_MODE;
99
100 /*
101 * Reading vcpu->requests must happen after setting vcpu->mode,
102 * so we don't miss a request because the requester sees
103 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests
104 * before next entering the guest (and thus doesn't IPI).
489153c7
LT
105 * This also orders the write to mode from any reads
106 * to the page tables done while the VCPU is running.
107 * Please see the comment in kvm_flush_remote_tlbs.
5bd1cf11 108 */
03d25c5b 109 smp_mb();
5bd1cf11 110
03d25c5b
AG
111 if (vcpu->requests) {
112 /* Make sure we process requests preemptable */
113 local_irq_enable();
114 trace_kvm_check_requests(vcpu);
7c973a2e 115 r = kvmppc_core_check_requests(vcpu);
6c85f52b 116 hard_irq_disable();
7c973a2e
AG
117 if (r > 0)
118 continue;
119 break;
03d25c5b
AG
120 }
121
122 if (kvmppc_core_prepare_to_enter(vcpu)) {
123 /* interrupts got enabled in between, so we
124 are back at square 1 */
125 continue;
126 }
127
6edaa530 128 guest_enter_irqoff();
6c85f52b 129 return 1;
03d25c5b
AG
130 }
131
6c85f52b
SW
132 /* return to host */
133 local_irq_enable();
03d25c5b
AG
134 return r;
135}
2ba9f0d8 136EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter);
03d25c5b 137
5deb8e7a
AG
138#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
139static void kvmppc_swab_shared(struct kvm_vcpu *vcpu)
140{
141 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
142 int i;
143
144 shared->sprg0 = swab64(shared->sprg0);
145 shared->sprg1 = swab64(shared->sprg1);
146 shared->sprg2 = swab64(shared->sprg2);
147 shared->sprg3 = swab64(shared->sprg3);
148 shared->srr0 = swab64(shared->srr0);
149 shared->srr1 = swab64(shared->srr1);
150 shared->dar = swab64(shared->dar);
151 shared->msr = swab64(shared->msr);
152 shared->dsisr = swab32(shared->dsisr);
153 shared->int_pending = swab32(shared->int_pending);
154 for (i = 0; i < ARRAY_SIZE(shared->sr); i++)
155 shared->sr[i] = swab32(shared->sr[i]);
156}
157#endif
158
2a342ed5
AG
159int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
160{
161 int nr = kvmppc_get_gpr(vcpu, 11);
162 int r;
163 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
164 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
165 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
166 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
167 unsigned long r2 = 0;
168
5deb8e7a 169 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
2a342ed5
AG
170 /* 32 bit mode */
171 param1 &= 0xffffffff;
172 param2 &= 0xffffffff;
173 param3 &= 0xffffffff;
174 param4 &= 0xffffffff;
175 }
176
177 switch (nr) {
fdcf8bd7 178 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE):
5fc87407 179 {
5deb8e7a
AG
180#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
181 /* Book3S can be little endian, find it out here */
182 int shared_big_endian = true;
183 if (vcpu->arch.intr_msr & MSR_LE)
184 shared_big_endian = false;
185 if (shared_big_endian != vcpu->arch.shared_big_endian)
186 kvmppc_swab_shared(vcpu);
187 vcpu->arch.shared_big_endian = shared_big_endian;
188#endif
189
f3383cf8
AG
190 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) {
191 /*
192 * Older versions of the Linux magic page code had
193 * a bug where they would map their trampoline code
194 * NX. If that's the case, remove !PR NX capability.
195 */
196 vcpu->arch.disable_kernel_nx = true;
197 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
198 }
199
200 vcpu->arch.magic_page_pa = param1 & ~0xfffULL;
201 vcpu->arch.magic_page_ea = param2 & ~0xfffULL;
5fc87407 202
89b68c96
AG
203#ifdef CONFIG_PPC_64K_PAGES
204 /*
205 * Make sure our 4k magic page is in the same window of a 64k
206 * page within the guest and within the host's page.
207 */
208 if ((vcpu->arch.magic_page_pa & 0xf000) !=
209 ((ulong)vcpu->arch.shared & 0xf000)) {
210 void *old_shared = vcpu->arch.shared;
211 ulong shared = (ulong)vcpu->arch.shared;
212 void *new_shared;
213
214 shared &= PAGE_MASK;
215 shared |= vcpu->arch.magic_page_pa & 0xf000;
216 new_shared = (void*)shared;
217 memcpy(new_shared, old_shared, 0x1000);
218 vcpu->arch.shared = new_shared;
219 }
220#endif
221
b5904972 222 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7;
7508e16c 223
fdcf8bd7 224 r = EV_SUCCESS;
5fc87407
AG
225 break;
226 }
fdcf8bd7
SY
227 case KVM_HCALL_TOKEN(KVM_HC_FEATURES):
228 r = EV_SUCCESS;
bf7ca4bd 229#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)
5fc87407
AG
230 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
231#endif
2a342ed5
AG
232
233 /* Second return value is in r4 */
2a342ed5 234 break;
9202e076
LYB
235 case EV_HCALL_TOKEN(EV_IDLE):
236 r = EV_SUCCESS;
237 kvm_vcpu_block(vcpu);
72875d8a 238 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9202e076 239 break;
2a342ed5 240 default:
fdcf8bd7 241 r = EV_UNIMPLEMENTED;
2a342ed5
AG
242 break;
243 }
244
7508e16c
AG
245 kvmppc_set_gpr(vcpu, 4, r2);
246
2a342ed5
AG
247 return r;
248}
2ba9f0d8 249EXPORT_SYMBOL_GPL(kvmppc_kvm_pv);
bbf45ba5 250
af8f38b3
AG
251int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
252{
253 int r = false;
254
255 /* We have to know what CPU to virtualize */
256 if (!vcpu->arch.pvr)
257 goto out;
258
259 /* PAPR only works with book3s_64 */
260 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
261 goto out;
262
af8f38b3 263 /* HV KVM can only do PAPR mode for now */
a78b55d1 264 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm))
af8f38b3 265 goto out;
af8f38b3 266
d30f6e48
SW
267#ifdef CONFIG_KVM_BOOKE_HV
268 if (!cpu_has_feature(CPU_FTR_EMB_HV))
269 goto out;
270#endif
271
af8f38b3
AG
272 r = true;
273
274out:
275 vcpu->arch.sane = r;
276 return r ? 0 : -EINVAL;
277}
2ba9f0d8 278EXPORT_SYMBOL_GPL(kvmppc_sanity_check);
af8f38b3 279
bbf45ba5
HB
280int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
281{
282 enum emulation_result er;
283 int r;
284
d69614a2 285 er = kvmppc_emulate_loadstore(vcpu);
bbf45ba5
HB
286 switch (er) {
287 case EMULATE_DONE:
288 /* Future optimization: only reload non-volatiles if they were
289 * actually modified. */
290 r = RESUME_GUEST_NV;
291 break;
51f04726
MC
292 case EMULATE_AGAIN:
293 r = RESUME_GUEST;
294 break;
bbf45ba5
HB
295 case EMULATE_DO_MMIO:
296 run->exit_reason = KVM_EXIT_MMIO;
297 /* We must reload nonvolatiles because "update" load/store
298 * instructions modify register state. */
299 /* Future optimization: only reload non-volatiles if they were
300 * actually modified. */
301 r = RESUME_HOST_NV;
302 break;
303 case EMULATE_FAIL:
51f04726
MC
304 {
305 u32 last_inst;
306
8d0eff63 307 kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
bbf45ba5 308 /* XXX Deliver Program interrupt to guest. */
51f04726 309 pr_emerg("%s: emulation failed (%08x)\n", __func__, last_inst);
bbf45ba5
HB
310 r = RESUME_HOST;
311 break;
51f04726 312 }
bbf45ba5 313 default:
5a33169e
AG
314 WARN_ON(1);
315 r = RESUME_GUEST;
bbf45ba5
HB
316 }
317
318 return r;
319}
2ba9f0d8 320EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio);
bbf45ba5 321
35c4a733
AG
322int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
323 bool data)
324{
c12fb43c 325 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733
AG
326 struct kvmppc_pte pte;
327 int r;
328
329 vcpu->stat.st++;
330
331 r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
332 XLATE_WRITE, &pte);
333 if (r < 0)
334 return r;
335
336 *eaddr = pte.raddr;
337
338 if (!pte.may_write)
339 return -EPERM;
340
c12fb43c
AG
341 /* Magic page override */
342 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
343 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
344 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
345 void *magic = vcpu->arch.shared;
346 magic += pte.eaddr & 0xfff;
347 memcpy(magic, ptr, size);
348 return EMULATE_DONE;
349 }
350
35c4a733
AG
351 if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size))
352 return EMULATE_DO_MMIO;
353
354 return EMULATE_DONE;
355}
356EXPORT_SYMBOL_GPL(kvmppc_st);
357
358int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
359 bool data)
360{
c12fb43c 361 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK;
35c4a733 362 struct kvmppc_pte pte;
35c4a733
AG
363 int rc;
364
365 vcpu->stat.ld++;
366
367 rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST,
368 XLATE_READ, &pte);
369 if (rc)
370 return rc;
371
372 *eaddr = pte.raddr;
373
374 if (!pte.may_read)
375 return -EPERM;
376
377 if (!data && !pte.may_execute)
378 return -ENOEXEC;
379
c12fb43c
AG
380 /* Magic page override */
381 if (kvmppc_supports_magic_page(vcpu) && mp_pa &&
382 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) &&
383 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
384 void *magic = vcpu->arch.shared;
385 magic += pte.eaddr & 0xfff;
386 memcpy(ptr, magic, size);
387 return EMULATE_DONE;
388 }
389
c45c5514
AG
390 if (kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size))
391 return EMULATE_DO_MMIO;
35c4a733
AG
392
393 return EMULATE_DONE;
35c4a733
AG
394}
395EXPORT_SYMBOL_GPL(kvmppc_ld);
396
13a34e06 397int kvm_arch_hardware_enable(void)
bbf45ba5 398{
10474ae8 399 return 0;
bbf45ba5
HB
400}
401
bbf45ba5
HB
402int kvm_arch_hardware_setup(void)
403{
404 return 0;
405}
406
bbf45ba5
HB
407void kvm_arch_check_processor_compat(void *rtn)
408{
9dd921cf 409 *(int *)rtn = kvmppc_core_check_processor_compat();
bbf45ba5
HB
410}
411
e08b9637 412int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
bbf45ba5 413{
cbbc58d4
AK
414 struct kvmppc_ops *kvm_ops = NULL;
415 /*
416 * if we have both HV and PR enabled, default is HV
417 */
418 if (type == 0) {
419 if (kvmppc_hv_ops)
420 kvm_ops = kvmppc_hv_ops;
421 else
422 kvm_ops = kvmppc_pr_ops;
423 if (!kvm_ops)
424 goto err_out;
425 } else if (type == KVM_VM_PPC_HV) {
426 if (!kvmppc_hv_ops)
427 goto err_out;
428 kvm_ops = kvmppc_hv_ops;
429 } else if (type == KVM_VM_PPC_PR) {
430 if (!kvmppc_pr_ops)
431 goto err_out;
432 kvm_ops = kvmppc_pr_ops;
433 } else
434 goto err_out;
435
436 if (kvm_ops->owner && !try_module_get(kvm_ops->owner))
437 return -ENOENT;
438
439 kvm->arch.kvm_ops = kvm_ops;
f9e0554d 440 return kvmppc_core_init_vm(kvm);
cbbc58d4
AK
441err_out:
442 return -EINVAL;
bbf45ba5
HB
443}
444
235539b4
LC
445bool kvm_arch_has_vcpu_debugfs(void)
446{
447 return false;
448}
449
450int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
451{
452 return 0;
453}
454
d89f5eff 455void kvm_arch_destroy_vm(struct kvm *kvm)
bbf45ba5
HB
456{
457 unsigned int i;
988a2cae 458 struct kvm_vcpu *vcpu;
bbf45ba5 459
e17769eb
SW
460#ifdef CONFIG_KVM_XICS
461 /*
462 * We call kick_all_cpus_sync() to ensure that all
463 * CPUs have executed any pending IPIs before we
464 * continue and free VCPUs structures below.
465 */
466 if (is_kvmppc_hv_enabled(kvm))
467 kick_all_cpus_sync();
468#endif
469
988a2cae
GN
470 kvm_for_each_vcpu(i, vcpu, kvm)
471 kvm_arch_vcpu_free(vcpu);
472
473 mutex_lock(&kvm->lock);
474 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
475 kvm->vcpus[i] = NULL;
476
477 atomic_set(&kvm->online_vcpus, 0);
f9e0554d
PM
478
479 kvmppc_core_destroy_vm(kvm);
480
988a2cae 481 mutex_unlock(&kvm->lock);
cbbc58d4
AK
482
483 /* drop the module reference */
484 module_put(kvm->arch.kvm_ops->owner);
bbf45ba5
HB
485}
486
784aa3d7 487int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
bbf45ba5
HB
488{
489 int r;
7a58777a 490 /* Assume we're using HV mode when the HV module is loaded */
cbbc58d4 491 int hv_enabled = kvmppc_hv_ops ? 1 : 0;
bbf45ba5 492
7a58777a
AG
493 if (kvm) {
494 /*
495 * Hooray - we know which VM type we're running on. Depend on
496 * that rather than the guess above.
497 */
498 hv_enabled = is_kvmppc_hv_enabled(kvm);
499 }
500
bbf45ba5 501 switch (ext) {
5ce941ee
SW
502#ifdef CONFIG_BOOKE
503 case KVM_CAP_PPC_BOOKE_SREGS:
f61c94bb 504 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1c810636 505 case KVM_CAP_PPC_EPR:
5ce941ee 506#else
e15a1137 507 case KVM_CAP_PPC_SEGSTATE:
1022fc3d 508 case KVM_CAP_PPC_HIOR:
930b412a 509 case KVM_CAP_PPC_PAPR:
5ce941ee 510#endif
18978768 511 case KVM_CAP_PPC_UNSET_IRQ:
7b4203e8 512 case KVM_CAP_PPC_IRQ_LEVEL:
71fbfd5f 513 case KVM_CAP_ENABLE_CAP:
699a0ea0 514 case KVM_CAP_ENABLE_CAP_VM:
e24ed81f 515 case KVM_CAP_ONE_REG:
0e673fb6 516 case KVM_CAP_IOEVENTFD:
5df554ad 517 case KVM_CAP_DEVICE_CTRL:
460df4c1 518 case KVM_CAP_IMMEDIATE_EXIT:
de56a948
PM
519 r = 1;
520 break;
de56a948 521 case KVM_CAP_PPC_PAIRED_SINGLES:
ad0a048b 522 case KVM_CAP_PPC_OSI:
15711e9c 523 case KVM_CAP_PPC_GET_PVINFO:
bf7ca4bd 524#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc 525 case KVM_CAP_SW_TLB:
eb1e4f43 526#endif
699cc876 527 /* We support this only for PR */
cbbc58d4 528 r = !hv_enabled;
e15a1137 529 break;
699cc876
AK
530#ifdef CONFIG_KVM_MPIC
531 case KVM_CAP_IRQ_MPIC:
532 r = 1;
533 break;
534#endif
535
f31e65e1 536#ifdef CONFIG_PPC_BOOK3S_64
54738c09 537 case KVM_CAP_SPAPR_TCE:
58ded420 538 case KVM_CAP_SPAPR_TCE_64:
121f80ba
AK
539 /* fallthrough */
540 case KVM_CAP_SPAPR_TCE_VFIO:
8e591cb7 541 case KVM_CAP_PPC_RTAS:
f2e91042 542 case KVM_CAP_PPC_FIXUP_HCALL:
699a0ea0 543 case KVM_CAP_PPC_ENABLE_HCALL:
5975a2e0
PM
544#ifdef CONFIG_KVM_XICS
545 case KVM_CAP_IRQ_XICS:
546#endif
54738c09
DG
547 r = 1;
548 break;
a8acaece
DG
549
550 case KVM_CAP_PPC_ALLOC_HTAB:
551 r = hv_enabled;
552 break;
f31e65e1 553#endif /* CONFIG_PPC_BOOK3S_64 */
699cc876 554#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
371fefd6 555 case KVM_CAP_PPC_SMT:
45c940ba 556 r = 0;
57900694
PM
557 if (kvm) {
558 if (kvm->arch.emul_smt_mode > 1)
559 r = kvm->arch.emul_smt_mode;
560 else
561 r = kvm->arch.smt_mode;
562 } else if (hv_enabled) {
45c940ba
PM
563 if (cpu_has_feature(CPU_FTR_ARCH_300))
564 r = 1;
565 else
566 r = threads_per_subcore;
567 }
371fefd6 568 break;
aa04b4cc 569 case KVM_CAP_PPC_RMA:
c17b98cf 570 r = 0;
aa04b4cc 571 break;
e928e9cb
ME
572 case KVM_CAP_PPC_HWRNG:
573 r = kvmppc_hwrng_present();
574 break;
c9270132 575 case KVM_CAP_PPC_MMU_RADIX:
8cf4ecc0 576 r = !!(hv_enabled && radix_enabled());
c9270132
PM
577 break;
578 case KVM_CAP_PPC_MMU_HASH_V3:
468808bd 579 r = !!(hv_enabled && !radix_enabled() &&
c9270132
PM
580 cpu_has_feature(CPU_FTR_ARCH_300));
581 break;
f4800b1f 582#endif
342d3db7 583 case KVM_CAP_SYNC_MMU:
699cc876 584#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
c17b98cf 585 r = hv_enabled;
f4800b1f
AG
586#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
587 r = 1;
588#else
589 r = 0;
a2932923 590#endif
699cc876
AK
591 break;
592#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
a2932923 593 case KVM_CAP_PPC_HTAB_FD:
cbbc58d4 594 r = hv_enabled;
a2932923 595 break;
de56a948 596#endif
b5434032
ME
597 case KVM_CAP_NR_VCPUS:
598 /*
599 * Recommending a number of CPUs is somewhat arbitrary; we
600 * return the number of present CPUs for -HV (since a host
601 * will have secondary threads "offline"), and for other KVM
602 * implementations just count online CPUs.
603 */
cbbc58d4 604 if (hv_enabled)
699cc876
AK
605 r = num_present_cpus();
606 else
607 r = num_online_cpus();
b5434032 608 break;
bfec5c2c
ND
609 case KVM_CAP_NR_MEMSLOTS:
610 r = KVM_USER_MEM_SLOTS;
611 break;
b5434032
ME
612 case KVM_CAP_MAX_VCPUS:
613 r = KVM_MAX_VCPUS;
614 break;
5b74716e
BH
615#ifdef CONFIG_PPC_BOOK3S_64
616 case KVM_CAP_PPC_GET_SMMU_INFO:
617 r = 1;
618 break;
d3695aa4
AK
619 case KVM_CAP_SPAPR_MULTITCE:
620 r = 1;
621 break;
050f2339 622 case KVM_CAP_SPAPR_RESIZE_HPT:
bcd3bb63
PM
623 /* Disable this on POWER9 until code handles new HPTE format */
624 r = !!hv_enabled && !cpu_has_feature(CPU_FTR_ARCH_300);
050f2339 625 break;
5b74716e 626#endif
23528bb2
SB
627 case KVM_CAP_PPC_HTM:
628 r = cpu_has_feature(CPU_FTR_TM_COMP) &&
629 is_kvmppc_hv_enabled(kvm);
630 break;
bbf45ba5
HB
631 default:
632 r = 0;
633 break;
634 }
635 return r;
636
637}
638
639long kvm_arch_dev_ioctl(struct file *filp,
640 unsigned int ioctl, unsigned long arg)
641{
642 return -EINVAL;
643}
644
5587027c 645void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
db3fe4eb
TY
646 struct kvm_memory_slot *dont)
647{
5587027c 648 kvmppc_core_free_memslot(kvm, free, dont);
db3fe4eb
TY
649}
650
5587027c
AK
651int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
652 unsigned long npages)
db3fe4eb 653{
5587027c 654 return kvmppc_core_create_memslot(kvm, slot, npages);
db3fe4eb
TY
655}
656
f7784b8e 657int kvm_arch_prepare_memory_region(struct kvm *kvm,
462fce46 658 struct kvm_memory_slot *memslot,
09170a49 659 const struct kvm_userspace_memory_region *mem,
7b6195a9 660 enum kvm_mr_change change)
bbf45ba5 661{
a66b48c3 662 return kvmppc_core_prepare_memory_region(kvm, memslot, mem);
bbf45ba5
HB
663}
664
f7784b8e 665void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 666 const struct kvm_userspace_memory_region *mem,
8482644a 667 const struct kvm_memory_slot *old,
f36f3f28 668 const struct kvm_memory_slot *new,
8482644a 669 enum kvm_mr_change change)
f7784b8e 670{
f36f3f28 671 kvmppc_core_commit_memory_region(kvm, mem, old, new);
f7784b8e
MT
672}
673
2df72e9b
MT
674void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
675 struct kvm_memory_slot *slot)
34d4cb8f 676{
dfe49dbd 677 kvmppc_core_flush_memslot(kvm, slot);
34d4cb8f
MT
678}
679
bbf45ba5
HB
680struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
681{
73e75b41
HB
682 struct kvm_vcpu *vcpu;
683 vcpu = kvmppc_core_vcpu_create(kvm, id);
03cdab53
ME
684 if (!IS_ERR(vcpu)) {
685 vcpu->arch.wqp = &vcpu->wq;
06056bfb 686 kvmppc_create_vcpu_debugfs(vcpu, id);
03cdab53 687 }
73e75b41 688 return vcpu;
bbf45ba5
HB
689}
690
31928aa5 691void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
42897d86 692{
42897d86
MT
693}
694
bbf45ba5
HB
695void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
696{
a595405d
AG
697 /* Make sure we're not using the vcpu anymore */
698 hrtimer_cancel(&vcpu->arch.dec_timer);
a595405d 699
73e75b41 700 kvmppc_remove_vcpu_debugfs(vcpu);
eb1e4f43
SW
701
702 switch (vcpu->arch.irq_type) {
703 case KVMPPC_IRQ_MPIC:
704 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);
705 break;
bc5ad3f3 706 case KVMPPC_IRQ_XICS:
5af50993
BH
707 if (xive_enabled())
708 kvmppc_xive_cleanup_vcpu(vcpu);
709 else
710 kvmppc_xics_free_icp(vcpu);
bc5ad3f3 711 break;
eb1e4f43
SW
712 }
713
db93f574 714 kvmppc_core_vcpu_free(vcpu);
bbf45ba5
HB
715}
716
717void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
718{
719 kvm_arch_vcpu_free(vcpu);
720}
721
722int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
723{
9dd921cf 724 return kvmppc_core_pending_dec(vcpu);
bbf45ba5
HB
725}
726
5358a963 727static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer)
544c6761
AG
728{
729 struct kvm_vcpu *vcpu;
730
731 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer);
d02d4d15 732 kvmppc_decrementer_func(vcpu);
544c6761
AG
733
734 return HRTIMER_NORESTART;
735}
736
bbf45ba5
HB
737int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
738{
f61c94bb
BB
739 int ret;
740
544c6761 741 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
544c6761 742 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
de56a948 743 vcpu->arch.dec_expires = ~(u64)0;
bbf45ba5 744
09000adb
BB
745#ifdef CONFIG_KVM_EXIT_TIMING
746 mutex_init(&vcpu->arch.exit_timing_lock);
747#endif
f61c94bb
BB
748 ret = kvmppc_subarch_vcpu_init(vcpu);
749 return ret;
bbf45ba5
HB
750}
751
752void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
753{
ecc0981f 754 kvmppc_mmu_destroy(vcpu);
f61c94bb 755 kvmppc_subarch_vcpu_uninit(vcpu);
bbf45ba5
HB
756}
757
758void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
759{
eab17672
SW
760#ifdef CONFIG_BOOKE
761 /*
762 * vrsave (formerly usprg0) isn't used by Linux, but may
763 * be used by the guest.
764 *
765 * On non-booke this is associated with Altivec and
766 * is handled by code in book3s.c.
767 */
768 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
769#endif
9dd921cf 770 kvmppc_core_vcpu_load(vcpu, cpu);
bbf45ba5
HB
771}
772
773void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
774{
9dd921cf 775 kvmppc_core_vcpu_put(vcpu);
eab17672
SW
776#ifdef CONFIG_BOOKE
777 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
778#endif
bbf45ba5
HB
779}
780
9576730d
SW
781/*
782 * irq_bypass_add_producer and irq_bypass_del_producer are only
783 * useful if the architecture supports PCI passthrough.
784 * irq_bypass_stop and irq_bypass_start are not needed and so
785 * kvm_ops are not defined for them.
786 */
787bool kvm_arch_has_irq_bypass(void)
788{
789 return ((kvmppc_hv_ops && kvmppc_hv_ops->irq_bypass_add_producer) ||
790 (kvmppc_pr_ops && kvmppc_pr_ops->irq_bypass_add_producer));
791}
792
793int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
794 struct irq_bypass_producer *prod)
795{
796 struct kvm_kernel_irqfd *irqfd =
797 container_of(cons, struct kvm_kernel_irqfd, consumer);
798 struct kvm *kvm = irqfd->kvm;
799
800 if (kvm->arch.kvm_ops->irq_bypass_add_producer)
801 return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod);
802
803 return 0;
804}
805
806void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
807 struct irq_bypass_producer *prod)
808{
809 struct kvm_kernel_irqfd *irqfd =
810 container_of(cons, struct kvm_kernel_irqfd, consumer);
811 struct kvm *kvm = irqfd->kvm;
812
813 if (kvm->arch.kvm_ops->irq_bypass_del_producer)
814 kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod);
815}
816
6f63e81b
BL
817#ifdef CONFIG_VSX
818static inline int kvmppc_get_vsr_dword_offset(int index)
819{
820 int offset;
821
822 if ((index != 0) && (index != 1))
823 return -1;
824
825#ifdef __BIG_ENDIAN
826 offset = index;
827#else
828 offset = 1 - index;
829#endif
830
831 return offset;
832}
833
834static inline int kvmppc_get_vsr_word_offset(int index)
835{
836 int offset;
837
838 if ((index > 3) || (index < 0))
839 return -1;
840
841#ifdef __BIG_ENDIAN
842 offset = index;
843#else
844 offset = 3 - index;
845#endif
846 return offset;
847}
848
849static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu,
850 u64 gpr)
851{
852 union kvmppc_one_reg val;
853 int offset = kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset);
854 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
855
856 if (offset == -1)
857 return;
858
859 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
860 val.vval = VCPU_VSX_VR(vcpu, index);
861 val.vsxval[offset] = gpr;
862 VCPU_VSX_VR(vcpu, index) = val.vval;
863 } else {
864 VCPU_VSX_FPR(vcpu, index, offset) = gpr;
865 }
866}
867
868static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu,
869 u64 gpr)
870{
871 union kvmppc_one_reg val;
872 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
873
874 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
875 val.vval = VCPU_VSX_VR(vcpu, index);
876 val.vsxval[0] = gpr;
877 val.vsxval[1] = gpr;
878 VCPU_VSX_VR(vcpu, index) = val.vval;
879 } else {
880 VCPU_VSX_FPR(vcpu, index, 0) = gpr;
881 VCPU_VSX_FPR(vcpu, index, 1) = gpr;
882 }
883}
884
885static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu,
886 u32 gpr32)
887{
888 union kvmppc_one_reg val;
889 int offset = kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset);
890 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
891 int dword_offset, word_offset;
892
893 if (offset == -1)
894 return;
895
896 if (vcpu->arch.mmio_vsx_tx_sx_enabled) {
897 val.vval = VCPU_VSX_VR(vcpu, index);
898 val.vsx32val[offset] = gpr32;
899 VCPU_VSX_VR(vcpu, index) = val.vval;
900 } else {
901 dword_offset = offset / 2;
902 word_offset = offset % 2;
903 val.vsxval[0] = VCPU_VSX_FPR(vcpu, index, dword_offset);
904 val.vsx32val[word_offset] = gpr32;
905 VCPU_VSX_FPR(vcpu, index, dword_offset) = val.vsxval[0];
906 }
907}
908#endif /* CONFIG_VSX */
909
910#ifdef CONFIG_PPC_FPU
911static inline u64 sp_to_dp(u32 fprs)
912{
913 u64 fprd;
914
915 preempt_disable();
916 enable_kernel_fp();
917 asm ("lfs%U1%X1 0,%1; stfd%U0%X0 0,%0" : "=m" (fprd) : "m" (fprs)
918 : "fr0");
919 preempt_enable();
920 return fprd;
921}
922
923static inline u32 dp_to_sp(u64 fprd)
924{
925 u32 fprs;
926
927 preempt_disable();
928 enable_kernel_fp();
929 asm ("lfd%U1%X1 0,%1; stfs%U0%X0 0,%0" : "=m" (fprs) : "m" (fprd)
930 : "fr0");
931 preempt_enable();
932 return fprs;
933}
934
935#else
936#define sp_to_dp(x) (x)
937#define dp_to_sp(x) (x)
938#endif /* CONFIG_PPC_FPU */
939
bbf45ba5
HB
940static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
941 struct kvm_run *run)
942{
69b61833 943 u64 uninitialized_var(gpr);
bbf45ba5 944
8e5b26b5 945 if (run->mmio.len > sizeof(gpr)) {
bbf45ba5
HB
946 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
947 return;
948 }
949
d078eed3 950 if (!vcpu->arch.mmio_host_swabbed) {
bbf45ba5 951 switch (run->mmio.len) {
b104d066 952 case 8: gpr = *(u64 *)run->mmio.data; break;
8e5b26b5
AG
953 case 4: gpr = *(u32 *)run->mmio.data; break;
954 case 2: gpr = *(u16 *)run->mmio.data; break;
955 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
956 }
957 } else {
bbf45ba5 958 switch (run->mmio.len) {
d078eed3
DG
959 case 8: gpr = swab64(*(u64 *)run->mmio.data); break;
960 case 4: gpr = swab32(*(u32 *)run->mmio.data); break;
961 case 2: gpr = swab16(*(u16 *)run->mmio.data); break;
8e5b26b5 962 case 1: gpr = *(u8 *)run->mmio.data; break;
bbf45ba5
HB
963 }
964 }
8e5b26b5 965
6f63e81b
BL
966 /* conversion between single and double precision */
967 if ((vcpu->arch.mmio_sp64_extend) && (run->mmio.len == 4))
968 gpr = sp_to_dp(gpr);
969
3587d534
AG
970 if (vcpu->arch.mmio_sign_extend) {
971 switch (run->mmio.len) {
972#ifdef CONFIG_PPC64
973 case 4:
974 gpr = (s64)(s32)gpr;
975 break;
976#endif
977 case 2:
978 gpr = (s64)(s16)gpr;
979 break;
980 case 1:
981 gpr = (s64)(s8)gpr;
982 break;
983 }
984 }
985
b3c5d3c2
AG
986 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) {
987 case KVM_MMIO_REG_GPR:
b104d066
AG
988 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
989 break;
b3c5d3c2 990 case KVM_MMIO_REG_FPR:
efff1912 991 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b104d066 992 break;
287d5611 993#ifdef CONFIG_PPC_BOOK3S
b3c5d3c2
AG
994 case KVM_MMIO_REG_QPR:
995 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 996 break;
b3c5d3c2 997 case KVM_MMIO_REG_FQPR:
efff1912 998 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr;
b3c5d3c2 999 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr;
b104d066 1000 break;
6f63e81b
BL
1001#endif
1002#ifdef CONFIG_VSX
1003 case KVM_MMIO_REG_VSX:
1004 if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_DWORD)
1005 kvmppc_set_vsr_dword(vcpu, gpr);
1006 else if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_WORD)
1007 kvmppc_set_vsr_word(vcpu, gpr);
1008 else if (vcpu->arch.mmio_vsx_copy_type ==
1009 KVMPPC_VSX_COPY_DWORD_LOAD_DUMP)
1010 kvmppc_set_vsr_dword_dump(vcpu, gpr);
1011 break;
287d5611 1012#endif
b104d066
AG
1013 default:
1014 BUG();
1015 }
bbf45ba5
HB
1016}
1017
eb8b0560
PM
1018static int __kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1019 unsigned int rt, unsigned int bytes,
1020 int is_default_endian, int sign_extend)
bbf45ba5 1021{
ed840ee9 1022 int idx, ret;
d078eed3 1023 bool host_swabbed;
73601775 1024
d078eed3 1025 /* Pity C doesn't have a logical XOR operator */
73601775 1026 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 1027 host_swabbed = is_default_endian;
73601775 1028 } else {
d078eed3 1029 host_swabbed = !is_default_endian;
73601775 1030 }
ed840ee9 1031
bbf45ba5
HB
1032 if (bytes > sizeof(run->mmio.data)) {
1033 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
1034 run->mmio.len);
1035 }
1036
1037 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
1038 run->mmio.len = bytes;
1039 run->mmio.is_write = 0;
1040
1041 vcpu->arch.io_gpr = rt;
d078eed3 1042 vcpu->arch.mmio_host_swabbed = host_swabbed;
bbf45ba5
HB
1043 vcpu->mmio_needed = 1;
1044 vcpu->mmio_is_write = 0;
eb8b0560 1045 vcpu->arch.mmio_sign_extend = sign_extend;
bbf45ba5 1046
ed840ee9
SW
1047 idx = srcu_read_lock(&vcpu->kvm->srcu);
1048
e32edf4f 1049 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
1050 bytes, &run->mmio.data);
1051
1052 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1053
1054 if (!ret) {
0e673fb6
AG
1055 kvmppc_complete_mmio_load(vcpu, run);
1056 vcpu->mmio_needed = 0;
1057 return EMULATE_DONE;
1058 }
1059
bbf45ba5
HB
1060 return EMULATE_DO_MMIO;
1061}
eb8b0560
PM
1062
1063int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1064 unsigned int rt, unsigned int bytes,
1065 int is_default_endian)
1066{
1067 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 0);
1068}
2ba9f0d8 1069EXPORT_SYMBOL_GPL(kvmppc_handle_load);
bbf45ba5 1070
3587d534
AG
1071/* Same as above, but sign extends */
1072int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775
CLG
1073 unsigned int rt, unsigned int bytes,
1074 int is_default_endian)
3587d534 1075{
eb8b0560 1076 return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 1);
3587d534
AG
1077}
1078
6f63e81b
BL
1079#ifdef CONFIG_VSX
1080int kvmppc_handle_vsx_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
1081 unsigned int rt, unsigned int bytes,
1082 int is_default_endian, int mmio_sign_extend)
1083{
1084 enum emulation_result emulated = EMULATE_DONE;
1085
1086 /* Currently, mmio_vsx_copy_nums only allowed to be less than 4 */
1087 if ( (vcpu->arch.mmio_vsx_copy_nums > 4) ||
1088 (vcpu->arch.mmio_vsx_copy_nums < 0) ) {
1089 return EMULATE_FAIL;
1090 }
1091
1092 while (vcpu->arch.mmio_vsx_copy_nums) {
1093 emulated = __kvmppc_handle_load(run, vcpu, rt, bytes,
1094 is_default_endian, mmio_sign_extend);
1095
1096 if (emulated != EMULATE_DONE)
1097 break;
1098
1099 vcpu->arch.paddr_accessed += run->mmio.len;
1100
1101 vcpu->arch.mmio_vsx_copy_nums--;
1102 vcpu->arch.mmio_vsx_offset++;
1103 }
1104 return emulated;
1105}
1106#endif /* CONFIG_VSX */
1107
bbf45ba5 1108int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
73601775 1109 u64 val, unsigned int bytes, int is_default_endian)
bbf45ba5
HB
1110{
1111 void *data = run->mmio.data;
ed840ee9 1112 int idx, ret;
d078eed3 1113 bool host_swabbed;
73601775 1114
d078eed3 1115 /* Pity C doesn't have a logical XOR operator */
73601775 1116 if (kvmppc_need_byteswap(vcpu)) {
d078eed3 1117 host_swabbed = is_default_endian;
73601775 1118 } else {
d078eed3 1119 host_swabbed = !is_default_endian;
73601775 1120 }
bbf45ba5
HB
1121
1122 if (bytes > sizeof(run->mmio.data)) {
1123 printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__,
1124 run->mmio.len);
1125 }
1126
1127 run->mmio.phys_addr = vcpu->arch.paddr_accessed;
1128 run->mmio.len = bytes;
1129 run->mmio.is_write = 1;
1130 vcpu->mmio_needed = 1;
1131 vcpu->mmio_is_write = 1;
1132
6f63e81b
BL
1133 if ((vcpu->arch.mmio_sp64_extend) && (bytes == 4))
1134 val = dp_to_sp(val);
1135
bbf45ba5 1136 /* Store the value at the lowest bytes in 'data'. */
d078eed3 1137 if (!host_swabbed) {
bbf45ba5 1138 switch (bytes) {
b104d066 1139 case 8: *(u64 *)data = val; break;
bbf45ba5
HB
1140 case 4: *(u32 *)data = val; break;
1141 case 2: *(u16 *)data = val; break;
1142 case 1: *(u8 *)data = val; break;
1143 }
1144 } else {
bbf45ba5 1145 switch (bytes) {
d078eed3
DG
1146 case 8: *(u64 *)data = swab64(val); break;
1147 case 4: *(u32 *)data = swab32(val); break;
1148 case 2: *(u16 *)data = swab16(val); break;
1149 case 1: *(u8 *)data = val; break;
bbf45ba5
HB
1150 }
1151 }
1152
ed840ee9
SW
1153 idx = srcu_read_lock(&vcpu->kvm->srcu);
1154
e32edf4f 1155 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
ed840ee9
SW
1156 bytes, &run->mmio.data);
1157
1158 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1159
1160 if (!ret) {
0e673fb6
AG
1161 vcpu->mmio_needed = 0;
1162 return EMULATE_DONE;
1163 }
1164
bbf45ba5
HB
1165 return EMULATE_DO_MMIO;
1166}
2ba9f0d8 1167EXPORT_SYMBOL_GPL(kvmppc_handle_store);
bbf45ba5 1168
6f63e81b
BL
1169#ifdef CONFIG_VSX
1170static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
1171{
1172 u32 dword_offset, word_offset;
1173 union kvmppc_one_reg reg;
1174 int vsx_offset = 0;
1175 int copy_type = vcpu->arch.mmio_vsx_copy_type;
1176 int result = 0;
1177
1178 switch (copy_type) {
1179 case KVMPPC_VSX_COPY_DWORD:
1180 vsx_offset =
1181 kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset);
1182
1183 if (vsx_offset == -1) {
1184 result = -1;
1185 break;
1186 }
1187
1188 if (!vcpu->arch.mmio_vsx_tx_sx_enabled) {
1189 *val = VCPU_VSX_FPR(vcpu, rs, vsx_offset);
1190 } else {
1191 reg.vval = VCPU_VSX_VR(vcpu, rs);
1192 *val = reg.vsxval[vsx_offset];
1193 }
1194 break;
1195
1196 case KVMPPC_VSX_COPY_WORD:
1197 vsx_offset =
1198 kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset);
1199
1200 if (vsx_offset == -1) {
1201 result = -1;
1202 break;
1203 }
1204
1205 if (!vcpu->arch.mmio_vsx_tx_sx_enabled) {
1206 dword_offset = vsx_offset / 2;
1207 word_offset = vsx_offset % 2;
1208 reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset);
1209 *val = reg.vsx32val[word_offset];
1210 } else {
1211 reg.vval = VCPU_VSX_VR(vcpu, rs);
1212 *val = reg.vsx32val[vsx_offset];
1213 }
1214 break;
1215
1216 default:
1217 result = -1;
1218 break;
1219 }
1220
1221 return result;
1222}
1223
1224int kvmppc_handle_vsx_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
1225 int rs, unsigned int bytes, int is_default_endian)
1226{
1227 u64 val;
1228 enum emulation_result emulated = EMULATE_DONE;
1229
1230 vcpu->arch.io_gpr = rs;
1231
1232 /* Currently, mmio_vsx_copy_nums only allowed to be less than 4 */
1233 if ( (vcpu->arch.mmio_vsx_copy_nums > 4) ||
1234 (vcpu->arch.mmio_vsx_copy_nums < 0) ) {
1235 return EMULATE_FAIL;
1236 }
1237
1238 while (vcpu->arch.mmio_vsx_copy_nums) {
1239 if (kvmppc_get_vsr_data(vcpu, rs, &val) == -1)
1240 return EMULATE_FAIL;
1241
1242 emulated = kvmppc_handle_store(run, vcpu,
1243 val, bytes, is_default_endian);
1244
1245 if (emulated != EMULATE_DONE)
1246 break;
1247
1248 vcpu->arch.paddr_accessed += run->mmio.len;
1249
1250 vcpu->arch.mmio_vsx_copy_nums--;
1251 vcpu->arch.mmio_vsx_offset++;
1252 }
1253
1254 return emulated;
1255}
1256
1257static int kvmppc_emulate_mmio_vsx_loadstore(struct kvm_vcpu *vcpu,
1258 struct kvm_run *run)
1259{
1260 enum emulation_result emulated = EMULATE_FAIL;
1261 int r;
1262
1263 vcpu->arch.paddr_accessed += run->mmio.len;
1264
1265 if (!vcpu->mmio_is_write) {
1266 emulated = kvmppc_handle_vsx_load(run, vcpu, vcpu->arch.io_gpr,
1267 run->mmio.len, 1, vcpu->arch.mmio_sign_extend);
1268 } else {
1269 emulated = kvmppc_handle_vsx_store(run, vcpu,
1270 vcpu->arch.io_gpr, run->mmio.len, 1);
1271 }
1272
1273 switch (emulated) {
1274 case EMULATE_DO_MMIO:
1275 run->exit_reason = KVM_EXIT_MMIO;
1276 r = RESUME_HOST;
1277 break;
1278 case EMULATE_FAIL:
1279 pr_info("KVM: MMIO emulation failed (VSX repeat)\n");
1280 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1281 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
1282 r = RESUME_HOST;
1283 break;
1284 default:
1285 r = RESUME_GUEST;
1286 break;
1287 }
1288 return r;
1289}
1290#endif /* CONFIG_VSX */
1291
8a41ea53
MC
1292int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1293{
1294 int r = 0;
1295 union kvmppc_one_reg val;
1296 int size;
1297
1298 size = one_reg_size(reg->id);
1299 if (size > sizeof(val))
1300 return -EINVAL;
1301
1302 r = kvmppc_get_one_reg(vcpu, reg->id, &val);
1303 if (r == -EINVAL) {
1304 r = 0;
1305 switch (reg->id) {
3840edc8
MC
1306#ifdef CONFIG_ALTIVEC
1307 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1308 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1309 r = -ENXIO;
1310 break;
1311 }
b4d7f161 1312 val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
3840edc8
MC
1313 break;
1314 case KVM_REG_PPC_VSCR:
1315 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1316 r = -ENXIO;
1317 break;
1318 }
b4d7f161 1319 val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
3840edc8
MC
1320 break;
1321 case KVM_REG_PPC_VRSAVE:
b4d7f161 1322 val = get_reg_val(reg->id, vcpu->arch.vrsave);
3840edc8
MC
1323 break;
1324#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1325 default:
1326 r = -EINVAL;
1327 break;
1328 }
1329 }
1330
1331 if (r)
1332 return r;
1333
1334 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1335 r = -EFAULT;
1336
1337 return r;
1338}
1339
1340int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1341{
1342 int r;
1343 union kvmppc_one_reg val;
1344 int size;
1345
1346 size = one_reg_size(reg->id);
1347 if (size > sizeof(val))
1348 return -EINVAL;
1349
1350 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1351 return -EFAULT;
1352
1353 r = kvmppc_set_one_reg(vcpu, reg->id, &val);
1354 if (r == -EINVAL) {
1355 r = 0;
1356 switch (reg->id) {
3840edc8
MC
1357#ifdef CONFIG_ALTIVEC
1358 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
1359 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1360 r = -ENXIO;
1361 break;
1362 }
b4d7f161 1363 vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
3840edc8
MC
1364 break;
1365 case KVM_REG_PPC_VSCR:
1366 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1367 r = -ENXIO;
1368 break;
1369 }
b4d7f161 1370 vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
3840edc8
MC
1371 break;
1372 case KVM_REG_PPC_VRSAVE:
b4d7f161
GK
1373 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
1374 r = -ENXIO;
1375 break;
1376 }
1377 vcpu->arch.vrsave = set_reg_val(reg->id, val);
3840edc8
MC
1378 break;
1379#endif /* CONFIG_ALTIVEC */
8a41ea53
MC
1380 default:
1381 r = -EINVAL;
1382 break;
1383 }
1384 }
1385
1386 return r;
1387}
1388
bbf45ba5
HB
1389int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
1390{
1391 int r;
1392 sigset_t sigsaved;
1393
bbf45ba5 1394 if (vcpu->mmio_needed) {
6f63e81b 1395 vcpu->mmio_needed = 0;
bbf45ba5
HB
1396 if (!vcpu->mmio_is_write)
1397 kvmppc_complete_mmio_load(vcpu, run);
6f63e81b
BL
1398#ifdef CONFIG_VSX
1399 if (vcpu->arch.mmio_vsx_copy_nums > 0) {
1400 vcpu->arch.mmio_vsx_copy_nums--;
1401 vcpu->arch.mmio_vsx_offset++;
1402 }
1403
1404 if (vcpu->arch.mmio_vsx_copy_nums > 0) {
1405 r = kvmppc_emulate_mmio_vsx_loadstore(vcpu, run);
1406 if (r == RESUME_HOST) {
1407 vcpu->mmio_needed = 1;
1408 return r;
1409 }
1410 }
1411#endif
ad0a048b
AG
1412 } else if (vcpu->arch.osi_needed) {
1413 u64 *gprs = run->osi.gprs;
1414 int i;
1415
1416 for (i = 0; i < 32; i++)
1417 kvmppc_set_gpr(vcpu, i, gprs[i]);
1418 vcpu->arch.osi_needed = 0;
de56a948
PM
1419 } else if (vcpu->arch.hcall_needed) {
1420 int i;
1421
1422 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret);
1423 for (i = 0; i < 9; ++i)
1424 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]);
1425 vcpu->arch.hcall_needed = 0;
1c810636
AG
1426#ifdef CONFIG_BOOKE
1427 } else if (vcpu->arch.epr_needed) {
1428 kvmppc_set_epr(vcpu, run->epr.epr);
1429 vcpu->arch.epr_needed = 0;
1430#endif
bbf45ba5
HB
1431 }
1432
6f63e81b
BL
1433 if (vcpu->sigset_active)
1434 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
1435
460df4c1
PB
1436 if (run->immediate_exit)
1437 r = -EINTR;
1438 else
1439 r = kvmppc_vcpu_run(run, vcpu);
bbf45ba5
HB
1440
1441 if (vcpu->sigset_active)
1442 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
1443
1444 return r;
1445}
1446
1447int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
1448{
19ccb76a 1449 if (irq->irq == KVM_INTERRUPT_UNSET) {
4fe27d2a 1450 kvmppc_core_dequeue_external(vcpu);
19ccb76a
PM
1451 return 0;
1452 }
1453
1454 kvmppc_core_queue_external(vcpu, irq);
b6d33834 1455
dfd4d47e 1456 kvm_vcpu_kick(vcpu);
45c5eb67 1457
bbf45ba5
HB
1458 return 0;
1459}
1460
71fbfd5f
AG
1461static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
1462 struct kvm_enable_cap *cap)
1463{
1464 int r;
1465
1466 if (cap->flags)
1467 return -EINVAL;
1468
1469 switch (cap->cap) {
ad0a048b
AG
1470 case KVM_CAP_PPC_OSI:
1471 r = 0;
1472 vcpu->arch.osi_enabled = true;
1473 break;
930b412a
AG
1474 case KVM_CAP_PPC_PAPR:
1475 r = 0;
1476 vcpu->arch.papr_enabled = true;
1477 break;
1c810636
AG
1478 case KVM_CAP_PPC_EPR:
1479 r = 0;
5df554ad
SW
1480 if (cap->args[0])
1481 vcpu->arch.epr_flags |= KVMPPC_EPR_USER;
1482 else
1483 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER;
1c810636 1484 break;
f61c94bb
BB
1485#ifdef CONFIG_BOOKE
1486 case KVM_CAP_PPC_BOOKE_WATCHDOG:
1487 r = 0;
1488 vcpu->arch.watchdog_enabled = true;
1489 break;
1490#endif
bf7ca4bd 1491#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1492 case KVM_CAP_SW_TLB: {
1493 struct kvm_config_tlb cfg;
1494 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0];
1495
1496 r = -EFAULT;
1497 if (copy_from_user(&cfg, user_ptr, sizeof(cfg)))
1498 break;
1499
1500 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg);
1501 break;
eb1e4f43
SW
1502 }
1503#endif
1504#ifdef CONFIG_KVM_MPIC
1505 case KVM_CAP_IRQ_MPIC: {
70abaded 1506 struct fd f;
eb1e4f43
SW
1507 struct kvm_device *dev;
1508
1509 r = -EBADF;
70abaded
AV
1510 f = fdget(cap->args[0]);
1511 if (!f.file)
eb1e4f43
SW
1512 break;
1513
1514 r = -EPERM;
70abaded 1515 dev = kvm_device_from_filp(f.file);
eb1e4f43
SW
1516 if (dev)
1517 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]);
1518
70abaded 1519 fdput(f);
eb1e4f43 1520 break;
dc83b8bc
SW
1521 }
1522#endif
5975a2e0
PM
1523#ifdef CONFIG_KVM_XICS
1524 case KVM_CAP_IRQ_XICS: {
70abaded 1525 struct fd f;
5975a2e0
PM
1526 struct kvm_device *dev;
1527
1528 r = -EBADF;
70abaded
AV
1529 f = fdget(cap->args[0]);
1530 if (!f.file)
5975a2e0
PM
1531 break;
1532
1533 r = -EPERM;
70abaded 1534 dev = kvm_device_from_filp(f.file);
5af50993
BH
1535 if (dev) {
1536 if (xive_enabled())
1537 r = kvmppc_xive_connect_vcpu(dev, vcpu, cap->args[1]);
1538 else
1539 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]);
1540 }
5975a2e0 1541
70abaded 1542 fdput(f);
5975a2e0
PM
1543 break;
1544 }
1545#endif /* CONFIG_KVM_XICS */
71fbfd5f
AG
1546 default:
1547 r = -EINVAL;
1548 break;
1549 }
1550
af8f38b3
AG
1551 if (!r)
1552 r = kvmppc_sanity_check(vcpu);
1553
71fbfd5f
AG
1554 return r;
1555}
1556
34a75b0f
PM
1557bool kvm_arch_intc_initialized(struct kvm *kvm)
1558{
1559#ifdef CONFIG_KVM_MPIC
1560 if (kvm->arch.mpic)
1561 return true;
1562#endif
1563#ifdef CONFIG_KVM_XICS
5af50993 1564 if (kvm->arch.xics || kvm->arch.xive)
34a75b0f
PM
1565 return true;
1566#endif
1567 return false;
1568}
1569
bbf45ba5
HB
1570int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
1571 struct kvm_mp_state *mp_state)
1572{
1573 return -EINVAL;
1574}
1575
1576int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
1577 struct kvm_mp_state *mp_state)
1578{
1579 return -EINVAL;
1580}
1581
1582long kvm_arch_vcpu_ioctl(struct file *filp,
1583 unsigned int ioctl, unsigned long arg)
1584{
1585 struct kvm_vcpu *vcpu = filp->private_data;
1586 void __user *argp = (void __user *)arg;
1587 long r;
1588
93736624
AK
1589 switch (ioctl) {
1590 case KVM_INTERRUPT: {
bbf45ba5
HB
1591 struct kvm_interrupt irq;
1592 r = -EFAULT;
1593 if (copy_from_user(&irq, argp, sizeof(irq)))
93736624 1594 goto out;
bbf45ba5 1595 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
93736624 1596 goto out;
bbf45ba5 1597 }
19483d14 1598
71fbfd5f
AG
1599 case KVM_ENABLE_CAP:
1600 {
1601 struct kvm_enable_cap cap;
1602 r = -EFAULT;
1603 if (copy_from_user(&cap, argp, sizeof(cap)))
1604 goto out;
1605 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
1606 break;
1607 }
dc83b8bc 1608
e24ed81f
AG
1609 case KVM_SET_ONE_REG:
1610 case KVM_GET_ONE_REG:
1611 {
1612 struct kvm_one_reg reg;
1613 r = -EFAULT;
1614 if (copy_from_user(&reg, argp, sizeof(reg)))
1615 goto out;
1616 if (ioctl == KVM_SET_ONE_REG)
1617 r = kvm_vcpu_ioctl_set_one_reg(vcpu, &reg);
1618 else
1619 r = kvm_vcpu_ioctl_get_one_reg(vcpu, &reg);
1620 break;
1621 }
1622
bf7ca4bd 1623#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
dc83b8bc
SW
1624 case KVM_DIRTY_TLB: {
1625 struct kvm_dirty_tlb dirty;
1626 r = -EFAULT;
1627 if (copy_from_user(&dirty, argp, sizeof(dirty)))
1628 goto out;
1629 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty);
1630 break;
1631 }
1632#endif
bbf45ba5
HB
1633 default:
1634 r = -EINVAL;
1635 }
1636
1637out:
1638 return r;
1639}
1640
5b1c1493
CO
1641int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
1642{
1643 return VM_FAULT_SIGBUS;
1644}
1645
15711e9c
AG
1646static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
1647{
784bafac
SY
1648 u32 inst_nop = 0x60000000;
1649#ifdef CONFIG_KVM_BOOKE_HV
1650 u32 inst_sc1 = 0x44000022;
2743103f
AG
1651 pvinfo->hcall[0] = cpu_to_be32(inst_sc1);
1652 pvinfo->hcall[1] = cpu_to_be32(inst_nop);
1653 pvinfo->hcall[2] = cpu_to_be32(inst_nop);
1654 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1655#else
15711e9c
AG
1656 u32 inst_lis = 0x3c000000;
1657 u32 inst_ori = 0x60000000;
15711e9c
AG
1658 u32 inst_sc = 0x44000002;
1659 u32 inst_imm_mask = 0xffff;
1660
1661 /*
1662 * The hypercall to get into KVM from within guest context is as
1663 * follows:
1664 *
1665 * lis r0, r0, KVM_SC_MAGIC_R0@h
1666 * ori r0, KVM_SC_MAGIC_R0@l
1667 * sc
1668 * nop
1669 */
2743103f
AG
1670 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask));
1671 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask));
1672 pvinfo->hcall[2] = cpu_to_be32(inst_sc);
1673 pvinfo->hcall[3] = cpu_to_be32(inst_nop);
784bafac 1674#endif
15711e9c 1675
9202e076
LYB
1676 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE;
1677
15711e9c
AG
1678 return 0;
1679}
1680
5efdb4be
AG
1681int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
1682 bool line_status)
1683{
1684 if (!irqchip_in_kernel(kvm))
1685 return -ENXIO;
1686
1687 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1688 irq_event->irq, irq_event->level,
1689 line_status);
1690 return 0;
1691}
1692
699a0ea0
PM
1693
1694static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
1695 struct kvm_enable_cap *cap)
1696{
1697 int r;
1698
1699 if (cap->flags)
1700 return -EINVAL;
1701
1702 switch (cap->cap) {
1703#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1704 case KVM_CAP_PPC_ENABLE_HCALL: {
1705 unsigned long hcall = cap->args[0];
1706
1707 r = -EINVAL;
1708 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) ||
1709 cap->args[1] > 1)
1710 break;
ae2113a4
PM
1711 if (!kvmppc_book3s_hcall_implemented(kvm, hcall))
1712 break;
699a0ea0
PM
1713 if (cap->args[1])
1714 set_bit(hcall / 4, kvm->arch.enabled_hcalls);
1715 else
1716 clear_bit(hcall / 4, kvm->arch.enabled_hcalls);
1717 r = 0;
1718 break;
1719 }
3c313524
PM
1720 case KVM_CAP_PPC_SMT: {
1721 unsigned long mode = cap->args[0];
1722 unsigned long flags = cap->args[1];
1723
1724 r = -EINVAL;
1725 if (kvm->arch.kvm_ops->set_smt_mode)
1726 r = kvm->arch.kvm_ops->set_smt_mode(kvm, mode, flags);
1727 break;
1728 }
699a0ea0
PM
1729#endif
1730 default:
1731 r = -EINVAL;
1732 break;
1733 }
1734
1735 return r;
1736}
1737
bbf45ba5
HB
1738long kvm_arch_vm_ioctl(struct file *filp,
1739 unsigned int ioctl, unsigned long arg)
1740{
5df554ad 1741 struct kvm *kvm __maybe_unused = filp->private_data;
15711e9c 1742 void __user *argp = (void __user *)arg;
bbf45ba5
HB
1743 long r;
1744
1745 switch (ioctl) {
15711e9c
AG
1746 case KVM_PPC_GET_PVINFO: {
1747 struct kvm_ppc_pvinfo pvinfo;
d8cdddcd 1748 memset(&pvinfo, 0, sizeof(pvinfo));
15711e9c
AG
1749 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
1750 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
1751 r = -EFAULT;
1752 goto out;
1753 }
1754
1755 break;
1756 }
699a0ea0
PM
1757 case KVM_ENABLE_CAP:
1758 {
1759 struct kvm_enable_cap cap;
1760 r = -EFAULT;
1761 if (copy_from_user(&cap, argp, sizeof(cap)))
1762 goto out;
1763 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
1764 break;
1765 }
76d837a4 1766#ifdef CONFIG_SPAPR_TCE_IOMMU
58ded420
AK
1767 case KVM_CREATE_SPAPR_TCE_64: {
1768 struct kvm_create_spapr_tce_64 create_tce_64;
1769
1770 r = -EFAULT;
1771 if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64)))
1772 goto out;
1773 if (create_tce_64.flags) {
1774 r = -EINVAL;
1775 goto out;
1776 }
1777 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
1778 goto out;
1779 }
54738c09
DG
1780 case KVM_CREATE_SPAPR_TCE: {
1781 struct kvm_create_spapr_tce create_tce;
58ded420 1782 struct kvm_create_spapr_tce_64 create_tce_64;
54738c09
DG
1783
1784 r = -EFAULT;
1785 if (copy_from_user(&create_tce, argp, sizeof(create_tce)))
1786 goto out;
58ded420
AK
1787
1788 create_tce_64.liobn = create_tce.liobn;
1789 create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K;
1790 create_tce_64.offset = 0;
1791 create_tce_64.size = create_tce.window_size >>
1792 IOMMU_PAGE_SHIFT_4K;
1793 create_tce_64.flags = 0;
1794 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64);
54738c09
DG
1795 goto out;
1796 }
76d837a4
PM
1797#endif
1798#ifdef CONFIG_PPC_BOOK3S_64
5b74716e 1799 case KVM_PPC_GET_SMMU_INFO: {
5b74716e 1800 struct kvm_ppc_smmu_info info;
cbbc58d4 1801 struct kvm *kvm = filp->private_data;
5b74716e
BH
1802
1803 memset(&info, 0, sizeof(info));
cbbc58d4 1804 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info);
5b74716e
BH
1805 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1806 r = -EFAULT;
1807 break;
1808 }
8e591cb7
ME
1809 case KVM_PPC_RTAS_DEFINE_TOKEN: {
1810 struct kvm *kvm = filp->private_data;
1811
1812 r = kvm_vm_ioctl_rtas_define_token(kvm, argp);
1813 break;
1814 }
c9270132
PM
1815 case KVM_PPC_CONFIGURE_V3_MMU: {
1816 struct kvm *kvm = filp->private_data;
1817 struct kvm_ppc_mmuv3_cfg cfg;
1818
1819 r = -EINVAL;
1820 if (!kvm->arch.kvm_ops->configure_mmu)
1821 goto out;
1822 r = -EFAULT;
1823 if (copy_from_user(&cfg, argp, sizeof(cfg)))
1824 goto out;
1825 r = kvm->arch.kvm_ops->configure_mmu(kvm, &cfg);
1826 break;
1827 }
1828 case KVM_PPC_GET_RMMU_INFO: {
1829 struct kvm *kvm = filp->private_data;
1830 struct kvm_ppc_rmmu_info info;
1831
1832 r = -EINVAL;
1833 if (!kvm->arch.kvm_ops->get_rmmu_info)
1834 goto out;
1835 r = kvm->arch.kvm_ops->get_rmmu_info(kvm, &info);
1836 if (r >= 0 && copy_to_user(argp, &info, sizeof(info)))
1837 r = -EFAULT;
1838 break;
1839 }
cbbc58d4
AK
1840 default: {
1841 struct kvm *kvm = filp->private_data;
1842 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg);
1843 }
3a167bea 1844#else /* CONFIG_PPC_BOOK3S_64 */
bbf45ba5 1845 default:
367e1319 1846 r = -ENOTTY;
3a167bea 1847#endif
bbf45ba5 1848 }
15711e9c 1849out:
bbf45ba5
HB
1850 return r;
1851}
1852
043cc4d7
SW
1853static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
1854static unsigned long nr_lpids;
1855
1856long kvmppc_alloc_lpid(void)
1857{
1858 long lpid;
1859
1860 do {
1861 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);
1862 if (lpid >= nr_lpids) {
1863 pr_err("%s: No LPIDs free\n", __func__);
1864 return -ENOMEM;
1865 }
1866 } while (test_and_set_bit(lpid, lpid_inuse));
1867
1868 return lpid;
1869}
2ba9f0d8 1870EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid);
043cc4d7
SW
1871
1872void kvmppc_claim_lpid(long lpid)
1873{
1874 set_bit(lpid, lpid_inuse);
1875}
2ba9f0d8 1876EXPORT_SYMBOL_GPL(kvmppc_claim_lpid);
043cc4d7
SW
1877
1878void kvmppc_free_lpid(long lpid)
1879{
1880 clear_bit(lpid, lpid_inuse);
1881}
2ba9f0d8 1882EXPORT_SYMBOL_GPL(kvmppc_free_lpid);
043cc4d7
SW
1883
1884void kvmppc_init_lpid(unsigned long nr_lpids_param)
1885{
1886 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);
1887 memset(lpid_inuse, 0, sizeof(lpid_inuse));
1888}
2ba9f0d8 1889EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
043cc4d7 1890
bbf45ba5
HB
1891int kvm_arch_init(void *opaque)
1892{
1893 return 0;
1894}
1895
478d6686 1896EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr);