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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
14cf11af PM |
2 | /* |
3 | * MMU context allocation for 64-bit kernels. | |
4 | * | |
5 | * Copyright (C) 2004 Anton Blanchard, IBM Corp. <anton@samba.org> | |
14cf11af PM |
6 | */ |
7 | ||
14cf11af PM |
8 | #include <linux/sched.h> |
9 | #include <linux/kernel.h> | |
10 | #include <linux/errno.h> | |
11 | #include <linux/string.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/mm.h> | |
4fb158f6 | 14 | #include <linux/pkeys.h> |
14cf11af PM |
15 | #include <linux/spinlock.h> |
16 | #include <linux/idr.h> | |
4b16f8e2 | 17 | #include <linux/export.h> |
5a0e3ad6 | 18 | #include <linux/gfp.h> |
851d2e2f | 19 | #include <linux/slab.h> |
14cf11af PM |
20 | |
21 | #include <asm/mmu_context.h> | |
5c1f6ee9 | 22 | #include <asm/pgalloc.h> |
14cf11af | 23 | |
7317ac87 | 24 | static DEFINE_IDA(mmu_context_ida); |
14cf11af | 25 | |
c1ff840d | 26 | static int alloc_context_id(int min_id, int max_id) |
14cf11af | 27 | { |
b3fa6417 | 28 | return ida_alloc_range(&mmu_context_ida, min_id, max_id, GFP_KERNEL); |
e85a4710 | 29 | } |
a336f2f5 | 30 | |
82228e36 AK |
31 | void hash__reserve_context_id(int id) |
32 | { | |
b3fa6417 | 33 | int result = ida_alloc_range(&mmu_context_ida, id, id, GFP_KERNEL); |
82228e36 AK |
34 | |
35 | WARN(result != id, "mmu: Failed to reserve context id %d (rc %d)\n", id, result); | |
36 | } | |
37 | ||
a336f2f5 ME |
38 | int hash__alloc_context_id(void) |
39 | { | |
e6f81a92 AK |
40 | unsigned long max; |
41 | ||
42 | if (mmu_has_feature(MMU_FTR_68_BIT_VA)) | |
43 | max = MAX_USER_CONTEXT; | |
44 | else | |
45 | max = MAX_USER_CONTEXT_65BIT_VA; | |
46 | ||
47 | return alloc_context_id(MIN_USER_CONTEXT, max); | |
a336f2f5 ME |
48 | } |
49 | EXPORT_SYMBOL_GPL(hash__alloc_context_id); | |
50 | ||
5434ae74 NP |
51 | void slb_setup_new_exec(void); |
52 | ||
760573c1 ME |
53 | static int hash__init_new_context(struct mm_struct *mm) |
54 | { | |
55 | int index; | |
56 | ||
57 | index = hash__alloc_context_id(); | |
58 | if (index < 0) | |
59 | return index; | |
60 | ||
ef629cc5 AK |
61 | mm->context.hash_context = kmalloc(sizeof(struct hash_mm_context), |
62 | GFP_KERNEL); | |
70110186 AK |
63 | if (!mm->context.hash_context) { |
64 | ida_free(&mmu_context_ida, index); | |
65 | return -ENOMEM; | |
66 | } | |
67 | ||
760573c1 ME |
68 | /* |
69 | * The old code would re-promote on fork, we don't do that when using | |
70 | * slices as it could cause problem promoting slices that have been | |
71 | * forced down to 4K. | |
72 | * | |
73 | * For book3s we have MMU_NO_CONTEXT set to be ~0. Hence check | |
74 | * explicitly against context.id == 0. This ensures that we properly | |
75 | * initialize context slice details for newly allocated mm's (which will | |
76 | * have id == 0) and don't alter context slice inherited via fork (which | |
77 | * will have id != 0). | |
78 | * | |
79 | * We should not be calling init_new_context() on init_mm. Hence a | |
80 | * check against 0 is OK. | |
81 | */ | |
70110186 AK |
82 | if (mm->context.id == 0) { |
83 | memset(mm->context.hash_context, 0, sizeof(struct hash_mm_context)); | |
1753dd18 | 84 | slice_init_new_context_exec(mm); |
70110186 AK |
85 | } else { |
86 | /* This is fork. Copy hash_context details from current->mm */ | |
87 | memcpy(mm->context.hash_context, current->mm->context.hash_context, sizeof(struct hash_mm_context)); | |
ef629cc5 AK |
88 | #ifdef CONFIG_PPC_SUBPAGE_PROT |
89 | /* inherit subpage prot detalis if we have one. */ | |
90 | if (current->mm->context.hash_context->spt) { | |
91 | mm->context.hash_context->spt = kmalloc(sizeof(struct subpage_prot_table), | |
92 | GFP_KERNEL); | |
93 | if (!mm->context.hash_context->spt) { | |
94 | ida_free(&mmu_context_ida, index); | |
95 | kfree(mm->context.hash_context); | |
96 | return -ENOMEM; | |
97 | } | |
98 | } | |
99 | #endif | |
70110186 AK |
100 | |
101 | } | |
760573c1 | 102 | |
4fb158f6 | 103 | pkey_mm_init(mm); |
760573c1 ME |
104 | return index; |
105 | } | |
106 | ||
425d3314 NP |
107 | void hash__setup_new_exec(void) |
108 | { | |
109 | slice_setup_new_exec(); | |
5434ae74 NP |
110 | |
111 | slb_setup_new_exec(); | |
425d3314 NP |
112 | } |
113 | ||
760573c1 | 114 | static int radix__init_new_context(struct mm_struct *mm) |
7e381c0f AK |
115 | { |
116 | unsigned long rts_field; | |
a25bd72b | 117 | int index, max_id; |
760573c1 | 118 | |
a25bd72b BH |
119 | max_id = (1 << mmu_pid_bits) - 1; |
120 | index = alloc_context_id(mmu_base_pid, max_id); | |
760573c1 ME |
121 | if (index < 0) |
122 | return index; | |
7e381c0f AK |
123 | |
124 | /* | |
125 | * set the process table entry, | |
126 | */ | |
b23d9c5b | 127 | rts_field = radix__get_tree_size(); |
7e381c0f | 128 | process_tb[index].prtb0 = cpu_to_be64(rts_field | __pa(mm->pgd) | RADIX_PGD_INDEX_SIZE); |
760573c1 | 129 | |
3a6a0470 BH |
130 | /* |
131 | * Order the above store with subsequent update of the PID | |
132 | * register (at which point HW can start loading/caching | |
133 | * the entry) and the corresponding load by the MMU from | |
134 | * the L2 cache. | |
135 | */ | |
136 | asm volatile("ptesync;isync" : : : "memory"); | |
137 | ||
1ab66d1f | 138 | mm->context.npu_context = NULL; |
70110186 | 139 | mm->context.hash_context = NULL; |
1ab66d1f | 140 | |
760573c1 | 141 | return index; |
7e381c0f | 142 | } |
e85a4710 AG |
143 | |
144 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm) | |
145 | { | |
146 | int index; | |
147 | ||
760573c1 ME |
148 | if (radix_enabled()) |
149 | index = radix__init_new_context(mm); | |
150 | else | |
151 | index = hash__init_new_context(mm); | |
152 | ||
e85a4710 AG |
153 | if (index < 0) |
154 | return index; | |
155 | ||
9dfe5c53 | 156 | mm->context.id = index; |
14cf11af | 157 | |
5c1f6ee9 | 158 | mm->context.pte_frag = NULL; |
8a6c697b | 159 | mm->context.pmd_frag = NULL; |
15b244a8 | 160 | #ifdef CONFIG_SPAPR_TCE_IOMMU |
88f54a35 | 161 | mm_iommu_init(mm); |
5c1f6ee9 | 162 | #endif |
a619e59c | 163 | atomic_set(&mm->context.active_cpus, 0); |
aff6f8cb | 164 | atomic_set(&mm->context.copros, 0); |
a619e59c | 165 | |
14cf11af PM |
166 | return 0; |
167 | } | |
168 | ||
e85a4710 | 169 | void __destroy_context(int context_id) |
14cf11af | 170 | { |
b3fa6417 | 171 | ida_free(&mmu_context_ida, context_id); |
e85a4710 AG |
172 | } |
173 | EXPORT_SYMBOL_GPL(__destroy_context); | |
14cf11af | 174 | |
f384796c AK |
175 | static void destroy_contexts(mm_context_t *ctx) |
176 | { | |
177 | int index, context_id; | |
178 | ||
f384796c AK |
179 | for (index = 0; index < ARRAY_SIZE(ctx->extended_id); index++) { |
180 | context_id = ctx->extended_id[index]; | |
181 | if (context_id) | |
b3fa6417 | 182 | ida_free(&mmu_context_ida, context_id); |
f384796c | 183 | } |
70110186 | 184 | kfree(ctx->hash_context); |
f384796c AK |
185 | } |
186 | ||
8a6c697b AK |
187 | static void pmd_frag_destroy(void *pmd_frag) |
188 | { | |
189 | int count; | |
190 | struct page *page; | |
191 | ||
192 | page = virt_to_page(pmd_frag); | |
193 | /* drop all the pending references */ | |
194 | count = ((unsigned long)pmd_frag & ~PAGE_MASK) >> PMD_FRAG_SIZE_SHIFT; | |
195 | /* We allow PTE_FRAG_NR fragments from a PTE page */ | |
4231aba0 | 196 | if (atomic_sub_and_test(PMD_FRAG_NR - count, &page->pt_frag_refcount)) { |
8a6c697b | 197 | pgtable_pmd_page_dtor(page); |
4231aba0 | 198 | __free_page(page); |
8a6c697b AK |
199 | } |
200 | } | |
201 | ||
34c604d2 | 202 | static void destroy_pagetable_cache(struct mm_struct *mm) |
8a6c697b AK |
203 | { |
204 | void *frag; | |
205 | ||
206 | frag = mm->context.pte_frag; | |
207 | if (frag) | |
208 | pte_frag_destroy(frag); | |
209 | ||
210 | frag = mm->context.pmd_frag; | |
211 | if (frag) | |
212 | pmd_frag_destroy(frag); | |
213 | return; | |
214 | } | |
215 | ||
e85a4710 AG |
216 | void destroy_context(struct mm_struct *mm) |
217 | { | |
15b244a8 | 218 | #ifdef CONFIG_SPAPR_TCE_IOMMU |
4b6fad70 | 219 | WARN_ON_ONCE(!list_empty(&mm->context.iommu_group_mem_list)); |
15b244a8 | 220 | #endif |
30b49ec7 NP |
221 | if (radix_enabled()) |
222 | WARN_ON(process_tb[mm->context.id].prtb0 != 0); | |
223 | else | |
224 | subpage_prot_free(mm); | |
f384796c | 225 | destroy_contexts(&mm->context); |
30b49ec7 NP |
226 | mm->context.id = MMU_NO_CONTEXT; |
227 | } | |
228 | ||
229 | void arch_exit_mmap(struct mm_struct *mm) | |
230 | { | |
34c604d2 NP |
231 | destroy_pagetable_cache(mm); |
232 | ||
c6bb0b8d BH |
233 | if (radix_enabled()) { |
234 | /* | |
235 | * Radix doesn't have a valid bit in the process table | |
236 | * entries. However we know that at least P9 implementation | |
237 | * will avoid caching an entry with an invalid RTS field, | |
238 | * and 0 is invalid. So this will do. | |
30b49ec7 NP |
239 | * |
240 | * This runs before the "fullmm" tlb flush in exit_mmap, | |
241 | * which does a RIC=2 tlbie to clear the process table | |
242 | * entry. See the "fullmm" comments in tlb-radix.c. | |
243 | * | |
244 | * No barrier required here after the store because | |
245 | * this process will do the invalidate, which starts with | |
246 | * ptesync. | |
c6bb0b8d BH |
247 | */ |
248 | process_tb[mm->context.id].prtb0 = 0; | |
30b49ec7 | 249 | } |
14cf11af | 250 | } |
7e381c0f AK |
251 | |
252 | #ifdef CONFIG_PPC_RADIX_MMU | |
253 | void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next) | |
254 | { | |
2bf1071a NP |
255 | mtspr(SPRN_PID, next->context.id); |
256 | isync(); | |
7e381c0f AK |
257 | } |
258 | #endif |