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14cf11af | 1 | /* |
14cf11af PM |
2 | * PowerPC version |
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
4 | * | |
5 | * Derived from "arch/i386/mm/fault.c" | |
6 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | |
7 | * | |
8 | * Modified by Cort Dougan and Paul Mackerras. | |
9 | * | |
10 | * Modified for PPC64 by Dave Engebretsen (engebret@ibm.com) | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
14cf11af PM |
18 | #include <linux/signal.h> |
19 | #include <linux/sched.h> | |
68db0cf1 | 20 | #include <linux/sched/task_stack.h> |
14cf11af PM |
21 | #include <linux/kernel.h> |
22 | #include <linux/errno.h> | |
23 | #include <linux/string.h> | |
24 | #include <linux/types.h> | |
25 | #include <linux/ptrace.h> | |
26 | #include <linux/mman.h> | |
27 | #include <linux/mm.h> | |
28 | #include <linux/interrupt.h> | |
29 | #include <linux/highmem.h> | |
8a39b05f | 30 | #include <linux/extable.h> |
14cf11af | 31 | #include <linux/kprobes.h> |
1eeb66a1 | 32 | #include <linux/kdebug.h> |
cdd6c482 | 33 | #include <linux/perf_event.h> |
76462232 | 34 | #include <linux/ratelimit.h> |
ba12eede | 35 | #include <linux/context_tracking.h> |
9d57472f | 36 | #include <linux/hugetlb.h> |
70ffdb93 | 37 | #include <linux/uaccess.h> |
14cf11af | 38 | |
40900194 | 39 | #include <asm/firmware.h> |
14cf11af PM |
40 | #include <asm/page.h> |
41 | #include <asm/pgtable.h> | |
42 | #include <asm/mmu.h> | |
43 | #include <asm/mmu_context.h> | |
14cf11af | 44 | #include <asm/tlbflush.h> |
14cf11af | 45 | #include <asm/siginfo.h> |
ae3a197e | 46 | #include <asm/debug.h> |
4f9e87c0 | 47 | |
c3dcf53a JX |
48 | #include "icswx.h" |
49 | ||
9f90b997 CH |
50 | #ifdef CONFIG_KPROBES |
51 | static inline int notify_page_fault(struct pt_regs *regs) | |
4f9e87c0 | 52 | { |
9f90b997 CH |
53 | int ret = 0; |
54 | ||
55 | /* kprobe_running() needs smp_processor_id() */ | |
56 | if (!user_mode(regs)) { | |
57 | preempt_disable(); | |
58 | if (kprobe_running() && kprobe_fault_handler(regs, 11)) | |
59 | ret = 1; | |
60 | preempt_enable(); | |
61 | } | |
4f9e87c0 | 62 | |
9f90b997 | 63 | return ret; |
4f9e87c0 AK |
64 | } |
65 | #else | |
9f90b997 | 66 | static inline int notify_page_fault(struct pt_regs *regs) |
4f9e87c0 | 67 | { |
9f90b997 | 68 | return 0; |
4f9e87c0 AK |
69 | } |
70 | #endif | |
71 | ||
14cf11af PM |
72 | /* |
73 | * Check whether the instruction at regs->nip is a store using | |
74 | * an update addressing form which will update r1. | |
75 | */ | |
76 | static int store_updates_sp(struct pt_regs *regs) | |
77 | { | |
78 | unsigned int inst; | |
79 | ||
80 | if (get_user(inst, (unsigned int __user *)regs->nip)) | |
81 | return 0; | |
82 | /* check for 1 in the rA field */ | |
83 | if (((inst >> 16) & 0x1f) != 1) | |
84 | return 0; | |
85 | /* check major opcode */ | |
86 | switch (inst >> 26) { | |
87 | case 37: /* stwu */ | |
88 | case 39: /* stbu */ | |
89 | case 45: /* sthu */ | |
90 | case 53: /* stfsu */ | |
91 | case 55: /* stfdu */ | |
92 | return 1; | |
93 | case 62: /* std or stdu */ | |
94 | return (inst & 3) == 1; | |
95 | case 31: | |
96 | /* check minor opcode */ | |
97 | switch ((inst >> 1) & 0x3ff) { | |
98 | case 181: /* stdux */ | |
99 | case 183: /* stwux */ | |
100 | case 247: /* stbux */ | |
101 | case 439: /* sthux */ | |
102 | case 695: /* stfsux */ | |
103 | case 759: /* stfdux */ | |
104 | return 1; | |
105 | } | |
106 | } | |
107 | return 0; | |
108 | } | |
9be72573 BH |
109 | /* |
110 | * do_page_fault error handling helpers | |
111 | */ | |
112 | ||
113 | #define MM_FAULT_RETURN 0 | |
114 | #define MM_FAULT_CONTINUE -1 | |
115 | #define MM_FAULT_ERR(sig) (sig) | |
116 | ||
3913fdd7 AB |
117 | static int do_sigbus(struct pt_regs *regs, unsigned long address, |
118 | unsigned int fault) | |
9be72573 BH |
119 | { |
120 | siginfo_t info; | |
9d57472f | 121 | unsigned int lsb = 0; |
9be72573 BH |
122 | |
123 | up_read(¤t->mm->mmap_sem); | |
124 | ||
63af5262 AB |
125 | if (!user_mode(regs)) |
126 | return MM_FAULT_ERR(SIGBUS); | |
127 | ||
128 | current->thread.trap_nr = BUS_ADRERR; | |
129 | info.si_signo = SIGBUS; | |
130 | info.si_errno = 0; | |
131 | info.si_code = BUS_ADRERR; | |
132 | info.si_addr = (void __user *)address; | |
3913fdd7 AB |
133 | #ifdef CONFIG_MEMORY_FAILURE |
134 | if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) { | |
135 | pr_err("MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n", | |
136 | current->comm, current->pid, address); | |
137 | info.si_code = BUS_MCEERR_AR; | |
138 | } | |
9d57472f AB |
139 | |
140 | if (fault & VM_FAULT_HWPOISON_LARGE) | |
141 | lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); | |
142 | if (fault & VM_FAULT_HWPOISON) | |
143 | lsb = PAGE_SHIFT; | |
3913fdd7 | 144 | #endif |
9d57472f | 145 | info.si_addr_lsb = lsb; |
63af5262 AB |
146 | force_sig_info(SIGBUS, &info, current); |
147 | return MM_FAULT_RETURN; | |
9be72573 BH |
148 | } |
149 | ||
150 | static int mm_fault_error(struct pt_regs *regs, unsigned long addr, int fault) | |
151 | { | |
152 | /* | |
153 | * Pagefault was interrupted by SIGKILL. We have no reason to | |
154 | * continue the pagefault. | |
155 | */ | |
156 | if (fatal_signal_pending(current)) { | |
157 | /* | |
158 | * If we have retry set, the mmap semaphore will have | |
159 | * alrady been released in __lock_page_or_retry(). Else | |
160 | * we release it now. | |
161 | */ | |
162 | if (!(fault & VM_FAULT_RETRY)) | |
163 | up_read(¤t->mm->mmap_sem); | |
164 | /* Coming from kernel, we need to deal with uaccess fixups */ | |
165 | if (user_mode(regs)) | |
166 | return MM_FAULT_RETURN; | |
167 | return MM_FAULT_ERR(SIGKILL); | |
168 | } | |
169 | ||
170 | /* No fault: be happy */ | |
171 | if (!(fault & VM_FAULT_ERROR)) | |
172 | return MM_FAULT_CONTINUE; | |
173 | ||
174 | /* Out of memory */ | |
c2d23f91 DR |
175 | if (fault & VM_FAULT_OOM) { |
176 | up_read(¤t->mm->mmap_sem); | |
177 | ||
178 | /* | |
179 | * We ran out of memory, or some other thing happened to us that | |
180 | * made us unable to handle the page fault gracefully. | |
181 | */ | |
182 | if (!user_mode(regs)) | |
183 | return MM_FAULT_ERR(SIGKILL); | |
184 | pagefault_out_of_memory(); | |
185 | return MM_FAULT_RETURN; | |
186 | } | |
9be72573 | 187 | |
3913fdd7 AB |
188 | if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) |
189 | return do_sigbus(regs, addr, fault); | |
9be72573 BH |
190 | |
191 | /* We don't understand the fault code, this is fatal */ | |
192 | BUG(); | |
193 | return MM_FAULT_CONTINUE; | |
194 | } | |
14cf11af | 195 | |
14cf11af PM |
196 | /* |
197 | * For 600- and 800-family processors, the error_code parameter is DSISR | |
198 | * for a data fault, SRR1 for an instruction fault. For 400-family processors | |
199 | * the error_code parameter is ESR for a data fault, 0 for an instruction | |
200 | * fault. | |
201 | * For 64-bit processors, the error_code parameter is | |
202 | * - DSISR for a non-SLB data access fault, | |
203 | * - SRR1 & 0x08000000 for a non-SLB instruction access fault | |
204 | * - 0 any SLB fault. | |
205 | * | |
206 | * The return value is 0 if the fault was handled, or the signal | |
207 | * number if this is a kernel fault that can't be handled here. | |
208 | */ | |
03465f89 | 209 | int do_page_fault(struct pt_regs *regs, unsigned long address, |
14cf11af PM |
210 | unsigned long error_code) |
211 | { | |
ba12eede | 212 | enum ctx_state prev_state = exception_enter(); |
14cf11af PM |
213 | struct vm_area_struct * vma; |
214 | struct mm_struct *mm = current->mm; | |
9be72573 | 215 | unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; |
14cf11af | 216 | int code = SEGV_MAPERR; |
9be72573 | 217 | int is_write = 0; |
14cf11af PM |
218 | int trap = TRAP(regs); |
219 | int is_exec = trap == 0x400; | |
9be72573 | 220 | int fault; |
69e044dd | 221 | int rc = 0, store_update_sp = 0; |
14cf11af PM |
222 | |
223 | #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) | |
224 | /* | |
225 | * Fortunately the bit assignments in SRR1 for an instruction | |
226 | * fault and DSISR for a data fault are mostly the same for the | |
227 | * bits we are interested in. But there are some bits which | |
228 | * indicate errors in DSISR but can validly be set in SRR1. | |
229 | */ | |
230 | if (trap == 0x400) | |
231 | error_code &= 0x48200000; | |
232 | else | |
233 | is_write = error_code & DSISR_ISSTORE; | |
234 | #else | |
235 | is_write = error_code & ESR_DST; | |
236 | #endif /* CONFIG_4xx || CONFIG_BOOKE */ | |
237 | ||
c3dcf53a JX |
238 | #ifdef CONFIG_PPC_ICSWX |
239 | /* | |
240 | * we need to do this early because this "data storage | |
241 | * interrupt" does not update the DAR/DEAR so we don't want to | |
242 | * look at it | |
243 | */ | |
244 | if (error_code & ICSWX_DSI_UCT) { | |
ba12eede | 245 | rc = acop_handle_fault(regs, address, error_code); |
9be72573 | 246 | if (rc) |
ba12eede | 247 | goto bail; |
c3dcf53a | 248 | } |
9be72573 | 249 | #endif /* CONFIG_PPC_ICSWX */ |
c3dcf53a | 250 | |
9f90b997 | 251 | if (notify_page_fault(regs)) |
ba12eede | 252 | goto bail; |
14cf11af | 253 | |
c3b75bd7 | 254 | if (unlikely(debugger_fault_handler(regs))) |
ba12eede | 255 | goto bail; |
14cf11af | 256 | |
d7df2443 BH |
257 | /* |
258 | * The kernel should never take an execute fault nor should it | |
259 | * take a page fault to a kernel address. | |
260 | */ | |
261 | if (!user_mode(regs) && (is_exec || (address >= TASK_SIZE))) { | |
ba12eede LZ |
262 | rc = SIGSEGV; |
263 | goto bail; | |
264 | } | |
14cf11af | 265 | |
9c7cc234 P |
266 | #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \ |
267 | defined(CONFIG_PPC_BOOK3S_64)) | |
14cf11af | 268 | if (error_code & DSISR_DABRMATCH) { |
9422de3e MN |
269 | /* breakpoint match */ |
270 | do_break(regs, address, error_code); | |
ba12eede | 271 | goto bail; |
14cf11af | 272 | } |
9c7cc234 | 273 | #endif |
14cf11af | 274 | |
a546498f BH |
275 | /* We restore the interrupt state now */ |
276 | if (!arch_irq_disabled_regs(regs)) | |
277 | local_irq_enable(); | |
278 | ||
70ffdb93 | 279 | if (faulthandler_disabled() || mm == NULL) { |
ba12eede LZ |
280 | if (!user_mode(regs)) { |
281 | rc = SIGSEGV; | |
282 | goto bail; | |
283 | } | |
70ffdb93 | 284 | /* faulthandler_disabled() in user mode is really bad, |
14cf11af | 285 | as is current->mm == NULL. */ |
df3c9019 | 286 | printk(KERN_EMERG "Page fault in user mode with " |
70ffdb93 DH |
287 | "faulthandler_disabled() = %d mm = %p\n", |
288 | faulthandler_disabled(), mm); | |
14cf11af PM |
289 | printk(KERN_EMERG "NIP = %lx MSR = %lx\n", |
290 | regs->nip, regs->msr); | |
291 | die("Weird page fault", regs, SIGSEGV); | |
292 | } | |
293 | ||
a8b0ca17 | 294 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); |
7dd1fcc2 | 295 | |
69e044dd AK |
296 | /* |
297 | * We want to do this outside mmap_sem, because reading code around nip | |
298 | * can result in fault, which will cause a deadlock when called with | |
299 | * mmap_sem held | |
300 | */ | |
301 | if (user_mode(regs)) | |
302 | store_update_sp = store_updates_sp(regs); | |
303 | ||
759496ba JW |
304 | if (user_mode(regs)) |
305 | flags |= FAULT_FLAG_USER; | |
306 | ||
14cf11af PM |
307 | /* When running in the kernel we expect faults to occur only to |
308 | * addresses in user space. All other faults represent errors in the | |
fc5266ea AB |
309 | * kernel and should generate an OOPS. Unfortunately, in the case of an |
310 | * erroneous fault occurring in a code path which already holds mmap_sem | |
14cf11af PM |
311 | * we will deadlock attempting to validate the fault against the |
312 | * address space. Luckily the kernel only validly references user | |
313 | * space from well defined areas of code, which are listed in the | |
314 | * exceptions table. | |
315 | * | |
316 | * As the vast majority of faults will be valid we will only perform | |
fc5266ea | 317 | * the source reference check when there is a possibility of a deadlock. |
14cf11af PM |
318 | * Attempt to lock the address space, if we cannot we then validate the |
319 | * source. If this is invalid we can skip the address space check, | |
320 | * thus avoiding the deadlock. | |
321 | */ | |
322 | if (!down_read_trylock(&mm->mmap_sem)) { | |
323 | if (!user_mode(regs) && !search_exception_tables(regs->nip)) | |
324 | goto bad_area_nosemaphore; | |
325 | ||
9be72573 | 326 | retry: |
14cf11af | 327 | down_read(&mm->mmap_sem); |
a546498f BH |
328 | } else { |
329 | /* | |
330 | * The above down_read_trylock() might have succeeded in | |
331 | * which case we'll have missed the might_sleep() from | |
332 | * down_read(): | |
333 | */ | |
334 | might_sleep(); | |
14cf11af PM |
335 | } |
336 | ||
337 | vma = find_vma(mm, address); | |
338 | if (!vma) | |
339 | goto bad_area; | |
340 | if (vma->vm_start <= address) | |
341 | goto good_area; | |
342 | if (!(vma->vm_flags & VM_GROWSDOWN)) | |
343 | goto bad_area; | |
344 | ||
345 | /* | |
346 | * N.B. The POWER/Open ABI allows programs to access up to | |
347 | * 288 bytes below the stack pointer. | |
348 | * The kernel signal delivery code writes up to about 1.5kB | |
349 | * below the stack pointer (r1) before decrementing it. | |
350 | * The exec code can write slightly over 640kB to the stack | |
351 | * before setting the user r1. Thus we allow the stack to | |
352 | * expand to 1MB without further checks. | |
353 | */ | |
354 | if (address + 0x100000 < vma->vm_end) { | |
355 | /* get user regs even if this fault is in kernel mode */ | |
356 | struct pt_regs *uregs = current->thread.regs; | |
357 | if (uregs == NULL) | |
358 | goto bad_area; | |
359 | ||
360 | /* | |
361 | * A user-mode access to an address a long way below | |
362 | * the stack pointer is only valid if the instruction | |
363 | * is one which would update the stack pointer to the | |
364 | * address accessed if the instruction completed, | |
365 | * i.e. either stwu rs,n(r1) or stwux rs,r1,rb | |
366 | * (or the byte, halfword, float or double forms). | |
367 | * | |
368 | * If we don't check this then any write to the area | |
369 | * between the last mapped region and the stack will | |
370 | * expand the stack rather than segfaulting. | |
371 | */ | |
69e044dd | 372 | if (address + 2048 < uregs->gpr[1] && !store_update_sp) |
14cf11af PM |
373 | goto bad_area; |
374 | } | |
375 | if (expand_stack(vma, address)) | |
376 | goto bad_area; | |
377 | ||
378 | good_area: | |
379 | code = SEGV_ACCERR; | |
380 | #if defined(CONFIG_6xx) | |
381 | if (error_code & 0x95700000) | |
382 | /* an error such as lwarx to I/O controller space, | |
383 | address matching DABR, eciwx, etc. */ | |
384 | goto bad_area; | |
385 | #endif /* CONFIG_6xx */ | |
386 | #if defined(CONFIG_8xx) | |
387 | /* The MPC8xx seems to always set 0x80000000, which is | |
388 | * "undefined". Of those that can be set, this is the only | |
389 | * one which seems bad. | |
390 | */ | |
391 | if (error_code & 0x10000000) | |
392 | /* Guarded storage error. */ | |
393 | goto bad_area; | |
394 | #endif /* CONFIG_8xx */ | |
395 | ||
396 | if (is_exec) { | |
08ae6cc1 PM |
397 | /* |
398 | * Allow execution from readable areas if the MMU does not | |
399 | * provide separate controls over reading and executing. | |
8d30c14c BH |
400 | * |
401 | * Note: That code used to not be enabled for 4xx/BookE. | |
402 | * It is now as I/D cache coherency for these is done at | |
403 | * set_pte_at() time and I see no reason why the test | |
404 | * below wouldn't be valid on those processors. This -may- | |
405 | * break programs compiled with a really old ABI though. | |
08ae6cc1 PM |
406 | */ |
407 | if (!(vma->vm_flags & VM_EXEC) && | |
408 | (cpu_has_feature(CPU_FTR_NOEXECUTE) || | |
409 | !(vma->vm_flags & (VM_READ | VM_WRITE)))) | |
14cf11af | 410 | goto bad_area; |
14cf11af PM |
411 | /* a write */ |
412 | } else if (is_write) { | |
413 | if (!(vma->vm_flags & VM_WRITE)) | |
414 | goto bad_area; | |
759496ba | 415 | flags |= FAULT_FLAG_WRITE; |
14cf11af PM |
416 | /* a read */ |
417 | } else { | |
df67b3da | 418 | if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) |
14cf11af PM |
419 | goto bad_area; |
420 | } | |
18061c17 AK |
421 | #ifdef CONFIG_PPC_STD_MMU |
422 | /* | |
423 | * For hash translation mode, we should never get a | |
424 | * PROTFAULT. Any update to pte to reduce access will result in us | |
425 | * removing the hash page table entry, thus resulting in a DSISR_NOHPTE | |
426 | * fault instead of DSISR_PROTFAULT. | |
427 | * | |
428 | * A pte update to relax the access will not result in a hash page table | |
429 | * entry invalidate and hence can result in DSISR_PROTFAULT. | |
430 | * ptep_set_access_flags() doesn't do a hpte flush. This is why we have | |
431 | * the special !is_write in the below conditional. | |
432 | * | |
433 | * For platforms that doesn't supports coherent icache and do support | |
434 | * per page noexec bit, we do setup things such that we do the | |
435 | * sync between D/I cache via fault. But that is handled via low level | |
436 | * hash fault code (hash_page_do_lazy_icache()) and we should not reach | |
437 | * here in such case. | |
438 | * | |
439 | * For wrong access that can result in PROTFAULT, the above vma->vm_flags | |
440 | * check should handle those and hence we should fall to the bad_area | |
441 | * handling correctly. | |
442 | * | |
443 | * For embedded with per page exec support that doesn't support coherent | |
444 | * icache we do get PROTFAULT and we handle that D/I cache sync in | |
445 | * set_pte_at while taking the noexec/prot fault. Hence this is WARN_ON | |
446 | * is conditional for server MMU. | |
447 | * | |
448 | * For radix, we can get prot fault for autonuma case, because radix | |
449 | * page table will have them marked noaccess for user. | |
450 | */ | |
451 | if (!radix_enabled() && !is_write) | |
452 | WARN_ON_ONCE(error_code & DSISR_PROTFAULT); | |
453 | #endif /* CONFIG_PPC_STD_MMU */ | |
14cf11af PM |
454 | |
455 | /* | |
456 | * If for any reason at all we couldn't handle the fault, | |
457 | * make sure we exit gracefully rather than endlessly redo | |
458 | * the fault. | |
459 | */ | |
dcddffd4 | 460 | fault = handle_mm_fault(vma, address, flags); |
9be72573 | 461 | if (unlikely(fault & (VM_FAULT_RETRY|VM_FAULT_ERROR))) { |
33692f27 LT |
462 | if (fault & VM_FAULT_SIGSEGV) |
463 | goto bad_area; | |
ba12eede | 464 | rc = mm_fault_error(regs, address, fault); |
9be72573 | 465 | if (rc >= MM_FAULT_RETURN) |
ba12eede LZ |
466 | goto bail; |
467 | else | |
468 | rc = 0; | |
14cf11af | 469 | } |
9be72573 BH |
470 | |
471 | /* | |
472 | * Major/minor page fault accounting is only done on the | |
473 | * initial attempt. If we go through a retry, it is extremely | |
474 | * likely that the page will be found in page cache at that point. | |
475 | */ | |
476 | if (flags & FAULT_FLAG_ALLOW_RETRY) { | |
477 | if (fault & VM_FAULT_MAJOR) { | |
478 | current->maj_flt++; | |
479 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, | |
480 | regs, address); | |
40900194 | 481 | #ifdef CONFIG_PPC_SMLPAR |
9be72573 | 482 | if (firmware_has_feature(FW_FEATURE_CMO)) { |
7ffcf8ec AB |
483 | u32 page_ins; |
484 | ||
9be72573 | 485 | preempt_disable(); |
7ffcf8ec AB |
486 | page_ins = be32_to_cpu(get_lppaca()->page_ins); |
487 | page_ins += 1 << PAGE_FACTOR; | |
488 | get_lppaca()->page_ins = cpu_to_be32(page_ins); | |
9be72573 BH |
489 | preempt_enable(); |
490 | } | |
491 | #endif /* CONFIG_PPC_SMLPAR */ | |
492 | } else { | |
493 | current->min_flt++; | |
494 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, | |
495 | regs, address); | |
496 | } | |
497 | if (fault & VM_FAULT_RETRY) { | |
498 | /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk | |
499 | * of starvation. */ | |
500 | flags &= ~FAULT_FLAG_ALLOW_RETRY; | |
45cac65b | 501 | flags |= FAULT_FLAG_TRIED; |
9be72573 | 502 | goto retry; |
40900194 | 503 | } |
ac17dc8e | 504 | } |
9be72573 | 505 | |
14cf11af | 506 | up_read(&mm->mmap_sem); |
ba12eede | 507 | goto bail; |
14cf11af PM |
508 | |
509 | bad_area: | |
510 | up_read(&mm->mmap_sem); | |
511 | ||
512 | bad_area_nosemaphore: | |
513 | /* User mode accesses cause a SIGSEGV */ | |
514 | if (user_mode(regs)) { | |
515 | _exception(SIGSEGV, regs, code, address); | |
ba12eede | 516 | goto bail; |
14cf11af PM |
517 | } |
518 | ||
76462232 CD |
519 | if (is_exec && (error_code & DSISR_PROTFAULT)) |
520 | printk_ratelimited(KERN_CRIT "kernel tried to execute NX-protected" | |
521 | " page (%lx) - exploit attempt? (uid: %d)\n", | |
9e184e0a | 522 | address, from_kuid(&init_user_ns, current_uid())); |
14cf11af | 523 | |
ba12eede LZ |
524 | rc = SIGSEGV; |
525 | ||
526 | bail: | |
527 | exception_exit(prev_state); | |
528 | return rc; | |
14cf11af | 529 | } |
03465f89 | 530 | NOKPROBE_SYMBOL(do_page_fault); |
14cf11af PM |
531 | |
532 | /* | |
533 | * bad_page_fault is called when we have a bad access from the kernel. | |
534 | * It is called from the DSI and ISI handlers in head.S and from some | |
535 | * of the procedures in traps.c. | |
536 | */ | |
537 | void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig) | |
538 | { | |
539 | const struct exception_table_entry *entry; | |
540 | ||
541 | /* Are we prepared to handle this fault? */ | |
542 | if ((entry = search_exception_tables(regs->nip)) != NULL) { | |
61a92f70 | 543 | regs->nip = extable_fixup(entry); |
14cf11af PM |
544 | return; |
545 | } | |
546 | ||
547 | /* kernel has accessed a bad area */ | |
723925b7 | 548 | |
723925b7 | 549 | switch (regs->trap) { |
a416dd8d ME |
550 | case 0x300: |
551 | case 0x380: | |
552 | printk(KERN_ALERT "Unable to handle kernel paging request for " | |
553 | "data at address 0x%08lx\n", regs->dar); | |
554 | break; | |
555 | case 0x400: | |
556 | case 0x480: | |
557 | printk(KERN_ALERT "Unable to handle kernel paging request for " | |
558 | "instruction fetch\n"); | |
559 | break; | |
eab861a7 AB |
560 | case 0x600: |
561 | printk(KERN_ALERT "Unable to handle kernel paging request for " | |
562 | "unaligned access at address 0x%08lx\n", regs->dar); | |
563 | break; | |
a416dd8d ME |
564 | default: |
565 | printk(KERN_ALERT "Unable to handle kernel paging request for " | |
566 | "unknown fault\n"); | |
567 | break; | |
723925b7 OJ |
568 | } |
569 | printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n", | |
570 | regs->nip); | |
571 | ||
a70857e4 | 572 | if (task_stack_end_corrupted(current)) |
28b54990 AB |
573 | printk(KERN_ALERT "Thread overran stack, or stack corrupted\n"); |
574 | ||
14cf11af PM |
575 | die("Kernel access of bad area", regs, sig); |
576 | } |