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14cf11af | 1 | /* |
4c8d3d99 | 2 | * Modifications by Kumar Gala (galak@kernel.crashing.org) to support |
14cf11af PM |
3 | * E500 Book E processors. |
4 | * | |
78f62237 | 5 | * Copyright 2004,2010 Freescale Semiconductor, Inc. |
14cf11af PM |
6 | * |
7 | * This file contains the routines for initializing the MMU | |
8 | * on the 4xx series of chips. | |
9 | * -- paulus | |
10 | * | |
11 | * Derived from arch/ppc/mm/init.c: | |
12 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
13 | * | |
14 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) | |
15 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) | |
16 | * Copyright (C) 1996 Paul Mackerras | |
14cf11af PM |
17 | * |
18 | * Derived from "arch/i386/mm/init.c" | |
19 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | |
20 | * | |
21 | * This program is free software; you can redistribute it and/or | |
22 | * modify it under the terms of the GNU General Public License | |
23 | * as published by the Free Software Foundation; either version | |
24 | * 2 of the License, or (at your option) any later version. | |
25 | * | |
26 | */ | |
27 | ||
14cf11af PM |
28 | #include <linux/signal.h> |
29 | #include <linux/sched.h> | |
30 | #include <linux/kernel.h> | |
31 | #include <linux/errno.h> | |
32 | #include <linux/string.h> | |
33 | #include <linux/types.h> | |
34 | #include <linux/ptrace.h> | |
35 | #include <linux/mman.h> | |
36 | #include <linux/mm.h> | |
37 | #include <linux/swap.h> | |
38 | #include <linux/stddef.h> | |
39 | #include <linux/vmalloc.h> | |
40 | #include <linux/init.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/highmem.h> | |
e63075a3 | 43 | #include <linux/memblock.h> |
14cf11af PM |
44 | |
45 | #include <asm/pgalloc.h> | |
46 | #include <asm/prom.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/mmu_context.h> | |
49 | #include <asm/pgtable.h> | |
50 | #include <asm/mmu.h> | |
51 | #include <asm/uaccess.h> | |
52 | #include <asm/smp.h> | |
14cf11af PM |
53 | #include <asm/machdep.h> |
54 | #include <asm/setup.h> | |
28efc35f | 55 | #include <asm/paca.h> |
14cf11af | 56 | |
99c62dd7 KG |
57 | #include "mmu_decl.h" |
58 | ||
14cf11af | 59 | unsigned int tlbcam_index; |
14cf11af | 60 | |
78f62237 KG |
61 | #define NUM_TLBCAMS (64) |
62 | struct tlbcam TLBCAM[NUM_TLBCAMS]; | |
14cf11af PM |
63 | |
64 | struct tlbcamrange { | |
8b27f0b6 | 65 | unsigned long start; |
14cf11af PM |
66 | unsigned long limit; |
67 | phys_addr_t phys; | |
68 | } tlbcam_addrs[NUM_TLBCAMS]; | |
69 | ||
70 | extern unsigned int tlbcam_index; | |
71 | ||
8b27f0b6 KG |
72 | unsigned long tlbcam_sz(int idx) |
73 | { | |
74 | return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1; | |
75 | } | |
76 | ||
14cf11af PM |
77 | /* |
78 | * Return PA for this VA if it is mapped by a CAM, or 0 | |
79 | */ | |
6c24b174 | 80 | phys_addr_t v_mapped_by_tlbcam(unsigned long va) |
14cf11af PM |
81 | { |
82 | int b; | |
83 | for (b = 0; b < tlbcam_index; ++b) | |
84 | if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit) | |
85 | return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start); | |
86 | return 0; | |
87 | } | |
88 | ||
89 | /* | |
90 | * Return VA for a given PA or 0 if not mapped | |
91 | */ | |
6c24b174 | 92 | unsigned long p_mapped_by_tlbcam(phys_addr_t pa) |
14cf11af PM |
93 | { |
94 | int b; | |
95 | for (b = 0; b < tlbcam_index; ++b) | |
96 | if (pa >= tlbcam_addrs[b].phys | |
8b27f0b6 | 97 | && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start) |
14cf11af PM |
98 | +tlbcam_addrs[b].phys) |
99 | return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys); | |
100 | return 0; | |
101 | } | |
102 | ||
103 | /* | |
d10ac373 | 104 | * Set up a variable-size TLB entry (tlbcam). The parameters are not checked; |
4559424a BB |
105 | * in particular size must be a power of 4 between 4k and the max supported by |
106 | * an implementation; max may further be limited by what can be represented in | |
107 | * an unsigned long (for example, 32-bit implementations cannot support a 4GB | |
108 | * size). | |
14cf11af | 109 | */ |
8b27f0b6 KG |
110 | static void settlbcam(int index, unsigned long virt, phys_addr_t phys, |
111 | unsigned long size, unsigned long flags, unsigned int pid) | |
14cf11af | 112 | { |
4559424a | 113 | unsigned int tsize; |
14cf11af | 114 | |
4559424a | 115 | tsize = __ilog2(size) - 10; |
14cf11af PM |
116 | |
117 | #ifdef CONFIG_SMP | |
118 | if ((flags & _PAGE_NO_CACHE) == 0) | |
119 | flags |= _PAGE_COHERENT; | |
120 | #endif | |
121 | ||
122 | TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1); | |
123 | TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid); | |
124 | TLBCAM[index].MAS2 = virt & PAGE_MASK; | |
125 | ||
126 | TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0; | |
127 | TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0; | |
128 | TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0; | |
129 | TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0; | |
130 | TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0; | |
131 | ||
8b27f0b6 | 132 | TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR; |
14cf11af | 133 | TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0); |
e8137341 | 134 | if (mmu_has_feature(MMU_FTR_BIG_PHYS)) |
8b27f0b6 | 135 | TLBCAM[index].MAS7 = (u64)phys >> 32; |
14cf11af | 136 | |
92437d41 PG |
137 | /* Below is unlikely -- only for large user pages or similar */ |
138 | if (pte_user(flags)) { | |
14cf11af PM |
139 | TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; |
140 | TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); | |
141 | } | |
14cf11af PM |
142 | |
143 | tlbcam_addrs[index].start = virt; | |
144 | tlbcam_addrs[index].limit = virt + size - 1; | |
145 | tlbcam_addrs[index].phys = phys; | |
146 | ||
147 | loadcam_entry(index); | |
148 | } | |
149 | ||
1dc91c3e KG |
150 | unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, |
151 | phys_addr_t phys) | |
152 | { | |
f0b8b341 KG |
153 | unsigned int camsize = __ilog2(ram); |
154 | unsigned int align = __ffs(virt | phys); | |
155 | unsigned long max_cam; | |
156 | ||
157 | if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) { | |
158 | /* Convert (4^max) kB to (2^max) bytes */ | |
159 | max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10; | |
160 | camsize &= ~1U; | |
161 | align &= ~1U; | |
162 | } else { | |
163 | /* Convert (2^max) kB to (2^max) bytes */ | |
164 | max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10; | |
165 | } | |
1dc91c3e KG |
166 | |
167 | if (camsize > align) | |
168 | camsize = align; | |
169 | if (camsize > max_cam) | |
170 | camsize = max_cam; | |
171 | ||
172 | return 1UL << camsize; | |
173 | } | |
174 | ||
813125d8 KH |
175 | static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt, |
176 | unsigned long ram, int max_cam_idx) | |
14cf11af | 177 | { |
8b27f0b6 | 178 | int i; |
8b27f0b6 | 179 | unsigned long amount_mapped = 0; |
f88747e7 | 180 | |
8b27f0b6 KG |
181 | /* Calculate CAM values */ |
182 | for (i = 0; ram && i < max_cam_idx; i++) { | |
8b27f0b6 KG |
183 | unsigned long cam_sz; |
184 | ||
1dc91c3e | 185 | cam_sz = calc_cam_sz(ram, virt, phys); |
8b27f0b6 KG |
186 | settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0); |
187 | ||
188 | ram -= cam_sz; | |
189 | amount_mapped += cam_sz; | |
190 | virt += cam_sz; | |
191 | phys += cam_sz; | |
14cf11af | 192 | } |
8b27f0b6 KG |
193 | tlbcam_index = i; |
194 | ||
28efc35f SW |
195 | #ifdef CONFIG_PPC64 |
196 | get_paca()->tcd.esel_next = i; | |
197 | get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY; | |
198 | get_paca()->tcd.esel_first = i; | |
199 | #endif | |
200 | ||
8b27f0b6 KG |
201 | return amount_mapped; |
202 | } | |
f88747e7 | 203 | |
813125d8 KH |
204 | unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx) |
205 | { | |
206 | unsigned long virt = PAGE_OFFSET; | |
207 | phys_addr_t phys = memstart_addr; | |
208 | ||
209 | return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx); | |
210 | } | |
211 | ||
55fd766b KG |
212 | #ifdef CONFIG_PPC32 |
213 | ||
214 | #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS) | |
215 | #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS" | |
216 | #endif | |
217 | ||
a73611b6 | 218 | unsigned long __init mmu_mapin_ram(unsigned long top) |
8b27f0b6 KG |
219 | { |
220 | return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1; | |
14cf11af PM |
221 | } |
222 | ||
223 | /* | |
224 | * MMU_init_hw does the chip-specific initialization of the MMU hardware. | |
225 | */ | |
226 | void __init MMU_init_hw(void) | |
227 | { | |
228 | flush_instruction_cache(); | |
229 | } | |
230 | ||
8b27f0b6 | 231 | void __init adjust_total_lowmem(void) |
14cf11af | 232 | { |
8b27f0b6 | 233 | unsigned long ram; |
f88747e7 | 234 | int i; |
14cf11af | 235 | |
f88747e7 TP |
236 | /* adjust lowmem size to __max_low_memory */ |
237 | ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem); | |
14cf11af | 238 | |
78a235ef | 239 | i = switch_to_as1(); |
8b27f0b6 | 240 | __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM); |
0be7d969 | 241 | restore_to_as0(i, 0, 0, 1); |
c8f3570b | 242 | |
8b27f0b6 KG |
243 | pr_info("Memory CAM mapping: "); |
244 | for (i = 0; i < tlbcam_index - 1; i++) | |
245 | pr_cont("%lu/", tlbcam_sz(i) >> 20); | |
246 | pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20, | |
96a8bac5 | 247 | (unsigned int)((total_lowmem - __max_low_memory) >> 20)); |
8b27f0b6 | 248 | |
e63075a3 | 249 | memblock_set_current_limit(memstart_addr + __max_low_memory); |
14cf11af | 250 | } |
cd3db0c4 BH |
251 | |
252 | void setup_initial_memory_limit(phys_addr_t first_memblock_base, | |
253 | phys_addr_t first_memblock_size) | |
254 | { | |
255 | phys_addr_t limit = first_memblock_base + first_memblock_size; | |
256 | ||
257 | /* 64M mapped initially according to head_fsl_booke.S */ | |
258 | memblock_set_current_limit(min_t(u64, limit, 0x04000000)); | |
259 | } | |
dd189692 KH |
260 | |
261 | #ifdef CONFIG_RELOCATABLE | |
7d2471f9 KH |
262 | int __initdata is_second_reloc; |
263 | notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start) | |
dd189692 KH |
264 | { |
265 | unsigned long base = KERNELBASE; | |
266 | ||
7d2471f9 KH |
267 | kernstart_addr = start; |
268 | if (is_second_reloc) { | |
269 | virt_phys_offset = PAGE_OFFSET - memstart_addr; | |
270 | return; | |
271 | } | |
272 | ||
dd189692 KH |
273 | /* |
274 | * Relocatable kernel support based on processing of dynamic | |
7d2471f9 KH |
275 | * relocation entries. Before we get the real memstart_addr, |
276 | * We will compute the virt_phys_offset like this: | |
dd189692 KH |
277 | * virt_phys_offset = stext.run - kernstart_addr |
278 | * | |
7d2471f9 KH |
279 | * stext.run = (KERNELBASE & ~0x3ffffff) + |
280 | * (kernstart_addr & 0x3ffffff) | |
dd189692 KH |
281 | * When we relocate, we have : |
282 | * | |
283 | * (kernstart_addr & 0x3ffffff) = (stext.run & 0x3ffffff) | |
284 | * | |
285 | * hence: | |
286 | * virt_phys_offset = (KERNELBASE & ~0x3ffffff) - | |
287 | * (kernstart_addr & ~0x3ffffff) | |
288 | * | |
289 | */ | |
dd189692 KH |
290 | start &= ~0x3ffffff; |
291 | base &= ~0x3ffffff; | |
292 | virt_phys_offset = base - start; | |
7d2471f9 KH |
293 | early_get_first_memblock_info(__va(dt_ptr), NULL); |
294 | /* | |
295 | * We now get the memstart_addr, then we should check if this | |
296 | * address is the same as what the PAGE_OFFSET map to now. If | |
297 | * not we have to change the map of PAGE_OFFSET to memstart_addr | |
298 | * and do a second relocation. | |
299 | */ | |
300 | if (start != memstart_addr) { | |
301 | int n; | |
302 | long offset = start - memstart_addr; | |
303 | ||
304 | is_second_reloc = 1; | |
305 | n = switch_to_as1(); | |
306 | /* map a 64M area for the second relocation */ | |
307 | if (memstart_addr > start) | |
308 | map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM); | |
309 | else | |
310 | map_mem_in_cams_addr(start, PAGE_OFFSET + offset, | |
311 | 0x4000000, CONFIG_LOWMEM_CAM_NUM); | |
0be7d969 | 312 | restore_to_as0(n, offset, __va(dt_ptr), 1); |
7d2471f9 KH |
313 | /* We should never reach here */ |
314 | panic("Relocation error"); | |
315 | } | |
dd189692 KH |
316 | } |
317 | #endif | |
55fd766b | 318 | #endif |