[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / mm / pgtable_64.c

/*
 *  This file contains ioremap and related functions for 64-bit machines.
 *
 *  Derived from arch/ppc64/mm/init.c
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
 *    Copyright (C) 1996 Paul Mackerras
 *
 *  Derived from "arch/i386/mm/init.c"
 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
 *
 *  Dave Engebretsen <engebret@us.ibm.com>
 *      Rework for PPC64 port.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/export.h>
#include <linux/types.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/stddef.h>
#include <linux/vmalloc.h>
#include <linux/memblock.h>
#include <linux/slab.h>
#include <linux/hugetlb.h>

#include <asm/pgalloc.h>
#include <asm/page.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/smp.h>
#include <asm/machdep.h>
#include <asm/tlb.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/sections.h>
#include <asm/firmware.h>
#include <asm/dma.h>

#include "mmu_decl.h"

#ifdef CONFIG_PPC_STD_MMU_64
#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
#error TASK_SIZE_USER64 exceeds user VSID range
#endif
#endif

#ifdef CONFIG_PPC_BOOK3S_64
/*
 * partition table and process table for ISA 3.0
 */
struct prtb_entry *process_tb;
struct patb_entry *partition_tb;
/*
 * page table size
 */
unsigned long __pte_index_size;
EXPORT_SYMBOL(__pte_index_size);
unsigned long __pmd_index_size;
EXPORT_SYMBOL(__pmd_index_size);
unsigned long __pud_index_size;
EXPORT_SYMBOL(__pud_index_size);
unsigned long __pgd_index_size;
EXPORT_SYMBOL(__pgd_index_size);
unsigned long __pmd_cache_index;
EXPORT_SYMBOL(__pmd_cache_index);
unsigned long __pte_table_size;
EXPORT_SYMBOL(__pte_table_size);
unsigned long __pmd_table_size;
EXPORT_SYMBOL(__pmd_table_size);
unsigned long __pud_table_size;
EXPORT_SYMBOL(__pud_table_size);
unsigned long __pgd_table_size;
EXPORT_SYMBOL(__pgd_table_size);
unsigned long __pmd_val_bits;
EXPORT_SYMBOL(__pmd_val_bits);
unsigned long __pud_val_bits;
EXPORT_SYMBOL(__pud_val_bits);
unsigned long __pgd_val_bits;
EXPORT_SYMBOL(__pgd_val_bits);
unsigned long __kernel_virt_start;
EXPORT_SYMBOL(__kernel_virt_start);
unsigned long __kernel_virt_size;
EXPORT_SYMBOL(__kernel_virt_size);
unsigned long __vmalloc_start;
EXPORT_SYMBOL(__vmalloc_start);
unsigned long __vmalloc_end;
EXPORT_SYMBOL(__vmalloc_end);
struct page *vmemmap;
EXPORT_SYMBOL(vmemmap);
unsigned long __pte_frag_nr;
EXPORT_SYMBOL(__pte_frag_nr);
unsigned long __pte_frag_size_shift;
EXPORT_SYMBOL(__pte_frag_size_shift);
unsigned long ioremap_bot;
#else /* !CONFIG_PPC_BOOK3S_64 */
unsigned long ioremap_bot = IOREMAP_BASE;
#endif

/**
 * __ioremap_at - Low level function to establish the page tables
 *                for an IO mapping
 */
void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
			    unsigned long flags)
{
	unsigned long i;

	/* Make sure we have the base flags */
	if ((flags & _PAGE_PRESENT) == 0)
		flags |= pgprot_val(PAGE_KERNEL);

	/* We don't support the 4K PFN hack with ioremap */
	if (flags & H_PAGE_4K_PFN)
		return NULL;

	WARN_ON(pa & ~PAGE_MASK);
	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	WARN_ON(size & ~PAGE_MASK);

	for (i = 0; i < size; i += PAGE_SIZE)
		if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
			return NULL;

	return (void __iomem *)ea;
}

/**
 * __iounmap_from - Low level function to tear down the page tables
 *                  for an IO mapping. This is used for mappings that
 *                  are manipulated manually, like partial unmapping of
 *                  PCI IOs or ISA space.
 */
void __iounmap_at(void *ea, unsigned long size)
{
	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	WARN_ON(size & ~PAGE_MASK);

	unmap_kernel_range((unsigned long)ea, size);
}

void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
				unsigned long flags, void *caller)
{
	phys_addr_t paligned;
	void __iomem *ret;

	/*
	 * Choose an address to map it to.
	 * Once the imalloc system is running, we use it.
	 * Before that, we map using addresses going
	 * up from ioremap_bot.  imalloc will use
	 * the addresses from ioremap_bot through
	 * IMALLOC_END
	 * 
	 */
	paligned = addr & PAGE_MASK;
	size = PAGE_ALIGN(addr + size) - paligned;

	if ((size == 0) || (paligned == 0))
		return NULL;

	if (slab_is_available()) {
		struct vm_struct *area;

		area = __get_vm_area_caller(size, VM_IOREMAP,
					    ioremap_bot, IOREMAP_END,
					    caller);
		if (area == NULL)
			return NULL;

		area->phys_addr = paligned;
		ret = __ioremap_at(paligned, area->addr, size, flags);
		if (!ret)
			vunmap(area->addr);
	} else {
		ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
		if (ret)
			ioremap_bot += size;
	}

	if (ret)
		ret += addr & ~PAGE_MASK;
	return ret;
}

void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
			 unsigned long flags)
{
	return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
}

void __iomem * ioremap(phys_addr_t addr, unsigned long size)
{
	unsigned long flags = pgprot_val(pgprot_noncached(__pgprot(0)));
	void *caller = __builtin_return_address(0);

	if (ppc_md.ioremap)
		return ppc_md.ioremap(addr, size, flags, caller);
	return __ioremap_caller(addr, size, flags, caller);
}

void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
{
	unsigned long flags = pgprot_val(pgprot_noncached_wc(__pgprot(0)));
	void *caller = __builtin_return_address(0);

	if (ppc_md.ioremap)
		return ppc_md.ioremap(addr, size, flags, caller);
	return __ioremap_caller(addr, size, flags, caller);
}

void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
			     unsigned long flags)
{
	void *caller = __builtin_return_address(0);

	/* writeable implies dirty for kernel addresses */
	if (flags & _PAGE_WRITE)
		flags |= _PAGE_DIRTY;

	/* we don't want to let _PAGE_EXEC leak out */
	flags &= ~_PAGE_EXEC;
	/*
	 * Force kernel mapping.
	 */
#if defined(CONFIG_PPC_BOOK3S_64)
	flags |= _PAGE_PRIVILEGED;
#else
	flags &= ~_PAGE_USER;
#endif


#ifdef _PAGE_BAP_SR
	/* _PAGE_USER contains _PAGE_BAP_SR on BookE using the new PTE format
	 * which means that we just cleared supervisor access... oops ;-) This
	 * restores it
	 */
	flags |= _PAGE_BAP_SR;
#endif

	if (ppc_md.ioremap)
		return ppc_md.ioremap(addr, size, flags, caller);
	return __ioremap_caller(addr, size, flags, caller);
}


/*  
 * Unmap an IO region and remove it from imalloc'd list.
 * Access to IO memory should be serialized by driver.
 */
void __iounmap(volatile void __iomem *token)
{
	void *addr;

	if (!slab_is_available())
		return;
	
	addr = (void *) ((unsigned long __force)
			 PCI_FIX_ADDR(token) & PAGE_MASK);
	if ((unsigned long)addr < ioremap_bot) {
		printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
		       " at 0x%p\n", addr);
		return;
	}
	vunmap(addr);
}

void iounmap(volatile void __iomem *token)
{
	if (ppc_md.iounmap)
		ppc_md.iounmap(token);
	else
		__iounmap(token);
}

EXPORT_SYMBOL(ioremap);
EXPORT_SYMBOL(ioremap_wc);
EXPORT_SYMBOL(ioremap_prot);
EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(__ioremap_at);
EXPORT_SYMBOL(iounmap);
EXPORT_SYMBOL(__iounmap);
EXPORT_SYMBOL(__iounmap_at);

#ifndef __PAGETABLE_PUD_FOLDED
/* 4 level page table */
struct page *pgd_page(pgd_t pgd)
{
	if (pgd_huge(pgd))
		return pte_page(pgd_pte(pgd));
	return virt_to_page(pgd_page_vaddr(pgd));
}
#endif

struct page *pud_page(pud_t pud)
{
	if (pud_huge(pud))
		return pte_page(pud_pte(pud));
	return virt_to_page(pud_page_vaddr(pud));
}

/*
 * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
 * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
 */
struct page *pmd_page(pmd_t pmd)
{
	if (pmd_trans_huge(pmd) || pmd_huge(pmd))
		return pte_page(pmd_pte(pmd));
	return virt_to_page(pmd_page_vaddr(pmd));
}

#ifdef CONFIG_PPC_64K_PAGES
static pte_t *get_from_cache(struct mm_struct *mm)
{
	void *pte_frag, *ret;

	spin_lock(&mm->page_table_lock);
	ret = mm->context.pte_frag;
	if (ret) {
		pte_frag = ret + PTE_FRAG_SIZE;
		/*
		 * If we have taken up all the fragments mark PTE page NULL
		 */
		if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
			pte_frag = NULL;
		mm->context.pte_frag = pte_frag;
	}
	spin_unlock(&mm->page_table_lock);
	return (pte_t *)ret;
}

static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
{
	void *ret = NULL;
	struct page *page = alloc_page(GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO);
	if (!page)
		return NULL;
	if (!kernel && !pgtable_page_ctor(page)) {
		__free_page(page);
		return NULL;
	}

	ret = page_address(page);
	spin_lock(&mm->page_table_lock);
	/*
	 * If we find pgtable_page set, we return
	 * the allocated page with single fragement
	 * count.
	 */
	if (likely(!mm->context.pte_frag)) {
		set_page_count(page, PTE_FRAG_NR);
		mm->context.pte_frag = ret + PTE_FRAG_SIZE;
	}
	spin_unlock(&mm->page_table_lock);

	return (pte_t *)ret;
}

pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
{
	pte_t *pte;

	pte = get_from_cache(mm);
	if (pte)
		return pte;

	return __alloc_for_cache(mm, kernel);
}
#endif /* CONFIG_PPC_64K_PAGES */

void pte_fragment_free(unsigned long *table, int kernel)
{
	struct page *page = virt_to_page(table);
	if (put_page_testzero(page)) {
		if (!kernel)
			pgtable_page_dtor(page);
		free_hot_cold_page(page, 0);
	}
}

#ifdef CONFIG_SMP
void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
{
	unsigned long pgf = (unsigned long)table;

	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	pgf |= shift;
	tlb_remove_table(tlb, (void *)pgf);
}

void __tlb_remove_table(void *_table)
{
	void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
	unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;

	if (!shift)
		/* PTE page needs special handling */
		pte_fragment_free(table, 0);
	else {
		BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
		kmem_cache_free(PGT_CACHE(shift), table);
	}
}
#else
void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
{
	if (!shift) {
		/* PTE page needs special handling */
		pte_fragment_free(table, 0);
	} else {
		BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
		kmem_cache_free(PGT_CACHE(shift), table);
	}
}
#endif

#ifdef CONFIG_PPC_BOOK3S_64
void __init mmu_partition_table_init(void)
{
	unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;

	BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large.");
	partition_tb = __va(memblock_alloc_base(patb_size, patb_size,
						MEMBLOCK_ALLOC_ANYWHERE));

	/* Initialize the Partition Table with no entries */
	memset((void *)partition_tb, 0, patb_size);

	/*
	 * update partition table control register,
	 * 64 K size.
	 */
	mtspr(SPRN_PTCR, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
}

void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
				   unsigned long dw1)
{
	partition_tb[lpid].patb0 = cpu_to_be64(dw0);
	partition_tb[lpid].patb1 = cpu_to_be64(dw1);

	/* Global flush of TLBs and partition table caches for this lpid */
	asm volatile("ptesync" : : : "memory");
	asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
		     "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
	asm volatile("eieio; tlbsync; ptesync" : : : "memory");
}
EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);
#endif /* CONFIG_PPC_BOOK3S_64 */
Commit	Line	Data
14cf11af PM	1	/*
	2	* This file contains ioremap and related functions for 64-bit machines.
	3	*
	4	* Derived from arch/ppc64/mm/init.c
	5	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	6	*
	7	* Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
	8	* and Cort Dougan (PReP) (cort@cs.nmt.edu)
	9	* Copyright (C) 1996 Paul Mackerras
14cf11af PM	10	*
	11	* Derived from "arch/i386/mm/init.c"
	12	* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
	13	*
	14	* Dave Engebretsen <engebret@us.ibm.com>
	15	* Rework for PPC64 port.
	16	*
	17	* This program is free software; you can redistribute it and/or
	18	* modify it under the terms of the GNU General Public License
	19	* as published by the Free Software Foundation; either version
	20	* 2 of the License, or (at your option) any later version.
	21	*
	22	*/
	23
14cf11af PM	24	#include <linux/signal.h>
	25	#include <linux/sched.h>
	26	#include <linux/kernel.h>
	27	#include <linux/errno.h>
	28	#include <linux/string.h>
66b15db6	29	#include <linux/export.h>
14cf11af PM	30	#include <linux/types.h>
	31	#include <linux/mman.h>
	32	#include <linux/mm.h>
	33	#include <linux/swap.h>
	34	#include <linux/stddef.h>
	35	#include <linux/vmalloc.h>
95f72d1e	36	#include <linux/memblock.h>
5a0e3ad6	37	#include <linux/slab.h>
06743521	38	#include <linux/hugetlb.h>
14cf11af PM	39
	40	#include <asm/pgalloc.h>
	41	#include <asm/page.h>
	42	#include <asm/prom.h>
14cf11af PM	43	#include <asm/io.h>
	44	#include <asm/mmu_context.h>
	45	#include <asm/pgtable.h>
	46	#include <asm/mmu.h>
14cf11af PM	47	#include <asm/smp.h>
	48	#include <asm/machdep.h>
	49	#include <asm/tlb.h>
14cf11af	50	#include <asm/processor.h>
14cf11af	51	#include <asm/cputable.h>
14cf11af	52	#include <asm/sections.h>
5e203d68	53	#include <asm/firmware.h>
68cf0d64	54	#include <asm/dma.h>
800fc3ee DG	55
800fc3ee DG	56	#include "mmu_decl.h"
14cf11af	57
78f1dbde	58	#ifdef CONFIG_PPC_STD_MMU_64
af81d787	59	#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
78f1dbde AK	60	#error TASK_SIZE_USER64 exceeds user VSID range
	61	#endif
	62	#endif
14cf11af	63
50de596d AK	64	#ifdef CONFIG_PPC_BOOK3S_64
	65	/*
	66	* partition table and process table for ISA 3.0
	67	*/
	68	struct prtb_entry *process_tb;
	69	struct patb_entry *partition_tb;
dd1842a2 AK	70	/*
	71	* page table size
	72	*/
	73	unsigned long __pte_index_size;
	74	EXPORT_SYMBOL(__pte_index_size);
	75	unsigned long __pmd_index_size;
	76	EXPORT_SYMBOL(__pmd_index_size);
	77	unsigned long __pud_index_size;
	78	EXPORT_SYMBOL(__pud_index_size);
	79	unsigned long __pgd_index_size;
	80	EXPORT_SYMBOL(__pgd_index_size);
	81	unsigned long __pmd_cache_index;
	82	EXPORT_SYMBOL(__pmd_cache_index);
	83	unsigned long __pte_table_size;
	84	EXPORT_SYMBOL(__pte_table_size);
	85	unsigned long __pmd_table_size;
	86	EXPORT_SYMBOL(__pmd_table_size);
	87	unsigned long __pud_table_size;
	88	EXPORT_SYMBOL(__pud_table_size);
	89	unsigned long __pgd_table_size;
	90	EXPORT_SYMBOL(__pgd_table_size);
a2f41eb9 AK	91	unsigned long __pmd_val_bits;
	92	EXPORT_SYMBOL(__pmd_val_bits);
	93	unsigned long __pud_val_bits;
	94	EXPORT_SYMBOL(__pud_val_bits);
	95	unsigned long __pgd_val_bits;
	96	EXPORT_SYMBOL(__pgd_val_bits);
d6a9996e AK	97	unsigned long __kernel_virt_start;
	98	EXPORT_SYMBOL(__kernel_virt_start);
	99	unsigned long __kernel_virt_size;
	100	EXPORT_SYMBOL(__kernel_virt_size);
	101	unsigned long __vmalloc_start;
	102	EXPORT_SYMBOL(__vmalloc_start);
	103	unsigned long __vmalloc_end;
	104	EXPORT_SYMBOL(__vmalloc_end);
	105	struct page *vmemmap;
	106	EXPORT_SYMBOL(vmemmap);
5ed7ecd0 AK	107	unsigned long __pte_frag_nr;
	108	EXPORT_SYMBOL(__pte_frag_nr);
	109	unsigned long __pte_frag_size_shift;
	110	EXPORT_SYMBOL(__pte_frag_size_shift);
d6a9996e AK	111	unsigned long ioremap_bot;
d6a9996e AK	112	#else /* !CONFIG_PPC_BOOK3S_64 */
78f1dbde	113	unsigned long ioremap_bot = IOREMAP_BASE;
d6a9996e	114	#endif
a245067e	115
3d5134ee BH	116	/**
	117	* __ioremap_at - Low level function to establish the page tables
	118	* for an IO mapping
	119	*/
	120	void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
14cf11af PM	121	unsigned long flags)
	122	{
	123	unsigned long i;
	124
a1f242ff	125	/* Make sure we have the base flags */
14cf11af PM	126	if ((flags & _PAGE_PRESENT) == 0)
	127	flags \|= pgprot_val(PAGE_KERNEL);
	128
a1f242ff	129	/* We don't support the 4K PFN hack with ioremap */
945537df	130	if (flags & H_PAGE_4K_PFN)
a1f242ff BH	131	return NULL;
a1f242ff BH	132
3d5134ee BH	133	WARN_ON(pa & ~PAGE_MASK);
	134	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	135	WARN_ON(size & ~PAGE_MASK);
	136
14cf11af	137	for (i = 0; i < size; i += PAGE_SIZE)
a245067e	138	if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
14cf11af PM	139	return NULL;
14cf11af PM	140
3d5134ee BH	141	return (void __iomem *)ea;
	142	}
	143
	144	/**
	145	* __iounmap_from - Low level function to tear down the page tables
	146	* for an IO mapping. This is used for mappings that
	147	* are manipulated manually, like partial unmapping of
	148	* PCI IOs or ISA space.
	149	*/
	150	void __iounmap_at(void *ea, unsigned long size)
	151	{
	152	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	153	WARN_ON(size & ~PAGE_MASK);
	154
	155	unmap_kernel_range((unsigned long)ea, size);
14cf11af PM	156	}
14cf11af PM	157
1cdab55d BH	158	void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
1cdab55d BH	159	unsigned long flags, void *caller)
14cf11af	160	{
3d5134ee	161	phys_addr_t paligned;
14cf11af PM	162	void __iomem *ret;
	163
	164	/*
	165	* Choose an address to map it to.
	166	* Once the imalloc system is running, we use it.
	167	* Before that, we map using addresses going
	168	* up from ioremap_bot. imalloc will use
	169	* the addresses from ioremap_bot through
	170	* IMALLOC_END
	171	*
	172	*/
3d5134ee BH	173	paligned = addr & PAGE_MASK;
3d5134ee BH	174	size = PAGE_ALIGN(addr + size) - paligned;
14cf11af	175
3d5134ee	176	if ((size == 0) \|\| (paligned == 0))
14cf11af PM	177	return NULL;
14cf11af PM	178
f691fa10	179	if (slab_is_available()) {
14cf11af	180	struct vm_struct *area;
3d5134ee	181
1cdab55d BH	182	area = __get_vm_area_caller(size, VM_IOREMAP,
	183	ioremap_bot, IOREMAP_END,
	184	caller);
14cf11af PM	185	if (area == NULL)
14cf11af PM	186	return NULL;
7a9d1256 ME	187
7a9d1256 ME	188	area->phys_addr = paligned;
3d5134ee	189	ret = __ioremap_at(paligned, area->addr, size, flags);
14cf11af	190	if (!ret)
3d5134ee	191	vunmap(area->addr);
14cf11af	192	} else {
3d5134ee	193	ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
14cf11af PM	194	if (ret)
	195	ioremap_bot += size;
	196	}
3d5134ee BH	197
	198	if (ret)
	199	ret += addr & ~PAGE_MASK;
14cf11af PM	200	return ret;
	201	}
	202
1cdab55d BH	203	void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
	204	unsigned long flags)
	205	{
	206	return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
	207	}
4cb3cee0	208
68a64357	209	void __iomem * ioremap(phys_addr_t addr, unsigned long size)
4cb3cee0	210	{
72176dd0	211	unsigned long flags = pgprot_val(pgprot_noncached(__pgprot(0)));
1cdab55d	212	void *caller = __builtin_return_address(0);
4cb3cee0 BH	213
4cb3cee0 BH	214	if (ppc_md.ioremap)
1cdab55d BH	215	return ppc_md.ioremap(addr, size, flags, caller);
1cdab55d BH	216	return __ioremap_caller(addr, size, flags, caller);
4cb3cee0 BH	217	}
4cb3cee0 BH	218
be135f40 AB	219	void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
be135f40 AB	220	{
72176dd0	221	unsigned long flags = pgprot_val(pgprot_noncached_wc(__pgprot(0)));
be135f40 AB	222	void *caller = __builtin_return_address(0);
	223
	224	if (ppc_md.ioremap)
	225	return ppc_md.ioremap(addr, size, flags, caller);
	226	return __ioremap_caller(addr, size, flags, caller);
	227	}
	228
40f1ce7f	229	void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
4cb3cee0 BH	230	unsigned long flags)
4cb3cee0 BH	231	{
1cdab55d BH	232	void *caller = __builtin_return_address(0);
1cdab55d BH	233
a1f242ff	234	/* writeable implies dirty for kernel addresses */
c7d54842	235	if (flags & _PAGE_WRITE)
a1f242ff BH	236	flags \|= _PAGE_DIRTY;
a1f242ff BH	237
ac29c640 AK	238	/* we don't want to let _PAGE_EXEC leak out */
	239	flags &= ~_PAGE_EXEC;
	240	/*
	241	* Force kernel mapping.
	242	*/
	243	#if defined(CONFIG_PPC_BOOK3S_64)
	244	flags \|= _PAGE_PRIVILEGED;
	245	#else
	246	flags &= ~_PAGE_USER;
	247	#endif
	248
a1f242ff	249
55052eec BH	250	#ifdef _PAGE_BAP_SR
	251	/* _PAGE_USER contains _PAGE_BAP_SR on BookE using the new PTE format
	252	* which means that we just cleared supervisor access... oops ;-) This
	253	* restores it
	254	*/
	255	flags \|= _PAGE_BAP_SR;
	256	#endif
	257
4cb3cee0	258	if (ppc_md.ioremap)
1cdab55d BH	259	return ppc_md.ioremap(addr, size, flags, caller);
1cdab55d BH	260	return __ioremap_caller(addr, size, flags, caller);
4cb3cee0 BH	261	}
	262
	263
14cf11af PM	264	/*
	265	* Unmap an IO region and remove it from imalloc'd list.
	266	* Access to IO memory should be serialized by driver.
14cf11af	267	*/
68a64357	268	void __iounmap(volatile void __iomem *token)
14cf11af PM	269	{
	270	void *addr;
	271
f691fa10	272	if (!slab_is_available())
14cf11af PM	273	return;
14cf11af PM	274
3d5134ee BH	275	addr = (void *) ((unsigned long __force)
	276	PCI_FIX_ADDR(token) & PAGE_MASK);
	277	if ((unsigned long)addr < ioremap_bot) {
	278	printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
	279	" at 0x%p\n", addr);
	280	return;
	281	}
	282	vunmap(addr);
14cf11af PM	283	}
14cf11af PM	284
68a64357	285	void iounmap(volatile void __iomem *token)
4cb3cee0 BH	286	{
	287	if (ppc_md.iounmap)
	288	ppc_md.iounmap(token);
	289	else
	290	__iounmap(token);
	291	}
	292
14cf11af	293	EXPORT_SYMBOL(ioremap);
be135f40	294	EXPORT_SYMBOL(ioremap_wc);
40f1ce7f	295	EXPORT_SYMBOL(ioremap_prot);
14cf11af	296	EXPORT_SYMBOL(__ioremap);
a302cb9d	297	EXPORT_SYMBOL(__ioremap_at);
14cf11af	298	EXPORT_SYMBOL(iounmap);
4cb3cee0	299	EXPORT_SYMBOL(__iounmap);
a302cb9d	300	EXPORT_SYMBOL(__iounmap_at);
5c1f6ee9	301
06743521 AK	302	#ifndef __PAGETABLE_PUD_FOLDED
	303	/* 4 level page table */
	304	struct page *pgd_page(pgd_t pgd)
	305	{
	306	if (pgd_huge(pgd))
	307	return pte_page(pgd_pte(pgd));
	308	return virt_to_page(pgd_page_vaddr(pgd));
	309	}
	310	#endif
	311
	312	struct page *pud_page(pud_t pud)
	313	{
	314	if (pud_huge(pud))
	315	return pte_page(pud_pte(pud));
	316	return virt_to_page(pud_page_vaddr(pud));
	317	}
	318
074c2eae AK	319	/*
	320	* For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
	321	* For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
	322	*/
	323	struct page *pmd_page(pmd_t pmd)
	324	{
06743521	325	if (pmd_trans_huge(pmd) \|\| pmd_huge(pmd))
e34aa03c	326	return pte_page(pmd_pte(pmd));
074c2eae AK	327	return virt_to_page(pmd_page_vaddr(pmd));
	328	}
	329
5c1f6ee9 AK	330	#ifdef CONFIG_PPC_64K_PAGES
	331	static pte_t get_from_cache(struct mm_struct mm)
	332	{
	333	void pte_frag, ret;
	334
	335	spin_lock(&mm->page_table_lock);
	336	ret = mm->context.pte_frag;
	337	if (ret) {
	338	pte_frag = ret + PTE_FRAG_SIZE;
	339	/*
	340	* If we have taken up all the fragments mark PTE page NULL
	341	*/
	342	if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
	343	pte_frag = NULL;
	344	mm->context.pte_frag = pte_frag;
	345	}
	346	spin_unlock(&mm->page_table_lock);
	347	return (pte_t *)ret;
	348	}
	349
	350	static pte_t __alloc_for_cache(struct mm_struct mm, int kernel)
	351	{
	352	void *ret = NULL;
32d6bd90	353	struct page *page = alloc_page(GFP_KERNEL \| __GFP_NOTRACK \| __GFP_ZERO);
5c1f6ee9 AK	354	if (!page)
5c1f6ee9 AK	355	return NULL;
4f804943 KS	356	if (!kernel && !pgtable_page_ctor(page)) {
	357	__free_page(page);
	358	return NULL;
	359	}
5c1f6ee9 AK	360
	361	ret = page_address(page);
	362	spin_lock(&mm->page_table_lock);
	363	/*
	364	* If we find pgtable_page set, we return
	365	* the allocated page with single fragement
	366	* count.
	367	*/
	368	if (likely(!mm->context.pte_frag)) {
fe896d18	369	set_page_count(page, PTE_FRAG_NR);
5c1f6ee9 AK	370	mm->context.pte_frag = ret + PTE_FRAG_SIZE;
	371	}
	372	spin_unlock(&mm->page_table_lock);
	373
5c1f6ee9 AK	374	return (pte_t *)ret;
	375	}
	376
74701d59	377	pte_t pte_fragment_alloc(struct mm_struct mm, unsigned long vmaddr, int kernel)
5c1f6ee9 AK	378	{
	379	pte_t *pte;
	380
	381	pte = get_from_cache(mm);
	382	if (pte)
	383	return pte;
	384
	385	return __alloc_for_cache(mm, kernel);
	386	}
934828ed	387	#endif /* CONFIG_PPC_64K_PAGES */
5c1f6ee9	388
74701d59	389	void pte_fragment_free(unsigned long *table, int kernel)
5c1f6ee9 AK	390	{
	391	struct page *page = virt_to_page(table);
	392	if (put_page_testzero(page)) {
	393	if (!kernel)
	394	pgtable_page_dtor(page);
	395	free_hot_cold_page(page, 0);
	396	}
	397	}
	398
	399	#ifdef CONFIG_SMP
5c1f6ee9 AK	400	void pgtable_free_tlb(struct mmu_gather tlb, void table, int shift)
	401	{
	402	unsigned long pgf = (unsigned long)table;
	403
	404	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	405	pgf \|= shift;
	406	tlb_remove_table(tlb, (void *)pgf);
	407	}
	408
	409	void __tlb_remove_table(void *_table)
	410	{
	411	void table = (void )((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
	412	unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
	413
	414	if (!shift)
	415	/* PTE page needs special handling */
74701d59	416	pte_fragment_free(table, 0);
5c1f6ee9 AK	417	else {
	418	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	419	kmem_cache_free(PGT_CACHE(shift), table);
	420	}
	421	}
	422	#else
	423	void pgtable_free_tlb(struct mmu_gather tlb, void table, int shift)
	424	{
	425	if (!shift) {
	426	/* PTE page needs special handling */
74701d59	427	pte_fragment_free(table, 0);
5c1f6ee9 AK	428	} else {
	429	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	430	kmem_cache_free(PGT_CACHE(shift), table);
	431	}
	432	}
	433	#endif
9d661958 PM	434
	435	#ifdef CONFIG_PPC_BOOK3S_64
	436	void __init mmu_partition_table_init(void)
	437	{
	438	unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
	439
	440	BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large.");
	441	partition_tb = __va(memblock_alloc_base(patb_size, patb_size,
	442	MEMBLOCK_ALLOC_ANYWHERE));
	443
	444	/* Initialize the Partition Table with no entries */
	445	memset((void *)partition_tb, 0, patb_size);
	446
	447	/*
	448	* update partition table control register,
	449	* 64 K size.
	450	*/
	451	mtspr(SPRN_PTCR, __pa(partition_tb) \| (PATB_SIZE_SHIFT - 12));
	452	}
	453
	454	void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
	455	unsigned long dw1)
	456	{
	457	partition_tb[lpid].patb0 = cpu_to_be64(dw0);
	458	partition_tb[lpid].patb1 = cpu_to_be64(dw1);
	459
	460	/* Global flush of TLBs and partition table caches for this lpid */
	461	asm volatile("ptesync" : : : "memory");
	462	asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
	463	"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
	464	asm volatile("eieio; tlbsync; ptesync" : : : "memory");
	465	}
	466	EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);
	467	#endif /* CONFIG_PPC_BOOK3S_64 */