[mirror_ubuntu-kernels.git] / arch / powerpc / net / bpf_jit32.h

/*
 * bpf_jit32.h: BPF JIT compiler for PPC
 *
 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
 *
 * Split from bpf_jit.h
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; version 2
 * of the License.
 */
#ifndef _BPF_JIT32_H
#define _BPF_JIT32_H

#include <asm/asm-compat.h>
#include "bpf_jit.h"

#ifdef CONFIG_PPC64
#define BPF_PPC_STACK_R3_OFF	48
#define BPF_PPC_STACK_LOCALS	32
#define BPF_PPC_STACK_BASIC	(48+64)
#define BPF_PPC_STACK_SAVE	(18*8)
#define BPF_PPC_STACKFRAME	(BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \
				 BPF_PPC_STACK_SAVE)
#define BPF_PPC_SLOWPATH_FRAME	(48+64)
#else
#define BPF_PPC_STACK_R3_OFF	24
#define BPF_PPC_STACK_LOCALS	16
#define BPF_PPC_STACK_BASIC	(24+32)
#define BPF_PPC_STACK_SAVE	(18*4)
#define BPF_PPC_STACKFRAME	(BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \
				 BPF_PPC_STACK_SAVE)
#define BPF_PPC_SLOWPATH_FRAME	(24+32)
#endif

#define REG_SZ         (BITS_PER_LONG/8)

/*
 * Generated code register usage:
 *
 * As normal PPC C ABI (e.g. r1=sp, r2=TOC), with:
 *
 * skb		r3	(Entry parameter)
 * A register	r4
 * X register	r5
 * addr param	r6
 * r7-r10	scratch
 * skb->data	r14
 * skb headlen	r15	(skb->len - skb->data_len)
 * m[0]		r16
 * m[...]	...
 * m[15]	r31
 */
#define r_skb		3
#define r_ret		3
#define r_A		4
#define r_X		5
#define r_addr		6
#define r_scratch1	7
#define r_scratch2	8
#define r_D		14
#define r_HL		15
#define r_M		16

#ifndef __ASSEMBLY__

/*
 * Assembly helpers from arch/powerpc/net/bpf_jit.S:
 */
#define DECLARE_LOAD_FUNC(func)	\
	extern u8 func[], func##_negative_offset[], func##_positive_offset[]

DECLARE_LOAD_FUNC(sk_load_word);
DECLARE_LOAD_FUNC(sk_load_half);
DECLARE_LOAD_FUNC(sk_load_byte);
DECLARE_LOAD_FUNC(sk_load_byte_msh);

#define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i);   \
		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
			PPC_LBZ(r, r, IMM_L(i)); } } while(0)

#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \
		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
			PPC_LD(r, r, IMM_L(i)); } } while(0)

#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i);   \
		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
			PPC_LWZ(r, r, IMM_L(i)); } } while(0)

#define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i);   \
		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
			PPC_LHZ(r, r, IMM_L(i)); } } while(0)

#ifdef CONFIG_PPC64
#define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0)
#else
#define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0)
#endif

#ifdef CONFIG_SMP
#ifdef CONFIG_PPC64
#define PPC_BPF_LOAD_CPU(r)		\
	do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2);	\
		PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index));	\
	} while (0)
#else
#define PPC_BPF_LOAD_CPU(r)     \
	do { BUILD_BUG_ON(FIELD_SIZEOF(struct task_struct, cpu) != 4);		\
		PPC_LHZ_OFFS(r, 2, offsetof(struct task_struct, cpu));		\
	} while(0)
#endif
#else
#define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0)
#endif

#define PPC_LHBRX_OFFS(r, base, i) \
		do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0)
#ifdef __LITTLE_ENDIAN__
#define PPC_NTOHS_OFFS(r, base, i)	PPC_LHBRX_OFFS(r, base, i)
#else
#define PPC_NTOHS_OFFS(r, base, i)	PPC_LHZ_OFFS(r, base, i)
#endif

#define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0)
#define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0)
#define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0)

#define SEEN_DATAREF 0x10000 /* might call external helpers */
#define SEEN_XREG    0x20000 /* X reg is used */
#define SEEN_MEM     0x40000 /* SEEN_MEM+(1<<n) = use mem[n] for temporary
			      * storage */
#define SEEN_MEM_MSK 0x0ffff

struct codegen_context {
	unsigned int seen;
	unsigned int idx;
	int pc_ret0; /* bpf index of first RET #0 instruction (if any) */
};

#endif

#endif
Commit	Line	Data
6ac0ba5a NR	1	/*
	2	* bpf_jit32.h: BPF JIT compiler for PPC
	3	*
	4	* Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
	5	*
	6	* Split from bpf_jit.h
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; version 2
	11	* of the License.
	12	*/
	13	#ifndef _BPF_JIT32_H
	14	#define _BPF_JIT32_H
	15
ec0c464c	16	#include <asm/asm-compat.h>
6ac0ba5a NR	17	#include "bpf_jit.h"
	18
	19	#ifdef CONFIG_PPC64
	20	#define BPF_PPC_STACK_R3_OFF 48
	21	#define BPF_PPC_STACK_LOCALS 32
	22	#define BPF_PPC_STACK_BASIC (48+64)
	23	#define BPF_PPC_STACK_SAVE (18*8)
	24	#define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \
	25	BPF_PPC_STACK_SAVE)
	26	#define BPF_PPC_SLOWPATH_FRAME (48+64)
	27	#else
	28	#define BPF_PPC_STACK_R3_OFF 24
	29	#define BPF_PPC_STACK_LOCALS 16
	30	#define BPF_PPC_STACK_BASIC (24+32)
	31	#define BPF_PPC_STACK_SAVE (18*4)
	32	#define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \
	33	BPF_PPC_STACK_SAVE)
	34	#define BPF_PPC_SLOWPATH_FRAME (24+32)
	35	#endif
	36
	37	#define REG_SZ (BITS_PER_LONG/8)
	38
	39	/*
	40	* Generated code register usage:
	41	*
	42	* As normal PPC C ABI (e.g. r1=sp, r2=TOC), with:
	43	*
	44	* skb r3 (Entry parameter)
	45	* A register r4
	46	* X register r5
	47	* addr param r6
	48	* r7-r10 scratch
	49	* skb->data r14
	50	* skb headlen r15 (skb->len - skb->data_len)
	51	* m[0] r16
	52	* m[...] ...
	53	* m[15] r31
	54	*/
	55	#define r_skb 3
	56	#define r_ret 3
	57	#define r_A 4
	58	#define r_X 5
	59	#define r_addr 6
	60	#define r_scratch1 7
	61	#define r_scratch2 8
	62	#define r_D 14
	63	#define r_HL 15
	64	#define r_M 16
	65
	66	#ifndef __ASSEMBLY__
	67
	68	/*
	69	* Assembly helpers from arch/powerpc/net/bpf_jit.S:
	70	*/
	71	#define DECLARE_LOAD_FUNC(func) \
	72	extern u8 func[], func##_negative_offset[], func##_positive_offset[]
	73
	74	DECLARE_LOAD_FUNC(sk_load_word);
	75	DECLARE_LOAD_FUNC(sk_load_half);
	76	DECLARE_LOAD_FUNC(sk_load_byte);
	77	DECLARE_LOAD_FUNC(sk_load_byte_msh);
	78
	79	#define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i); \
	80	else { PPC_ADDIS(r, base, IMM_HA(i)); \
81	PPC_LBZ(r, r, IMM_L(i)); } } while(0)
82
83	#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \
84	else { PPC_ADDIS(r, base, IMM_HA(i)); \
85	PPC_LD(r, r, IMM_L(i)); } } while(0)
86
87	#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i); \
88	else { PPC_ADDIS(r, base, IMM_HA(i)); \
89	PPC_LWZ(r, r, IMM_L(i)); } } while(0)
90
91	#define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i); \
92	else { PPC_ADDIS(r, base, IMM_HA(i)); \
93	PPC_LHZ(r, r, IMM_L(i)); } } while(0)
94
95	#ifdef CONFIG_PPC64
96	#define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0)
97	#else
98	#define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0)
99	#endif
100
101	#ifdef CONFIG_SMP
102	#ifdef CONFIG_PPC64
103	#define PPC_BPF_LOAD_CPU(r) \
104	do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2); \
105	PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index)); \
106	} while (0)
107	#else
108	#define PPC_BPF_LOAD_CPU(r) \
ed1cd6de CL	109	do { BUILD_BUG_ON(FIELD_SIZEOF(struct task_struct, cpu) != 4); \
ed1cd6de CL	110	PPC_LHZ_OFFS(r, 2, offsetof(struct task_struct, cpu)); \
6ac0ba5a NR	111	} while(0)
	112	#endif
	113	#else
	114	#define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0)
	115	#endif
	116
	117	#define PPC_LHBRX_OFFS(r, base, i) \
	118	do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0)
	119	#ifdef __LITTLE_ENDIAN__
	120	#define PPC_NTOHS_OFFS(r, base, i) PPC_LHBRX_OFFS(r, base, i)
	121	#else
	122	#define PPC_NTOHS_OFFS(r, base, i) PPC_LHZ_OFFS(r, base, i)
	123	#endif
	124
86be36f6 NR	125	#define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0)
	126	#define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0)
	127	#define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0)
	128
6ac0ba5a NR	129	#define SEEN_DATAREF 0x10000 /* might call external helpers */
	130	#define SEEN_XREG 0x20000 /* X reg is used */
	131	#define SEEN_MEM 0x40000 /* SEEN_MEM+(1<<n) = use mem[n] for temporary
	132	* storage */
	133	#define SEEN_MEM_MSK 0x0ffff
	134
	135	struct codegen_context {
	136	unsigned int seen;
	137	unsigned int idx;
	138	int pc_ret0; /* bpf index of first RET #0 instruction (if any) */
	139	};
	140
	141	#endif
	142
	143	#endif