[mirror_ubuntu-eoan-kernel.git] / arch / powerpc / platforms / 4xx / hsta_msi.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * MSI support for PPC4xx SoCs using High Speed Transfer Assist (HSTA) for
 * generation of the interrupt.
 *
 * Copyright © 2013 Alistair Popple <alistair@popple.id.au> IBM Corporation
 */

#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/msi.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/pci.h>
#include <linux/semaphore.h>
#include <asm/msi_bitmap.h>
#include <asm/ppc-pci.h>

struct ppc4xx_hsta_msi {
	struct device *dev;

	/* The ioremapped HSTA MSI IO space */
	u32 __iomem *data;

	/* Physical address of HSTA MSI IO space */
	u64 address;
	struct msi_bitmap bmp;

	/* An array mapping offsets to hardware IRQs */
	int *irq_map;

	/* Number of hwirqs supported */
	int irq_count;
};
static struct ppc4xx_hsta_msi ppc4xx_hsta_msi;

static int hsta_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
	struct msi_msg msg;
	struct msi_desc *entry;
	int irq, hwirq;
	u64 addr;

	/* We don't support MSI-X */
	if (type == PCI_CAP_ID_MSIX) {
		pr_debug("%s: MSI-X not supported.\n", __func__);
		return -EINVAL;
	}

	for_each_pci_msi_entry(entry, dev) {
		irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1);
		if (irq < 0) {
			pr_debug("%s: Failed to allocate msi interrupt\n",
				 __func__);
			return irq;
		}

		hwirq = ppc4xx_hsta_msi.irq_map[irq];
		if (!hwirq) {
			pr_err("%s: Failed mapping irq %d\n", __func__, irq);
			return -EINVAL;
		}

		/*
		 * HSTA generates interrupts on writes to 128-bit aligned
		 * addresses.
		 */
		addr = ppc4xx_hsta_msi.address + irq*0x10;
		msg.address_hi = upper_32_bits(addr);
		msg.address_lo = lower_32_bits(addr);

		/* Data is not used by the HSTA. */
		msg.data = 0;

		pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq,
			 (((u64) msg.address_hi) << 32) | msg.address_lo);

		if (irq_set_msi_desc(hwirq, entry)) {
			pr_err(
			"%s: Invalid hwirq %d specified in device tree\n",
			__func__, hwirq);
			msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
			return -EINVAL;
		}
		pci_write_msi_msg(hwirq, &msg);
	}

	return 0;
}

static int hsta_find_hwirq_offset(int hwirq)
{
	int irq;

	/* Find the offset given the hwirq */
	for (irq = 0; irq < ppc4xx_hsta_msi.irq_count; irq++)
		if (ppc4xx_hsta_msi.irq_map[irq] == hwirq)
			return irq;

	return -EINVAL;
}

static void hsta_teardown_msi_irqs(struct pci_dev *dev)
{
	struct msi_desc *entry;
	int irq;

	for_each_pci_msi_entry(entry, dev) {
		if (!entry->irq)
			continue;

		irq = hsta_find_hwirq_offset(entry->irq);

		/* entry->irq should always be in irq_map */
		BUG_ON(irq < 0);
		irq_set_msi_desc(entry->irq, NULL);
		msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
		pr_debug("%s: Teardown IRQ %u (index %u)\n", __func__,
			 entry->irq, irq);
	}
}

static int hsta_msi_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct resource *mem;
	int irq, ret, irq_count;
	struct pci_controller *phb;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!mem) {
		dev_err(dev, "Unable to get mmio space\n");
		return -EINVAL;
	}

	irq_count = of_irq_count(dev->of_node);
	if (!irq_count) {
		dev_err(dev, "Unable to find IRQ range\n");
		return -EINVAL;
	}

	ppc4xx_hsta_msi.dev = dev;
	ppc4xx_hsta_msi.address = mem->start;
	ppc4xx_hsta_msi.data = ioremap(mem->start, resource_size(mem));
	ppc4xx_hsta_msi.irq_count = irq_count;
	if (!ppc4xx_hsta_msi.data) {
		dev_err(dev, "Unable to map memory\n");
		return -ENOMEM;
	}

	ret = msi_bitmap_alloc(&ppc4xx_hsta_msi.bmp, irq_count, dev->of_node);
	if (ret)
		goto out;

	ppc4xx_hsta_msi.irq_map = kmalloc_array(irq_count, sizeof(int),
						GFP_KERNEL);
	if (!ppc4xx_hsta_msi.irq_map) {
		ret = -ENOMEM;
		goto out1;
	}

	/* Setup a mapping from irq offsets to hardware irq numbers */
	for (irq = 0; irq < irq_count; irq++) {
		ppc4xx_hsta_msi.irq_map[irq] =
			irq_of_parse_and_map(dev->of_node, irq);
		if (!ppc4xx_hsta_msi.irq_map[irq]) {
			dev_err(dev, "Unable to map IRQ\n");
			ret = -EINVAL;
			goto out2;
		}
	}

	list_for_each_entry(phb, &hose_list, list_node) {
		phb->controller_ops.setup_msi_irqs = hsta_setup_msi_irqs;
		phb->controller_ops.teardown_msi_irqs = hsta_teardown_msi_irqs;
	}
	return 0;

out2:
	kfree(ppc4xx_hsta_msi.irq_map);

out1:
	msi_bitmap_free(&ppc4xx_hsta_msi.bmp);

out:
	iounmap(ppc4xx_hsta_msi.data);
	return ret;
}

static const struct of_device_id hsta_msi_ids[] = {
	{
		.compatible = "ibm,hsta-msi",
	},
	{}
};

static struct platform_driver hsta_msi_driver = {
	.probe = hsta_msi_probe,
	.driver = {
		.name = "hsta-msi",
		.of_match_table = hsta_msi_ids,
	},
};

static int hsta_msi_init(void)
{
	return platform_driver_register(&hsta_msi_driver);
}
subsys_initcall(hsta_msi_init);
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
e2c37d90 AP	2	/*
	3	* MSI support for PPC4xx SoCs using High Speed Transfer Assist (HSTA) for
	4	* generation of the interrupt.
	5	*
	6	* Copyright © 2013 Alistair Popple <alistair@popple.id.au> IBM Corporation
e2c37d90 AP	7	*/
	8
	9	#include <linux/kernel.h>
	10	#include <linux/interrupt.h>
	11	#include <linux/msi.h>
	12	#include <linux/of.h>
	13	#include <linux/of_platform.h>
	14	#include <linux/pci.h>
	15	#include <linux/semaphore.h>
	16	#include <asm/msi_bitmap.h>
aaf6fd5c	17	#include <asm/ppc-pci.h>
e2c37d90 AP	18
	19	struct ppc4xx_hsta_msi {
	20	struct device *dev;
	21
	22	/* The ioremapped HSTA MSI IO space */
	23	u32 __iomem *data;
	24
	25	/* Physical address of HSTA MSI IO space */
	26	u64 address;
	27	struct msi_bitmap bmp;
	28
	29	/* An array mapping offsets to hardware IRQs */
	30	int *irq_map;
	31
	32	/* Number of hwirqs supported */
	33	int irq_count;
	34	};
	35	static struct ppc4xx_hsta_msi ppc4xx_hsta_msi;
	36
	37	static int hsta_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
	38	{
	39	struct msi_msg msg;
	40	struct msi_desc *entry;
	41	int irq, hwirq;
	42	u64 addr;
	43
6b2fd7ef AG	44	/* We don't support MSI-X */
	45	if (type == PCI_CAP_ID_MSIX) {
	46	pr_debug("%s: MSI-X not supported.\n", __func__);
	47	return -EINVAL;
	48	}
	49
2921d179	50	for_each_pci_msi_entry(entry, dev) {
e2c37d90 AP	51	irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1);
	52	if (irq < 0) {
	53	pr_debug("%s: Failed to allocate msi interrupt\n",
	54	__func__);
	55	return irq;
	56	}
	57
	58	hwirq = ppc4xx_hsta_msi.irq_map[irq];
ef24ba70	59	if (!hwirq) {
e2c37d90 AP	60	pr_err("%s: Failed mapping irq %d\n", __func__, irq);
	61	return -EINVAL;
	62	}
	63
	64	/*
	65	* HSTA generates interrupts on writes to 128-bit aligned
	66	* addresses.
	67	*/
	68	addr = ppc4xx_hsta_msi.address + irq*0x10;
	69	msg.address_hi = upper_32_bits(addr);
	70	msg.address_lo = lower_32_bits(addr);
	71
	72	/* Data is not used by the HSTA. */
	73	msg.data = 0;
	74
	75	pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq,
	76	(((u64) msg.address_hi) << 32) \| msg.address_lo);
	77
	78	if (irq_set_msi_desc(hwirq, entry)) {
	79	pr_err(
	80	"%s: Invalid hwirq %d specified in device tree\n",
	81	__func__, hwirq);
	82	msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
	83	return -EINVAL;
	84	}
83a18912	85	pci_write_msi_msg(hwirq, &msg);
e2c37d90 AP	86	}
	87
	88	return 0;
	89	}
	90
	91	static int hsta_find_hwirq_offset(int hwirq)
	92	{
	93	int irq;
	94
	95	/* Find the offset given the hwirq */
	96	for (irq = 0; irq < ppc4xx_hsta_msi.irq_count; irq++)
	97	if (ppc4xx_hsta_msi.irq_map[irq] == hwirq)
	98	return irq;
	99
	100	return -EINVAL;
	101	}
	102
	103	static void hsta_teardown_msi_irqs(struct pci_dev *dev)
	104	{
	105	struct msi_desc *entry;
	106	int irq;
	107
2921d179	108	for_each_pci_msi_entry(entry, dev) {
ef24ba70	109	if (!entry->irq)
e2c37d90 AP	110	continue;
	111
	112	irq = hsta_find_hwirq_offset(entry->irq);
	113
	114	/* entry->irq should always be in irq_map */
	115	BUG_ON(irq < 0);
	116	irq_set_msi_desc(entry->irq, NULL);
	117	msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
	118	pr_debug("%s: Teardown IRQ %u (index %u)\n", __func__,
	119	entry->irq, irq);
	120	}
	121	}
	122
e2c37d90 AP	123	static int hsta_msi_probe(struct platform_device *pdev)
	124	{
	125	struct device *dev = &pdev->dev;
	126	struct resource *mem;
	127	int irq, ret, irq_count;
f2c800aa	128	struct pci_controller *phb;
e2c37d90 AP	129
e2c37d90 AP	130	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
35a7f41c	131	if (!mem) {
e2c37d90 AP	132	dev_err(dev, "Unable to get mmio space\n");
	133	return -EINVAL;
	134	}
	135
	136	irq_count = of_irq_count(dev->of_node);
	137	if (!irq_count) {
	138	dev_err(dev, "Unable to find IRQ range\n");
	139	return -EINVAL;
	140	}
	141
	142	ppc4xx_hsta_msi.dev = dev;
	143	ppc4xx_hsta_msi.address = mem->start;
	144	ppc4xx_hsta_msi.data = ioremap(mem->start, resource_size(mem));
	145	ppc4xx_hsta_msi.irq_count = irq_count;
e144d4ed	146	if (!ppc4xx_hsta_msi.data) {
e2c37d90 AP	147	dev_err(dev, "Unable to map memory\n");
	148	return -ENOMEM;
	149	}
	150
	151	ret = msi_bitmap_alloc(&ppc4xx_hsta_msi.bmp, irq_count, dev->of_node);
	152	if (ret)
	153	goto out;
	154
6da2ec56 KC	155	ppc4xx_hsta_msi.irq_map = kmalloc_array(irq_count, sizeof(int),
6da2ec56 KC	156	GFP_KERNEL);
35a7f41c	157	if (!ppc4xx_hsta_msi.irq_map) {
e2c37d90 AP	158	ret = -ENOMEM;
	159	goto out1;
	160	}
	161
	162	/* Setup a mapping from irq offsets to hardware irq numbers */
	163	for (irq = 0; irq < irq_count; irq++) {
	164	ppc4xx_hsta_msi.irq_map[irq] =
	165	irq_of_parse_and_map(dev->of_node, irq);
ef24ba70	166	if (!ppc4xx_hsta_msi.irq_map[irq]) {
e2c37d90 AP	167	dev_err(dev, "Unable to map IRQ\n");
	168	ret = -EINVAL;
	169	goto out2;
	170	}
	171	}
	172
f2c800aa DA	173	list_for_each_entry(phb, &hose_list, list_node) {
	174	phb->controller_ops.setup_msi_irqs = hsta_setup_msi_irqs;
	175	phb->controller_ops.teardown_msi_irqs = hsta_teardown_msi_irqs;
	176	}
e2c37d90 AP	177	return 0;
	178
	179	out2:
	180	kfree(ppc4xx_hsta_msi.irq_map);
	181
	182	out1:
	183	msi_bitmap_free(&ppc4xx_hsta_msi.bmp);
	184
	185	out:
	186	iounmap(ppc4xx_hsta_msi.data);
	187	return ret;
	188	}
	189
	190	static const struct of_device_id hsta_msi_ids[] = {
	191	{
	192	.compatible = "ibm,hsta-msi",
	193	},
	194	{}
	195	};
	196
	197	static struct platform_driver hsta_msi_driver = {
	198	.probe = hsta_msi_probe,
	199	.driver = {
	200	.name = "hsta-msi",
e2c37d90 AP	201	.of_match_table = hsta_msi_ids,
	202	},
	203	};
	204
	205	static int hsta_msi_init(void)
	206	{
	207	return platform_driver_register(&hsta_msi_driver);
	208	}
	209	subsys_initcall(hsta_msi_init);