projects / mirror_ubuntu-hirsute-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 7d13d21a KG |
2 | #ifndef __MPC83XX_H__ |
| 3 | #define __MPC83XX_H__ | |
| 4 | ||
| 5 | #include <linux/init.h> | |
| 6 | #include <linux/device.h> | |
| 7d52c7b0 | 7 | #include <asm/pci-bridge.h> |
| 7d13d21a | 8 | |
| c1616982 LY |
9 | /* System Clock Control Register */ |
| 10 | #define MPC83XX_SCCR_OFFS 0xA08 | |
| e5a94af8 | 11 | #define MPC83XX_SCCR_USB_MASK 0x00f00000 |
| c1616982 LY |
12 | #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000 |
| 13 | #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000 | |
| 14 | #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000 | |
| 15 | #define MPC83XX_SCCR_USB_DRCM_11 0x00300000 | |
| 16 | #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 | |
| 17 | #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 | |
| b74a7e50 KP |
18 | #define MPC8315_SCCR_USB_MASK 0x00c00000 |
| 19 | #define MPC8315_SCCR_USB_DRCM_11 0x00c00000 | |
| 1a9ebc0c | 20 | #define MPC8315_SCCR_USB_DRCM_01 0x00400000 |
| e10241d8 | 21 | #define MPC837X_SCCR_USB_DRCM_11 0x00c00000 |
| c1616982 LY |
22 | |
| 23 | /* system i/o configuration register low */ | |
| 24 | #define MPC83XX_SICRL_OFFS 0x114 | |
| e5a94af8 | 25 | #define MPC834X_SICRL_USB_MASK 0x60000000 |
| b7d66c88 PK |
26 | #define MPC834X_SICRL_USB0 0x20000000 |
| 27 | #define MPC834X_SICRL_USB1 0x40000000 | |
| e5a94af8 LY |
28 | #define MPC831X_SICRL_USB_MASK 0x00000c00 |
| 29 | #define MPC831X_SICRL_USB_ULPI 0x00000800 | |
| c0a20159 AV |
30 | #define MPC8315_SICRL_USB_MASK 0x000000fc |
| 31 | #define MPC8315_SICRL_USB_ULPI 0x00000054 | |
| e10241d8 LY |
32 | #define MPC837X_SICRL_USB_MASK 0xf0000000 |
| 33 | #define MPC837X_SICRL_USB_ULPI 0x50000000 | |
| 89f37296 AV |
34 | #define MPC837X_SICRL_USBB_MASK 0x30000000 |
| 35 | #define MPC837X_SICRL_SD 0x20000000 | |
| c1616982 LY |
36 | |
| 37 | /* system i/o configuration register high */ | |
| 38 | #define MPC83XX_SICRH_OFFS 0x118 | |
| fd066e85 IY |
39 | #define MPC8308_SICRH_USB_MASK 0x000c0000 |
| 40 | #define MPC8308_SICRH_USB_ULPI 0x00040000 | |
| e5a94af8 LY |
41 | #define MPC834X_SICRH_USB_UTMI 0x00020000 |
| 42 | #define MPC831X_SICRH_USB_MASK 0x000000e0 | |
| 43 | #define MPC831X_SICRH_USB_ULPI 0x000000a0 | |
| c0a20159 AV |
44 | #define MPC8315_SICRH_USB_MASK 0x0000ff00 |
| 45 | #define MPC8315_SICRH_USB_ULPI 0x00000000 | |
| 89f37296 AV |
46 | #define MPC837X_SICRH_SPI_MASK 0x00000003 |
| 47 | #define MPC837X_SICRH_SD 0x00000001 | |
| e5a94af8 LY |
48 | |
| 49 | /* USB Control Register */ | |
| 50 | #define FSL_USB2_CONTROL_OFFS 0x500 | |
| 51 | #define CONTROL_UTMI_PHY_EN 0x00000200 | |
| 1a9ebc0c | 52 | #define CONTROL_REFSEL_24MHZ 0x00000040 |
| e5a94af8 LY |
53 | #define CONTROL_REFSEL_48MHZ 0x00000080 |
| 54 | #define CONTROL_PHY_CLK_SEL_ULPI 0x00000400 | |
| 55 | #define CONTROL_OTG_PORT 0x00000020 | |
| 56 | ||
| 57 | /* USB PORTSC Registers */ | |
| 58 | #define FSL_USB2_PORTSC1_OFFS 0x184 | |
| 59 | #define FSL_USB2_PORTSC2_OFFS 0x188 | |
| 60 | #define PORTSCX_PTW_16BIT 0x10000000 | |
| 61 | #define PORTSCX_PTS_UTMI 0x00000000 | |
| 62 | #define PORTSCX_PTS_ULPI 0x80000000 | |
| c1616982 | 63 | |
| 7d13d21a KG |
64 | /* |
| 65 | * Declaration for the various functions exported by the | |
| 66 | * mpc83xx_* files. Mostly for use by mpc83xx_setup | |
| 67 | */ | |
| 68 | ||
| 95ec77c0 | 69 | extern void __noreturn mpc83xx_restart(char *cmd); |
| 30f59336 | 70 | extern long mpc83xx_time_init(void); |
| 81b36a0b | 71 | extern int mpc837x_usb_cfg(void); |
| e5a94af8 LY |
72 | extern int mpc834x_usb_cfg(void); |
| 73 | extern int mpc831x_usb_cfg(void); | |
| d4fb5ebd DB |
74 | extern void mpc83xx_ipic_init_IRQ(void); |
| 75 | #ifdef CONFIG_QUICC_ENGINE | |
| 76 | extern void mpc83xx_qe_init_IRQ(void); | |
| 77 | extern void mpc83xx_ipic_and_qe_init_IRQ(void); | |
| 78 | #else | |
| 79 | static inline void __init mpc83xx_qe_init_IRQ(void) {} | |
| 80 | #define mpc83xx_ipic_and_qe_init_IRQ mpc83xx_ipic_init_IRQ | |
| 81 | #endif /* CONFIG_QUICC_ENGINE */ | |
| 82 | ||
| bede480d DB |
83 | #ifdef CONFIG_PCI |
| 84 | extern void mpc83xx_setup_pci(void); | |
| 85 | #else | |
| 86 | #define mpc83xx_setup_pci() do {} while (0) | |
| 87 | #endif | |
| 88 | ||
| 7669d58c | 89 | extern int mpc83xx_declare_of_platform_devices(void); |
| fff69fd0 | 90 | extern void mpc83xx_setup_arch(void); |
| 7d13d21a | 91 | |
| e060e084 | 92 | #endif /* __MPC83XX_H__ */ |