[mirror_ubuntu-artful-kernel.git] / arch / powerpc / platforms / Kconfig

menu "Platform support"

source "arch/powerpc/platforms/powernv/Kconfig"
source "arch/powerpc/platforms/pseries/Kconfig"
source "arch/powerpc/platforms/chrp/Kconfig"
source "arch/powerpc/platforms/512x/Kconfig"
source "arch/powerpc/platforms/52xx/Kconfig"
source "arch/powerpc/platforms/powermac/Kconfig"
source "arch/powerpc/platforms/maple/Kconfig"
source "arch/powerpc/platforms/pasemi/Kconfig"
source "arch/powerpc/platforms/ps3/Kconfig"
source "arch/powerpc/platforms/cell/Kconfig"
source "arch/powerpc/platforms/8xx/Kconfig"
source "arch/powerpc/platforms/82xx/Kconfig"
source "arch/powerpc/platforms/83xx/Kconfig"
source "arch/powerpc/platforms/85xx/Kconfig"
source "arch/powerpc/platforms/86xx/Kconfig"
source "arch/powerpc/platforms/embedded6xx/Kconfig"
source "arch/powerpc/platforms/44x/Kconfig"
source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"

config KVM_GUEST
	bool "KVM Guest support"
	default n
	select EPAPR_PARAVIRT
	---help---
	  This option enables various optimizations for running under the KVM
	  hypervisor. Overhead for the kernel when not running inside KVM should
	  be minimal.

	  In case of doubt, say Y

config EPAPR_PARAVIRT
	bool "ePAPR para-virtualization support"
	default n
	help
	  Enables ePAPR para-virtualization support for guests.

	  In case of doubt, say Y

config PPC_NATIVE
	bool
	depends on 6xx || PPC64
	help
	  Support for running natively on the hardware, i.e. without
	  a hypervisor. This option is not user-selectable but should
	  be selected by all platforms that need it.

config PPC_OF_BOOT_TRAMPOLINE
	bool "Support booting from Open Firmware or yaboot"
	depends on 6xx || PPC64
	default y
	help
	  Support from booting from Open Firmware or yaboot using an
	  Open Firmware client interface. This enables the kernel to
	  communicate with open firmware to retrieve system information
	  such as the device tree.

	  In case of doubt, say Y

config PPC_DT_CPU_FTRS
	bool "Device-tree based CPU feature discovery & setup"
	depends on PPC_BOOK3S_64
	default y
	help
	  This enables code to use a new device tree binding for describing CPU
	  compatibility and features. Saying Y here will attempt to use the new
	  binding if the firmware provides it. Currently only the skiboot
	  firmware provides this binding.
	  If you're not sure say Y.

config UDBG_RTAS_CONSOLE
	bool "RTAS based debug console"
	depends on PPC_RTAS
	default n

config PPC_SMP_MUXED_IPI
	bool
	help
	  Select this opton if your platform supports SMP and your
	  interrupt controller provides less than 4 interrupts to each
	  cpu.	This will enable the generic code to multiplex the 4
	  messages on to one ipi.

config IPIC
	bool
	default n

config MPIC
	bool
	default n

config MPIC_TIMER
	bool "MPIC Global Timer"
	depends on MPIC && FSL_SOC
	default n
	help
	  The MPIC global timer is a hardware timer inside the
	  Freescale PIC complying with OpenPIC standard. When the
	  specified interval times out, the hardware timer generates
	  an interrupt. The driver currently is only tested on fsl
	  chip, but it can potentially support other global timers
	  complying with the OpenPIC standard.

config FSL_MPIC_TIMER_WAKEUP
	tristate "Freescale MPIC global timer wakeup driver"
	depends on FSL_SOC &&  MPIC_TIMER && PM
	default n
	help
	  The driver provides a way to wake up the system by MPIC
	  timer.
	  e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"

config PPC_EPAPR_HV_PIC
	bool
	default n
	select EPAPR_PARAVIRT

config MPIC_WEIRD
	bool
	default n

config MPIC_MSGR
	bool "MPIC message register support"
	depends on MPIC
	default n
	help
	  Enables support for the MPIC message registers.  These
	  registers are used for inter-processor communication.

config PPC_I8259
	bool
	default n

config U3_DART
	bool
	depends on PPC64
	default n

config PPC_RTAS
	bool
	default n

config RTAS_ERROR_LOGGING
	bool
	depends on PPC_RTAS
	default n

config PPC_RTAS_DAEMON
	bool
	depends on PPC_RTAS
	default n

config RTAS_PROC
	bool "Proc interface to RTAS"
	depends on PPC_RTAS && PROC_FS
	default y

config RTAS_FLASH
	tristate "Firmware flash interface"
	depends on PPC64 && RTAS_PROC

config MMIO_NVRAM
	bool
	default n

config MPIC_U3_HT_IRQS
	bool
	default n

config MPIC_BROKEN_REGREAD
	bool
	depends on MPIC
	help
	  This option enables a MPIC driver workaround for some chips
	  that have a bug that causes some interrupt source information
	  to not read back properly. It is safe to use on other chips as
	  well, but enabling it uses about 8KB of memory to keep copies
	  of the register contents in software.

config EEH
	bool
	depends on (PPC_POWERNV || PPC_PSERIES) && PCI
	default y

config PPC_MPC106
	bool
	default n

config PPC_970_NAP
	bool
	default n

config PPC_P7_NAP
	bool
	default n

config PPC_INDIRECT_PIO
	bool
	select GENERIC_IOMAP

config PPC_INDIRECT_MMIO
	bool

config PPC_IO_WORKAROUNDS
	bool

source "drivers/cpufreq/Kconfig"

menu "CPUIdle driver"

source "drivers/cpuidle/Kconfig"

endmenu

config PPC601_SYNC_FIX
	bool "Workarounds for PPC601 bugs"
	depends on 6xx && PPC_PMAC
	help
	  Some versions of the PPC601 (the first PowerPC chip) have bugs which
	  mean that extra synchronization instructions are required near
	  certain instructions, typically those that make major changes to the
	  CPU state.  These extra instructions reduce performance slightly.
	  If you say N here, these extra instructions will not be included,
	  resulting in a kernel which will run faster but may not run at all
	  on some systems with the PPC601 chip.

	  If in doubt, say Y here.

config TAU
	bool "On-chip CPU temperature sensor support"
	depends on 6xx
	help
	  G3 and G4 processors have an on-chip temperature sensor called the
	  'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
	  temperature within 2-4 degrees Celsius. This option shows the current
	  on-die temperature in /proc/cpuinfo if the cpu supports it.

	  Unfortunately, on some chip revisions, this sensor is very inaccurate
	  and in many cases, does not work at all, so don't assume the cpu
	  temp is actually what /proc/cpuinfo says it is.

config TAU_INT
	bool "Interrupt driven TAU driver (DANGEROUS)"
	depends on TAU
	---help---
	  The TAU supports an interrupt driven mode which causes an interrupt
	  whenever the temperature goes out of range. This is the fastest way
	  to get notified the temp has exceeded a range. With this option off,
	  a timer is used to re-check the temperature periodically.

	  However, on some cpus it appears that the TAU interrupt hardware
	  is buggy and can cause a situation which would lead unexplained hard
	  lockups.

	  Unless you are extending the TAU driver, or enjoy kernel/hardware
	  debugging, leave this option off.

config TAU_AVERAGE
	bool "Average high and low temp"
	depends on TAU
	---help---
	  The TAU hardware can compare the temperature to an upper and lower
	  bound.  The default behavior is to show both the upper and lower
	  bound in /proc/cpuinfo. If the range is large, the temperature is
	  either changing a lot, or the TAU hardware is broken (likely on some
	  G4's). If the range is small (around 4 degrees), the temperature is
	  relatively stable.  If you say Y here, a single temperature value,
	  halfway between the upper and lower bounds, will be reported in
	  /proc/cpuinfo.

	  If in doubt, say N here.

config QE_GPIO
	bool "QE GPIO support"
	depends on QUICC_ENGINE
	select GPIOLIB
	help
	  Say Y here if you're going to use hardware that connects to the
	  QE GPIOs.

config CPM2
	bool "Enable support for the CPM2 (Communications Processor Module)"
	depends on (FSL_SOC_BOOKE && PPC32) || 8260
	select CPM
	select PPC_PCI_CHOICE
	select GPIOLIB
	help
	  The CPM2 (Communications Processor Module) is a coprocessor on
	  embedded CPUs made by Freescale.  Selecting this option means that
	  you wish to build a kernel for a machine with a CPM2 coprocessor
	  on it (826x, 827x, 8560).

config AXON_RAM
	tristate "Axon DDR2 memory device driver"
	depends on PPC_IBM_CELL_BLADE && BLOCK
	select DAX
	default m
	help
	  It registers one block device per Axon's DDR2 memory bank found
	  on a system. Block devices are called axonram?, their major and
	  minor numbers are available in /proc/devices, /proc/partitions or
	  in /sys/block/axonram?/dev.

config FSL_ULI1575
	bool
	default n
	select GENERIC_ISA_DMA
	help
	  Supports for the ULI1575 PCIe south bridge that exists on some
	  Freescale reference boards. The boards all use the ULI in pretty
	  much the same way.

config CPM
	bool
	select GENERIC_ALLOCATOR

config OF_RTC
	bool
	help
	  Uses information from the OF or flattened device tree to instantiate
	  platform devices for direct mapped RTC chips like the DS1742 or DS1743.

config GEN_RTC
	bool "Use the platform RTC operations from user space"
	select RTC_CLASS
	select RTC_DRV_GENERIC
	help
	  This option provides backwards compatibility with the old gen_rtc.ko
	  module that was traditionally used for old PowerPC machines.
	  Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
	  replacing their get_rtc_time/set_rtc_time callbacks with
	  a proper RTC device driver.

config SIMPLE_GPIO
	bool "Support for simple, memory-mapped GPIO controllers"
	depends on PPC
	select GPIOLIB
	help
	  Say Y here to support simple, memory-mapped GPIO controllers.
	  These are usually BCSRs used to control board's switches, LEDs,
	  chip-selects, Ethernet/USB PHY's power and various other small
	  on-board peripherals.

config MCU_MPC8349EMITX
	bool "MPC8349E-mITX MCU driver"
	depends on I2C=y && PPC_83xx
	select GPIOLIB
	help
	  Say Y here to enable soft power-off functionality on the Freescale
	  boards with the MPC8349E-mITX-compatible MCU chips. This driver will
	  also register MCU GPIOs with the generic GPIO API, so you'll able
	  to use MCU pins as GPIOs.

config XILINX_PCI
	bool "Xilinx PCI host bridge support"
	depends on PCI && XILINX_VIRTEX

endmenu
Commit	Line	Data
4330f5da	1	menu "Platform support"
4330f5da	2
55190f88	3	source "arch/powerpc/platforms/powernv/Kconfig"
4330f5da	4	source "arch/powerpc/platforms/pseries/Kconfig"
4330f5da	5	source "arch/powerpc/platforms/chrp/Kconfig"
e177edcd	6	source "arch/powerpc/platforms/512x/Kconfig"
4330f5da KG	7	source "arch/powerpc/platforms/52xx/Kconfig"
4330f5da KG	8	source "arch/powerpc/platforms/powermac/Kconfig"
4330f5da KG	9	source "arch/powerpc/platforms/maple/Kconfig"
4330f5da KG	10	source "arch/powerpc/platforms/pasemi/Kconfig"
98750261 KG	11	source "arch/powerpc/platforms/ps3/Kconfig"
98750261 KG	12	source "arch/powerpc/platforms/cell/Kconfig"
c8a55f3d	13	source "arch/powerpc/platforms/8xx/Kconfig"
d6071f88	14	source "arch/powerpc/platforms/82xx/Kconfig"
b5a48346	15	source "arch/powerpc/platforms/83xx/Kconfig"
db947808	16	source "arch/powerpc/platforms/85xx/Kconfig"
4a89f7fa	17	source "arch/powerpc/platforms/86xx/Kconfig"
98750261	18	source "arch/powerpc/platforms/embedded6xx/Kconfig"
f6dfc805	19	source "arch/powerpc/platforms/44x/Kconfig"
545c069c	20	source "arch/powerpc/platforms/40x/Kconfig"
54b318aa	21	source "arch/powerpc/platforms/amigaone/Kconfig"
4330f5da	22
d17051cb AG	23	config KVM_GUEST
d17051cb AG	24	bool "KVM Guest support"
643ba4e3	25	default n
2e1ae9c0	26	select EPAPR_PARAVIRT
d17051cb AG	27	---help---
	28	This option enables various optimizations for running under the KVM
	29	hypervisor. Overhead for the kernel when not running inside KVM should
	30	be minimal.
	31
	32	In case of doubt, say Y
	33
2e1ae9c0 LYB	34	config EPAPR_PARAVIRT
	35	bool "ePAPR para-virtualization support"
	36	default n
	37	help
	38	Enables ePAPR para-virtualization support for guests.
	39
	40	In case of doubt, say Y
	41
4330f5da KG	42	config PPC_NATIVE
4330f5da KG	43	bool
28794d34	44	depends on 6xx \|\| PPC64
4330f5da KG	45	help
	46	Support for running natively on the hardware, i.e. without
	47	a hypervisor. This option is not user-selectable but should
	48	be selected by all platforms that need it.
	49
28794d34 BH	50	config PPC_OF_BOOT_TRAMPOLINE
	51	bool "Support booting from Open Firmware or yaboot"
	52	depends on 6xx \|\| PPC64
	53	default y
	54	help
	55	Support from booting from Open Firmware or yaboot using an
	56	Open Firmware client interface. This enables the kernel to
f65e51d7	57	communicate with open firmware to retrieve system information
28794d34 BH	58	such as the device tree.
	59
	60	In case of doubt, say Y
	61
c6ee9619 ME	62	config PPC_DT_CPU_FTRS
	63	bool "Device-tree based CPU feature discovery & setup"
	64	depends on PPC_BOOK3S_64
	65	default y
	66	help
	67	This enables code to use a new device tree binding for describing CPU
	68	compatibility and features. Saying Y here will attempt to use the new
	69	binding if the firmware provides it. Currently only the skiboot
	70	firmware provides this binding.
	71	If you're not sure say Y.
	72
4330f5da KG	73	config UDBG_RTAS_CONSOLE
	74	bool "RTAS based debug console"
	75	depends on PPC_RTAS
	76	default n
	77
1ece355b MM	78	config PPC_SMP_MUXED_IPI
	79	bool
	80	help
	81	Select this opton if your platform supports SMP and your
	82	interrupt controller provides less than 4 interrupts to each
	83	cpu. This will enable the generic code to multiplex the 4
	84	messages on to one ipi.
	85
b0bbad60 JR	86	config IPIC
	87	bool
	88	default n
	89
98750261 KG	90	config MPIC
	91	bool
	92	default n
	93
36ca09be D	94	config MPIC_TIMER
	95	bool "MPIC Global Timer"
	96	depends on MPIC && FSL_SOC
	97	default n
	98	help
	99	The MPIC global timer is a hardware timer inside the
	100	Freescale PIC complying with OpenPIC standard. When the
	101	specified interval times out, the hardware timer generates
	102	an interrupt. The driver currently is only tested on fsl
	103	chip, but it can potentially support other global timers
	104	complying with the OpenPIC standard.
	105
a63b3bc7 D	106	config FSL_MPIC_TIMER_WAKEUP
	107	tristate "Freescale MPIC global timer wakeup driver"
	108	depends on FSL_SOC && MPIC_TIMER && PM
	109	default n
	110	help
	111	The driver provides a way to wake up the system by MPIC
	112	timer.
	113	e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
	114
3a93261f AK	115	config PPC_EPAPR_HV_PIC
	116	bool
	117	default n
40656397	118	select EPAPR_PARAVIRT
3a93261f	119
98750261 KG	120	config MPIC_WEIRD
	121	bool
	122	default n
	123
8626816e JH	124	config MPIC_MSGR
	125	bool "MPIC message register support"
	126	depends on MPIC
	127	default n
	128	help
	129	Enables support for the MPIC message registers. These
	130	registers are used for inter-processor communication.
	131
98750261 KG	132	config PPC_I8259
	133	bool
	134	default n
	135
4330f5da KG	136	config U3_DART
4330f5da KG	137	bool
28794d34	138	depends on PPC64
4330f5da KG	139	default n
	140
	141	config PPC_RTAS
	142	bool
	143	default n
	144
	145	config RTAS_ERROR_LOGGING
	146	bool
	147	depends on PPC_RTAS
	148	default n
	149
3d541c4b BH	150	config PPC_RTAS_DAEMON
	151	bool
	152	depends on PPC_RTAS
	153	default n
	154
4330f5da KG	155	config RTAS_PROC
4330f5da KG	156	bool "Proc interface to RTAS"
b80ec3dc	157	depends on PPC_RTAS && PROC_FS
4330f5da KG	158	default y
	159
	160	config RTAS_FLASH
	161	tristate "Firmware flash interface"
	162	depends on PPC64 && RTAS_PROC
	163
4330f5da KG	164	config MMIO_NVRAM
	165	bool
	166	default n
	167
6cfef5b2	168	config MPIC_U3_HT_IRQS
4330f5da	169	bool
314b389b	170	default n
4330f5da	171
0d72ba93 OJ	172	config MPIC_BROKEN_REGREAD
	173	bool
	174	depends on MPIC
	175	help
	176	This option enables a MPIC driver workaround for some chips
	177	that have a bug that causes some interrupt source information
	178	to not read back properly. It is safe to use on other chips as
	179	well, but enabling it uses about 8KB of memory to keep copies
	180	of the register contents in software.
	181
317f06de GS	182	config EEH
	183	bool
	184	depends on (PPC_POWERNV \|\| PPC_PSERIES) && PCI
	185	default y
	186
4330f5da KG	187	config PPC_MPC106
	188	bool
	189	default n
	190
	191	config PPC_970_NAP
	192	bool
	193	default n
	194
948cf67c BH	195	config PPC_P7_NAP
	196	bool
	197	default n
	198
21176fed ME	199	config PPC_INDIRECT_PIO
21176fed ME	200	bool
ecd73cc5	201	select GENERIC_IOMAP
21176fed ME	202
	203	config PPC_INDIRECT_MMIO
	204	bool
4330f5da	205
3cc30d07 ME	206	config PPC_IO_WORKAROUNDS
	207	bool
	208
4330f5da KG	209	source "drivers/cpufreq/Kconfig"
4330f5da KG	210
e179816c DD	211	menu "CPUIdle driver"
	212
	213	source "drivers/cpuidle/Kconfig"
	214
	215	endmenu
	216
4330f5da KG	217	config PPC601_SYNC_FIX
4330f5da KG	218	bool "Workarounds for PPC601 bugs"
933ee711	219	depends on 6xx && PPC_PMAC
4330f5da KG	220	help
	221	Some versions of the PPC601 (the first PowerPC chip) have bugs which
	222	mean that extra synchronization instructions are required near
	223	certain instructions, typically those that make major changes to the
	224	CPU state. These extra instructions reduce performance slightly.
	225	If you say N here, these extra instructions will not be included,
	226	resulting in a kernel which will run faster but may not run at all
	227	on some systems with the PPC601 chip.
	228
	229	If in doubt, say Y here.
	230
	231	config TAU
	232	bool "On-chip CPU temperature sensor support"
28794d34	233	depends on 6xx
4330f5da KG	234	help
	235	G3 and G4 processors have an on-chip temperature sensor called the
	236	'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
	237	temperature within 2-4 degrees Celsius. This option shows the current
	238	on-die temperature in /proc/cpuinfo if the cpu supports it.
	239
	240	Unfortunately, on some chip revisions, this sensor is very inaccurate
	241	and in many cases, does not work at all, so don't assume the cpu
	242	temp is actually what /proc/cpuinfo says it is.
	243
	244	config TAU_INT
	245	bool "Interrupt driven TAU driver (DANGEROUS)"
	246	depends on TAU
	247	---help---
	248	The TAU supports an interrupt driven mode which causes an interrupt
	249	whenever the temperature goes out of range. This is the fastest way
	250	to get notified the temp has exceeded a range. With this option off,
	251	a timer is used to re-check the temperature periodically.
	252
	253	However, on some cpus it appears that the TAU interrupt hardware
	254	is buggy and can cause a situation which would lead unexplained hard
	255	lockups.
	256
	257	Unless you are extending the TAU driver, or enjoy kernel/hardware
	258	debugging, leave this option off.
	259
	260	config TAU_AVERAGE
	261	bool "Average high and low temp"
	262	depends on TAU
	263	---help---
	264	The TAU hardware can compare the temperature to an upper and lower
	265	bound. The default behavior is to show both the upper and lower
	266	bound in /proc/cpuinfo. If the range is large, the temperature is
	267	either changing a lot, or the TAU hardware is broken (likely on some
	268	G4's). If the range is small (around 4 degrees), the temperature is
	269	relatively stable. If you say Y here, a single temperature value,
	270	halfway between the upper and lower bounds, will be reported in
	271	/proc/cpuinfo.
	272
	273	If in doubt, say N here.
	274
5c091193 AV	275	config QE_GPIO
	276	bool "QE GPIO support"
	277	depends on QUICC_ENGINE
86c55af4	278	select GPIOLIB
5c091193 AV	279	help
	280	Say Y here if you're going to use hardware that connects to the
	281	QE GPIOs.
	282
d6071f88	283	config CPM2
b8b3caf3	284	bool "Enable support for the CPM2 (Communications Processor Module)"
5753c082	285	depends on (FSL_SOC_BOOKE && PPC32) \|\| 8260
c374e00e	286	select CPM
b500563b	287	select PPC_PCI_CHOICE
86c55af4	288	select GPIOLIB
d6071f88 KG	289	help
	290	The CPM2 (Communications Processor Module) is a coprocessor on
	291	embedded CPUs made by Freescale. Selecting this option means that
	292	you wish to build a kernel for a machine with a CPM2 coprocessor
	293	on it (826x, 827x, 8560).
	294
dbdf04c4 MS	295	config AXON_RAM
dbdf04c4 MS	296	tristate "Axon DDR2 memory device driver"
ebf0f334	297	depends on PPC_IBM_CELL_BLADE && BLOCK
60fcd55c	298	select DAX
dbdf04c4 MS	299	default m
	300	help
	301	It registers one block device per Axon's DDR2 memory bank found
	302	on a system. Block devices are called axonram?, their major and
	303	minor numbers are available in /proc/devices, /proc/partitions or
	304	in /sys/block/axonram?/dev.
	305
b66510cb KG	306	config FSL_ULI1575
	307	bool
	308	default n
fb4f0e88	309	select GENERIC_ISA_DMA
b66510cb KG	310	help
	311	Supports for the ULI1575 PCIe south bridge that exists on some
	312	Freescale reference boards. The boards all use the ULI in pretty
	313	much the same way.
	314
c374e00e SW	315	config CPM
c374e00e SW	316	bool
0e6e01ff	317	select GENERIC_ALLOCATOR
c374e00e	318
22258fa4 DG	319	config OF_RTC
	320	bool
	321	help
692105b8	322	Uses information from the OF or flattened device tree to instantiate
22258fa4 DG	323	platform devices for direct mapped RTC chips like the DS1742 or DS1743.
22258fa4 DG	324
835ea93e AB	325	config GEN_RTC
	326	bool "Use the platform RTC operations from user space"
	327	select RTC_CLASS
	328	select RTC_DRV_GENERIC
	329	help
	330	This option provides backwards compatibility with the old gen_rtc.ko
	331	module that was traditionally used for old PowerPC machines.
	332	Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
	333	replacing their get_rtc_time/set_rtc_time callbacks with
	334	a proper RTC device driver.
	335
3d64de9c AV	336	config SIMPLE_GPIO
	337	bool "Support for simple, memory-mapped GPIO controllers"
	338	depends on PPC
86c55af4	339	select GPIOLIB
3d64de9c AV	340	help
	341	Say Y here to support simple, memory-mapped GPIO controllers.
	342	These are usually BCSRs used to control board's switches, LEDs,
	343	chip-selects, Ethernet/USB PHY's power and various other small
	344	on-board peripherals.
	345
ea0105ea	346	config MCU_MPC8349EMITX
6ca6ca5d	347	bool "MPC8349E-mITX MCU driver"
82640a6b	348	depends on I2C=y && PPC_83xx
86c55af4	349	select GPIOLIB
ea0105ea AV	350	help
	351	Say Y here to enable soft power-off functionality on the Freescale
	352	boards with the MPC8349E-mITX-compatible MCU chips. This driver will
	353	also register MCU GPIOs with the generic GPIO API, so you'll able
	354	to use MCU pins as GPIOs.
	355
64f16502 RC	356	config XILINX_PCI
	357	bool "Xilinx PCI host bridge support"
	358	depends on PCI && XILINX_VIRTEX
	359
4330f5da	360	endmenu