[mirror_ubuntu-artful-kernel.git] / arch / powerpc / platforms / cell / cbe_cpufreq.c

/*
 * cpufreq driver for the cell processor
 *
 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
 *
 * Author: Christian Krafft <krafft@de.ibm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/cpufreq.h>
#include <linux/timer.h>

#include <asm/hw_irq.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/processor.h>
#include <asm/prom.h>
#include <asm/time.h>
#include <asm/pmi.h>
#include <asm/of_platform.h>

#include "cbe_regs.h"

static DEFINE_MUTEX(cbe_switch_mutex);


/* the CBE supports an 8 step frequency scaling */
static struct cpufreq_frequency_table cbe_freqs[] = {
	{1,	0},
	{2,	0},
	{3,	0},
	{4,	0},
	{5,	0},
	{6,	0},
	{8,	0},
	{10,	0},
	{0,	CPUFREQ_TABLE_END},
};

/* to write to MIC register */
static u64 MIC_Slow_Fast_Timer_table[] = {
	[0 ... 7] = 0x007fc00000000000ull,
};

/* more values for the MIC */
static u64 MIC_Slow_Next_Timer_table[] = {
	0x0000240000000000ull,
	0x0000268000000000ull,
	0x000029C000000000ull,
	0x00002D0000000000ull,
	0x0000300000000000ull,
	0x0000334000000000ull,
	0x000039C000000000ull,
	0x00003FC000000000ull,
};

/*
 * hardware specific functions
 */

static struct of_device *pmi_dev;

static int set_pmode_pmi(int cpu, unsigned int pmode)
{
	int ret;
	pmi_message_t pmi_msg;
#ifdef DEBUG
	u64 time;
#endif

	pmi_msg.type = PMI_TYPE_FREQ_CHANGE;
	pmi_msg.data1 =	cbe_cpu_to_node(cpu);
	pmi_msg.data2 = pmode;

#ifdef DEBUG
	time = (u64) get_cycles();
#endif

	pmi_send_message(pmi_dev, pmi_msg);
	ret = pmi_msg.data2;

	pr_debug("PMI returned slow mode %d\n", ret);

#ifdef DEBUG
	time = (u64) get_cycles() - time; /* actual cycles (not cpu cycles!) */
	time = 1000000000 * time / CLOCK_TICK_RATE; /* time in ns (10^-9) */
	pr_debug("had to wait %lu ns for a transition\n", time);
#endif
	return ret;
}


static int get_pmode(int cpu)
{
	int ret;
	struct cbe_pmd_regs __iomem *pmd_regs;

	pmd_regs = cbe_get_cpu_pmd_regs(cpu);
	ret = in_be64(&pmd_regs->pmsr) & 0x07;

	return ret;
}

static int set_pmode_reg(int cpu, unsigned int pmode)
{
	struct cbe_pmd_regs __iomem *pmd_regs;
	struct cbe_mic_tm_regs __iomem *mic_tm_regs;
	u64 flags;
	u64 value;

	local_irq_save(flags);

	mic_tm_regs = cbe_get_cpu_mic_tm_regs(cpu);
	pmd_regs = cbe_get_cpu_pmd_regs(cpu);

	pr_debug("pm register is mapped at %p\n", &pmd_regs->pmcr);
	pr_debug("mic register is mapped at %p\n", &mic_tm_regs->slow_fast_timer_0);

	out_be64(&mic_tm_regs->slow_fast_timer_0, MIC_Slow_Fast_Timer_table[pmode]);
	out_be64(&mic_tm_regs->slow_fast_timer_1, MIC_Slow_Fast_Timer_table[pmode]);

	out_be64(&mic_tm_regs->slow_next_timer_0, MIC_Slow_Next_Timer_table[pmode]);
	out_be64(&mic_tm_regs->slow_next_timer_1, MIC_Slow_Next_Timer_table[pmode]);

	value = in_be64(&pmd_regs->pmcr);
	/* set bits to zero */
	value &= 0xFFFFFFFFFFFFFFF8ull;
	/* set bits to next pmode */
	value |= pmode;

	out_be64(&pmd_regs->pmcr, value);

	/* wait until new pmode appears in status register */
	value = in_be64(&pmd_regs->pmsr) & 0x07;
	while(value != pmode) {
		cpu_relax();
		value = in_be64(&pmd_regs->pmsr) & 0x07;
	}

	local_irq_restore(flags);

	return 0;
}

static int set_pmode(int cpu, unsigned int slow_mode) {
	if (pmi_dev)
		return set_pmode_pmi(cpu, slow_mode);
	else
		return set_pmode_reg(cpu, slow_mode);
}

static void cbe_cpufreq_handle_pmi(struct of_device *dev, pmi_message_t pmi_msg)
{
	struct cpufreq_policy policy;
	u8 cpu;
	u8 cbe_pmode_new;

	BUG_ON(pmi_msg.type != PMI_TYPE_FREQ_CHANGE);

	cpu = cbe_node_to_cpu(pmi_msg.data1);
	cbe_pmode_new = pmi_msg.data2;

	cpufreq_get_policy(&policy, cpu);

	policy.max = min(policy.max, cbe_freqs[cbe_pmode_new].frequency);
	policy.min = min(policy.min, policy.max);

	pr_debug("cbe_handle_pmi: new policy.min=%d policy.max=%d\n", policy.min, policy.max);
	cpufreq_set_policy(&policy);
}

static struct pmi_handler cbe_pmi_handler = {
	.type			= PMI_TYPE_FREQ_CHANGE,
	.handle_pmi_message	= cbe_cpufreq_handle_pmi,
};


/*
 * cpufreq functions
 */

static int cbe_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
	const u32 *max_freqp;
	u32 max_freq;
	int i, cur_pmode;
	struct device_node *cpu;

	cpu = of_get_cpu_node(policy->cpu, NULL);

	if (!cpu)
		return -ENODEV;

	pr_debug("init cpufreq on CPU %d\n", policy->cpu);

	max_freqp = of_get_property(cpu, "clock-frequency", NULL);

	if (!max_freqp)
		return -EINVAL;

	/* we need the freq in kHz */
	max_freq = *max_freqp / 1000;

	pr_debug("max clock-frequency is at %u kHz\n", max_freq);
	pr_debug("initializing frequency table\n");

	/* initialize frequency table */
	for (i=0; cbe_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
		cbe_freqs[i].frequency = max_freq / cbe_freqs[i].index;
		pr_debug("%d: %d\n", i, cbe_freqs[i].frequency);
	}

	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
	/* if DEBUG is enabled set_pmode() measures the correct latency of a transition */
	policy->cpuinfo.transition_latency = 25000;

	cur_pmode = get_pmode(policy->cpu);
	pr_debug("current pmode is at %d\n",cur_pmode);

	policy->cur = cbe_freqs[cur_pmode].frequency;

#ifdef CONFIG_SMP
	policy->cpus = cpu_sibling_map[policy->cpu];
#endif

	cpufreq_frequency_table_get_attr(cbe_freqs, policy->cpu);

	/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max are set correctly */
	return cpufreq_frequency_table_cpuinfo(policy, cbe_freqs);
}

static int cbe_cpufreq_cpu_exit(struct cpufreq_policy *policy)
{
	cpufreq_frequency_table_put_attr(policy->cpu);
	return 0;
}

static int cbe_cpufreq_verify(struct cpufreq_policy *policy)
{
	return cpufreq_frequency_table_verify(policy, cbe_freqs);
}


static int cbe_cpufreq_target(struct cpufreq_policy *policy, unsigned int target_freq,
			    unsigned int relation)
{
	int rc;
	struct cpufreq_freqs freqs;
	int cbe_pmode_new;

	cpufreq_frequency_table_target(policy,
				       cbe_freqs,
				       target_freq,
				       relation,
				       &cbe_pmode_new);

	freqs.old = policy->cur;
	freqs.new = cbe_freqs[cbe_pmode_new].frequency;
	freqs.cpu = policy->cpu;

	mutex_lock(&cbe_switch_mutex);
	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
		 policy->cpu,
		 cbe_freqs[cbe_pmode_new].frequency,
		 cbe_freqs[cbe_pmode_new].index);

	rc = set_pmode(policy->cpu, cbe_pmode_new);
	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	mutex_unlock(&cbe_switch_mutex);

	return rc;
}

static struct cpufreq_driver cbe_cpufreq_driver = {
	.verify		= cbe_cpufreq_verify,
	.target		= cbe_cpufreq_target,
	.init		= cbe_cpufreq_cpu_init,
	.exit		= cbe_cpufreq_cpu_exit,
	.name		= "cbe-cpufreq",
	.owner		= THIS_MODULE,
	.flags		= CPUFREQ_CONST_LOOPS,
};

/*
 * module init and destoy
 */

static int __init cbe_cpufreq_init(void)
{
	struct device_node *np;

	if (!machine_is(cell))
		return -ENODEV;

	np = of_find_node_by_type(NULL, "ibm,pmi");

	pmi_dev = of_find_device_by_node(np);

	if (pmi_dev)
		pmi_register_handler(pmi_dev, &cbe_pmi_handler);

	return cpufreq_register_driver(&cbe_cpufreq_driver);
}

static void __exit cbe_cpufreq_exit(void)
{
	if (pmi_dev)
		pmi_unregister_handler(pmi_dev, &cbe_pmi_handler);

	cpufreq_unregister_driver(&cbe_cpufreq_driver);
}

module_init(cbe_cpufreq_init);
module_exit(cbe_cpufreq_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");
Commit	Line	Data
36ca4ba4 CK	1	/*
	2	* cpufreq driver for the cell processor
	3	*
	4	* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
	5	*
	6	* Author: Christian Krafft <krafft@de.ibm.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2, or (at your option)
	11	* any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21	*/
	22
	23	#include <linux/cpufreq.h>
	24	#include <linux/timer.h>
	25
	26	#include <asm/hw_irq.h>
	27	#include <asm/io.h>
4bd4aa19	28	#include <asm/machdep.h>
36ca4ba4 CK	29	#include <asm/processor.h>
	30	#include <asm/prom.h>
	31	#include <asm/time.h>
5050063c CK	32	#include <asm/pmi.h>
5050063c CK	33	#include <asm/of_platform.h>
36ca4ba4 CK	34
	35	#include "cbe_regs.h"
	36
	37	static DEFINE_MUTEX(cbe_switch_mutex);
	38
	39
	40	/* the CBE supports an 8 step frequency scaling */
	41	static struct cpufreq_frequency_table cbe_freqs[] = {
	42	{1, 0},
	43	{2, 0},
	44	{3, 0},
	45	{4, 0},
	46	{5, 0},
	47	{6, 0},
	48	{8, 0},
	49	{10, 0},
	50	{0, CPUFREQ_TABLE_END},
	51	};
	52
	53	/* to write to MIC register */
	54	static u64 MIC_Slow_Fast_Timer_table[] = {
	55	[0 ... 7] = 0x007fc00000000000ull,
	56	};
	57
	58	/* more values for the MIC */
	59	static u64 MIC_Slow_Next_Timer_table[] = {
	60	0x0000240000000000ull,
	61	0x0000268000000000ull,
	62	0x000029C000000000ull,
	63	0x00002D0000000000ull,
	64	0x0000300000000000ull,
	65	0x0000334000000000ull,
	66	0x000039C000000000ull,
	67	0x00003FC000000000ull,
	68	};
	69
	70	/*
	71	* hardware specific functions
	72	*/
	73
5050063c CK	74	static struct of_device *pmi_dev;
	75
	76	static int set_pmode_pmi(int cpu, unsigned int pmode)
	77	{
	78	int ret;
	79	pmi_message_t pmi_msg;
	80	#ifdef DEBUG
	81	u64 time;
	82	#endif
	83
	84	pmi_msg.type = PMI_TYPE_FREQ_CHANGE;
	85	pmi_msg.data1 = cbe_cpu_to_node(cpu);
	86	pmi_msg.data2 = pmode;
	87
	88	#ifdef DEBUG
	89	time = (u64) get_cycles();
	90	#endif
	91
	92	pmi_send_message(pmi_dev, pmi_msg);
	93	ret = pmi_msg.data2;
	94
	95	pr_debug("PMI returned slow mode %d\n", ret);
	96
	97	#ifdef DEBUG
	98	time = (u64) get_cycles() - time; /* actual cycles (not cpu cycles!) */
	99	time = 1000000000 * time / CLOCK_TICK_RATE; /* time in ns (10^-9) */
	100	pr_debug("had to wait %lu ns for a transition\n", time);
	101	#endif
	102	return ret;
	103	}
	104
	105
36ca4ba4 CK	106	static int get_pmode(int cpu)
	107	{
	108	int ret;
	109	struct cbe_pmd_regs __iomem *pmd_regs;
	110
	111	pmd_regs = cbe_get_cpu_pmd_regs(cpu);
	112	ret = in_be64(&pmd_regs->pmsr) & 0x07;
	113
	114	return ret;
	115	}
	116
5050063c	117	static int set_pmode_reg(int cpu, unsigned int pmode)
36ca4ba4 CK	118	{
	119	struct cbe_pmd_regs __iomem *pmd_regs;
	120	struct cbe_mic_tm_regs __iomem *mic_tm_regs;
	121	u64 flags;
	122	u64 value;
	123
	124	local_irq_save(flags);
	125
	126	mic_tm_regs = cbe_get_cpu_mic_tm_regs(cpu);
	127	pmd_regs = cbe_get_cpu_pmd_regs(cpu);
	128
	129	pr_debug("pm register is mapped at %p\n", &pmd_regs->pmcr);
	130	pr_debug("mic register is mapped at %p\n", &mic_tm_regs->slow_fast_timer_0);
	131
	132	out_be64(&mic_tm_regs->slow_fast_timer_0, MIC_Slow_Fast_Timer_table[pmode]);
	133	out_be64(&mic_tm_regs->slow_fast_timer_1, MIC_Slow_Fast_Timer_table[pmode]);
	134
	135	out_be64(&mic_tm_regs->slow_next_timer_0, MIC_Slow_Next_Timer_table[pmode]);
	136	out_be64(&mic_tm_regs->slow_next_timer_1, MIC_Slow_Next_Timer_table[pmode]);
	137
	138	value = in_be64(&pmd_regs->pmcr);
	139	/* set bits to zero */
	140	value &= 0xFFFFFFFFFFFFFFF8ull;
	141	/* set bits to next pmode */
	142	value \|= pmode;
	143
	144	out_be64(&pmd_regs->pmcr, value);
	145
	146	/* wait until new pmode appears in status register */
	147	value = in_be64(&pmd_regs->pmsr) & 0x07;
	148	while(value != pmode) {
	149	cpu_relax();
	150	value = in_be64(&pmd_regs->pmsr) & 0x07;
	151	}
	152
	153	local_irq_restore(flags);
	154
	155	return 0;
	156	}
	157
5050063c	158	static int set_pmode(int cpu, unsigned int slow_mode) {
4bd4aa19	159	if (pmi_dev)
5050063c CK	160	return set_pmode_pmi(cpu, slow_mode);
	161	else
	162	return set_pmode_reg(cpu, slow_mode);
	163	}
	164
	165	static void cbe_cpufreq_handle_pmi(struct of_device *dev, pmi_message_t pmi_msg)
	166	{
	167	struct cpufreq_policy policy;
	168	u8 cpu;
	169	u8 cbe_pmode_new;
	170
4bd4aa19	171	BUG_ON(pmi_msg.type != PMI_TYPE_FREQ_CHANGE);
5050063c CK	172
	173	cpu = cbe_node_to_cpu(pmi_msg.data1);
	174	cbe_pmode_new = pmi_msg.data2;
	175
	176	cpufreq_get_policy(&policy, cpu);
	177
	178	policy.max = min(policy.max, cbe_freqs[cbe_pmode_new].frequency);
	179	policy.min = min(policy.min, policy.max);
	180
	181	pr_debug("cbe_handle_pmi: new policy.min=%d policy.max=%d\n", policy.min, policy.max);
	182	cpufreq_set_policy(&policy);
	183	}
	184
	185	static struct pmi_handler cbe_pmi_handler = {
	186	.type = PMI_TYPE_FREQ_CHANGE,
	187	.handle_pmi_message = cbe_cpufreq_handle_pmi,
	188	};
	189
	190
36ca4ba4 CK	191	/*
	192	* cpufreq functions
	193	*/
	194
4bd4aa19	195	static int cbe_cpufreq_cpu_init(struct cpufreq_policy *policy)
36ca4ba4	196	{
9c1a2bae SR	197	const u32 *max_freqp;
9c1a2bae SR	198	u32 max_freq;
36ca4ba4 CK	199	int i, cur_pmode;
	200	struct device_node *cpu;
	201
	202	cpu = of_get_cpu_node(policy->cpu, NULL);
	203
4bd4aa19	204	if (!cpu)
36ca4ba4 CK	205	return -ENODEV;
	206
	207	pr_debug("init cpufreq on CPU %d\n", policy->cpu);
	208
9c1a2bae	209	max_freqp = of_get_property(cpu, "clock-frequency", NULL);
36ca4ba4	210
9c1a2bae	211	if (!max_freqp)
36ca4ba4 CK	212	return -EINVAL;
36ca4ba4 CK	213
4bd4aa19	214	/* we need the freq in kHz */
9c1a2bae	215	max_freq = *max_freqp / 1000;
36ca4ba4	216
9c1a2bae	217	pr_debug("max clock-frequency is at %u kHz\n", max_freq);
36ca4ba4 CK	218	pr_debug("initializing frequency table\n");
36ca4ba4 CK	219
4bd4aa19	220	/* initialize frequency table */
36ca4ba4	221	for (i=0; cbe_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
9c1a2bae	222	cbe_freqs[i].frequency = max_freq / cbe_freqs[i].index;
36ca4ba4 CK	223	pr_debug("%d: %d\n", i, cbe_freqs[i].frequency);
	224	}
	225
	226	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
	227	/* if DEBUG is enabled set_pmode() measures the correct latency of a transition */
	228	policy->cpuinfo.transition_latency = 25000;
	229
	230	cur_pmode = get_pmode(policy->cpu);
	231	pr_debug("current pmode is at %d\n",cur_pmode);
	232
	233	policy->cur = cbe_freqs[cur_pmode].frequency;
	234
	235	#ifdef CONFIG_SMP
	236	policy->cpus = cpu_sibling_map[policy->cpu];
	237	#endif
	238
4bd4aa19	239	cpufreq_frequency_table_get_attr(cbe_freqs, policy->cpu);
36ca4ba4 CK	240
36ca4ba4 CK	241	/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max are set correctly */
4bd4aa19	242	return cpufreq_frequency_table_cpuinfo(policy, cbe_freqs);
36ca4ba4 CK	243	}
	244
	245	static int cbe_cpufreq_cpu_exit(struct cpufreq_policy *policy)
	246	{
	247	cpufreq_frequency_table_put_attr(policy->cpu);
	248	return 0;
	249	}
	250
	251	static int cbe_cpufreq_verify(struct cpufreq_policy *policy)
	252	{
	253	return cpufreq_frequency_table_verify(policy, cbe_freqs);
	254	}
	255
	256
	257	static int cbe_cpufreq_target(struct cpufreq_policy *policy, unsigned int target_freq,
	258	unsigned int relation)
	259	{
	260	int rc;
	261	struct cpufreq_freqs freqs;
	262	int cbe_pmode_new;
	263
	264	cpufreq_frequency_table_target(policy,
	265	cbe_freqs,
	266	target_freq,
	267	relation,
	268	&cbe_pmode_new);
	269
	270	freqs.old = policy->cur;
	271	freqs.new = cbe_freqs[cbe_pmode_new].frequency;
	272	freqs.cpu = policy->cpu;
	273
4bd4aa19	274	mutex_lock(&cbe_switch_mutex);
36ca4ba4 CK	275	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	276
	277	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
	278	policy->cpu,
	279	cbe_freqs[cbe_pmode_new].frequency,
	280	cbe_freqs[cbe_pmode_new].index);
	281
	282	rc = set_pmode(policy->cpu, cbe_pmode_new);
	283	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	284	mutex_unlock(&cbe_switch_mutex);
	285
	286	return rc;
	287	}
	288
	289	static struct cpufreq_driver cbe_cpufreq_driver = {
	290	.verify = cbe_cpufreq_verify,
	291	.target = cbe_cpufreq_target,
	292	.init = cbe_cpufreq_cpu_init,
	293	.exit = cbe_cpufreq_cpu_exit,
	294	.name = "cbe-cpufreq",
	295	.owner = THIS_MODULE,
	296	.flags = CPUFREQ_CONST_LOOPS,
	297	};
	298
	299	/*
	300	* module init and destoy
	301	*/
	302
	303	static int __init cbe_cpufreq_init(void)
	304	{
5050063c CK	305	struct device_node *np;
5050063c CK	306
4bd4aa19 OJ	307	if (!machine_is(cell))
	308	return -ENODEV;
	309
5050063c CK	310	np = of_find_node_by_type(NULL, "ibm,pmi");
	311
	312	pmi_dev = of_find_device_by_node(np);
	313
	314	if (pmi_dev)
	315	pmi_register_handler(pmi_dev, &cbe_pmi_handler);
	316
36ca4ba4 CK	317	return cpufreq_register_driver(&cbe_cpufreq_driver);
	318	}
	319
	320	static void __exit cbe_cpufreq_exit(void)
	321	{
4bd4aa19	322	if (pmi_dev)
5050063c CK	323	pmi_unregister_handler(pmi_dev, &cbe_pmi_handler);
5050063c CK	324
36ca4ba4 CK	325	cpufreq_unregister_driver(&cbe_cpufreq_driver);
	326	}
	327
	328	module_init(cbe_cpufreq_init);
	329	module_exit(cbe_cpufreq_exit);
	330
	331	MODULE_LICENSE("GPL");
	332	MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");