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CommitLineData
67207b96
AB
1/*
2 * Low-level SPU handling
3 *
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5 *
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
3b3d22cb 23#undef DEBUG
67207b96
AB
24
25#include <linux/interrupt.h>
26#include <linux/list.h>
27#include <linux/module.h>
67207b96
AB
28#include <linux/ptrace.h>
29#include <linux/slab.h>
30#include <linux/wait.h>
e28b0031
GL
31#include <linux/mm.h>
32#include <linux/io.h>
14cc3e2b 33#include <linux/mutex.h>
bce94513 34#include <linux/linux_logo.h>
67207b96 35#include <asm/spu.h>
540270d8 36#include <asm/spu_priv1.h>
ff8a8f25 37#include <asm/xmon.h>
3ad216ca 38#include <asm/prom.h>
67207b96 39
e28b0031 40const struct spu_management_ops *spu_management_ops;
ccf17e9d
JK
41EXPORT_SYMBOL_GPL(spu_management_ops);
42
540270d8 43const struct spu_priv1_ops *spu_priv1_ops;
24140594 44EXPORT_SYMBOL_GPL(spu_priv1_ops);
540270d8 45
24140594
CH
46struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
47EXPORT_SYMBOL_GPL(cbe_spu_info);
94b2a439 48
24140594
CH
49/*
50 * Protects cbe_spu_info and spu->number.
51 */
52static DEFINE_SPINLOCK(spu_lock);
53
54/*
55 * List of all spus in the system.
56 *
57 * This list is iterated by callers from irq context and callers that
58 * want to sleep. Thus modifications need to be done with both
59 * spu_full_list_lock and spu_full_list_mutex held, while iterating
60 * through it requires either of these locks.
61 *
62 * In addition spu_full_list_lock protects all assignmens to
63 * spu->mm.
64 */
65static LIST_HEAD(spu_full_list);
66static DEFINE_SPINLOCK(spu_full_list_lock);
67static DEFINE_MUTEX(spu_full_list_mutex);
540270d8 68
94b2a439
BH
69void spu_invalidate_slbs(struct spu *spu)
70{
71 struct spu_priv2 __iomem *priv2 = spu->priv2;
72
73 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
74 out_be64(&priv2->slb_invalidate_all_W, 0UL);
75}
76EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
77
78/* This is called by the MM core when a segment size is changed, to
79 * request a flush of all the SPEs using a given mm
80 */
81void spu_flush_all_slbs(struct mm_struct *mm)
82{
83 struct spu *spu;
84 unsigned long flags;
85
24140594 86 spin_lock_irqsave(&spu_full_list_lock, flags);
94b2a439
BH
87 list_for_each_entry(spu, &spu_full_list, full_list) {
88 if (spu->mm == mm)
89 spu_invalidate_slbs(spu);
90 }
24140594 91 spin_unlock_irqrestore(&spu_full_list_lock, flags);
94b2a439
BH
92}
93
94/* The hack below stinks... try to do something better one of
95 * these days... Does it even work properly with NR_CPUS == 1 ?
96 */
97static inline void mm_needs_global_tlbie(struct mm_struct *mm)
98{
99 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
100
101 /* Global TLBIE broadcast required with SPEs. */
102 __cpus_setall(&mm->cpu_vm_mask, nr);
103}
104
105void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
106{
107 unsigned long flags;
108
24140594 109 spin_lock_irqsave(&spu_full_list_lock, flags);
94b2a439 110 spu->mm = mm;
24140594 111 spin_unlock_irqrestore(&spu_full_list_lock, flags);
94b2a439
BH
112 if (mm)
113 mm_needs_global_tlbie(mm);
114}
115EXPORT_SYMBOL_GPL(spu_associate_mm);
116
67207b96
AB
117static int __spu_trap_invalid_dma(struct spu *spu)
118{
119 pr_debug("%s\n", __FUNCTION__);
9add11da 120 spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
67207b96
AB
121 return 0;
122}
123
124static int __spu_trap_dma_align(struct spu *spu)
125{
126 pr_debug("%s\n", __FUNCTION__);
9add11da 127 spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
67207b96
AB
128 return 0;
129}
130
131static int __spu_trap_error(struct spu *spu)
132{
133 pr_debug("%s\n", __FUNCTION__);
9add11da 134 spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
67207b96
AB
135 return 0;
136}
137
138static void spu_restart_dma(struct spu *spu)
139{
140 struct spu_priv2 __iomem *priv2 = spu->priv2;
5473af04 141
8837d921 142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
5473af04 143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
67207b96
AB
144}
145
146static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
147{
8b3d6663
AB
148 struct spu_priv2 __iomem *priv2 = spu->priv2;
149 struct mm_struct *mm = spu->mm;
724bd80e 150 u64 esid, vsid, llp;
94b2a439 151 int psize;
67207b96
AB
152
153 pr_debug("%s\n", __FUNCTION__);
154
8837d921 155 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
8b3d6663
AB
156 /* SLBs are pre-loaded for context switch, so
157 * we should never get here!
158 */
5473af04
MN
159 printk("%s: invalid access during switch!\n", __func__);
160 return 1;
161 }
0afacde3
AB
162 esid = (ea & ESID_MASK) | SLB_ESID_V;
163
164 switch(REGION_ID(ea)) {
165 case USER_REGION_ID:
d0f13e3c
BH
166#ifdef CONFIG_PPC_MM_SLICES
167 psize = get_slice_psize(mm, ea);
168#else
169 psize = mm->context.user_psize;
0afacde3 170#endif
0afacde3 171 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
94b2a439 172 SLB_VSID_USER;
0afacde3
AB
173 break;
174 case VMALLOC_REGION_ID:
94b2a439
BH
175 if (ea < VMALLOC_END)
176 psize = mmu_vmalloc_psize;
177 else
178 psize = mmu_io_psize;
0afacde3 179 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
94b2a439 180 SLB_VSID_KERNEL;
0afacde3
AB
181 break;
182 case KERNEL_REGION_ID:
94b2a439 183 psize = mmu_linear_psize;
0afacde3 184 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
94b2a439 185 SLB_VSID_KERNEL;
0afacde3
AB
186 break;
187 default:
8b3d6663
AB
188 /* Future: support kernel segments so that drivers
189 * can use SPUs.
190 */
67207b96
AB
191 pr_debug("invalid region access at %016lx\n", ea);
192 return 1;
193 }
94b2a439 194 llp = mmu_psize_defs[psize].sllp;
67207b96 195
8b3d6663 196 out_be64(&priv2->slb_index_W, spu->slb_replace);
94b2a439 197 out_be64(&priv2->slb_vsid_RW, vsid | llp);
8b3d6663
AB
198 out_be64(&priv2->slb_esid_RW, esid);
199
200 spu->slb_replace++;
67207b96
AB
201 if (spu->slb_replace >= 8)
202 spu->slb_replace = 0;
203
67207b96 204 spu_restart_dma(spu);
e9f8a0b6 205 spu->stats.slb_flt++;
67207b96
AB
206 return 0;
207}
208
5473af04 209extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
8b3d6663 210static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
67207b96 211{
a33a7d73 212 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
67207b96 213
5473af04
MN
214 /* Handle kernel space hash faults immediately.
215 User hash faults need to be deferred to process context. */
216 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
217 && REGION_ID(ea) != USER_REGION_ID
218 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
219 spu_restart_dma(spu);
220 return 0;
221 }
222
8837d921 223 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
5473af04
MN
224 printk("%s: invalid access during switch!\n", __func__);
225 return 1;
226 }
67207b96 227
8b3d6663
AB
228 spu->dar = ea;
229 spu->dsisr = dsisr;
230 mb();
ba723fe2 231 spu->stop_callback(spu);
67207b96
AB
232 return 0;
233}
234
235static irqreturn_t
f5a92458 236spu_irq_class_0(int irq, void *data)
67207b96
AB
237{
238 struct spu *spu;
239
240 spu = data;
241 spu->class_0_pending = 1;
ba723fe2 242 spu->stop_callback(spu);
67207b96
AB
243
244 return IRQ_HANDLED;
245}
246
5110459f 247int
67207b96
AB
248spu_irq_class_0_bottom(struct spu *spu)
249{
3a843d7c 250 unsigned long stat, mask;
3650cfe2 251 unsigned long flags;
67207b96
AB
252
253 spu->class_0_pending = 0;
254
3650cfe2 255 spin_lock_irqsave(&spu->register_lock, flags);
f0831acc
AB
256 mask = spu_int_mask_get(spu, 0);
257 stat = spu_int_stat_get(spu, 0);
67207b96 258
3a843d7c
AB
259 stat &= mask;
260
2cd90bc8 261 if (stat & 1) /* invalid DMA alignment */
67207b96
AB
262 __spu_trap_dma_align(spu);
263
2cd90bc8
AB
264 if (stat & 2) /* invalid MFC DMA */
265 __spu_trap_invalid_dma(spu);
266
67207b96
AB
267 if (stat & 4) /* error on SPU */
268 __spu_trap_error(spu);
269
f0831acc 270 spu_int_stat_clear(spu, 0, stat);
3650cfe2 271 spin_unlock_irqrestore(&spu->register_lock, flags);
5110459f
AB
272
273 return (stat & 0x7) ? -EIO : 0;
67207b96 274}
5110459f 275EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
67207b96
AB
276
277static irqreturn_t
f5a92458 278spu_irq_class_1(int irq, void *data)
67207b96
AB
279{
280 struct spu *spu;
8b3d6663 281 unsigned long stat, mask, dar, dsisr;
67207b96
AB
282
283 spu = data;
8b3d6663
AB
284
285 /* atomically read & clear class1 status. */
286 spin_lock(&spu->register_lock);
f0831acc
AB
287 mask = spu_int_mask_get(spu, 1);
288 stat = spu_int_stat_get(spu, 1) & mask;
289 dar = spu_mfc_dar_get(spu);
290 dsisr = spu_mfc_dsisr_get(spu);
38307341 291 if (stat & 2) /* mapping fault */
f0831acc
AB
292 spu_mfc_dsisr_set(spu, 0ul);
293 spu_int_stat_clear(spu, 1, stat);
8b3d6663 294 spin_unlock(&spu->register_lock);
a33a7d73
AB
295 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
296 dar, dsisr);
67207b96
AB
297
298 if (stat & 1) /* segment fault */
299 __spu_trap_data_seg(spu, dar);
300
301 if (stat & 2) { /* mapping fault */
8b3d6663 302 __spu_trap_data_map(spu, dar, dsisr);
67207b96
AB
303 }
304
305 if (stat & 4) /* ls compare & suspend on get */
306 ;
307
308 if (stat & 8) /* ls compare & suspend on put */
309 ;
310
67207b96
AB
311 return stat ? IRQ_HANDLED : IRQ_NONE;
312}
313
314static irqreturn_t
f5a92458 315spu_irq_class_2(int irq, void *data)
67207b96
AB
316{
317 struct spu *spu;
318 unsigned long stat;
3a843d7c 319 unsigned long mask;
67207b96
AB
320
321 spu = data;
ba723fe2 322 spin_lock(&spu->register_lock);
f0831acc
AB
323 stat = spu_int_stat_get(spu, 2);
324 mask = spu_int_mask_get(spu, 2);
ba723fe2
MN
325 /* ignore interrupts we're not waiting for */
326 stat &= mask;
327 /*
328 * mailbox interrupts (0x1 and 0x10) are level triggered.
329 * mask them now before acknowledging.
330 */
331 if (stat & 0x11)
332 spu_int_mask_and(spu, 2, ~(stat & 0x11));
333 /* acknowledge all interrupts before the callbacks */
334 spu_int_stat_clear(spu, 2, stat);
335 spin_unlock(&spu->register_lock);
67207b96 336
3a843d7c 337 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
67207b96 338
67207b96 339 if (stat & 1) /* PPC core mailbox */
ba723fe2 340 spu->ibox_callback(spu);
67207b96
AB
341
342 if (stat & 2) /* SPU stop-and-signal */
ba723fe2 343 spu->stop_callback(spu);
67207b96
AB
344
345 if (stat & 4) /* SPU halted */
ba723fe2 346 spu->stop_callback(spu);
67207b96
AB
347
348 if (stat & 8) /* DMA tag group complete */
ba723fe2 349 spu->mfc_callback(spu);
67207b96
AB
350
351 if (stat & 0x10) /* SPU mailbox threshold */
ba723fe2 352 spu->wbox_callback(spu);
67207b96 353
e9f8a0b6 354 spu->stats.class2_intr++;
67207b96
AB
355 return stat ? IRQ_HANDLED : IRQ_NONE;
356}
357
0ebfff14 358static int spu_request_irqs(struct spu *spu)
67207b96 359{
0ebfff14 360 int ret = 0;
67207b96 361
0ebfff14
BH
362 if (spu->irqs[0] != NO_IRQ) {
363 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
364 spu->number);
365 ret = request_irq(spu->irqs[0], spu_irq_class_0,
366 IRQF_DISABLED,
367 spu->irq_c0, spu);
368 if (ret)
369 goto bail0;
370 }
371 if (spu->irqs[1] != NO_IRQ) {
372 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
373 spu->number);
374 ret = request_irq(spu->irqs[1], spu_irq_class_1,
375 IRQF_DISABLED,
376 spu->irq_c1, spu);
377 if (ret)
378 goto bail1;
379 }
380 if (spu->irqs[2] != NO_IRQ) {
381 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
382 spu->number);
383 ret = request_irq(spu->irqs[2], spu_irq_class_2,
384 IRQF_DISABLED,
385 spu->irq_c2, spu);
386 if (ret)
387 goto bail2;
388 }
389 return 0;
67207b96 390
0ebfff14
BH
391bail2:
392 if (spu->irqs[1] != NO_IRQ)
393 free_irq(spu->irqs[1], spu);
394bail1:
395 if (spu->irqs[0] != NO_IRQ)
396 free_irq(spu->irqs[0], spu);
397bail0:
67207b96
AB
398 return ret;
399}
400
0ebfff14 401static void spu_free_irqs(struct spu *spu)
67207b96 402{
0ebfff14
BH
403 if (spu->irqs[0] != NO_IRQ)
404 free_irq(spu->irqs[0], spu);
405 if (spu->irqs[1] != NO_IRQ)
406 free_irq(spu->irqs[1], spu);
407 if (spu->irqs[2] != NO_IRQ)
408 free_irq(spu->irqs[2], spu);
67207b96
AB
409}
410
486acd48 411void spu_init_channels(struct spu *spu)
67207b96
AB
412{
413 static const struct {
414 unsigned channel;
415 unsigned count;
416 } zero_list[] = {
417 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
418 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
419 }, count_list[] = {
420 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
421 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
422 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
423 };
6ff730c3 424 struct spu_priv2 __iomem *priv2;
67207b96
AB
425 int i;
426
427 priv2 = spu->priv2;
428
429 /* initialize all channel data to zero */
430 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
431 int count;
432
433 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
434 for (count = 0; count < zero_list[i].count; count++)
435 out_be64(&priv2->spu_chnldata_RW, 0);
436 }
437
438 /* initialize channel counts to meaningful values */
439 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
440 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
441 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
442 }
443}
486acd48 444EXPORT_SYMBOL_GPL(spu_init_channels);
67207b96 445
6deac066
GL
446static int spu_shutdown(struct sys_device *sysdev)
447{
448 struct spu *spu = container_of(sysdev, struct spu, sysdev);
449
450 spu_free_irqs(spu);
451 spu_destroy_spu(spu);
452 return 0;
453}
454
1d64093f 455struct sysdev_class spu_sysdev_class = {
6deac066
GL
456 set_kset_name("spu"),
457 .shutdown = spu_shutdown,
1d64093f
JK
458};
459
e570beb6
CK
460int spu_add_sysdev_attr(struct sysdev_attribute *attr)
461{
462 struct spu *spu;
e570beb6 463
24140594 464 mutex_lock(&spu_full_list_mutex);
e570beb6
CK
465 list_for_each_entry(spu, &spu_full_list, full_list)
466 sysdev_create_file(&spu->sysdev, attr);
24140594 467 mutex_unlock(&spu_full_list_mutex);
e570beb6 468
e570beb6
CK
469 return 0;
470}
471EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
472
473int spu_add_sysdev_attr_group(struct attribute_group *attrs)
474{
475 struct spu *spu;
e570beb6 476
24140594 477 mutex_lock(&spu_full_list_mutex);
e570beb6
CK
478 list_for_each_entry(spu, &spu_full_list, full_list)
479 sysfs_create_group(&spu->sysdev.kobj, attrs);
24140594 480 mutex_unlock(&spu_full_list_mutex);
e570beb6 481
e570beb6
CK
482 return 0;
483}
484EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
485
486
487void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
488{
489 struct spu *spu;
e570beb6 490
24140594 491 mutex_lock(&spu_full_list_mutex);
e570beb6
CK
492 list_for_each_entry(spu, &spu_full_list, full_list)
493 sysdev_remove_file(&spu->sysdev, attr);
24140594 494 mutex_unlock(&spu_full_list_mutex);
e570beb6
CK
495}
496EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
497
498void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
499{
500 struct spu *spu;
e570beb6 501
24140594 502 mutex_lock(&spu_full_list_mutex);
e570beb6
CK
503 list_for_each_entry(spu, &spu_full_list, full_list)
504 sysfs_remove_group(&spu->sysdev.kobj, attrs);
24140594 505 mutex_unlock(&spu_full_list_mutex);
e570beb6
CK
506}
507EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
508
1d64093f
JK
509static int spu_create_sysdev(struct spu *spu)
510{
511 int ret;
512
513 spu->sysdev.id = spu->number;
514 spu->sysdev.cls = &spu_sysdev_class;
515 ret = sysdev_register(&spu->sysdev);
516 if (ret) {
517 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
518 spu->number);
519 return ret;
520 }
521
0021550c 522 sysfs_add_device_to_node(&spu->sysdev, spu->node);
1d64093f
JK
523
524 return 0;
525}
526
e28b0031 527static int __init create_spu(void *data)
67207b96
AB
528{
529 struct spu *spu;
530 int ret;
531 static int number;
94b2a439 532 unsigned long flags;
27ec41d3 533 struct timespec ts;
67207b96
AB
534
535 ret = -ENOMEM;
ecec2177 536 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
67207b96
AB
537 if (!spu)
538 goto out;
539
486acd48
CH
540 spu->alloc_state = SPU_FREE;
541
e28b0031 542 spin_lock_init(&spu->register_lock);
24140594 543 spin_lock(&spu_lock);
e28b0031 544 spu->number = number++;
24140594 545 spin_unlock(&spu_lock);
e28b0031
GL
546
547 ret = spu_create_spu(spu, data);
e5267b4b 548
67207b96
AB
549 if (ret)
550 goto out_free;
551
24f43b33 552 spu_mfc_sdr_setup(spu);
f0831acc 553 spu_mfc_sr1_set(spu, 0x33);
67207b96
AB
554 ret = spu_request_irqs(spu);
555 if (ret)
e28b0031 556 goto out_destroy;
67207b96 557
1d64093f
JK
558 ret = spu_create_sysdev(spu);
559 if (ret)
560 goto out_free_irqs;
561
486acd48 562 mutex_lock(&cbe_spu_info[spu->node].list_mutex);
aa6d5b20
AB
563 list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
564 cbe_spu_info[spu->node].n_spus++;
486acd48 565 mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
24140594
CH
566
567 mutex_lock(&spu_full_list_mutex);
568 spin_lock_irqsave(&spu_full_list_lock, flags);
e570beb6 569 list_add(&spu->full_list, &spu_full_list);
24140594
CH
570 spin_unlock_irqrestore(&spu_full_list_lock, flags);
571 mutex_unlock(&spu_full_list_mutex);
67207b96 572
27ec41d3
AD
573 spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
574 ktime_get_ts(&ts);
575 spu->stats.tstamp = timespec_to_ns(&ts);
fe2f896d 576
9d92af62
AB
577 INIT_LIST_HEAD(&spu->aff_list);
578
67207b96
AB
579 goto out;
580
1d64093f
JK
581out_free_irqs:
582 spu_free_irqs(spu);
e28b0031
GL
583out_destroy:
584 spu_destroy_spu(spu);
67207b96
AB
585out_free:
586 kfree(spu);
587out:
588 return ret;
589}
590
fe2f896d
CH
591static const char *spu_state_names[] = {
592 "user", "system", "iowait", "idle"
593};
594
595static unsigned long long spu_acct_time(struct spu *spu,
596 enum spu_utilization_state state)
597{
27ec41d3 598 struct timespec ts;
fe2f896d
CH
599 unsigned long long time = spu->stats.times[state];
600
27ec41d3
AD
601 /*
602 * If the spu is idle or the context is stopped, utilization
603 * statistics are not updated. Apply the time delta from the
604 * last recorded state of the spu.
605 */
606 if (spu->stats.util_state == state) {
607 ktime_get_ts(&ts);
608 time += timespec_to_ns(&ts) - spu->stats.tstamp;
609 }
fe2f896d 610
27ec41d3 611 return time / NSEC_PER_MSEC;
fe2f896d
CH
612}
613
614
615static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
616{
617 struct spu *spu = container_of(sysdev, struct spu, sysdev);
618
619 return sprintf(buf, "%s %llu %llu %llu %llu "
620 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
27ec41d3 621 spu_state_names[spu->stats.util_state],
fe2f896d
CH
622 spu_acct_time(spu, SPU_UTIL_USER),
623 spu_acct_time(spu, SPU_UTIL_SYSTEM),
624 spu_acct_time(spu, SPU_UTIL_IOWAIT),
27ec41d3 625 spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
fe2f896d
CH
626 spu->stats.vol_ctx_switch,
627 spu->stats.invol_ctx_switch,
628 spu->stats.slb_flt,
629 spu->stats.hash_flt,
630 spu->stats.min_flt,
631 spu->stats.maj_flt,
632 spu->stats.class2_intr,
633 spu->stats.libassist);
634}
635
636static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
637
67207b96
AB
638static int __init init_spu_base(void)
639{
befdc746 640 int i, ret = 0;
67207b96 641
aa6d5b20 642 for (i = 0; i < MAX_NUMNODES; i++) {
486acd48 643 mutex_init(&cbe_spu_info[i].list_mutex);
aa6d5b20 644 INIT_LIST_HEAD(&cbe_spu_info[i].spus);
aa6d5b20 645 }
ccf17e9d 646
da06aa08 647 if (!spu_management_ops)
befdc746 648 goto out;
da06aa08 649
1d64093f
JK
650 /* create sysdev class for spus */
651 ret = sysdev_class_register(&spu_sysdev_class);
652 if (ret)
befdc746 653 goto out;
1d64093f 654
e28b0031
GL
655 ret = spu_enumerate_spus(create_spu);
656
bce94513 657 if (ret < 0) {
e28b0031
GL
658 printk(KERN_WARNING "%s: Error initializing spus\n",
659 __FUNCTION__);
befdc746 660 goto out_unregister_sysdev_class;
67207b96 661 }
ff8a8f25 662
bce94513
GU
663 if (ret > 0) {
664 /*
665 * We cannot put the forward declaration in
666 * <linux/linux_logo.h> because of conflicting session type
667 * conflicts for const and __initdata with different compiler
668 * versions
669 */
670 extern const struct linux_logo logo_spe_clut224;
671
672 fb_append_extra_logo(&logo_spe_clut224, ret);
673 }
674
24140594 675 mutex_lock(&spu_full_list_mutex);
ff8a8f25 676 xmon_register_spus(&spu_full_list);
8d2655e6 677 crash_register_spus(&spu_full_list);
24140594 678 mutex_unlock(&spu_full_list_mutex);
fe2f896d
CH
679 spu_add_sysdev_attr(&attr_stat);
680
f5996449 681 spu_init_affinity();
3ad216ca 682
befdc746
CH
683 return 0;
684
685 out_unregister_sysdev_class:
686 sysdev_class_unregister(&spu_sysdev_class);
687 out:
67207b96
AB
688 return ret;
689}
690module_init(init_spu_base);
691
692MODULE_LICENSE("GPL");
693MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");