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[PATCH] powerpc: clean up iommu.h a bit
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / platforms / iseries / iommu.c
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1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
3 *
4 * Rewrite, cleanup:
5 *
91f14480 6 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
1da177e4
LT
7 *
8 * Dynamic DMA mapping support, iSeries-specific parts.
9 *
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26#include <linux/types.h>
27#include <linux/dma-mapping.h>
28#include <linux/list.h>
29
30#include <asm/iommu.h>
c707ffcf 31#include <asm/tce.h>
1da177e4 32#include <asm/machdep.h>
426c1a11 33#include <asm/abs_addr.h>
bffa8fc3 34#include <asm/pci-bridge.h>
8021b8a7 35#include <asm/iseries/hv_call_xm.h>
426c1a11 36
9bd7ea60
SR
37#include "iommu.h"
38
1da177e4
LT
39extern struct list_head iSeries_Global_Device_List;
40
41
42static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,
43 unsigned long uaddr, enum dma_data_direction direction)
44{
45 u64 rc;
46 union tce_entry tce;
47
3c726f8d
BH
48 index <<= TCE_PAGE_FACTOR;
49 npages <<= TCE_PAGE_FACTOR;
50
1da177e4
LT
51 while (npages--) {
52 tce.te_word = 0;
3c726f8d 53 tce.te_bits.tb_rpn = virt_to_abs(uaddr) >> TCE_SHIFT;
1da177e4
LT
54
55 if (tbl->it_type == TCE_VB) {
56 /* Virtual Bus */
57 tce.te_bits.tb_valid = 1;
58 tce.te_bits.tb_allio = 1;
59 if (direction != DMA_TO_DEVICE)
60 tce.te_bits.tb_rdwr = 1;
61 } else {
62 /* PCI Bus */
63 tce.te_bits.tb_rdwr = 1; /* Read allowed */
64 if (direction != DMA_TO_DEVICE)
65 tce.te_bits.tb_pciwr = 1;
66 }
67
68 rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index,
69 tce.te_word);
70 if (rc)
71 panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
72 rc);
73 index++;
3c726f8d 74 uaddr += TCE_PAGE_SIZE;
1da177e4
LT
75 }
76}
77
78static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages)
79{
80 u64 rc;
81
3c726f8d
BH
82 npages <<= TCE_PAGE_FACTOR;
83 index <<= TCE_PAGE_FACTOR;
84
1da177e4
LT
85 while (npages--) {
86 rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, 0);
87 if (rc)
88 panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
89 rc);
90 index++;
91 }
92}
93
1da177e4
LT
94/*
95 * Call Hv with the architected data structure to get TCE table info.
96 * info. Put the returned data into the Linux representation of the
97 * TCE table data.
98 * The Hardware Tce table comes in three flavors.
99 * 1. TCE table shared between Buses.
100 * 2. TCE table per Bus.
101 * 3. TCE Table per IOA.
102 */
3c726f8d
BH
103void iommu_table_getparms_iSeries(unsigned long busno,
104 unsigned char slotno,
105 unsigned char virtbus,
106 struct iommu_table* tbl)
1da177e4
LT
107{
108 struct iommu_table_cb *parms;
109
110 parms = kmalloc(sizeof(*parms), GFP_KERNEL);
111 if (parms == NULL)
112 panic("PCI_DMA: TCE Table Allocation failed.");
113
114 memset(parms, 0, sizeof(*parms));
115
3c726f8d
BH
116 parms->itc_busno = busno;
117 parms->itc_slotno = slotno;
118 parms->itc_virtbus = virtbus;
1da177e4 119
426c1a11 120 HvCallXm_getTceTableParms(iseries_hv_addr(parms));
1da177e4
LT
121
122 if (parms->itc_size == 0)
123 panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms);
124
125 /* itc_size is in pages worth of table, it_size is in # of entries */
3c726f8d
BH
126 tbl->it_size = ((parms->itc_size * TCE_PAGE_SIZE) /
127 sizeof(union tce_entry)) >> TCE_PAGE_FACTOR;
1da177e4 128 tbl->it_busno = parms->itc_busno;
3c726f8d 129 tbl->it_offset = parms->itc_offset >> TCE_PAGE_FACTOR;
1da177e4
LT
130 tbl->it_index = parms->itc_index;
131 tbl->it_blocksize = 1;
3c726f8d 132 tbl->it_type = virtbus ? TCE_VB : TCE_PCI;
1da177e4
LT
133
134 kfree(parms);
135}
136
137
3c726f8d
BH
138#ifdef CONFIG_PCI
139/*
140 * This function compares the known tables to find an iommu_table
141 * that has already been built for hardware TCEs.
142 */
143static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
144{
145 struct pci_dn *pdn;
146
147 list_for_each_entry(pdn, &iSeries_Global_Device_List, Device_List) {
148 struct iommu_table *it = pdn->iommu_table;
149 if ((it != NULL) &&
150 (it->it_type == TCE_PCI) &&
151 (it->it_offset == tbl->it_offset) &&
152 (it->it_index == tbl->it_index) &&
153 (it->it_size == tbl->it_size))
154 return it;
155 }
156 return NULL;
157}
158
159
252e75a5 160void iommu_devnode_init_iSeries(struct device_node *dn)
1da177e4
LT
161{
162 struct iommu_table *tbl;
252e75a5 163 struct pci_dn *pdn = PCI_DN(dn);
1da177e4
LT
164
165 tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
166
3c726f8d 167 iommu_table_getparms_iSeries(pdn->busno, pdn->LogicalSlot, 0, tbl);
1da177e4
LT
168
169 /* Look for existing tce table */
252e75a5
SR
170 pdn->iommu_table = iommu_table_find(tbl);
171 if (pdn->iommu_table == NULL)
172 pdn->iommu_table = iommu_init_table(tbl);
1da177e4
LT
173 else
174 kfree(tbl);
175}
145d01e4 176#endif
1da177e4
LT
177
178static void iommu_dev_setup_iSeries(struct pci_dev *dev) { }
179static void iommu_bus_setup_iSeries(struct pci_bus *bus) { }
180
181void iommu_init_early_iSeries(void)
182{
183 ppc_md.tce_build = tce_build_iSeries;
184 ppc_md.tce_free = tce_free_iSeries;
185
186 ppc_md.iommu_dev_setup = iommu_dev_setup_iSeries;
187 ppc_md.iommu_bus_setup = iommu_bus_setup_iSeries;
188
189 pci_iommu_init();
190}