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Commit | Line | Data |
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1da177e4 | 1 | /* |
0cb7b2af | 2 | * Maple (970 eval board) setup code |
1da177e4 LT |
3 | * |
4 | * (c) Copyright 2004 Benjamin Herrenschmidt (benh@kernel.crashing.org), | |
5 | * IBM Corp. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | */ | |
13 | ||
980a6513 | 14 | #undef DEBUG |
1da177e4 | 15 | |
1da177e4 LT |
16 | #include <linux/init.h> |
17 | #include <linux/errno.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/kernel.h> | |
66b15db6 | 20 | #include <linux/export.h> |
1da177e4 LT |
21 | #include <linux/mm.h> |
22 | #include <linux/stddef.h> | |
23 | #include <linux/unistd.h> | |
24 | #include <linux/ptrace.h> | |
1da177e4 | 25 | #include <linux/user.h> |
1da177e4 LT |
26 | #include <linux/tty.h> |
27 | #include <linux/string.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/ioport.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/initrd.h> | |
32 | #include <linux/vt_kern.h> | |
33 | #include <linux/console.h> | |
1da177e4 LT |
34 | #include <linux/pci.h> |
35 | #include <linux/adb.h> | |
36 | #include <linux/cuda.h> | |
37 | #include <linux/pmu.h> | |
38 | #include <linux/irq.h> | |
39 | #include <linux/seq_file.h> | |
40 | #include <linux/root_dev.h> | |
41 | #include <linux/serial.h> | |
42 | #include <linux/smp.h> | |
1977f032 | 43 | #include <linux/bitops.h> |
0173d422 | 44 | #include <linux/of_device.h> |
95f72d1e | 45 | #include <linux/memblock.h> |
1da177e4 LT |
46 | |
47 | #include <asm/processor.h> | |
48 | #include <asm/sections.h> | |
49 | #include <asm/prom.h> | |
1da177e4 | 50 | #include <asm/pgtable.h> |
1da177e4 LT |
51 | #include <asm/io.h> |
52 | #include <asm/pci-bridge.h> | |
53 | #include <asm/iommu.h> | |
54 | #include <asm/machdep.h> | |
55 | #include <asm/dma.h> | |
56 | #include <asm/cputable.h> | |
57 | #include <asm/time.h> | |
bbeb3f4c | 58 | #include <asm/mpic.h> |
9e254c45 | 59 | #include <asm/rtas.h> |
40ef8cbc | 60 | #include <asm/udbg.h> |
4297c986 | 61 | #include <asm/nvram.h> |
1da177e4 | 62 | |
0cb7b2af PM |
63 | #include "maple.h" |
64 | ||
1da177e4 LT |
65 | #ifdef DEBUG |
66 | #define DBG(fmt...) udbg_printf(fmt) | |
67 | #else | |
68 | #define DBG(fmt...) | |
69 | #endif | |
70 | ||
4c882b01 BH |
71 | static unsigned long maple_find_nvram_base(void) |
72 | { | |
73 | struct device_node *rtcs; | |
74 | unsigned long result = 0; | |
75 | ||
76 | /* find NVRAM device */ | |
77 | rtcs = of_find_compatible_node(NULL, "nvram", "AMD8111"); | |
78 | if (rtcs) { | |
79 | struct resource r; | |
80 | if (of_address_to_resource(rtcs, 0, &r)) { | |
81 | printk(KERN_EMERG "Maple: Unable to translate NVRAM" | |
82 | " address\n"); | |
83 | goto bail; | |
84 | } | |
85 | if (!(r.flags & IORESOURCE_IO)) { | |
86 | printk(KERN_EMERG "Maple: NVRAM address isn't PIO!\n"); | |
87 | goto bail; | |
88 | } | |
89 | result = r.start; | |
90 | } else | |
91 | printk(KERN_EMERG "Maple: Unable to find NVRAM\n"); | |
92 | bail: | |
93 | of_node_put(rtcs); | |
94 | return result; | |
95 | } | |
96 | ||
1da177e4 LT |
97 | static void maple_restart(char *cmd) |
98 | { | |
d7152fe1 | 99 | unsigned int maple_nvram_base; |
eeb2b723 | 100 | const unsigned int *maple_nvram_offset, *maple_nvram_command; |
4c882b01 | 101 | struct device_node *sp; |
d7152fe1 | 102 | |
4c882b01 BH |
103 | maple_nvram_base = maple_find_nvram_base(); |
104 | if (maple_nvram_base == 0) | |
105 | goto fail; | |
d7152fe1 DG |
106 | |
107 | /* find service processor device */ | |
4c882b01 BH |
108 | sp = of_find_node_by_name(NULL, "service-processor"); |
109 | if (!sp) { | |
d7152fe1 | 110 | printk(KERN_EMERG "Maple: Unable to find Service Processor\n"); |
4c882b01 | 111 | goto fail; |
d7152fe1 | 112 | } |
e2eb6392 SR |
113 | maple_nvram_offset = of_get_property(sp, "restart-addr", NULL); |
114 | maple_nvram_command = of_get_property(sp, "restart-value", NULL); | |
4c882b01 | 115 | of_node_put(sp); |
d7152fe1 DG |
116 | |
117 | /* send command */ | |
eeb2b723 | 118 | outb_p(*maple_nvram_command, maple_nvram_base + *maple_nvram_offset); |
d7152fe1 | 119 | for (;;) ; |
4c882b01 BH |
120 | fail: |
121 | printk(KERN_EMERG "Maple: Manual Restart Required\n"); | |
1da177e4 LT |
122 | } |
123 | ||
124 | static void maple_power_off(void) | |
125 | { | |
d7152fe1 | 126 | unsigned int maple_nvram_base; |
eeb2b723 | 127 | const unsigned int *maple_nvram_offset, *maple_nvram_command; |
4c882b01 | 128 | struct device_node *sp; |
d7152fe1 | 129 | |
4c882b01 BH |
130 | maple_nvram_base = maple_find_nvram_base(); |
131 | if (maple_nvram_base == 0) | |
132 | goto fail; | |
d7152fe1 DG |
133 | |
134 | /* find service processor device */ | |
4c882b01 BH |
135 | sp = of_find_node_by_name(NULL, "service-processor"); |
136 | if (!sp) { | |
d7152fe1 | 137 | printk(KERN_EMERG "Maple: Unable to find Service Processor\n"); |
4c882b01 | 138 | goto fail; |
d7152fe1 | 139 | } |
e2eb6392 SR |
140 | maple_nvram_offset = of_get_property(sp, "power-off-addr", NULL); |
141 | maple_nvram_command = of_get_property(sp, "power-off-value", NULL); | |
4c882b01 | 142 | of_node_put(sp); |
d7152fe1 DG |
143 | |
144 | /* send command */ | |
eeb2b723 | 145 | outb_p(*maple_nvram_command, maple_nvram_base + *maple_nvram_offset); |
d7152fe1 | 146 | for (;;) ; |
4c882b01 BH |
147 | fail: |
148 | printk(KERN_EMERG "Maple: Manual Power-Down Required\n"); | |
1da177e4 LT |
149 | } |
150 | ||
151 | static void maple_halt(void) | |
152 | { | |
d7152fe1 | 153 | maple_power_off(); |
1da177e4 LT |
154 | } |
155 | ||
156 | #ifdef CONFIG_SMP | |
157 | struct smp_ops_t maple_smp_ops = { | |
158 | .probe = smp_mpic_probe, | |
159 | .message_pass = smp_mpic_message_pass, | |
160 | .kick_cpu = smp_generic_kick_cpu, | |
161 | .setup_cpu = smp_mpic_setup_cpu, | |
162 | .give_timebase = smp_generic_give_timebase, | |
163 | .take_timebase = smp_generic_take_timebase, | |
164 | }; | |
165 | #endif /* CONFIG_SMP */ | |
166 | ||
9e254c45 NL |
167 | static void __init maple_use_rtas_reboot_and_halt_if_present(void) |
168 | { | |
169 | if (rtas_service_present("system-reboot") && | |
170 | rtas_service_present("power-off")) { | |
171 | ppc_md.restart = rtas_restart; | |
9178ba29 | 172 | pm_power_off = rtas_power_off; |
9e254c45 NL |
173 | ppc_md.halt = rtas_halt; |
174 | } | |
175 | } | |
176 | ||
1da177e4 LT |
177 | void __init maple_setup_arch(void) |
178 | { | |
179 | /* init to some ~sane value until calibrate_delay() runs */ | |
180 | loops_per_jiffy = 50000000; | |
181 | ||
182 | /* Setup SMP callback */ | |
183 | #ifdef CONFIG_SMP | |
184 | smp_ops = &maple_smp_ops; | |
185 | #endif | |
186 | /* Lookup PCI hosts */ | |
187 | maple_pci_init(); | |
188 | ||
189 | #ifdef CONFIG_DUMMY_CONSOLE | |
190 | conswitchp = &dummy_con; | |
191 | #endif | |
9e254c45 | 192 | maple_use_rtas_reboot_and_halt_if_present(); |
62d60e9f | 193 | |
4baaf0cf | 194 | printk(KERN_DEBUG "Using native/NAP idle loop\n"); |
4297c986 NL |
195 | |
196 | mmio_nvram_init(); | |
1da177e4 LT |
197 | } |
198 | ||
199 | /* | |
200 | * Early initialization. | |
201 | */ | |
202 | static void __init maple_init_early(void) | |
203 | { | |
1da177e4 LT |
204 | DBG(" -> maple_init_early\n"); |
205 | ||
1beb6a7d | 206 | iommu_init_early_dart(); |
1da177e4 LT |
207 | |
208 | DBG(" <- maple_init_early\n"); | |
209 | } | |
210 | ||
0ebfff14 BH |
211 | /* |
212 | * This is almost identical to pSeries and CHRP. We need to make that | |
213 | * code generic at one point, with appropriate bits in the device-tree to | |
214 | * identify the presence of an HT APIC | |
215 | */ | |
216 | static void __init maple_init_IRQ(void) | |
1da177e4 | 217 | { |
0ebfff14 | 218 | struct device_node *root, *np, *mpic_node = NULL; |
eeb2b723 | 219 | const unsigned int *opprop; |
0ebfff14 BH |
220 | unsigned long openpic_addr = 0; |
221 | int naddr, n, i, opplen, has_isus = 0; | |
1da177e4 | 222 | struct mpic *mpic; |
be8bec56 | 223 | unsigned int flags = 0; |
1da177e4 | 224 | |
0ebfff14 BH |
225 | /* Locate MPIC in the device-tree. Note that there is a bug |
226 | * in Maple device-tree where the type of the controller is | |
227 | * open-pic and not interrupt-controller | |
228 | */ | |
96278d21 SB |
229 | |
230 | for_each_node_by_type(np, "interrupt-controller") | |
55b61fec | 231 | if (of_device_is_compatible(np, "open-pic")) { |
96278d21 SB |
232 | mpic_node = np; |
233 | break; | |
234 | } | |
235 | if (mpic_node == NULL) | |
236 | for_each_node_by_type(np, "open-pic") { | |
237 | mpic_node = np; | |
238 | break; | |
239 | } | |
0ebfff14 BH |
240 | if (mpic_node == NULL) { |
241 | printk(KERN_ERR | |
242 | "Failed to locate the MPIC interrupt controller\n"); | |
243 | return; | |
244 | } | |
1da177e4 | 245 | |
0ebfff14 | 246 | /* Find address list in /platform-open-pic */ |
1da177e4 | 247 | root = of_find_node_by_path("/"); |
a8bda5dd | 248 | naddr = of_n_addr_cells(root); |
e2eb6392 | 249 | opprop = of_get_property(root, "platform-open-pic", &opplen); |
0ebfff14 BH |
250 | if (opprop != 0) { |
251 | openpic_addr = of_read_number(opprop, naddr); | |
252 | has_isus = (opplen > naddr); | |
253 | printk(KERN_DEBUG "OpenPIC addr: %lx, has ISUs: %d\n", | |
254 | openpic_addr, has_isus); | |
255 | } | |
1da177e4 | 256 | |
0ebfff14 | 257 | BUG_ON(openpic_addr == 0); |
1da177e4 | 258 | |
0ebfff14 | 259 | /* Check for a big endian MPIC */ |
e2eb6392 | 260 | if (of_get_property(np, "big-endian", NULL) != NULL) |
0ebfff14 BH |
261 | flags |= MPIC_BIG_ENDIAN; |
262 | ||
263 | /* XXX Maple specific bits */ | |
e55d7f73 | 264 | flags |= MPIC_U3_HT_IRQS; |
d319a03b SB |
265 | /* All U3/U4 are big-endian, older SLOF firmware doesn't encode this */ |
266 | flags |= MPIC_BIG_ENDIAN; | |
0ebfff14 BH |
267 | |
268 | /* Setup the openpic driver. More device-tree junks, we hard code no | |
269 | * ISUs for now. I'll have to revisit some stuffs with the folks doing | |
270 | * the firmware for those | |
271 | */ | |
272 | mpic = mpic_alloc(mpic_node, openpic_addr, flags, | |
273 | /*has_isus ? 16 :*/ 0, 0, " MPIC "); | |
1da177e4 | 274 | BUG_ON(mpic == NULL); |
1da177e4 | 275 | |
0ebfff14 BH |
276 | /* Add ISUs */ |
277 | opplen /= sizeof(u32); | |
278 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | |
279 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | |
280 | mpic_assign_isu(mpic, n, isuaddr); | |
281 | } | |
282 | ||
283 | /* All ISUs are setup, complete initialization */ | |
284 | mpic_init(mpic); | |
285 | ppc_md.get_irq = mpic_get_irq; | |
286 | of_node_put(mpic_node); | |
287 | of_node_put(root); | |
1da177e4 LT |
288 | } |
289 | ||
290 | static void __init maple_progress(char *s, unsigned short hex) | |
291 | { | |
292 | printk("*** %04x : %s\n", hex, s ? s : ""); | |
293 | } | |
294 | ||
295 | ||
296 | /* | |
297 | * Called very early, MMU is off, device-tree isn't unflattened | |
298 | */ | |
e8222502 | 299 | static int __init maple_probe(void) |
1da177e4 | 300 | { |
e8222502 | 301 | unsigned long root = of_get_flat_dt_root(); |
980a6513 BH |
302 | |
303 | if (!of_flat_dt_is_compatible(root, "Momentum,Maple") && | |
304 | !of_flat_dt_is_compatible(root, "Momentum,Apache")) | |
1da177e4 LT |
305 | return 0; |
306 | /* | |
307 | * On U3, the DART (iommu) must be allocated now since it | |
308 | * has an impact on htab_initialize (due to the large page it | |
309 | * occupies having to be broken up so the DART itself is not | |
310 | * part of the cacheable linar mapping | |
311 | */ | |
1beb6a7d | 312 | alloc_dart_table(); |
1da177e4 | 313 | |
7d0daae4 | 314 | hpte_init_native(); |
9178ba29 | 315 | pm_power_off = maple_power_off; |
7d0daae4 | 316 | |
1da177e4 LT |
317 | return 1; |
318 | } | |
319 | ||
53378c28 | 320 | define_machine(maple) { |
e8222502 | 321 | .name = "Maple", |
1da177e4 LT |
322 | .probe = maple_probe, |
323 | .setup_arch = maple_setup_arch, | |
324 | .init_early = maple_init_early, | |
325 | .init_IRQ = maple_init_IRQ, | |
f90bb153 | 326 | .pci_irq_fixup = maple_pci_irq_fixup, |
1da177e4 LT |
327 | .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq, |
328 | .restart = maple_restart, | |
1da177e4 LT |
329 | .halt = maple_halt, |
330 | .get_boot_time = maple_get_boot_time, | |
331 | .set_rtc_time = maple_set_rtc_time, | |
332 | .get_rtc_time = maple_get_rtc_time, | |
10f7e7c1 | 333 | .calibrate_decr = generic_calibrate_decr, |
1da177e4 | 334 | .progress = maple_progress, |
a0652fc9 | 335 | .power_save = power4_idle, |
1da177e4 | 336 | }; |
8f101a05 HC |
337 | |
338 | #ifdef CONFIG_EDAC | |
339 | /* | |
340 | * Register a platform device for CPC925 memory controller on | |
8a0360a5 | 341 | * all boards with U3H (CPC925) bridge. |
8f101a05 | 342 | */ |
8f101a05 HC |
343 | static int __init maple_cpc925_edac_setup(void) |
344 | { | |
345 | struct platform_device *pdev; | |
346 | struct device_node *np = NULL; | |
347 | struct resource r; | |
8f101a05 | 348 | int ret; |
8a0360a5 DES |
349 | volatile void __iomem *mem; |
350 | u32 rev; | |
8f101a05 HC |
351 | |
352 | np = of_find_node_by_type(NULL, "memory-controller"); | |
353 | if (!np) { | |
354 | printk(KERN_ERR "%s: Unable to find memory-controller node\n", | |
355 | __func__); | |
356 | return -ENODEV; | |
357 | } | |
358 | ||
359 | ret = of_address_to_resource(np, 0, &r); | |
360 | of_node_put(np); | |
361 | ||
362 | if (ret < 0) { | |
363 | printk(KERN_ERR "%s: Unable to get memory-controller reg\n", | |
364 | __func__); | |
365 | return -ENODEV; | |
366 | } | |
367 | ||
8a0360a5 DES |
368 | mem = ioremap(r.start, resource_size(&r)); |
369 | if (!mem) { | |
370 | printk(KERN_ERR "%s: Unable to map memory-controller memory\n", | |
371 | __func__); | |
372 | return -ENOMEM; | |
373 | } | |
374 | ||
375 | rev = __raw_readl(mem); | |
376 | iounmap(mem); | |
377 | ||
378 | if (rev < 0x34 || rev > 0x3f) { /* U3H */ | |
379 | printk(KERN_ERR "%s: Non-CPC925(U3H) bridge revision: %02x\n", | |
380 | __func__, rev); | |
381 | return 0; | |
382 | } | |
383 | ||
8f101a05 HC |
384 | pdev = platform_device_register_simple("cpc925_edac", 0, &r, 1); |
385 | if (IS_ERR(pdev)) | |
386 | return PTR_ERR(pdev); | |
387 | ||
388 | printk(KERN_INFO "%s: CPC925 platform device created\n", __func__); | |
389 | ||
390 | return 0; | |
391 | } | |
392 | machine_device_initcall(maple, maple_cpc925_edac_setup); | |
393 | #endif |