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2e0c3370 OJ |
1 | /* |
2 | * Copyright (C) 2007 PA Semi, Inc | |
3 | * | |
4 | * Authors: Egor Martovetsky <egor@pasemi.com> | |
5 | * Olof Johansson <olof@lixom.net> | |
6 | * | |
7 | * Maintained by: Olof Johansson <olof@lixom.net> | |
8 | * | |
9 | * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c: | |
10 | * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | */ | |
27 | ||
28 | #include <linux/cpufreq.h> | |
29 | #include <linux/timer.h> | |
30 | ||
31 | #include <asm/hw_irq.h> | |
32 | #include <asm/io.h> | |
33 | #include <asm/prom.h> | |
2abb7019 | 34 | #include <asm/time.h> |
2e0c3370 OJ |
35 | |
36 | #define SDCASR_REG 0x0100 | |
37 | #define SDCASR_REG_STRIDE 0x1000 | |
38 | #define SDCPWR_CFGA0_REG 0x0100 | |
39 | #define SDCPWR_PWST0_REG 0x0000 | |
40 | #define SDCPWR_GIZTIME_REG 0x0440 | |
41 | ||
42 | /* SDCPWR_GIZTIME_REG fields */ | |
43 | #define SDCPWR_GIZTIME_GR 0x80000000 | |
44 | #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff | |
45 | ||
46 | /* Offset of ASR registers from SDC base */ | |
47 | #define SDCASR_OFFSET 0x120000 | |
48 | ||
49 | static void __iomem *sdcpwr_mapbase; | |
50 | static void __iomem *sdcasr_mapbase; | |
51 | ||
52 | static DEFINE_MUTEX(pas_switch_mutex); | |
53 | ||
54 | /* Current astate, is used when waking up from power savings on | |
55 | * one core, in case the other core has switched states during | |
56 | * the idle time. | |
57 | */ | |
58 | static int current_astate; | |
59 | ||
60 | /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */ | |
61 | static struct cpufreq_frequency_table pas_freqs[] = { | |
62 | {0, 0}, | |
63 | {1, 0}, | |
64 | {2, 0}, | |
65 | {3, 0}, | |
66 | {4, 0}, | |
67 | {0, CPUFREQ_TABLE_END}, | |
68 | }; | |
69 | ||
70 | static struct freq_attr *pas_cpu_freqs_attr[] = { | |
71 | &cpufreq_freq_attr_scaling_available_freqs, | |
72 | NULL, | |
73 | }; | |
74 | ||
75 | /* | |
76 | * hardware specific functions | |
77 | */ | |
78 | ||
79 | static int get_astate_freq(int astate) | |
80 | { | |
81 | u32 ret; | |
82 | ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10)); | |
83 | ||
84 | return ret & 0x3f; | |
85 | } | |
86 | ||
87 | static int get_cur_astate(int cpu) | |
88 | { | |
89 | u32 ret; | |
90 | ||
91 | ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG); | |
92 | ret = (ret >> (cpu * 4)) & 0x7; | |
93 | ||
94 | return ret; | |
95 | } | |
96 | ||
97 | static int get_gizmo_latency(void) | |
98 | { | |
99 | u32 giztime, ret; | |
100 | ||
101 | giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG); | |
102 | ||
103 | /* just provide the upper bound */ | |
104 | if (giztime & SDCPWR_GIZTIME_GR) | |
105 | ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000; | |
106 | else | |
107 | ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000; | |
108 | ||
109 | return ret; | |
110 | } | |
111 | ||
112 | static void set_astate(int cpu, unsigned int astate) | |
113 | { | |
114 | u64 flags; | |
115 | ||
116 | /* Return if called before init has run */ | |
117 | if (unlikely(!sdcasr_mapbase)) | |
118 | return; | |
119 | ||
120 | local_irq_save(flags); | |
121 | ||
122 | out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate); | |
123 | ||
124 | local_irq_restore(flags); | |
125 | } | |
126 | ||
127 | void restore_astate(int cpu) | |
128 | { | |
129 | set_astate(cpu, current_astate); | |
130 | } | |
131 | ||
132 | /* | |
133 | * cpufreq functions | |
134 | */ | |
135 | ||
136 | static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy) | |
137 | { | |
12d371a6 SR |
138 | const u32 *max_freqp; |
139 | u32 max_freq; | |
2e0c3370 OJ |
140 | int i, cur_astate; |
141 | struct resource res; | |
142 | struct device_node *cpu, *dn; | |
143 | int err = -ENODEV; | |
144 | ||
145 | cpu = of_get_cpu_node(policy->cpu, NULL); | |
146 | ||
147 | if (!cpu) | |
148 | goto out; | |
149 | ||
0d08a847 OJ |
150 | dn = of_find_compatible_node(NULL, NULL, "1682m-sdc"); |
151 | if (!dn) | |
152 | dn = of_find_compatible_node(NULL, NULL, | |
153 | "pasemi,pwrficient-sdc"); | |
2e0c3370 OJ |
154 | if (!dn) |
155 | goto out; | |
156 | err = of_address_to_resource(dn, 0, &res); | |
157 | of_node_put(dn); | |
158 | if (err) | |
159 | goto out; | |
160 | sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000); | |
161 | if (!sdcasr_mapbase) { | |
162 | err = -EINVAL; | |
163 | goto out; | |
164 | } | |
165 | ||
0d08a847 OJ |
166 | dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo"); |
167 | if (!dn) | |
168 | dn = of_find_compatible_node(NULL, NULL, | |
169 | "pasemi,pwrficient-gizmo"); | |
2e0c3370 OJ |
170 | if (!dn) { |
171 | err = -ENODEV; | |
172 | goto out_unmap_sdcasr; | |
173 | } | |
174 | err = of_address_to_resource(dn, 0, &res); | |
175 | of_node_put(dn); | |
176 | if (err) | |
177 | goto out_unmap_sdcasr; | |
178 | sdcpwr_mapbase = ioremap(res.start, 0x1000); | |
179 | if (!sdcpwr_mapbase) { | |
180 | err = -EINVAL; | |
181 | goto out_unmap_sdcasr; | |
182 | } | |
183 | ||
184 | pr_debug("init cpufreq on CPU %d\n", policy->cpu); | |
185 | ||
12d371a6 SR |
186 | max_freqp = of_get_property(cpu, "clock-frequency", NULL); |
187 | if (!max_freqp) { | |
2e0c3370 OJ |
188 | err = -EINVAL; |
189 | goto out_unmap_sdcpwr; | |
190 | } | |
191 | ||
192 | /* we need the freq in kHz */ | |
12d371a6 | 193 | max_freq = *max_freqp / 1000; |
2e0c3370 | 194 | |
12d371a6 | 195 | pr_debug("max clock-frequency is at %u kHz\n", max_freq); |
2e0c3370 OJ |
196 | pr_debug("initializing frequency table\n"); |
197 | ||
198 | /* initialize frequency table */ | |
199 | for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) { | |
200 | pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000; | |
201 | pr_debug("%d: %d\n", i, pas_freqs[i].frequency); | |
202 | } | |
203 | ||
2e0c3370 OJ |
204 | policy->cpuinfo.transition_latency = get_gizmo_latency(); |
205 | ||
206 | cur_astate = get_cur_astate(policy->cpu); | |
207 | pr_debug("current astate is at %d\n",cur_astate); | |
208 | ||
209 | policy->cur = pas_freqs[cur_astate].frequency; | |
210 | policy->cpus = cpu_online_map; | |
211 | ||
2abb7019 OJ |
212 | ppc_proc_freq = policy->cur * 1000ul; |
213 | ||
2e0c3370 OJ |
214 | cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu); |
215 | ||
216 | /* this ensures that policy->cpuinfo_min and policy->cpuinfo_max | |
217 | * are set correctly | |
218 | */ | |
219 | return cpufreq_frequency_table_cpuinfo(policy, pas_freqs); | |
220 | ||
221 | out_unmap_sdcpwr: | |
222 | iounmap(sdcpwr_mapbase); | |
223 | ||
224 | out_unmap_sdcasr: | |
225 | iounmap(sdcasr_mapbase); | |
226 | out: | |
227 | return err; | |
228 | } | |
229 | ||
230 | static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy) | |
231 | { | |
232 | if (sdcasr_mapbase) | |
233 | iounmap(sdcasr_mapbase); | |
234 | if (sdcpwr_mapbase) | |
235 | iounmap(sdcpwr_mapbase); | |
236 | ||
237 | cpufreq_frequency_table_put_attr(policy->cpu); | |
238 | return 0; | |
239 | } | |
240 | ||
241 | static int pas_cpufreq_verify(struct cpufreq_policy *policy) | |
242 | { | |
243 | return cpufreq_frequency_table_verify(policy, pas_freqs); | |
244 | } | |
245 | ||
246 | static int pas_cpufreq_target(struct cpufreq_policy *policy, | |
247 | unsigned int target_freq, | |
248 | unsigned int relation) | |
249 | { | |
250 | struct cpufreq_freqs freqs; | |
251 | int pas_astate_new; | |
252 | int i; | |
253 | ||
254 | cpufreq_frequency_table_target(policy, | |
255 | pas_freqs, | |
256 | target_freq, | |
257 | relation, | |
258 | &pas_astate_new); | |
259 | ||
260 | freqs.old = policy->cur; | |
261 | freqs.new = pas_freqs[pas_astate_new].frequency; | |
262 | freqs.cpu = policy->cpu; | |
263 | ||
264 | mutex_lock(&pas_switch_mutex); | |
265 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
266 | ||
267 | pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n", | |
268 | policy->cpu, | |
269 | pas_freqs[pas_astate_new].frequency, | |
270 | pas_freqs[pas_astate_new].index); | |
271 | ||
272 | current_astate = pas_astate_new; | |
273 | ||
274 | for_each_online_cpu(i) | |
275 | set_astate(i, pas_astate_new); | |
276 | ||
277 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
278 | mutex_unlock(&pas_switch_mutex); | |
279 | ||
2abb7019 | 280 | ppc_proc_freq = freqs.new * 1000ul; |
2e0c3370 OJ |
281 | return 0; |
282 | } | |
283 | ||
284 | static struct cpufreq_driver pas_cpufreq_driver = { | |
285 | .name = "pas-cpufreq", | |
286 | .owner = THIS_MODULE, | |
287 | .flags = CPUFREQ_CONST_LOOPS, | |
288 | .init = pas_cpufreq_cpu_init, | |
289 | .exit = pas_cpufreq_cpu_exit, | |
290 | .verify = pas_cpufreq_verify, | |
291 | .target = pas_cpufreq_target, | |
292 | .attr = pas_cpu_freqs_attr, | |
293 | }; | |
294 | ||
295 | /* | |
296 | * module init and destoy | |
297 | */ | |
298 | ||
299 | static int __init pas_cpufreq_init(void) | |
300 | { | |
0d08a847 OJ |
301 | if (!machine_is_compatible("PA6T-1682M") && |
302 | !machine_is_compatible("pasemi,pwrficient")) | |
2e0c3370 OJ |
303 | return -ENODEV; |
304 | ||
305 | return cpufreq_register_driver(&pas_cpufreq_driver); | |
306 | } | |
307 | ||
308 | static void __exit pas_cpufreq_exit(void) | |
309 | { | |
310 | cpufreq_unregister_driver(&pas_cpufreq_driver); | |
311 | } | |
312 | ||
313 | module_init(pas_cpufreq_init); | |
314 | module_exit(pas_cpufreq_exit); | |
315 | ||
316 | MODULE_LICENSE("GPL"); | |
317 | MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>"); |