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8ee9d857 OJ |
1 | /* |
2 | * Copyright (C) 2006-2007 PA Semi, Inc | |
3 | * | |
4 | * Common functions for DMA access on PA Semi PWRficient | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
afea3278 | 20 | #include <linux/kernel.h> |
8ee9d857 OJ |
21 | #include <linux/init.h> |
22 | #include <linux/module.h> | |
23 | #include <linux/pci.h> | |
24 | #include <linux/of.h> | |
25 | ||
26 | #include <asm/pasemi_dma.h> | |
27 | ||
28 | #define MAX_TXCH 64 | |
29 | #define MAX_RXCH 64 | |
f37203b5 | 30 | #define MAX_FLAGS 64 |
8ee9d857 OJ |
31 | |
32 | static struct pasdma_status *dma_status; | |
33 | ||
34 | static void __iomem *iob_regs; | |
35 | static void __iomem *mac_regs[6]; | |
36 | static void __iomem *dma_regs; | |
37 | ||
38 | static int base_hw_irq; | |
39 | ||
40 | static int num_txch, num_rxch; | |
41 | ||
42 | static struct pci_dev *dma_pdev; | |
43 | ||
44 | /* Bitmaps to handle allocation of channels */ | |
45 | ||
46 | static DECLARE_BITMAP(txch_free, MAX_TXCH); | |
47 | static DECLARE_BITMAP(rxch_free, MAX_RXCH); | |
f37203b5 | 48 | static DECLARE_BITMAP(flags_free, MAX_FLAGS); |
8ee9d857 OJ |
49 | |
50 | /* pasemi_read_iob_reg - read IOB register | |
51 | * @reg: Register to read (offset into PCI CFG space) | |
52 | */ | |
53 | unsigned int pasemi_read_iob_reg(unsigned int reg) | |
54 | { | |
55 | return in_le32(iob_regs+reg); | |
56 | } | |
57 | EXPORT_SYMBOL(pasemi_read_iob_reg); | |
58 | ||
59 | /* pasemi_write_iob_reg - write IOB register | |
60 | * @reg: Register to write to (offset into PCI CFG space) | |
61 | * @val: Value to write | |
62 | */ | |
63 | void pasemi_write_iob_reg(unsigned int reg, unsigned int val) | |
64 | { | |
65 | out_le32(iob_regs+reg, val); | |
66 | } | |
67 | EXPORT_SYMBOL(pasemi_write_iob_reg); | |
68 | ||
69 | /* pasemi_read_mac_reg - read MAC register | |
70 | * @intf: MAC interface | |
71 | * @reg: Register to read (offset into PCI CFG space) | |
72 | */ | |
73 | unsigned int pasemi_read_mac_reg(int intf, unsigned int reg) | |
74 | { | |
75 | return in_le32(mac_regs[intf]+reg); | |
76 | } | |
77 | EXPORT_SYMBOL(pasemi_read_mac_reg); | |
78 | ||
79 | /* pasemi_write_mac_reg - write MAC register | |
80 | * @intf: MAC interface | |
81 | * @reg: Register to write to (offset into PCI CFG space) | |
82 | * @val: Value to write | |
83 | */ | |
84 | void pasemi_write_mac_reg(int intf, unsigned int reg, unsigned int val) | |
85 | { | |
86 | out_le32(mac_regs[intf]+reg, val); | |
87 | } | |
88 | EXPORT_SYMBOL(pasemi_write_mac_reg); | |
89 | ||
90 | /* pasemi_read_dma_reg - read DMA register | |
91 | * @reg: Register to read (offset into PCI CFG space) | |
92 | */ | |
93 | unsigned int pasemi_read_dma_reg(unsigned int reg) | |
94 | { | |
95 | return in_le32(dma_regs+reg); | |
96 | } | |
97 | EXPORT_SYMBOL(pasemi_read_dma_reg); | |
98 | ||
99 | /* pasemi_write_dma_reg - write DMA register | |
100 | * @reg: Register to write to (offset into PCI CFG space) | |
101 | * @val: Value to write | |
102 | */ | |
103 | void pasemi_write_dma_reg(unsigned int reg, unsigned int val) | |
104 | { | |
105 | out_le32(dma_regs+reg, val); | |
106 | } | |
107 | EXPORT_SYMBOL(pasemi_write_dma_reg); | |
108 | ||
109 | static int pasemi_alloc_tx_chan(enum pasemi_dmachan_type type) | |
110 | { | |
111 | int bit; | |
112 | int start, limit; | |
113 | ||
114 | switch (type & (TXCHAN_EVT0|TXCHAN_EVT1)) { | |
115 | case TXCHAN_EVT0: | |
116 | start = 0; | |
117 | limit = 10; | |
118 | break; | |
119 | case TXCHAN_EVT1: | |
120 | start = 10; | |
121 | limit = MAX_TXCH; | |
122 | break; | |
123 | default: | |
124 | start = 0; | |
125 | limit = MAX_TXCH; | |
126 | break; | |
127 | } | |
128 | retry: | |
129 | bit = find_next_bit(txch_free, MAX_TXCH, start); | |
130 | if (bit >= limit) | |
131 | return -ENOSPC; | |
132 | if (!test_and_clear_bit(bit, txch_free)) | |
133 | goto retry; | |
134 | ||
135 | return bit; | |
136 | } | |
137 | ||
138 | static void pasemi_free_tx_chan(int chan) | |
139 | { | |
140 | BUG_ON(test_bit(chan, txch_free)); | |
141 | set_bit(chan, txch_free); | |
142 | } | |
143 | ||
144 | static int pasemi_alloc_rx_chan(void) | |
145 | { | |
146 | int bit; | |
147 | retry: | |
148 | bit = find_first_bit(rxch_free, MAX_RXCH); | |
149 | if (bit >= MAX_TXCH) | |
150 | return -ENOSPC; | |
151 | if (!test_and_clear_bit(bit, rxch_free)) | |
152 | goto retry; | |
153 | ||
154 | return bit; | |
155 | } | |
156 | ||
157 | static void pasemi_free_rx_chan(int chan) | |
158 | { | |
159 | BUG_ON(test_bit(chan, rxch_free)); | |
160 | set_bit(chan, rxch_free); | |
161 | } | |
162 | ||
163 | /* pasemi_dma_alloc_chan - Allocate a DMA channel | |
164 | * @type: Type of channel to allocate | |
165 | * @total_size: Total size of structure to allocate (to allow for more | |
166 | * room behind the structure to be used by the client) | |
167 | * @offset: Offset in bytes from start of the total structure to the beginning | |
168 | * of struct pasemi_dmachan. Needed when struct pasemi_dmachan is | |
169 | * not the first member of the client structure. | |
170 | * | |
171 | * pasemi_dma_alloc_chan allocates a DMA channel for use by a client. The | |
172 | * type argument specifies whether it's a RX or TX channel, and in the case | |
173 | * of TX channels which group it needs to belong to (if any). | |
174 | * | |
175 | * Returns a pointer to the total structure allocated on success, NULL | |
176 | * on failure. | |
177 | */ | |
178 | void *pasemi_dma_alloc_chan(enum pasemi_dmachan_type type, | |
179 | int total_size, int offset) | |
180 | { | |
181 | void *buf; | |
182 | struct pasemi_dmachan *chan; | |
183 | int chno; | |
184 | ||
185 | BUG_ON(total_size < sizeof(struct pasemi_dmachan)); | |
186 | ||
187 | buf = kzalloc(total_size, GFP_KERNEL); | |
188 | ||
189 | if (!buf) | |
190 | return NULL; | |
191 | chan = buf + offset; | |
192 | ||
193 | chan->priv = buf; | |
194 | ||
195 | switch (type & (TXCHAN|RXCHAN)) { | |
196 | case RXCHAN: | |
197 | chno = pasemi_alloc_rx_chan(); | |
198 | chan->chno = chno; | |
199 | chan->irq = irq_create_mapping(NULL, | |
200 | base_hw_irq + num_txch + chno); | |
201 | chan->status = &dma_status->rx_sta[chno]; | |
202 | break; | |
203 | case TXCHAN: | |
204 | chno = pasemi_alloc_tx_chan(type); | |
205 | chan->chno = chno; | |
206 | chan->irq = irq_create_mapping(NULL, base_hw_irq + chno); | |
207 | chan->status = &dma_status->tx_sta[chno]; | |
208 | break; | |
209 | } | |
210 | ||
211 | chan->chan_type = type; | |
212 | ||
213 | return chan; | |
214 | } | |
215 | EXPORT_SYMBOL(pasemi_dma_alloc_chan); | |
216 | ||
217 | /* pasemi_dma_free_chan - Free a previously allocated channel | |
218 | * @chan: Channel to free | |
219 | * | |
220 | * Frees a previously allocated channel. It will also deallocate any | |
221 | * descriptor ring associated with the channel, if allocated. | |
222 | */ | |
223 | void pasemi_dma_free_chan(struct pasemi_dmachan *chan) | |
224 | { | |
225 | if (chan->ring_virt) | |
226 | pasemi_dma_free_ring(chan); | |
227 | ||
228 | switch (chan->chan_type & (RXCHAN|TXCHAN)) { | |
229 | case RXCHAN: | |
230 | pasemi_free_rx_chan(chan->chno); | |
231 | break; | |
232 | case TXCHAN: | |
233 | pasemi_free_tx_chan(chan->chno); | |
234 | break; | |
235 | } | |
236 | ||
237 | kfree(chan->priv); | |
238 | } | |
239 | EXPORT_SYMBOL(pasemi_dma_free_chan); | |
240 | ||
241 | /* pasemi_dma_alloc_ring - Allocate descriptor ring for a channel | |
242 | * @chan: Channel for which to allocate | |
243 | * @ring_size: Ring size in 64-bit (8-byte) words | |
244 | * | |
245 | * Allocate a descriptor ring for a channel. Returns 0 on success, errno | |
246 | * on failure. The passed in struct pasemi_dmachan is updated with the | |
247 | * virtual and DMA addresses of the ring. | |
248 | */ | |
249 | int pasemi_dma_alloc_ring(struct pasemi_dmachan *chan, int ring_size) | |
250 | { | |
251 | BUG_ON(chan->ring_virt); | |
252 | ||
253 | chan->ring_size = ring_size; | |
254 | ||
255 | chan->ring_virt = dma_alloc_coherent(&dma_pdev->dev, | |
256 | ring_size * sizeof(u64), | |
257 | &chan->ring_dma, GFP_KERNEL); | |
258 | ||
259 | if (!chan->ring_virt) | |
260 | return -ENOMEM; | |
261 | ||
262 | memset(chan->ring_virt, 0, ring_size * sizeof(u64)); | |
263 | ||
264 | return 0; | |
265 | } | |
266 | EXPORT_SYMBOL(pasemi_dma_alloc_ring); | |
267 | ||
268 | /* pasemi_dma_free_ring - Free an allocated descriptor ring for a channel | |
269 | * @chan: Channel for which to free the descriptor ring | |
270 | * | |
271 | * Frees a previously allocated descriptor ring for a channel. | |
272 | */ | |
273 | void pasemi_dma_free_ring(struct pasemi_dmachan *chan) | |
274 | { | |
275 | BUG_ON(!chan->ring_virt); | |
276 | ||
277 | dma_free_coherent(&dma_pdev->dev, chan->ring_size * sizeof(u64), | |
278 | chan->ring_virt, chan->ring_dma); | |
279 | chan->ring_virt = NULL; | |
280 | chan->ring_size = 0; | |
281 | chan->ring_dma = 0; | |
282 | } | |
283 | EXPORT_SYMBOL(pasemi_dma_free_ring); | |
284 | ||
285 | /* pasemi_dma_start_chan - Start a DMA channel | |
286 | * @chan: Channel to start | |
287 | * @cmdsta: Additional CCMDSTA/TCMDSTA bits to write | |
288 | * | |
289 | * Enables (starts) a DMA channel with optional additional arguments. | |
290 | */ | |
291 | void pasemi_dma_start_chan(const struct pasemi_dmachan *chan, const u32 cmdsta) | |
292 | { | |
293 | if (chan->chan_type == RXCHAN) | |
294 | pasemi_write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno), | |
295 | cmdsta | PAS_DMA_RXCHAN_CCMDSTA_EN); | |
296 | else | |
297 | pasemi_write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno), | |
298 | cmdsta | PAS_DMA_TXCHAN_TCMDSTA_EN); | |
299 | } | |
300 | EXPORT_SYMBOL(pasemi_dma_start_chan); | |
301 | ||
302 | /* pasemi_dma_stop_chan - Stop a DMA channel | |
303 | * @chan: Channel to stop | |
304 | * | |
305 | * Stops (disables) a DMA channel. This is done by setting the ST bit in the | |
306 | * CMDSTA register and waiting on the ACT (active) bit to clear, then | |
307 | * finally disabling the whole channel. | |
308 | * | |
309 | * This function will only try for a short while for the channel to stop, if | |
310 | * it doesn't it will return failure. | |
311 | * | |
312 | * Returns 1 on success, 0 on failure. | |
313 | */ | |
314 | #define MAX_RETRIES 5000 | |
315 | int pasemi_dma_stop_chan(const struct pasemi_dmachan *chan) | |
316 | { | |
317 | int reg, retries; | |
318 | u32 sta; | |
319 | ||
320 | if (chan->chan_type == RXCHAN) { | |
321 | reg = PAS_DMA_RXCHAN_CCMDSTA(chan->chno); | |
322 | pasemi_write_dma_reg(reg, PAS_DMA_RXCHAN_CCMDSTA_ST); | |
323 | for (retries = 0; retries < MAX_RETRIES; retries++) { | |
324 | sta = pasemi_read_dma_reg(reg); | |
325 | if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)) { | |
326 | pasemi_write_dma_reg(reg, 0); | |
327 | return 1; | |
328 | } | |
329 | cond_resched(); | |
330 | } | |
331 | } else { | |
332 | reg = PAS_DMA_TXCHAN_TCMDSTA(chan->chno); | |
333 | pasemi_write_dma_reg(reg, PAS_DMA_TXCHAN_TCMDSTA_ST); | |
334 | for (retries = 0; retries < MAX_RETRIES; retries++) { | |
335 | sta = pasemi_read_dma_reg(reg); | |
336 | if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)) { | |
337 | pasemi_write_dma_reg(reg, 0); | |
338 | return 1; | |
339 | } | |
340 | cond_resched(); | |
341 | } | |
342 | } | |
343 | ||
344 | return 0; | |
345 | } | |
346 | EXPORT_SYMBOL(pasemi_dma_stop_chan); | |
347 | ||
348 | /* pasemi_dma_alloc_buf - Allocate a buffer to use for DMA | |
349 | * @chan: Channel to allocate for | |
350 | * @size: Size of buffer in bytes | |
351 | * @handle: DMA handle | |
352 | * | |
353 | * Allocate a buffer to be used by the DMA engine for read/write, | |
354 | * similar to dma_alloc_coherent(). | |
355 | * | |
356 | * Returns the virtual address of the buffer, or NULL in case of failure. | |
357 | */ | |
358 | void *pasemi_dma_alloc_buf(struct pasemi_dmachan *chan, int size, | |
359 | dma_addr_t *handle) | |
360 | { | |
361 | return dma_alloc_coherent(&dma_pdev->dev, size, handle, GFP_KERNEL); | |
362 | } | |
363 | EXPORT_SYMBOL(pasemi_dma_alloc_buf); | |
364 | ||
365 | /* pasemi_dma_free_buf - Free a buffer used for DMA | |
366 | * @chan: Channel the buffer was allocated for | |
367 | * @size: Size of buffer in bytes | |
368 | * @handle: DMA handle | |
369 | * | |
370 | * Frees a previously allocated buffer. | |
371 | */ | |
372 | void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, | |
373 | dma_addr_t *handle) | |
374 | { | |
375 | dma_free_coherent(&dma_pdev->dev, size, handle, GFP_KERNEL); | |
376 | } | |
377 | EXPORT_SYMBOL(pasemi_dma_free_buf); | |
378 | ||
f37203b5 OJ |
379 | /* pasemi_dma_alloc_flag - Allocate a flag (event) for channel syncronization |
380 | * | |
381 | * Allocates a flag for use with channel syncronization (event descriptors). | |
382 | * Returns allocated flag (0-63), < 0 on error. | |
383 | */ | |
384 | int pasemi_dma_alloc_flag(void) | |
385 | { | |
386 | int bit; | |
387 | ||
388 | retry: | |
389 | bit = find_next_bit(flags_free, MAX_FLAGS, 0); | |
390 | if (bit >= MAX_FLAGS) | |
391 | return -ENOSPC; | |
392 | if (!test_and_clear_bit(bit, flags_free)) | |
393 | goto retry; | |
394 | ||
395 | return bit; | |
396 | } | |
397 | EXPORT_SYMBOL(pasemi_dma_alloc_flag); | |
398 | ||
399 | ||
400 | /* pasemi_dma_free_flag - Deallocates a flag (event) | |
401 | * @flag: Flag number to deallocate | |
402 | * | |
403 | * Frees up a flag so it can be reused for other purposes. | |
404 | */ | |
405 | void pasemi_dma_free_flag(int flag) | |
406 | { | |
407 | BUG_ON(test_bit(flag, flags_free)); | |
408 | BUG_ON(flag >= MAX_FLAGS); | |
409 | set_bit(flag, flags_free); | |
410 | } | |
411 | EXPORT_SYMBOL(pasemi_dma_free_flag); | |
412 | ||
413 | ||
414 | /* pasemi_dma_set_flag - Sets a flag (event) to 1 | |
415 | * @flag: Flag number to set active | |
416 | * | |
417 | * Sets the flag provided to 1. | |
418 | */ | |
419 | void pasemi_dma_set_flag(int flag) | |
420 | { | |
421 | BUG_ON(flag >= MAX_FLAGS); | |
422 | if (flag < 32) | |
423 | pasemi_write_dma_reg(PAS_DMA_TXF_SFLG0, 1 << flag); | |
424 | else | |
425 | pasemi_write_dma_reg(PAS_DMA_TXF_SFLG1, 1 << flag); | |
426 | } | |
427 | EXPORT_SYMBOL(pasemi_dma_set_flag); | |
428 | ||
429 | /* pasemi_dma_clear_flag - Sets a flag (event) to 0 | |
430 | * @flag: Flag number to set inactive | |
431 | * | |
432 | * Sets the flag provided to 0. | |
433 | */ | |
434 | void pasemi_dma_clear_flag(int flag) | |
435 | { | |
436 | BUG_ON(flag >= MAX_FLAGS); | |
437 | if (flag < 32) | |
438 | pasemi_write_dma_reg(PAS_DMA_TXF_CFLG0, 1 << flag); | |
439 | else | |
440 | pasemi_write_dma_reg(PAS_DMA_TXF_CFLG1, 1 << flag); | |
441 | } | |
442 | EXPORT_SYMBOL(pasemi_dma_clear_flag); | |
443 | ||
8ee9d857 OJ |
444 | static void *map_onedev(struct pci_dev *p, int index) |
445 | { | |
446 | struct device_node *dn; | |
447 | void __iomem *ret; | |
448 | ||
449 | dn = pci_device_to_OF_node(p); | |
450 | if (!dn) | |
451 | goto fallback; | |
452 | ||
453 | ret = of_iomap(dn, index); | |
454 | if (!ret) | |
455 | goto fallback; | |
456 | ||
457 | return ret; | |
458 | fallback: | |
459 | /* This is hardcoded and ugly, but we have some firmware versions | |
460 | * that don't provide the register space in the device tree. Luckily | |
461 | * they are at well-known locations so we can just do the math here. | |
462 | */ | |
463 | return ioremap(0xe0000000 + (p->devfn << 12), 0x2000); | |
464 | } | |
465 | ||
466 | /* pasemi_dma_init - Initialize the PA Semi DMA library | |
467 | * | |
468 | * This function initializes the DMA library. It must be called before | |
469 | * any other function in the library. | |
470 | * | |
471 | * Returns 0 on success, errno on failure. | |
472 | */ | |
473 | int pasemi_dma_init(void) | |
474 | { | |
475 | static spinlock_t init_lock = SPIN_LOCK_UNLOCKED; | |
476 | struct pci_dev *iob_pdev; | |
477 | struct pci_dev *pdev; | |
478 | struct resource res; | |
479 | struct device_node *dn; | |
480 | int i, intf, err = 0; | |
afea3278 | 481 | unsigned long timeout; |
8ee9d857 OJ |
482 | u32 tmp; |
483 | ||
484 | if (!machine_is(pasemi)) | |
485 | return -ENODEV; | |
486 | ||
487 | spin_lock(&init_lock); | |
488 | ||
489 | /* Make sure we haven't already initialized */ | |
490 | if (dma_pdev) | |
491 | goto out; | |
492 | ||
493 | iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL); | |
494 | if (!iob_pdev) { | |
495 | BUG(); | |
496 | printk(KERN_WARNING "Can't find I/O Bridge\n"); | |
497 | err = -ENODEV; | |
498 | goto out; | |
499 | } | |
500 | iob_regs = map_onedev(iob_pdev, 0); | |
501 | ||
502 | dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL); | |
503 | if (!dma_pdev) { | |
504 | BUG(); | |
505 | printk(KERN_WARNING "Can't find DMA controller\n"); | |
506 | err = -ENODEV; | |
507 | goto out; | |
508 | } | |
509 | dma_regs = map_onedev(dma_pdev, 0); | |
510 | base_hw_irq = virq_to_hw(dma_pdev->irq); | |
511 | ||
512 | pci_read_config_dword(dma_pdev, PAS_DMA_CAP_TXCH, &tmp); | |
513 | num_txch = (tmp & PAS_DMA_CAP_TXCH_TCHN_M) >> PAS_DMA_CAP_TXCH_TCHN_S; | |
514 | ||
515 | pci_read_config_dword(dma_pdev, PAS_DMA_CAP_RXCH, &tmp); | |
516 | num_rxch = (tmp & PAS_DMA_CAP_RXCH_RCHN_M) >> PAS_DMA_CAP_RXCH_RCHN_S; | |
517 | ||
518 | intf = 0; | |
519 | for (pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa006, NULL); | |
520 | pdev; | |
521 | pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa006, pdev)) | |
522 | mac_regs[intf++] = map_onedev(pdev, 0); | |
523 | ||
524 | pci_dev_put(pdev); | |
525 | ||
526 | for (pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa005, NULL); | |
527 | pdev; | |
528 | pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa005, pdev)) | |
529 | mac_regs[intf++] = map_onedev(pdev, 0); | |
530 | ||
531 | pci_dev_put(pdev); | |
532 | ||
533 | dn = pci_device_to_OF_node(iob_pdev); | |
534 | if (dn) | |
535 | err = of_address_to_resource(dn, 1, &res); | |
536 | if (!dn || err) { | |
537 | /* Fallback for old firmware */ | |
538 | res.start = 0xfd800000; | |
539 | res.end = res.start + 0x1000; | |
540 | } | |
541 | dma_status = __ioremap(res.start, res.end-res.start, 0); | |
542 | pci_dev_put(iob_pdev); | |
543 | ||
544 | for (i = 0; i < MAX_TXCH; i++) | |
545 | __set_bit(i, txch_free); | |
546 | ||
547 | for (i = 0; i < MAX_RXCH; i++) | |
548 | __set_bit(i, rxch_free); | |
549 | ||
afea3278 OJ |
550 | timeout = jiffies + HZ; |
551 | pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, 0); | |
552 | while (pasemi_read_dma_reg(PAS_DMA_COM_RXSTA) & 1) { | |
553 | if (time_after(jiffies, timeout)) { | |
554 | pr_warning("Warning: Could not disable RX section\n"); | |
555 | break; | |
556 | } | |
557 | } | |
558 | ||
559 | timeout = jiffies + HZ; | |
560 | pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, 0); | |
561 | while (pasemi_read_dma_reg(PAS_DMA_COM_TXSTA) & 1) { | |
562 | if (time_after(jiffies, timeout)) { | |
563 | pr_warning("Warning: Could not disable TX section\n"); | |
564 | break; | |
565 | } | |
566 | } | |
567 | ||
568 | /* setup resource allocations for the different DMA sections */ | |
569 | tmp = pasemi_read_dma_reg(PAS_DMA_COM_CFG); | |
570 | pasemi_write_dma_reg(PAS_DMA_COM_CFG, tmp | 0x18000000); | |
571 | ||
572 | /* enable tx section */ | |
573 | pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN); | |
574 | ||
575 | /* enable rx section */ | |
576 | pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN); | |
577 | ||
f37203b5 OJ |
578 | for (i = 0; i < MAX_FLAGS; i++) |
579 | __set_bit(i, flags_free); | |
580 | ||
581 | /* clear all status flags */ | |
582 | pasemi_write_dma_reg(PAS_DMA_TXF_CFLG0, 0xffffffff); | |
583 | pasemi_write_dma_reg(PAS_DMA_TXF_CFLG1, 0xffffffff); | |
584 | ||
8ee9d857 OJ |
585 | printk(KERN_INFO "PA Semi PWRficient DMA library initialized " |
586 | "(%d tx, %d rx channels)\n", num_txch, num_rxch); | |
587 | ||
588 | out: | |
589 | spin_unlock(&init_lock); | |
590 | return err; | |
591 | } | |
06daa168 | 592 | EXPORT_SYMBOL(pasemi_dma_init); |