[mirror_ubuntu-eoan-kernel.git] / arch / powerpc / platforms / powermac / setup.c

/*
 *  Powermac setup and early boot code plus other random bits.
 *
 *  PowerPC version
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Adapted for Power Macintosh by Paul Mackerras
 *    Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
 *
 *  Derived from "arch/alpha/kernel/setup.c"
 *    Copyright (C) 1995 Linus Torvalds
 *
 *  Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

/*
 * bootup setup stuff..
 */

#include <linux/init.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/initrd.h>
#include <linux/vt_kern.h>
#include <linux/console.h>
#include <linux/pci.h>
#include <linux/adb.h>
#include <linux/cuda.h>
#include <linux/pmu.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/bitops.h>
#include <linux/suspend.h>
#include <linux/of_device.h>
#include <linux/of_platform.h>

#include <asm/reg.h>
#include <asm/sections.h>
#include <asm/prom.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/kexec.h>
#include <asm/pci-bridge.h>
#include <asm/ohare.h>
#include <asm/mediabay.h>
#include <asm/machdep.h>
#include <asm/dma.h>
#include <asm/cputable.h>
#include <asm/btext.h>
#include <asm/pmac_feature.h>
#include <asm/time.h>
#include <asm/mmu_context.h>
#include <asm/iommu.h>
#include <asm/smu.h>
#include <asm/pmc.h>
#include <asm/lmb.h>
#include <asm/udbg.h>

#include "pmac.h"

#undef SHOW_GATWICK_IRQS

int ppc_override_l2cr = 0;
int ppc_override_l2cr_value;
int has_l2cache = 0;

int pmac_newworld;

static int current_root_goodness = -1;

extern struct machdep_calls pmac_md;

#define DEFAULT_ROOT_DEVICE Root_SDA1	/* sda1 - slightly silly choice */

#ifdef CONFIG_PPC64
int sccdbg;
#endif

extern void zs_kgdb_hook(int tty_num);

sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
EXPORT_SYMBOL(sys_ctrler);

#ifdef CONFIG_PMAC_SMU
unsigned long smu_cmdbuf_abs;
EXPORT_SYMBOL(smu_cmdbuf_abs);
#endif

#ifdef CONFIG_SMP
extern struct smp_ops_t psurge_smp_ops;
extern struct smp_ops_t core99_smp_ops;
#endif /* CONFIG_SMP */

static void pmac_show_cpuinfo(struct seq_file *m)
{
	struct device_node *np;
	const char *pp;
	int plen;
	int mbmodel;
	unsigned int mbflags;
	char* mbname;

	mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
				    PMAC_MB_INFO_MODEL, 0);
	mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
				    PMAC_MB_INFO_FLAGS, 0);
	if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
			      (long) &mbname) != 0)
		mbname = "Unknown";

	/* find motherboard type */
	seq_printf(m, "machine\t\t: ");
	np = of_find_node_by_path("/");
	if (np != NULL) {
		pp = of_get_property(np, "model", NULL);
		if (pp != NULL)
			seq_printf(m, "%s\n", pp);
		else
			seq_printf(m, "PowerMac\n");
		pp = of_get_property(np, "compatible", &plen);
		if (pp != NULL) {
			seq_printf(m, "motherboard\t:");
			while (plen > 0) {
				int l = strlen(pp) + 1;
				seq_printf(m, " %s", pp);
				plen -= l;
				pp += l;
			}
			seq_printf(m, "\n");
		}
		of_node_put(np);
	} else
		seq_printf(m, "PowerMac\n");

	/* print parsed model */
	seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
	seq_printf(m, "pmac flags\t: %08x\n", mbflags);

	/* find l2 cache info */
	np = of_find_node_by_name(NULL, "l2-cache");
	if (np == NULL)
		np = of_find_node_by_type(NULL, "cache");
	if (np != NULL) {
		const unsigned int *ic =
			of_get_property(np, "i-cache-size", NULL);
		const unsigned int *dc =
			of_get_property(np, "d-cache-size", NULL);
		seq_printf(m, "L2 cache\t:");
		has_l2cache = 1;
		if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
			seq_printf(m, " %dK unified", *dc / 1024);
		} else {
			if (ic)
				seq_printf(m, " %dK instruction", *ic / 1024);
			if (dc)
				seq_printf(m, "%s %dK data",
					   (ic? " +": ""), *dc / 1024);
		}
		pp = of_get_property(np, "ram-type", NULL);
		if (pp)
			seq_printf(m, " %s", pp);
		seq_printf(m, "\n");
		of_node_put(np);
	}

	/* Indicate newworld/oldworld */
	seq_printf(m, "pmac-generation\t: %s\n",
		   pmac_newworld ? "NewWorld" : "OldWorld");
}

#ifndef CONFIG_ADB_CUDA
int find_via_cuda(void)
{
	struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");

	if (!dn)
		return 0;
	of_node_put(dn);
	printk("WARNING ! Your machine is CUDA-based but your kernel\n");
	printk("          wasn't compiled with CONFIG_ADB_CUDA option !\n");
	return 0;
}
#endif

#ifndef CONFIG_ADB_PMU
int find_via_pmu(void)
{
	struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");

	if (!dn)
		return 0;
	of_node_put(dn);
	printk("WARNING ! Your machine is PMU-based but your kernel\n");
	printk("          wasn't compiled with CONFIG_ADB_PMU option !\n");
	return 0;
}
#endif

#ifndef CONFIG_PMAC_SMU
int smu_init(void)
{
	/* should check and warn if SMU is present */
	return 0;
}
#endif

#ifdef CONFIG_PPC32
static volatile u32 *sysctrl_regs;

static void __init ohare_init(void)
{
	struct device_node *dn;

	/* this area has the CPU identification register
	   and some registers used by smp boards */
	sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);

	/*
	 * Turn on the L2 cache.
	 * We assume that we have a PSX memory controller iff
	 * we have an ohare I/O controller.
	 */
	dn = of_find_node_by_name(NULL, "ohare");
	if (dn) {
		of_node_put(dn);
		if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
			if (sysctrl_regs[4] & 0x10)
				sysctrl_regs[4] |= 0x04000020;
			else
				sysctrl_regs[4] |= 0x04000000;
			if(has_l2cache)
				printk(KERN_INFO "Level 2 cache enabled\n");
		}
	}
}

static void __init l2cr_init(void)
{
	/* Checks "l2cr-value" property in the registry */
	if (cpu_has_feature(CPU_FTR_L2CR)) {
		struct device_node *np = of_find_node_by_name(NULL, "cpus");
		if (np == 0)
			np = of_find_node_by_type(NULL, "cpu");
		if (np != 0) {
			const unsigned int *l2cr =
				of_get_property(np, "l2cr-value", NULL);
			if (l2cr != 0) {
				ppc_override_l2cr = 1;
				ppc_override_l2cr_value = *l2cr;
				_set_L2CR(0);
				_set_L2CR(ppc_override_l2cr_value);
			}
			of_node_put(np);
		}
	}

	if (ppc_override_l2cr)
		printk(KERN_INFO "L2CR overridden (0x%x), "
		       "backside cache is %s\n",
		       ppc_override_l2cr_value,
		       (ppc_override_l2cr_value & 0x80000000)
				? "enabled" : "disabled");
}
#endif

static void __init pmac_setup_arch(void)
{
	struct device_node *cpu, *ic;
	const int *fp;
	unsigned long pvr;

	pvr = PVR_VER(mfspr(SPRN_PVR));

	/* Set loops_per_jiffy to a half-way reasonable value,
	   for use until calibrate_delay gets called. */
	loops_per_jiffy = 50000000 / HZ;
	cpu = of_find_node_by_type(NULL, "cpu");
	if (cpu != NULL) {
		fp = of_get_property(cpu, "clock-frequency", NULL);
		if (fp != NULL) {
			if (pvr >= 0x30 && pvr < 0x80)
				/* PPC970 etc. */
				loops_per_jiffy = *fp / (3 * HZ);
			else if (pvr == 4 || pvr >= 8)
				/* 604, G3, G4 etc. */
				loops_per_jiffy = *fp / HZ;
			else
				/* 601, 603, etc. */
				loops_per_jiffy = *fp / (2 * HZ);
		}
		of_node_put(cpu);
	}

	/* See if newworld or oldworld */
	for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
		if (of_get_property(ic, "interrupt-controller", NULL))
			break;
	if (ic) {
		pmac_newworld = 1;
		of_node_put(ic);
	}

	/* Lookup PCI hosts */
	pmac_pci_init();

#ifdef CONFIG_PPC32
	ohare_init();
	l2cr_init();
#endif /* CONFIG_PPC32 */

#ifdef CONFIG_KGDB
	zs_kgdb_hook(0);
#endif

	find_via_cuda();
	find_via_pmu();
	smu_init();

#if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64)
	pmac_nvram_init();
#endif

#ifdef CONFIG_PPC32
#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
		ROOT_DEV = DEFAULT_ROOT_DEVICE;
#endif

#ifdef CONFIG_SMP
	/* Check for Core99 */
	ic = of_find_node_by_name(NULL, "uni-n");
	if (!ic)
		ic = of_find_node_by_name(NULL, "u3");
	if (!ic)
		ic = of_find_node_by_name(NULL, "u4");
	if (ic) {
		of_node_put(ic);
		smp_ops = &core99_smp_ops;
	}
#ifdef CONFIG_PPC32
	else {
		/*
		 * We have to set bits in cpu_possible_map here since the
		 * secondary CPU(s) aren't in the device tree, and
		 * setup_per_cpu_areas only allocates per-cpu data for
		 * CPUs in the cpu_possible_map.
		 */
		int cpu;

		for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
			cpu_set(cpu, cpu_possible_map);
		smp_ops = &psurge_smp_ops;
	}
#endif
#endif /* CONFIG_SMP */

#ifdef CONFIG_ADB
	if (strstr(cmd_line, "adb_sync")) {
		extern int __adb_probe_sync;
		__adb_probe_sync = 1;
	}
#endif /* CONFIG_ADB */
}

#ifdef CONFIG_SCSI
void note_scsi_host(struct device_node *node, void *host)
{
}
EXPORT_SYMBOL(note_scsi_host);
#endif

static int initializing = 1;

static int pmac_late_init(void)
{
	initializing = 0;
	/* this is udbg (which is __init) and we can later use it during
	 * cpu hotplug (in smp_core99_kick_cpu) */
	ppc_md.progress = NULL;
	return 0;
}
machine_late_initcall(powermac, pmac_late_init);

/*
 * This is __init_refok because we check for "initializing" before
 * touching any of the __init sensitive things and "initializing"
 * will be false after __init time. This can't be __init because it
 * can be called whenever a disk is first accessed.
 */
void __init_refok note_bootable_part(dev_t dev, int part, int goodness)
{
	char *p;

	if (!initializing)
		return;
	if ((goodness <= current_root_goodness) &&
	    ROOT_DEV != DEFAULT_ROOT_DEVICE)
		return;
	p = strstr(boot_command_line, "root=");
	if (p != NULL && (p == boot_command_line || p[-1] == ' '))
		return;

	ROOT_DEV = dev + part;
	current_root_goodness = goodness;
}

#ifdef CONFIG_ADB_CUDA
static void cuda_restart(void)
{
	struct adb_request req;

	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
	for (;;)
		cuda_poll();
}

static void cuda_shutdown(void)
{
	struct adb_request req;

	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
	for (;;)
		cuda_poll();
}

#else
#define cuda_restart()
#define cuda_shutdown()
#endif

#ifndef CONFIG_ADB_PMU
#define pmu_restart()
#define pmu_shutdown()
#endif

#ifndef CONFIG_PMAC_SMU
#define smu_restart()
#define smu_shutdown()
#endif

static void pmac_restart(char *cmd)
{
	switch (sys_ctrler) {
	case SYS_CTRLER_CUDA:
		cuda_restart();
		break;
	case SYS_CTRLER_PMU:
		pmu_restart();
		break;
	case SYS_CTRLER_SMU:
		smu_restart();
		break;
	default: ;
	}
}

static void pmac_power_off(void)
{
	switch (sys_ctrler) {
	case SYS_CTRLER_CUDA:
		cuda_shutdown();
		break;
	case SYS_CTRLER_PMU:
		pmu_shutdown();
		break;
	case SYS_CTRLER_SMU:
		smu_shutdown();
		break;
	default: ;
	}
}

static void
pmac_halt(void)
{
	pmac_power_off();
}

/* 
 * Early initialization.
 */
static void __init pmac_init_early(void)
{
	/* Enable early btext debug if requested */
	if (strstr(cmd_line, "btextdbg")) {
		udbg_adb_init_early();
		register_early_udbg_console();
	}

	/* Probe motherboard chipset */
	pmac_feature_init();

	/* Initialize debug stuff */
	udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
	udbg_adb_init(!!strstr(cmd_line, "btextdbg"));

#ifdef CONFIG_PPC64
	iommu_init_early_dart();
#endif
}

static int __init pmac_declare_of_platform_devices(void)
{
	struct device_node *np;

	if (machine_is(chrp))
		return -1;

	np = of_find_node_by_name(NULL, "valkyrie");
	if (np)
		of_platform_device_create(np, "valkyrie", NULL);
	np = of_find_node_by_name(NULL, "platinum");
	if (np)
		of_platform_device_create(np, "platinum", NULL);
        np = of_find_node_by_type(NULL, "smu");
        if (np) {
		of_platform_device_create(np, "smu", NULL);
		of_node_put(np);
	}

	return 0;
}
machine_device_initcall(powermac, pmac_declare_of_platform_devices);

/*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
static int __init pmac_probe(void)
{
	unsigned long root = of_get_flat_dt_root();

	if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
	    !of_flat_dt_is_compatible(root, "MacRISC"))
		return 0;

#ifdef CONFIG_PPC64
	/*
	 * On U3, the DART (iommu) must be allocated now since it
	 * has an impact on htab_initialize (due to the large page it
	 * occupies having to be broken up so the DART itself is not
	 * part of the cacheable linar mapping
	 */
	alloc_dart_table();

	hpte_init_native();
#endif

#ifdef CONFIG_PPC32
	/* isa_io_base gets set in pmac_pci_init */
	ISA_DMA_THRESHOLD = ~0L;
	DMA_MODE_READ = 1;
	DMA_MODE_WRITE = 2;

#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
#ifdef CONFIG_BLK_DEV_IDE_PMAC
        ppc_ide_md.ide_init_hwif	= pmac_ide_init_hwif_ports;
        ppc_ide_md.default_io_base	= pmac_ide_get_base;
#endif /* CONFIG_BLK_DEV_IDE_PMAC */
#endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */

#endif /* CONFIG_PPC32 */

#ifdef CONFIG_PMAC_SMU
	/*
	 * SMU based G5s need some memory below 2Gb, at least the current
	 * driver needs that. We have to allocate it now. We allocate 4k
	 * (1 small page) for now.
	 */
	smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
#endif /* CONFIG_PMAC_SMU */

	return 1;
}

#ifdef CONFIG_PPC64
/* Move that to pci.c */
static int pmac_pci_probe_mode(struct pci_bus *bus)
{
	struct device_node *node = bus->sysdata;

	/* We need to use normal PCI probing for the AGP bus,
	 * since the device for the AGP bridge isn't in the tree.
	 * Same for the PCIe host on U4 and the HT host bridge.
	 */
	if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
				  of_device_is_compatible(node, "u4-pcie") ||
				  of_device_is_compatible(node, "u3-ht")))
		return PCI_PROBE_NORMAL;
	return PCI_PROBE_DEVTREE;
}

#ifdef CONFIG_HOTPLUG_CPU
/* access per cpu vars from generic smp.c */
DECLARE_PER_CPU(int, cpu_state);

static void pmac_cpu_die(void)
{
	/*
	 * turn off as much as possible, we'll be
	 * kicked out as this will only be invoked
	 * on core99 platforms for now ...
	 */

	printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
	__get_cpu_var(cpu_state) = CPU_DEAD;
	smp_wmb();

	/*
	 * during the path that leads here preemption is disabled,
	 * reenable it now so that when coming up preempt count is
	 * zero correctly
	 */
	preempt_enable();

	/*
	 * hard-disable interrupts for the non-NAP case, the NAP code
	 * needs to re-enable interrupts (but soft-disables them)
	 */
	hard_irq_disable();

	while (1) {
		/* let's not take timer interrupts too often ... */
		set_dec(0x7fffffff);

		/* should always be true at this point */
		if (cpu_has_feature(CPU_FTR_CAN_NAP))
			power4_cpu_offline_powersave();
		else {
			HMT_low();
			HMT_very_low();
		}
	}
}
#endif /* CONFIG_HOTPLUG_CPU */

#endif /* CONFIG_PPC64 */

define_machine(powermac) {
	.name			= "PowerMac",
	.probe			= pmac_probe,
	.setup_arch		= pmac_setup_arch,
	.init_early		= pmac_init_early,
	.show_cpuinfo		= pmac_show_cpuinfo,
	.init_IRQ		= pmac_pic_init,
	.get_irq		= NULL,	/* changed later */
	.pci_irq_fixup		= pmac_pci_irq_fixup,
	.restart		= pmac_restart,
	.power_off		= pmac_power_off,
	.halt			= pmac_halt,
	.time_init		= pmac_time_init,
	.get_boot_time		= pmac_get_boot_time,
	.set_rtc_time		= pmac_set_rtc_time,
	.get_rtc_time		= pmac_get_rtc_time,
	.calibrate_decr		= pmac_calibrate_decr,
	.feature_call		= pmac_do_feature_call,
	.progress		= udbg_progress,
#ifdef CONFIG_PPC64
	.pci_probe_mode		= pmac_pci_probe_mode,
	.power_save		= power4_idle,
	.enable_pmcs		= power4_enable_pmcs,
#ifdef CONFIG_KEXEC
	.machine_kexec		= default_machine_kexec,
	.machine_kexec_prepare	= default_machine_kexec_prepare,
	.machine_crash_shutdown	= default_machine_crash_shutdown,
#endif
#endif /* CONFIG_PPC64 */
#ifdef CONFIG_PPC32
	.pcibios_enable_device_hook = pmac_pci_enable_device_hook,
	.pcibios_after_init	= pmac_pcibios_after_init,
	.phys_mem_access_prot	= pci_phys_mem_access_prot,
#endif
#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
	.cpu_die		= pmac_cpu_die,
#endif
};
Commit	Line	Data
14cf11af	1	/*
35499c01	2	* Powermac setup and early boot code plus other random bits.
14cf11af PM	3	*
	4	* PowerPC version
	5	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	6	*
	7	* Adapted for Power Macintosh by Paul Mackerras
35499c01	8	* Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
14cf11af PM	9	*
	10	* Derived from "arch/alpha/kernel/setup.c"
	11	* Copyright (C) 1995 Linus Torvalds
	12	*
	13	* Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License
	17	* as published by the Free Software Foundation; either version
	18	* 2 of the License, or (at your option) any later version.
	19	*
	20	*/
	21
	22	/*
	23	* bootup setup stuff..
	24	*/
	25
14cf11af PM	26	#include <linux/init.h>
	27	#include <linux/errno.h>
	28	#include <linux/sched.h>
	29	#include <linux/kernel.h>
	30	#include <linux/mm.h>
	31	#include <linux/stddef.h>
	32	#include <linux/unistd.h>
	33	#include <linux/ptrace.h>
	34	#include <linux/slab.h>
	35	#include <linux/user.h>
	36	#include <linux/a.out.h>
	37	#include <linux/tty.h>
	38	#include <linux/string.h>
	39	#include <linux/delay.h>
	40	#include <linux/ioport.h>
	41	#include <linux/major.h>
	42	#include <linux/initrd.h>
	43	#include <linux/vt_kern.h>
	44	#include <linux/console.h>
14cf11af PM	45	#include <linux/pci.h>
	46	#include <linux/adb.h>
	47	#include <linux/cuda.h>
	48	#include <linux/pmu.h>
	49	#include <linux/irq.h>
	50	#include <linux/seq_file.h>
	51	#include <linux/root_dev.h>
	52	#include <linux/bitops.h>
	53	#include <linux/suspend.h>
5f867dc7 JL	54	#include <linux/of_device.h>
5f867dc7 JL	55	#include <linux/of_platform.h>
14cf11af PM	56
	57	#include <asm/reg.h>
	58	#include <asm/sections.h>
	59	#include <asm/prom.h>
	60	#include <asm/system.h>
	61	#include <asm/pgtable.h>
	62	#include <asm/io.h>
3d1229d6	63	#include <asm/kexec.h>
14cf11af PM	64	#include <asm/pci-bridge.h>
	65	#include <asm/ohare.h>
	66	#include <asm/mediabay.h>
	67	#include <asm/machdep.h>
	68	#include <asm/dma.h>
14cf11af PM	69	#include <asm/cputable.h>
	70	#include <asm/btext.h>
	71	#include <asm/pmac_feature.h>
	72	#include <asm/time.h>
14cf11af	73	#include <asm/mmu_context.h>
35499c01 PM	74	#include <asm/iommu.h>
	75	#include <asm/smu.h>
	76	#include <asm/pmc.h>
fbf1769d	77	#include <asm/lmb.h>
51d3082f	78	#include <asm/udbg.h>
14cf11af	79
3c3f42d6	80	#include "pmac.h"
14cf11af PM	81
	82	#undef SHOW_GATWICK_IRQS
	83
14cf11af PM	84	int ppc_override_l2cr = 0;
	85	int ppc_override_l2cr_value;
	86	int has_l2cache = 0;
	87
d2515c80	88	int pmac_newworld;
9b6b563c	89
14cf11af PM	90	static int current_root_goodness = -1;
14cf11af PM	91
35499c01	92	extern struct machdep_calls pmac_md;
14cf11af PM	93
	94	#define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
	95
35499c01	96	#ifdef CONFIG_PPC64
35499c01	97	int sccdbg;
14cf11af PM	98	#endif
14cf11af PM	99
35499c01 PM	100	extern void zs_kgdb_hook(int tty_num);
35499c01 PM	101
14cf11af	102	sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
35499c01 PM	103	EXPORT_SYMBOL(sys_ctrler);
	104
	105	#ifdef CONFIG_PMAC_SMU
	106	unsigned long smu_cmdbuf_abs;
	107	EXPORT_SYMBOL(smu_cmdbuf_abs);
	108	#endif
14cf11af PM	109
	110	#ifdef CONFIG_SMP
	111	extern struct smp_ops_t psurge_smp_ops;
	112	extern struct smp_ops_t core99_smp_ops;
	113	#endif /* CONFIG_SMP */
	114
0dd194d0	115	static void pmac_show_cpuinfo(struct seq_file *m)
14cf11af PM	116	{
14cf11af PM	117	struct device_node *np;
018a3d1d	118	const char *pp;
14cf11af	119	int plen;
0dd194d0 PM	120	int mbmodel;
0dd194d0 PM	121	unsigned int mbflags;
14cf11af PM	122	char* mbname;
14cf11af PM	123
0dd194d0 PM	124	mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
	125	PMAC_MB_INFO_MODEL, 0);
	126	mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
	127	PMAC_MB_INFO_FLAGS, 0);
	128	if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
	129	(long) &mbname) != 0)
14cf11af PM	130	mbname = "Unknown";
	131
	132	/* find motherboard type */
	133	seq_printf(m, "machine\t\t: ");
0dd194d0	134	np = of_find_node_by_path("/");
14cf11af	135	if (np != NULL) {
e2eb6392	136	pp = of_get_property(np, "model", NULL);
14cf11af PM	137	if (pp != NULL)
	138	seq_printf(m, "%s\n", pp);
	139	else
	140	seq_printf(m, "PowerMac\n");
e2eb6392	141	pp = of_get_property(np, "compatible", &plen);
14cf11af PM	142	if (pp != NULL) {
	143	seq_printf(m, "motherboard\t:");
	144	while (plen > 0) {
	145	int l = strlen(pp) + 1;
	146	seq_printf(m, " %s", pp);
	147	plen -= l;
	148	pp += l;
	149	}
	150	seq_printf(m, "\n");
	151	}
0dd194d0	152	of_node_put(np);
14cf11af PM	153	} else
	154	seq_printf(m, "PowerMac\n");
	155
	156	/* print parsed model */
	157	seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
	158	seq_printf(m, "pmac flags\t: %08x\n", mbflags);
	159
	160	/* find l2 cache info */
0dd194d0 PM	161	np = of_find_node_by_name(NULL, "l2-cache");
	162	if (np == NULL)
	163	np = of_find_node_by_type(NULL, "cache");
	164	if (np != NULL) {
e2eb6392 SR	165	const unsigned int *ic =
	166	of_get_property(np, "i-cache-size", NULL);
	167	const unsigned int *dc =
	168	of_get_property(np, "d-cache-size", NULL);
14cf11af PM	169	seq_printf(m, "L2 cache\t:");
14cf11af PM	170	has_l2cache = 1;
e2eb6392	171	if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
14cf11af PM	172	seq_printf(m, " %dK unified", *dc / 1024);
	173	} else {
	174	if (ic)
	175	seq_printf(m, " %dK instruction", *ic / 1024);
	176	if (dc)
	177	seq_printf(m, "%s %dK data",
	178	(ic? " +": ""), *dc / 1024);
	179	}
e2eb6392	180	pp = of_get_property(np, "ram-type", NULL);
14cf11af PM	181	if (pp)
	182	seq_printf(m, " %s", pp);
	183	seq_printf(m, "\n");
0dd194d0	184	of_node_put(np);
14cf11af PM	185	}
	186
	187	/* Indicate newworld/oldworld */
	188	seq_printf(m, "pmac-generation\t: %s\n",
	189	pmac_newworld ? "NewWorld" : "OldWorld");
14cf11af PM	190	}
14cf11af PM	191
35499c01 PM	192	#ifndef CONFIG_ADB_CUDA
	193	int find_via_cuda(void)
	194	{
30686ba6 SR	195	struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");
	196
	197	if (!dn)
35499c01	198	return 0;
30686ba6	199	of_node_put(dn);
35499c01 PM	200	printk("WARNING ! Your machine is CUDA-based but your kernel\n");
	201	printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n");
	202	return 0;
	203	}
	204	#endif
14cf11af	205
35499c01 PM	206	#ifndef CONFIG_ADB_PMU
35499c01 PM	207	int find_via_pmu(void)
14cf11af	208	{
30686ba6 SR	209	struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");
	210
	211	if (!dn)
35499c01	212	return 0;
30686ba6	213	of_node_put(dn);
35499c01 PM	214	printk("WARNING ! Your machine is PMU-based but your kernel\n");
35499c01 PM	215	printk(" wasn't compiled with CONFIG_ADB_PMU option !\n");
a575b807	216	return 0;
35499c01 PM	217	}
35499c01 PM	218	#endif
14cf11af	219
35499c01 PM	220	#ifndef CONFIG_PMAC_SMU
	221	int smu_init(void)
	222	{
	223	/* should check and warn if SMU is present */
	224	return 0;
	225	}
	226	#endif
14cf11af	227
35499c01 PM	228	#ifdef CONFIG_PPC32
35499c01 PM	229	static volatile u32 *sysctrl_regs;
14cf11af	230
35499c01 PM	231	static void __init ohare_init(void)
35499c01 PM	232	{
30686ba6 SR	233	struct device_node *dn;
30686ba6 SR	234
14cf11af PM	235	/* this area has the CPU identification register
	236	and some registers used by smp boards */
	237	sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
14cf11af	238
35499c01 PM	239	/*
	240	* Turn on the L2 cache.
	241	* We assume that we have a PSX memory controller iff
	242	* we have an ohare I/O controller.
	243	*/
30686ba6 SR	244	dn = of_find_node_by_name(NULL, "ohare");
	245	if (dn) {
	246	of_node_put(dn);
35499c01 PM	247	if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
	248	if (sysctrl_regs[4] & 0x10)
	249	sysctrl_regs[4] \|= 0x04000020;
	250	else
	251	sysctrl_regs[4] \|= 0x04000000;
	252	if(has_l2cache)
	253	printk(KERN_INFO "Level 2 cache enabled\n");
	254	}
	255	}
	256	}
14cf11af	257
35499c01 PM	258	static void __init l2cr_init(void)
35499c01 PM	259	{
14cf11af PM	260	/* Checks "l2cr-value" property in the registry */
14cf11af PM	261	if (cpu_has_feature(CPU_FTR_L2CR)) {
1658ab66	262	struct device_node *np = of_find_node_by_name(NULL, "cpus");
14cf11af	263	if (np == 0)
1658ab66	264	np = of_find_node_by_type(NULL, "cpu");
14cf11af	265	if (np != 0) {
018a3d1d	266	const unsigned int *l2cr =
e2eb6392	267	of_get_property(np, "l2cr-value", NULL);
14cf11af PM	268	if (l2cr != 0) {
	269	ppc_override_l2cr = 1;
	270	ppc_override_l2cr_value = *l2cr;
	271	_set_L2CR(0);
	272	_set_L2CR(ppc_override_l2cr_value);
	273	}
1658ab66	274	of_node_put(np);
14cf11af PM	275	}
	276	}
	277
	278	if (ppc_override_l2cr)
35499c01 PM	279	printk(KERN_INFO "L2CR overridden (0x%x), "
	280	"backside cache is %s\n",
	281	ppc_override_l2cr_value,
	282	(ppc_override_l2cr_value & 0x80000000)
14cf11af	283	? "enabled" : "disabled");
35499c01 PM	284	}
	285	#endif
	286
ff38e7c8	287	static void __init pmac_setup_arch(void)
35499c01	288	{
a575b807	289	struct device_node cpu, ic;
018a3d1d	290	const int *fp;
35499c01 PM	291	unsigned long pvr;
	292
	293	pvr = PVR_VER(mfspr(SPRN_PVR));
	294
	295	/* Set loops_per_jiffy to a half-way reasonable value,
	296	for use until calibrate_delay gets called. */
	297	loops_per_jiffy = 50000000 / HZ;
	298	cpu = of_find_node_by_type(NULL, "cpu");
	299	if (cpu != NULL) {
e2eb6392	300	fp = of_get_property(cpu, "clock-frequency", NULL);
35499c01 PM	301	if (fp != NULL) {
	302	if (pvr >= 0x30 && pvr < 0x80)
	303	/* PPC970 etc. */
	304	loops_per_jiffy = fp / (3 HZ);
	305	else if (pvr == 4 \|\| pvr >= 8)
	306	/* 604, G3, G4 etc. */
	307	loops_per_jiffy = *fp / HZ;
	308	else
	309	/* 601, 603, etc. */
	310	loops_per_jiffy = fp / (2 HZ);
	311	}
	312	of_node_put(cpu);
	313	}
	314
a575b807	315	/* See if newworld or oldworld */
bfab1019	316	for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
e2eb6392	317	if (of_get_property(ic, "interrupt-controller", NULL))
bfab1019	318	break;
d2515c80 OH	319	if (ic) {
d2515c80 OH	320	pmac_newworld = 1;
a575b807	321	of_node_put(ic);
d2515c80	322	}
a575b807	323
35499c01 PM	324	/* Lookup PCI hosts */
	325	pmac_pci_init();
	326
	327	#ifdef CONFIG_PPC32
	328	ohare_init();
	329	l2cr_init();
	330	#endif /* CONFIG_PPC32 */
	331
14cf11af PM	332	#ifdef CONFIG_KGDB
	333	zs_kgdb_hook(0);
	334	#endif
	335
14cf11af	336	find_via_cuda();
14cf11af	337	find_via_pmu();
35499c01 PM	338	smu_init();
35499c01 PM	339
91c33d28	340	#if defined(CONFIG_NVRAM) \|\| defined(CONFIG_PPC64)
14cf11af PM	341	pmac_nvram_init();
14cf11af PM	342	#endif
35499c01 PM	343
35499c01 PM	344	#ifdef CONFIG_PPC32
14cf11af PM	345	#ifdef CONFIG_BLK_DEV_INITRD
	346	if (initrd_start)
	347	ROOT_DEV = Root_RAM0;
	348	else
	349	#endif
	350	ROOT_DEV = DEFAULT_ROOT_DEVICE;
35499c01	351	#endif
14cf11af PM	352
	353	#ifdef CONFIG_SMP
	354	/* Check for Core99 */
30686ba6 SR	355	ic = of_find_node_by_name(NULL, "uni-n");
	356	if (!ic)
	357	ic = of_find_node_by_name(NULL, "u3");
	358	if (!ic)
	359	ic = of_find_node_by_name(NULL, "u4");
	360	if (ic) {
	361	of_node_put(ic);
7ed476d1	362	smp_ops = &core99_smp_ops;
30686ba6	363	}
35499c01	364	#ifdef CONFIG_PPC32
c63c4faa PM	365	else {
	366	/*
	367	* We have to set bits in cpu_possible_map here since the
	368	* secondary CPU(s) aren't in the device tree, and
	369	* setup_per_cpu_areas only allocates per-cpu data for
	370	* CPUs in the cpu_possible_map.
	371	*/
	372	int cpu;
	373
	374	for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
	375	cpu_set(cpu, cpu_possible_map);
7ed476d1	376	smp_ops = &psurge_smp_ops;
c63c4faa	377	}
35499c01	378	#endif
14cf11af	379	#endif /* CONFIG_SMP */
e8222502 BH	380
	381	#ifdef CONFIG_ADB
	382	if (strstr(cmd_line, "adb_sync")) {
	383	extern int __adb_probe_sync;
	384	__adb_probe_sync = 1;
	385	}
	386	#endif /* CONFIG_ADB */
14cf11af PM	387	}
14cf11af PM	388
14cf11af	389	#ifdef CONFIG_SCSI
405861a0	390	void note_scsi_host(struct device_node node, void host)
14cf11af	391	{
14cf11af	392	}
9b6b563c	393	EXPORT_SYMBOL(note_scsi_host);
14cf11af PM	394	#endif
14cf11af PM	395
35499c01 PM	396	static int initializing = 1;
35499c01 PM	397
14cf11af PM	398	static int pmac_late_init(void)
	399	{
	400	initializing = 0;
d9333afd JB	401	/* this is udbg (which is __init) and we can later use it during
	402	* cpu hotplug (in smp_core99_kick_cpu) */
	403	ppc_md.progress = NULL;
14cf11af PM	404	return 0;
14cf11af PM	405	}
d518b717	406	machine_late_initcall(powermac, pmac_late_init);
14cf11af	407
d7418031 SR	408	/*
	409	* This is __init_refok because we check for "initializing" before
	410	* touching any of the __init sensitive things and "initializing"
	411	* will be false after __init time. This can't be __init because it
	412	* can be called whenever a disk is first accessed.
	413	*/
	414	void __init_refok note_bootable_part(dev_t dev, int part, int goodness)
14cf11af	415	{
14cf11af PM	416	char *p;
	417
	418	if (!initializing)
	419	return;
	420	if ((goodness <= current_root_goodness) &&
	421	ROOT_DEV != DEFAULT_ROOT_DEVICE)
	422	return;
b8757b21 ABL	423	p = strstr(boot_command_line, "root=");
b8757b21 ABL	424	if (p != NULL && (p == boot_command_line \|\| p[-1] == ' '))
14cf11af PM	425	return;
14cf11af PM	426
6ee0d9f7 PM	427	ROOT_DEV = dev + part;
6ee0d9f7 PM	428	current_root_goodness = goodness;
14cf11af PM	429	}
14cf11af PM	430
14cf11af	431	#ifdef CONFIG_ADB_CUDA
35499c01 PM	432	static void cuda_restart(void)
35499c01 PM	433	{
14cf11af	434	struct adb_request req;
14cf11af	435
35499c01 PM	436	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
	437	for (;;)
	438	cuda_poll();
	439	}
	440
	441	static void cuda_shutdown(void)
	442	{
	443	struct adb_request req;
	444
	445	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
	446	for (;;)
	447	cuda_poll();
	448	}
	449
	450	#else
	451	#define cuda_restart()
	452	#define cuda_shutdown()
	453	#endif
	454
	455	#ifndef CONFIG_ADB_PMU
	456	#define pmu_restart()
	457	#define pmu_shutdown()
	458	#endif
	459
	460	#ifndef CONFIG_PMAC_SMU
	461	#define smu_restart()
	462	#define smu_shutdown()
	463	#endif
	464
	465	static void pmac_restart(char *cmd)
	466	{
14cf11af	467	switch (sys_ctrler) {
14cf11af	468	case SYS_CTRLER_CUDA:
35499c01	469	cuda_restart();
14cf11af	470	break;
14cf11af PM	471	case SYS_CTRLER_PMU:
	472	pmu_restart();
	473	break;
35499c01 PM	474	case SYS_CTRLER_SMU:
	475	smu_restart();
	476	break;
14cf11af PM	477	default: ;
	478	}
	479	}
	480
35499c01	481	static void pmac_power_off(void)
14cf11af	482	{
14cf11af	483	switch (sys_ctrler) {
14cf11af	484	case SYS_CTRLER_CUDA:
35499c01	485	cuda_shutdown();
14cf11af	486	break;
14cf11af PM	487	case SYS_CTRLER_PMU:
	488	pmu_shutdown();
	489	break;
35499c01 PM	490	case SYS_CTRLER_SMU:
	491	smu_shutdown();
	492	break;
14cf11af PM	493	default: ;
	494	}
	495	}
	496
	497	static void
	498	pmac_halt(void)
	499	{
	500	pmac_power_off();
	501	}
	502
35499c01 PM	503	/*
	504	* Early initialization.
	505	*/
	506	static void __init pmac_init_early(void)
	507	{
51d3082f BH	508	/* Enable early btext debug if requested */
	509	if (strstr(cmd_line, "btextdbg")) {
	510	udbg_adb_init_early();
	511	register_early_udbg_console();
35499c01 PM	512	}
35499c01 PM	513
51d3082f BH	514	/* Probe motherboard chipset */
	515	pmac_feature_init();
	516
51d3082f BH	517	/* Initialize debug stuff */
	518	udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
	519	udbg_adb_init(!!strstr(cmd_line, "btextdbg"));
	520
	521	#ifdef CONFIG_PPC64
1beb6a7d	522	iommu_init_early_dart();
35499c01 PM	523	#endif
	524	}
	525
35499c01	526	static int __init pmac_declare_of_platform_devices(void)
14cf11af	527	{
a28d3af2	528	struct device_node *np;
14cf11af	529
e8222502 BH	530	if (machine_is(chrp))
	531	return -1;
	532
730745a5	533	np = of_find_node_by_name(NULL, "valkyrie");
35499c01 PM	534	if (np)
35499c01 PM	535	of_platform_device_create(np, "valkyrie", NULL);
730745a5	536	np = of_find_node_by_name(NULL, "platinum");
35499c01 PM	537	if (np)
35499c01 PM	538	of_platform_device_create(np, "platinum", NULL);
35499c01 PM	539	np = of_find_node_by_type(NULL, "smu");
	540	if (np) {
	541	of_platform_device_create(np, "smu", NULL);
	542	of_node_put(np);
	543	}
14cf11af PM	544
	545	return 0;
	546	}
d518b717	547	machine_device_initcall(powermac, pmac_declare_of_platform_devices);
35499c01 PM	548
	549	/*
	550	* Called very early, MMU is off, device-tree isn't unflattened
	551	*/
e8222502	552	static int __init pmac_probe(void)
35499c01	553	{
e8222502 BH	554	unsigned long root = of_get_flat_dt_root();
	555
	556	if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
	557	!of_flat_dt_is_compatible(root, "MacRISC"))
35499c01 PM	558	return 0;
35499c01 PM	559
e8222502	560	#ifdef CONFIG_PPC64
35499c01 PM	561	/*
	562	* On U3, the DART (iommu) must be allocated now since it
	563	* has an impact on htab_initialize (due to the large page it
	564	* occupies having to be broken up so the DART itself is not
	565	* part of the cacheable linar mapping
	566	*/
1beb6a7d	567	alloc_dart_table();
7d0daae4 ME	568
7d0daae4 ME	569	hpte_init_native();
35499c01 PM	570	#endif
35499c01 PM	571
e8222502 BH	572	#ifdef CONFIG_PPC32
e8222502 BH	573	/* isa_io_base gets set in pmac_pci_init */
e8222502 BH	574	ISA_DMA_THRESHOLD = ~0L;
	575	DMA_MODE_READ = 1;
	576	DMA_MODE_WRITE = 2;
	577
	578	#if defined(CONFIG_BLK_DEV_IDE) \|\| defined(CONFIG_BLK_DEV_IDE_MODULE)
	579	#ifdef CONFIG_BLK_DEV_IDE_PMAC
	580	ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports;
	581	ppc_ide_md.default_io_base = pmac_ide_get_base;
	582	#endif /* CONFIG_BLK_DEV_IDE_PMAC */
	583	#endif /* defined(CONFIG_BLK_DEV_IDE) \|\| defined(CONFIG_BLK_DEV_IDE_MODULE) */
	584
	585	#endif /* CONFIG_PPC32 */
	586
35499c01 PM	587	#ifdef CONFIG_PMAC_SMU
	588	/*
	589	* SMU based G5s need some memory below 2Gb, at least the current
	590	* driver needs that. We have to allocate it now. We allocate 4k
	591	* (1 small page) for now.
	592	*/
	593	smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
	594	#endif /* CONFIG_PMAC_SMU */
	595
	596	return 1;
	597	}
	598
	599	#ifdef CONFIG_PPC64
51d3082f BH	600	/* Move that to pci.c */
51d3082f BH	601	static int pmac_pci_probe_mode(struct pci_bus *bus)
35499c01 PM	602	{
	603	struct device_node *node = bus->sysdata;
	604
	605	/* We need to use normal PCI probing for the AGP bus,
1beb6a7d	606	* since the device for the AGP bridge isn't in the tree.
444532d4	607	* Same for the PCIe host on U4 and the HT host bridge.
1beb6a7d	608	*/
55b61fec	609	if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") \|\|
444532d4 BH	610	of_device_is_compatible(node, "u4-pcie") \|\|
444532d4 BH	611	of_device_is_compatible(node, "u3-ht")))
35499c01	612	return PCI_PROBE_NORMAL;
35499c01 PM	613	return PCI_PROBE_DEVTREE;
35499c01 PM	614	}
d9333afd JB	615
	616	#ifdef CONFIG_HOTPLUG_CPU
	617	/* access per cpu vars from generic smp.c */
	618	DECLARE_PER_CPU(int, cpu_state);
	619
	620	static void pmac_cpu_die(void)
	621	{
	622	/*
	623	* turn off as much as possible, we'll be
	624	* kicked out as this will only be invoked
	625	* on core99 platforms for now ...
	626	*/
	627
	628	printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
	629	__get_cpu_var(cpu_state) = CPU_DEAD;
	630	smp_wmb();
	631
	632	/*
	633	* during the path that leads here preemption is disabled,
	634	* reenable it now so that when coming up preempt count is
	635	* zero correctly
	636	*/
	637	preempt_enable();
	638
	639	/*
	640	* hard-disable interrupts for the non-NAP case, the NAP code
	641	* needs to re-enable interrupts (but soft-disables them)
	642	*/
	643	hard_irq_disable();
	644
	645	while (1) {
	646	/* let's not take timer interrupts too often ... */
	647	set_dec(0x7fffffff);
	648
	649	/* should always be true at this point */
	650	if (cpu_has_feature(CPU_FTR_CAN_NAP))
	651	power4_cpu_offline_powersave();
	652	else {
	653	HMT_low();
	654	HMT_very_low();
	655	}
	656	}
	657	}
	658	#endif /* CONFIG_HOTPLUG_CPU */
	659
	660	#endif /* CONFIG_PPC64 */
35499c01	661
e8222502 BH	662	define_machine(powermac) {
e8222502 BH	663	.name = "PowerMac",
35499c01 PM	664	.probe = pmac_probe,
	665	.setup_arch = pmac_setup_arch,
	666	.init_early = pmac_init_early,
	667	.show_cpuinfo = pmac_show_cpuinfo,
35499c01	668	.init_IRQ = pmac_pic_init,
cc5d0189	669	.get_irq = NULL, /* changed later */
f90bb153	670	.pci_irq_fixup = pmac_pci_irq_fixup,
35499c01 PM	671	.restart = pmac_restart,
	672	.power_off = pmac_power_off,
	673	.halt = pmac_halt,
	674	.time_init = pmac_time_init,
	675	.get_boot_time = pmac_get_boot_time,
	676	.set_rtc_time = pmac_set_rtc_time,
	677	.get_rtc_time = pmac_get_rtc_time,
	678	.calibrate_decr = pmac_calibrate_decr,
	679	.feature_call = pmac_do_feature_call,
be6b8439	680	.progress = udbg_progress,
35499c01	681	#ifdef CONFIG_PPC64
51d3082f	682	.pci_probe_mode = pmac_pci_probe_mode,
a0652fc9	683	.power_save = power4_idle,
35499c01	684	.enable_pmcs = power4_enable_pmcs,
3d1229d6 ME	685	#ifdef CONFIG_KEXEC
	686	.machine_kexec = default_machine_kexec,
	687	.machine_kexec_prepare = default_machine_kexec_prepare,
cc532915	688	.machine_crash_shutdown = default_machine_crash_shutdown,
35499c01	689	#endif
3d1229d6	690	#endif /* CONFIG_PPC64 */
35499c01 PM	691	#ifdef CONFIG_PPC32
	692	.pcibios_enable_device_hook = pmac_pci_enable_device_hook,
	693	.pcibios_after_init = pmac_pcibios_after_init,
	694	.phys_mem_access_prot = pci_phys_mem_access_prot,
	695	#endif
e8222502	696	#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
d9333afd	697	.cpu_die = pmac_cpu_die,
e8222502	698	#endif
35499c01	699	};