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1/*
2 * PowerNV LPC bus handling.
3 *
4 * Copyright 2013 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/of.h>
14#include <linux/bug.h>
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15#include <linux/debugfs.h>
16#include <linux/io.h>
17#include <linux/slab.h>
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18
19#include <asm/machdep.h>
20#include <asm/firmware.h>
21#include <asm/xics.h>
22#include <asm/opal.h>
26a2056e 23#include <asm/prom.h>
fa2dbe2e 24#include <asm/uaccess.h>
0c0a3e5a 25#include <asm/debug.h>
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26
27static int opal_lpc_chip_id = -1;
28
29static u8 opal_lpc_inb(unsigned long port)
30{
31 int64_t rc;
803c2d2f 32 __be32 data;
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33
34 if (opal_lpc_chip_id < 0 || port > 0xffff)
35 return 0xff;
36 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 1);
803c2d2f 37 return rc ? 0xff : be32_to_cpu(data);
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38}
39
40static __le16 __opal_lpc_inw(unsigned long port)
41{
42 int64_t rc;
803c2d2f 43 __be32 data;
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44
45 if (opal_lpc_chip_id < 0 || port > 0xfffe)
46 return 0xffff;
47 if (port & 1)
48 return (__le16)opal_lpc_inb(port) << 8 | opal_lpc_inb(port + 1);
49 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 2);
803c2d2f 50 return rc ? 0xffff : be32_to_cpu(data);
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51}
52static u16 opal_lpc_inw(unsigned long port)
53{
54 return le16_to_cpu(__opal_lpc_inw(port));
55}
56
57static __le32 __opal_lpc_inl(unsigned long port)
58{
59 int64_t rc;
803c2d2f 60 __be32 data;
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61
62 if (opal_lpc_chip_id < 0 || port > 0xfffc)
63 return 0xffffffff;
64 if (port & 3)
65 return (__le32)opal_lpc_inb(port ) << 24 |
66 (__le32)opal_lpc_inb(port + 1) << 16 |
67 (__le32)opal_lpc_inb(port + 2) << 8 |
68 opal_lpc_inb(port + 3);
69 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 4);
803c2d2f 70 return rc ? 0xffffffff : be32_to_cpu(data);
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71}
72
73static u32 opal_lpc_inl(unsigned long port)
74{
75 return le32_to_cpu(__opal_lpc_inl(port));
76}
77
78static void opal_lpc_outb(u8 val, unsigned long port)
79{
80 if (opal_lpc_chip_id < 0 || port > 0xffff)
81 return;
82 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 1);
83}
84
85static void __opal_lpc_outw(__le16 val, unsigned long port)
86{
87 if (opal_lpc_chip_id < 0 || port > 0xfffe)
88 return;
89 if (port & 1) {
90 opal_lpc_outb(val >> 8, port);
91 opal_lpc_outb(val , port + 1);
92 return;
93 }
94 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 2);
95}
96
97static void opal_lpc_outw(u16 val, unsigned long port)
98{
99 __opal_lpc_outw(cpu_to_le16(val), port);
100}
101
102static void __opal_lpc_outl(__le32 val, unsigned long port)
103{
104 if (opal_lpc_chip_id < 0 || port > 0xfffc)
105 return;
106 if (port & 3) {
107 opal_lpc_outb(val >> 24, port);
108 opal_lpc_outb(val >> 16, port + 1);
109 opal_lpc_outb(val >> 8, port + 2);
110 opal_lpc_outb(val , port + 3);
111 return;
112 }
113 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 4);
114}
115
116static void opal_lpc_outl(u32 val, unsigned long port)
117{
118 __opal_lpc_outl(cpu_to_le32(val), port);
119}
120
121static void opal_lpc_insb(unsigned long p, void *b, unsigned long c)
122{
123 u8 *ptr = b;
124
125 while(c--)
126 *(ptr++) = opal_lpc_inb(p);
127}
128
129static void opal_lpc_insw(unsigned long p, void *b, unsigned long c)
130{
131 __le16 *ptr = b;
132
133 while(c--)
134 *(ptr++) = __opal_lpc_inw(p);
135}
136
137static void opal_lpc_insl(unsigned long p, void *b, unsigned long c)
138{
139 __le32 *ptr = b;
140
141 while(c--)
142 *(ptr++) = __opal_lpc_inl(p);
143}
144
145static void opal_lpc_outsb(unsigned long p, const void *b, unsigned long c)
146{
147 const u8 *ptr = b;
148
149 while(c--)
150 opal_lpc_outb(*(ptr++), p);
151}
152
153static void opal_lpc_outsw(unsigned long p, const void *b, unsigned long c)
154{
155 const __le16 *ptr = b;
156
157 while(c--)
158 __opal_lpc_outw(*(ptr++), p);
159}
160
161static void opal_lpc_outsl(unsigned long p, const void *b, unsigned long c)
162{
163 const __le32 *ptr = b;
164
165 while(c--)
166 __opal_lpc_outl(*(ptr++), p);
167}
168
169static const struct ppc_pci_io opal_lpc_io = {
170 .inb = opal_lpc_inb,
171 .inw = opal_lpc_inw,
172 .inl = opal_lpc_inl,
173 .outb = opal_lpc_outb,
174 .outw = opal_lpc_outw,
175 .outl = opal_lpc_outl,
176 .insb = opal_lpc_insb,
177 .insw = opal_lpc_insw,
178 .insl = opal_lpc_insl,
179 .outsb = opal_lpc_outsb,
180 .outsw = opal_lpc_outsw,
181 .outsl = opal_lpc_outsl,
182};
183
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184#ifdef CONFIG_DEBUG_FS
185struct lpc_debugfs_entry {
186 enum OpalLPCAddressType lpc_type;
187};
188
189static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
190 size_t count, loff_t *ppos)
191{
192 struct lpc_debugfs_entry *lpc = filp->private_data;
193 u32 data, pos, len, todo;
194 int rc;
195
196 if (!access_ok(VERIFY_WRITE, ubuf, count))
197 return -EFAULT;
198
199 todo = count;
200 while (todo) {
201 pos = *ppos;
202
203 /*
204 * Select access size based on count and alignment and
205 * access type. IO and MEM only support byte acceses,
206 * FW supports all 3.
207 */
208 len = 1;
209 if (lpc->lpc_type == OPAL_LPC_FW) {
210 if (todo > 3 && (pos & 3) == 0)
211 len = 4;
212 else if (todo > 1 && (pos & 1) == 0)
213 len = 2;
214 }
215 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
216 &data, len);
217 if (rc)
218 return -ENXIO;
219 switch(len) {
220 case 4:
221 rc = __put_user((u32)data, (u32 __user *)ubuf);
222 break;
223 case 2:
224 rc = __put_user((u16)data, (u16 __user *)ubuf);
225 break;
226 default:
227 rc = __put_user((u8)data, (u8 __user *)ubuf);
228 break;
229 }
230 if (rc)
231 return -EFAULT;
232 *ppos += len;
233 ubuf += len;
234 todo -= len;
235 }
236
237 return count;
238}
239
240static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf,
241 size_t count, loff_t *ppos)
242{
243 struct lpc_debugfs_entry *lpc = filp->private_data;
244 u32 data, pos, len, todo;
245 int rc;
246
247 if (!access_ok(VERIFY_READ, ubuf, count))
248 return -EFAULT;
249
250 todo = count;
251 while (todo) {
252 pos = *ppos;
253
254 /*
255 * Select access size based on count and alignment and
256 * access type. IO and MEM only support byte acceses,
257 * FW supports all 3.
258 */
259 len = 1;
260 if (lpc->lpc_type == OPAL_LPC_FW) {
261 if (todo > 3 && (pos & 3) == 0)
262 len = 4;
263 else if (todo > 1 && (pos & 1) == 0)
264 len = 2;
265 }
266 switch(len) {
267 case 4:
268 rc = __get_user(data, (u32 __user *)ubuf);
269 break;
270 case 2:
271 rc = __get_user(data, (u16 __user *)ubuf);
272 break;
273 default:
274 rc = __get_user(data, (u8 __user *)ubuf);
275 break;
276 }
277 if (rc)
278 return -EFAULT;
279
280 rc = opal_lpc_write(opal_lpc_chip_id, lpc->lpc_type, pos,
281 data, len);
282 if (rc)
283 return -ENXIO;
284 *ppos += len;
285 ubuf += len;
286 todo -= len;
287 }
288
289 return count;
290}
291
292static const struct file_operations lpc_fops = {
293 .read = lpc_debug_read,
294 .write = lpc_debug_write,
295 .open = simple_open,
296 .llseek = default_llseek,
297};
298
299static int opal_lpc_debugfs_create_type(struct dentry *folder,
300 const char *fname,
301 enum OpalLPCAddressType type)
302{
303 struct lpc_debugfs_entry *entry;
304 entry = kzalloc(sizeof(*entry), GFP_KERNEL);
305 if (!entry)
306 return -ENOMEM;
307 entry->lpc_type = type;
308 debugfs_create_file(fname, 0600, folder, entry, &lpc_fops);
309 return 0;
310}
311
312static int opal_lpc_init_debugfs(void)
313{
314 struct dentry *root;
315 int rc = 0;
316
317 if (opal_lpc_chip_id < 0)
318 return -ENODEV;
319
320 root = debugfs_create_dir("lpc", powerpc_debugfs_root);
321
322 rc |= opal_lpc_debugfs_create_type(root, "io", OPAL_LPC_IO);
323 rc |= opal_lpc_debugfs_create_type(root, "mem", OPAL_LPC_MEM);
324 rc |= opal_lpc_debugfs_create_type(root, "fw", OPAL_LPC_FW);
325 return rc;
326}
327device_initcall(opal_lpc_init_debugfs);
328#endif /* CONFIG_DEBUG_FS */
329
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330void opal_lpc_init(void)
331{
332 struct device_node *np;
333
334 /*
335 * Look for a Power8 LPC bus tagged as "primary",
336 * we currently support only one though the OPAL APIs
337 * support any number.
338 */
339 for_each_compatible_node(np, NULL, "ibm,power8-lpc") {
340 if (!of_device_is_available(np))
341 continue;
342 if (!of_get_property(np, "primary", NULL))
343 continue;
344 opal_lpc_chip_id = of_get_ibm_chip_id(np);
345 break;
346 }
347 if (opal_lpc_chip_id < 0)
348 return;
349
350 /* Setup special IO ops */
351 ppc_pci_io = opal_lpc_io;
352 isa_io_special = true;
353
354 pr_info("OPAL: Power8 LPC bus found, chip ID %d\n", opal_lpc_chip_id);
355}