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3fafe9c2 BH |
1 | /* |
2 | * PowerNV LPC bus handling. | |
3 | * | |
4 | * Copyright 2013 IBM Corp. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/of.h> | |
14 | #include <linux/bug.h> | |
fa2dbe2e BH |
15 | #include <linux/debugfs.h> |
16 | #include <linux/io.h> | |
17 | #include <linux/slab.h> | |
3fafe9c2 BH |
18 | |
19 | #include <asm/machdep.h> | |
20 | #include <asm/firmware.h> | |
21 | #include <asm/xics.h> | |
22 | #include <asm/opal.h> | |
26a2056e | 23 | #include <asm/prom.h> |
7c0f6ba6 | 24 | #include <linux/uaccess.h> |
0c0a3e5a | 25 | #include <asm/debug.h> |
3fafe9c2 BH |
26 | |
27 | static int opal_lpc_chip_id = -1; | |
28 | ||
29 | static u8 opal_lpc_inb(unsigned long port) | |
30 | { | |
31 | int64_t rc; | |
803c2d2f | 32 | __be32 data; |
3fafe9c2 BH |
33 | |
34 | if (opal_lpc_chip_id < 0 || port > 0xffff) | |
35 | return 0xff; | |
36 | rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 1); | |
803c2d2f | 37 | return rc ? 0xff : be32_to_cpu(data); |
3fafe9c2 BH |
38 | } |
39 | ||
40 | static __le16 __opal_lpc_inw(unsigned long port) | |
41 | { | |
42 | int64_t rc; | |
803c2d2f | 43 | __be32 data; |
3fafe9c2 BH |
44 | |
45 | if (opal_lpc_chip_id < 0 || port > 0xfffe) | |
46 | return 0xffff; | |
47 | if (port & 1) | |
48 | return (__le16)opal_lpc_inb(port) << 8 | opal_lpc_inb(port + 1); | |
49 | rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 2); | |
803c2d2f | 50 | return rc ? 0xffff : be32_to_cpu(data); |
3fafe9c2 BH |
51 | } |
52 | static u16 opal_lpc_inw(unsigned long port) | |
53 | { | |
54 | return le16_to_cpu(__opal_lpc_inw(port)); | |
55 | } | |
56 | ||
57 | static __le32 __opal_lpc_inl(unsigned long port) | |
58 | { | |
59 | int64_t rc; | |
803c2d2f | 60 | __be32 data; |
3fafe9c2 BH |
61 | |
62 | if (opal_lpc_chip_id < 0 || port > 0xfffc) | |
63 | return 0xffffffff; | |
64 | if (port & 3) | |
65 | return (__le32)opal_lpc_inb(port ) << 24 | | |
66 | (__le32)opal_lpc_inb(port + 1) << 16 | | |
67 | (__le32)opal_lpc_inb(port + 2) << 8 | | |
68 | opal_lpc_inb(port + 3); | |
69 | rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 4); | |
803c2d2f | 70 | return rc ? 0xffffffff : be32_to_cpu(data); |
3fafe9c2 BH |
71 | } |
72 | ||
73 | static u32 opal_lpc_inl(unsigned long port) | |
74 | { | |
75 | return le32_to_cpu(__opal_lpc_inl(port)); | |
76 | } | |
77 | ||
78 | static void opal_lpc_outb(u8 val, unsigned long port) | |
79 | { | |
80 | if (opal_lpc_chip_id < 0 || port > 0xffff) | |
81 | return; | |
82 | opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 1); | |
83 | } | |
84 | ||
85 | static void __opal_lpc_outw(__le16 val, unsigned long port) | |
86 | { | |
87 | if (opal_lpc_chip_id < 0 || port > 0xfffe) | |
88 | return; | |
89 | if (port & 1) { | |
90 | opal_lpc_outb(val >> 8, port); | |
91 | opal_lpc_outb(val , port + 1); | |
92 | return; | |
93 | } | |
94 | opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 2); | |
95 | } | |
96 | ||
97 | static void opal_lpc_outw(u16 val, unsigned long port) | |
98 | { | |
99 | __opal_lpc_outw(cpu_to_le16(val), port); | |
100 | } | |
101 | ||
102 | static void __opal_lpc_outl(__le32 val, unsigned long port) | |
103 | { | |
104 | if (opal_lpc_chip_id < 0 || port > 0xfffc) | |
105 | return; | |
106 | if (port & 3) { | |
107 | opal_lpc_outb(val >> 24, port); | |
108 | opal_lpc_outb(val >> 16, port + 1); | |
109 | opal_lpc_outb(val >> 8, port + 2); | |
110 | opal_lpc_outb(val , port + 3); | |
111 | return; | |
112 | } | |
113 | opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 4); | |
114 | } | |
115 | ||
116 | static void opal_lpc_outl(u32 val, unsigned long port) | |
117 | { | |
118 | __opal_lpc_outl(cpu_to_le32(val), port); | |
119 | } | |
120 | ||
121 | static void opal_lpc_insb(unsigned long p, void *b, unsigned long c) | |
122 | { | |
123 | u8 *ptr = b; | |
124 | ||
125 | while(c--) | |
126 | *(ptr++) = opal_lpc_inb(p); | |
127 | } | |
128 | ||
129 | static void opal_lpc_insw(unsigned long p, void *b, unsigned long c) | |
130 | { | |
131 | __le16 *ptr = b; | |
132 | ||
133 | while(c--) | |
134 | *(ptr++) = __opal_lpc_inw(p); | |
135 | } | |
136 | ||
137 | static void opal_lpc_insl(unsigned long p, void *b, unsigned long c) | |
138 | { | |
139 | __le32 *ptr = b; | |
140 | ||
141 | while(c--) | |
142 | *(ptr++) = __opal_lpc_inl(p); | |
143 | } | |
144 | ||
145 | static void opal_lpc_outsb(unsigned long p, const void *b, unsigned long c) | |
146 | { | |
147 | const u8 *ptr = b; | |
148 | ||
149 | while(c--) | |
150 | opal_lpc_outb(*(ptr++), p); | |
151 | } | |
152 | ||
153 | static void opal_lpc_outsw(unsigned long p, const void *b, unsigned long c) | |
154 | { | |
155 | const __le16 *ptr = b; | |
156 | ||
157 | while(c--) | |
158 | __opal_lpc_outw(*(ptr++), p); | |
159 | } | |
160 | ||
161 | static void opal_lpc_outsl(unsigned long p, const void *b, unsigned long c) | |
162 | { | |
163 | const __le32 *ptr = b; | |
164 | ||
165 | while(c--) | |
166 | __opal_lpc_outl(*(ptr++), p); | |
167 | } | |
168 | ||
169 | static const struct ppc_pci_io opal_lpc_io = { | |
170 | .inb = opal_lpc_inb, | |
171 | .inw = opal_lpc_inw, | |
172 | .inl = opal_lpc_inl, | |
173 | .outb = opal_lpc_outb, | |
174 | .outw = opal_lpc_outw, | |
175 | .outl = opal_lpc_outl, | |
176 | .insb = opal_lpc_insb, | |
177 | .insw = opal_lpc_insw, | |
178 | .insl = opal_lpc_insl, | |
179 | .outsb = opal_lpc_outsb, | |
180 | .outsw = opal_lpc_outsw, | |
181 | .outsl = opal_lpc_outsl, | |
182 | }; | |
183 | ||
fa2dbe2e BH |
184 | #ifdef CONFIG_DEBUG_FS |
185 | struct lpc_debugfs_entry { | |
186 | enum OpalLPCAddressType lpc_type; | |
187 | }; | |
188 | ||
189 | static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf, | |
190 | size_t count, loff_t *ppos) | |
191 | { | |
192 | struct lpc_debugfs_entry *lpc = filp->private_data; | |
193 | u32 data, pos, len, todo; | |
194 | int rc; | |
195 | ||
196 | if (!access_ok(VERIFY_WRITE, ubuf, count)) | |
197 | return -EFAULT; | |
198 | ||
199 | todo = count; | |
200 | while (todo) { | |
201 | pos = *ppos; | |
202 | ||
203 | /* | |
204 | * Select access size based on count and alignment and | |
205 | * access type. IO and MEM only support byte acceses, | |
206 | * FW supports all 3. | |
207 | */ | |
208 | len = 1; | |
209 | if (lpc->lpc_type == OPAL_LPC_FW) { | |
210 | if (todo > 3 && (pos & 3) == 0) | |
211 | len = 4; | |
212 | else if (todo > 1 && (pos & 1) == 0) | |
213 | len = 2; | |
214 | } | |
215 | rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos, | |
bf19edd2 | 216 | &data, len); |
fa2dbe2e BH |
217 | if (rc) |
218 | return -ENXIO; | |
325e4114 BH |
219 | |
220 | /* | |
221 | * Now there is some trickery with the data returned by OPAL | |
222 | * as it's the desired data right justified in a 32-bit BE | |
223 | * word. | |
224 | * | |
225 | * This is a very bad interface and I'm to blame for it :-( | |
226 | * | |
227 | * So we can't just apply a 32-bit swap to what comes from OPAL, | |
228 | * because user space expects the *bytes* to be in their proper | |
229 | * respective positions (ie, LPC position). | |
230 | * | |
231 | * So what we really want to do here is to shift data right | |
232 | * appropriately on a LE kernel. | |
233 | * | |
234 | * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that | |
235 | * order, we have in memory written to by OPAL at the "data" | |
236 | * pointer: | |
237 | * | |
238 | * Bytes: OPAL "data" LE "data" | |
239 | * 32-bit: B0 B1 B2 B3 B0B1B2B3 B3B2B1B0 | |
240 | * 16-bit: B0 B1 0000B0B1 B1B00000 | |
241 | * 8-bit: B0 000000B0 B0000000 | |
242 | * | |
243 | * So a BE kernel will have the leftmost of the above in the MSB | |
244 | * and rightmost in the LSB and can just then "cast" the u32 "data" | |
245 | * down to the appropriate quantity and write it. | |
246 | * | |
247 | * However, an LE kernel can't. It doesn't need to swap because a | |
248 | * load from data followed by a store to user are going to preserve | |
249 | * the byte ordering which is the wire byte order which is what the | |
250 | * user wants, but in order to "crop" to the right size, we need to | |
251 | * shift right first. | |
252 | */ | |
fa2dbe2e BH |
253 | switch(len) { |
254 | case 4: | |
255 | rc = __put_user((u32)data, (u32 __user *)ubuf); | |
256 | break; | |
257 | case 2: | |
325e4114 BH |
258 | #ifdef __LITTLE_ENDIAN__ |
259 | data >>= 16; | |
260 | #endif | |
fa2dbe2e BH |
261 | rc = __put_user((u16)data, (u16 __user *)ubuf); |
262 | break; | |
263 | default: | |
325e4114 BH |
264 | #ifdef __LITTLE_ENDIAN__ |
265 | data >>= 24; | |
266 | #endif | |
fa2dbe2e BH |
267 | rc = __put_user((u8)data, (u8 __user *)ubuf); |
268 | break; | |
269 | } | |
270 | if (rc) | |
271 | return -EFAULT; | |
272 | *ppos += len; | |
273 | ubuf += len; | |
274 | todo -= len; | |
275 | } | |
276 | ||
277 | return count; | |
278 | } | |
279 | ||
280 | static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf, | |
281 | size_t count, loff_t *ppos) | |
282 | { | |
283 | struct lpc_debugfs_entry *lpc = filp->private_data; | |
284 | u32 data, pos, len, todo; | |
285 | int rc; | |
286 | ||
287 | if (!access_ok(VERIFY_READ, ubuf, count)) | |
288 | return -EFAULT; | |
289 | ||
290 | todo = count; | |
291 | while (todo) { | |
292 | pos = *ppos; | |
293 | ||
294 | /* | |
295 | * Select access size based on count and alignment and | |
296 | * access type. IO and MEM only support byte acceses, | |
297 | * FW supports all 3. | |
298 | */ | |
299 | len = 1; | |
300 | if (lpc->lpc_type == OPAL_LPC_FW) { | |
301 | if (todo > 3 && (pos & 3) == 0) | |
302 | len = 4; | |
303 | else if (todo > 1 && (pos & 1) == 0) | |
304 | len = 2; | |
305 | } | |
325e4114 BH |
306 | |
307 | /* | |
308 | * Similarly to the read case, we have some trickery here but | |
309 | * it's different to handle. We need to pass the value to OPAL in | |
310 | * a register whose layout depends on the access size. We want | |
311 | * to reproduce the memory layout of the user, however we aren't | |
312 | * doing a load from user and a store to another memory location | |
313 | * which would achieve that. Here we pass the value to OPAL via | |
314 | * a register which is expected to contain the "BE" interpretation | |
315 | * of the byte sequence. IE: for a 32-bit access, byte 0 should be | |
316 | * in the MSB. So here we *do* need to byteswap on LE. | |
317 | * | |
318 | * User bytes: LE "data" OPAL "data" | |
319 | * 32-bit: B0 B1 B2 B3 B3B2B1B0 B0B1B2B3 | |
320 | * 16-bit: B0 B1 0000B1B0 0000B0B1 | |
321 | * 8-bit: B0 000000B0 000000B0 | |
322 | */ | |
fa2dbe2e BH |
323 | switch(len) { |
324 | case 4: | |
325 | rc = __get_user(data, (u32 __user *)ubuf); | |
325e4114 | 326 | data = cpu_to_be32(data); |
fa2dbe2e BH |
327 | break; |
328 | case 2: | |
329 | rc = __get_user(data, (u16 __user *)ubuf); | |
325e4114 | 330 | data = cpu_to_be16(data); |
fa2dbe2e BH |
331 | break; |
332 | default: | |
333 | rc = __get_user(data, (u8 __user *)ubuf); | |
334 | break; | |
335 | } | |
336 | if (rc) | |
337 | return -EFAULT; | |
338 | ||
339 | rc = opal_lpc_write(opal_lpc_chip_id, lpc->lpc_type, pos, | |
340 | data, len); | |
341 | if (rc) | |
342 | return -ENXIO; | |
343 | *ppos += len; | |
344 | ubuf += len; | |
345 | todo -= len; | |
346 | } | |
347 | ||
348 | return count; | |
349 | } | |
350 | ||
351 | static const struct file_operations lpc_fops = { | |
352 | .read = lpc_debug_read, | |
353 | .write = lpc_debug_write, | |
354 | .open = simple_open, | |
355 | .llseek = default_llseek, | |
356 | }; | |
357 | ||
358 | static int opal_lpc_debugfs_create_type(struct dentry *folder, | |
359 | const char *fname, | |
360 | enum OpalLPCAddressType type) | |
361 | { | |
362 | struct lpc_debugfs_entry *entry; | |
363 | entry = kzalloc(sizeof(*entry), GFP_KERNEL); | |
364 | if (!entry) | |
365 | return -ENOMEM; | |
366 | entry->lpc_type = type; | |
367 | debugfs_create_file(fname, 0600, folder, entry, &lpc_fops); | |
368 | return 0; | |
369 | } | |
370 | ||
371 | static int opal_lpc_init_debugfs(void) | |
372 | { | |
373 | struct dentry *root; | |
374 | int rc = 0; | |
375 | ||
376 | if (opal_lpc_chip_id < 0) | |
377 | return -ENODEV; | |
378 | ||
379 | root = debugfs_create_dir("lpc", powerpc_debugfs_root); | |
380 | ||
381 | rc |= opal_lpc_debugfs_create_type(root, "io", OPAL_LPC_IO); | |
382 | rc |= opal_lpc_debugfs_create_type(root, "mem", OPAL_LPC_MEM); | |
383 | rc |= opal_lpc_debugfs_create_type(root, "fw", OPAL_LPC_FW); | |
384 | return rc; | |
385 | } | |
b14726c5 | 386 | machine_device_initcall(powernv, opal_lpc_init_debugfs); |
fa2dbe2e BH |
387 | #endif /* CONFIG_DEBUG_FS */ |
388 | ||
3fafe9c2 BH |
389 | void opal_lpc_init(void) |
390 | { | |
391 | struct device_node *np; | |
392 | ||
393 | /* | |
394 | * Look for a Power8 LPC bus tagged as "primary", | |
395 | * we currently support only one though the OPAL APIs | |
396 | * support any number. | |
397 | */ | |
398 | for_each_compatible_node(np, NULL, "ibm,power8-lpc") { | |
399 | if (!of_device_is_available(np)) | |
400 | continue; | |
401 | if (!of_get_property(np, "primary", NULL)) | |
402 | continue; | |
403 | opal_lpc_chip_id = of_get_ibm_chip_id(np); | |
404 | break; | |
405 | } | |
406 | if (opal_lpc_chip_id < 0) | |
407 | return; | |
408 | ||
409 | /* Setup special IO ops */ | |
410 | ppc_pci_io = opal_lpc_io; | |
411 | isa_io_special = true; | |
412 | ||
413 | pr_info("OPAL: Power8 LPC bus found, chip ID %d\n", opal_lpc_chip_id); | |
414 | } |