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55190f88 BH |
1 | /* |
2 | * PowerNV setup code. | |
3 | * | |
4 | * Copyright 2011 IBM Corp. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #undef DEBUG | |
13 | ||
14 | #include <linux/cpu.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/sched.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/tty.h> | |
19 | #include <linux/reboot.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/console.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/seq_file.h> | |
25 | #include <linux/of.h> | |
26a2056e | 26 | #include <linux/of_fdt.h> |
55190f88 BH |
27 | #include <linux/interrupt.h> |
28 | #include <linux/bug.h> | |
cd15b048 | 29 | #include <linux/pci.h> |
fb5153d0 | 30 | #include <linux/cpufreq.h> |
55190f88 BH |
31 | |
32 | #include <asm/machdep.h> | |
33 | #include <asm/firmware.h> | |
34 | #include <asm/xics.h> | |
243e2511 | 35 | #include <asm/xive.h> |
daea1175 | 36 | #include <asm/opal.h> |
13906db6 | 37 | #include <asm/kexec.h> |
b2a80878 | 38 | #include <asm/smp.h> |
55190f88 BH |
39 | |
40 | #include "powernv.h" | |
41 | ||
42 | static void __init pnv_setup_arch(void) | |
43 | { | |
4817fc32 AB |
44 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
45 | ||
55190f88 BH |
46 | /* Initialize SMP */ |
47 | pnv_smp_init(); | |
48 | ||
61305a96 BH |
49 | /* Setup PCI */ |
50 | pnv_pci_init(); | |
55190f88 | 51 | |
628daa8d BH |
52 | /* Setup RTC and NVRAM callbacks */ |
53 | if (firmware_has_feature(FW_FEATURE_OPAL)) | |
54 | opal_nvram_init(); | |
55190f88 BH |
55 | |
56 | /* Enable NAP mode */ | |
57 | powersave_nap = 1; | |
58 | ||
59 | /* XXX PMCS */ | |
60 | } | |
61 | ||
f2d57694 | 62 | static void __init pnv_init(void) |
55190f88 | 63 | { |
3fafe9c2 BH |
64 | /* |
65 | * Initialize the LPC bus now so that legacy serial | |
66 | * ports can be found on it | |
67 | */ | |
68 | opal_lpc_init(); | |
69 | ||
daea1175 BH |
70 | #ifdef CONFIG_HVC_OPAL |
71 | if (firmware_has_feature(FW_FEATURE_OPAL)) | |
72 | hvc_opal_init_early(); | |
73 | else | |
74 | #endif | |
75 | add_preferred_console("hvc", 0, NULL); | |
55190f88 BH |
76 | } |
77 | ||
78 | static void __init pnv_init_IRQ(void) | |
79 | { | |
243e2511 BH |
80 | /* Try using a XIVE if available, otherwise use a XICS */ |
81 | if (!xive_native_init()) | |
82 | xics_init(); | |
55190f88 BH |
83 | |
84 | WARN_ON(!ppc_md.get_irq); | |
85 | } | |
86 | ||
87 | static void pnv_show_cpuinfo(struct seq_file *m) | |
88 | { | |
89 | struct device_node *root; | |
90 | const char *model = ""; | |
91 | ||
92 | root = of_find_node_by_path("/"); | |
93 | if (root) | |
94 | model = of_get_property(root, "model", NULL); | |
95 | seq_printf(m, "machine\t\t: PowerNV %s\n", model); | |
e4d54f71 SS |
96 | if (firmware_has_feature(FW_FEATURE_OPAL)) |
97 | seq_printf(m, "firmware\t: OPAL\n"); | |
14a43e69 BH |
98 | else |
99 | seq_printf(m, "firmware\t: BML\n"); | |
55190f88 | 100 | of_node_put(root); |
3a4c2601 AK |
101 | if (radix_enabled()) |
102 | seq_printf(m, "MMU\t\t: Radix\n"); | |
103 | else | |
104 | seq_printf(m, "MMU\t\t: Hash\n"); | |
55190f88 BH |
105 | } |
106 | ||
2196c6f1 VH |
107 | static void pnv_prepare_going_down(void) |
108 | { | |
109 | /* | |
110 | * Disable all notifiers from OPAL, we can't | |
111 | * service interrupts anymore anyway | |
112 | */ | |
81f2f7ce | 113 | opal_event_shutdown(); |
2196c6f1 VH |
114 | |
115 | /* Soft disable interrupts */ | |
116 | local_irq_disable(); | |
117 | ||
118 | /* | |
119 | * Return secondary CPUs to firwmare if a flash update | |
120 | * is pending otherwise we will get all sort of error | |
121 | * messages about CPU being stuck etc.. This will also | |
122 | * have the side effect of hard disabling interrupts so | |
123 | * past this point, the kernel is effectively dead. | |
124 | */ | |
125 | opal_flash_term_callback(); | |
126 | } | |
127 | ||
ec27329f | 128 | static void __noreturn pnv_restart(char *cmd) |
55190f88 | 129 | { |
ec27329f BH |
130 | long rc = OPAL_BUSY; |
131 | ||
2196c6f1 | 132 | pnv_prepare_going_down(); |
e8e71fa4 | 133 | |
ec27329f BH |
134 | while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { |
135 | rc = opal_cec_reboot(); | |
136 | if (rc == OPAL_BUSY_EVENT) | |
137 | opal_poll_events(NULL); | |
138 | else | |
139 | mdelay(10); | |
140 | } | |
141 | for (;;) | |
142 | opal_poll_events(NULL); | |
55190f88 BH |
143 | } |
144 | ||
ec27329f | 145 | static void __noreturn pnv_power_off(void) |
55190f88 | 146 | { |
ec27329f BH |
147 | long rc = OPAL_BUSY; |
148 | ||
2196c6f1 | 149 | pnv_prepare_going_down(); |
e8e71fa4 | 150 | |
ec27329f BH |
151 | while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { |
152 | rc = opal_cec_power_down(0); | |
153 | if (rc == OPAL_BUSY_EVENT) | |
154 | opal_poll_events(NULL); | |
155 | else | |
156 | mdelay(10); | |
157 | } | |
158 | for (;;) | |
159 | opal_poll_events(NULL); | |
55190f88 BH |
160 | } |
161 | ||
ec27329f | 162 | static void __noreturn pnv_halt(void) |
55190f88 | 163 | { |
ec27329f | 164 | pnv_power_off(); |
55190f88 BH |
165 | } |
166 | ||
628daa8d | 167 | static void pnv_progress(char *s, unsigned short hex) |
55190f88 BH |
168 | { |
169 | } | |
170 | ||
73ed148a BH |
171 | static void pnv_shutdown(void) |
172 | { | |
173 | /* Let the PCI code clear up IODA tables */ | |
174 | pnv_pci_shutdown(); | |
175 | ||
f7d98d18 VH |
176 | /* |
177 | * Stop OPAL activity: Unregister all OPAL interrupts so they | |
178 | * don't fire up while we kexec and make sure all potentially | |
179 | * DMA'ing ops are complete (such as dump retrieval). | |
73ed148a BH |
180 | */ |
181 | opal_shutdown(); | |
182 | } | |
183 | ||
da665885 | 184 | #ifdef CONFIG_KEXEC_CORE |
298b34d7 BH |
185 | static void pnv_kexec_wait_secondaries_down(void) |
186 | { | |
187 | int my_cpu, i, notified = -1; | |
188 | ||
189 | my_cpu = get_cpu(); | |
190 | ||
191 | for_each_online_cpu(i) { | |
192 | uint8_t status; | |
1b70386c | 193 | int64_t rc, timeout = 1000; |
298b34d7 BH |
194 | |
195 | if (i == my_cpu) | |
196 | continue; | |
197 | ||
198 | for (;;) { | |
199 | rc = opal_query_cpu_status(get_hard_smp_processor_id(i), | |
200 | &status); | |
201 | if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) | |
202 | break; | |
203 | barrier(); | |
204 | if (i != notified) { | |
205 | printk(KERN_INFO "kexec: waiting for cpu %d " | |
206 | "(physical %d) to enter OPAL\n", | |
207 | i, paca[i].hw_cpu_id); | |
208 | notified = i; | |
209 | } | |
1b70386c SMJ |
210 | |
211 | /* | |
212 | * On crash secondaries might be unreachable or hung, | |
213 | * so timeout if we've waited too long | |
214 | * */ | |
215 | mdelay(1); | |
216 | if (timeout-- == 0) { | |
217 | printk(KERN_ERR "kexec: timed out waiting for " | |
218 | "cpu %d (physical %d) to enter OPAL\n", | |
219 | i, paca[i].hw_cpu_id); | |
220 | break; | |
221 | } | |
298b34d7 BH |
222 | } |
223 | } | |
224 | } | |
225 | ||
628daa8d | 226 | static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) |
55190f88 | 227 | { |
243e2511 BH |
228 | if (xive_enabled()) |
229 | xive_kexec_teardown_cpu(secondary); | |
230 | else | |
231 | xics_kexec_teardown_cpu(secondary); | |
13906db6 | 232 | |
e4d54f71 | 233 | /* On OPAL, we return all CPUs to firmware */ |
e4d54f71 | 234 | if (!firmware_has_feature(FW_FEATURE_OPAL)) |
298b34d7 BH |
235 | return; |
236 | ||
237 | if (secondary) { | |
238 | /* Return secondary CPUs to firmware on OPAL v3 */ | |
13906db6 BH |
239 | mb(); |
240 | get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; | |
241 | mb(); | |
242 | ||
243 | /* Return the CPU to OPAL */ | |
244 | opal_return_cpu(); | |
298b34d7 BH |
245 | } else { |
246 | /* Primary waits for the secondaries to have reached OPAL */ | |
247 | pnv_kexec_wait_secondaries_down(); | |
e72bb8a5 | 248 | |
243e2511 BH |
249 | /* Switch XIVE back to emulation mode */ |
250 | if (xive_enabled()) | |
251 | xive_shutdown(); | |
252 | ||
e72bb8a5 SMJ |
253 | /* |
254 | * We might be running as little-endian - now that interrupts | |
255 | * are disabled, reset the HILE bit to big-endian so we don't | |
256 | * take interrupts in the wrong endian later | |
257 | */ | |
258 | opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); | |
13906db6 | 259 | } |
55190f88 | 260 | } |
da665885 | 261 | #endif /* CONFIG_KEXEC_CORE */ |
55190f88 | 262 | |
6d97d7a2 AB |
263 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
264 | static unsigned long pnv_memory_block_size(void) | |
265 | { | |
266 | return 256UL * 1024 * 1024; | |
267 | } | |
268 | #endif | |
269 | ||
628daa8d | 270 | static void __init pnv_setup_machdep_opal(void) |
55190f88 | 271 | { |
628daa8d | 272 | ppc_md.get_boot_time = opal_get_boot_time; |
628daa8d | 273 | ppc_md.restart = pnv_restart; |
9178ba29 | 274 | pm_power_off = pnv_power_off; |
628daa8d | 275 | ppc_md.halt = pnv_halt; |
ed79ba9e | 276 | ppc_md.machine_check_exception = opal_machine_check; |
55672ecf | 277 | ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; |
0869b6fd MS |
278 | ppc_md.hmi_exception_early = opal_hmi_exception_early; |
279 | ppc_md.handle_hmi_exception = opal_handle_hmi_exception; | |
55190f88 BH |
280 | } |
281 | ||
55190f88 BH |
282 | static int __init pnv_probe(void) |
283 | { | |
406b0b6a | 284 | if (!of_machine_is_compatible("ibm,powernv")) |
55190f88 BH |
285 | return 0; |
286 | ||
628daa8d BH |
287 | if (firmware_has_feature(FW_FEATURE_OPAL)) |
288 | pnv_setup_machdep_opal(); | |
628daa8d | 289 | |
55190f88 BH |
290 | pr_debug("PowerNV detected !\n"); |
291 | ||
f2d57694 BH |
292 | pnv_init(); |
293 | ||
55190f88 BH |
294 | return 1; |
295 | } | |
296 | ||
fb5153d0 GS |
297 | /* |
298 | * Returns the cpu frequency for 'cpu' in Hz. This is used by | |
299 | * /proc/cpuinfo | |
300 | */ | |
e51df2c1 | 301 | static unsigned long pnv_get_proc_freq(unsigned int cpu) |
fb5153d0 GS |
302 | { |
303 | unsigned long ret_freq; | |
304 | ||
305 | ret_freq = cpufreq_quick_get(cpu) * 1000ul; | |
306 | ||
307 | /* | |
308 | * If the backend cpufreq driver does not exist, | |
309 | * then fallback to old way of reporting the clockrate. | |
310 | */ | |
311 | if (!ret_freq) | |
312 | ret_freq = ppc_proc_freq; | |
313 | return ret_freq; | |
314 | } | |
315 | ||
55190f88 BH |
316 | define_machine(powernv) { |
317 | .name = "PowerNV", | |
318 | .probe = pnv_probe, | |
628daa8d | 319 | .setup_arch = pnv_setup_arch, |
55190f88 BH |
320 | .init_IRQ = pnv_init_IRQ, |
321 | .show_cpuinfo = pnv_show_cpuinfo, | |
fb5153d0 | 322 | .get_proc_freq = pnv_get_proc_freq, |
55190f88 | 323 | .progress = pnv_progress, |
73ed148a | 324 | .machine_shutdown = pnv_shutdown, |
5593e303 | 325 | .power_save = NULL, |
55190f88 | 326 | .calibrate_decr = generic_calibrate_decr, |
da665885 | 327 | #ifdef CONFIG_KEXEC_CORE |
55190f88 BH |
328 | .kexec_cpu_down = pnv_kexec_cpu_down, |
329 | #endif | |
6d97d7a2 AB |
330 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
331 | .memory_block_size = pnv_memory_block_size, | |
332 | #endif | |
55190f88 | 333 | }; |