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55190f88 BH |
1 | /* |
2 | * PowerNV setup code. | |
3 | * | |
4 | * Copyright 2011 IBM Corp. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #undef DEBUG | |
13 | ||
14 | #include <linux/cpu.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/sched.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/tty.h> | |
19 | #include <linux/reboot.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/console.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/seq_file.h> | |
25 | #include <linux/of.h> | |
26a2056e | 26 | #include <linux/of_fdt.h> |
55190f88 BH |
27 | #include <linux/interrupt.h> |
28 | #include <linux/bug.h> | |
cd15b048 | 29 | #include <linux/pci.h> |
fb5153d0 | 30 | #include <linux/cpufreq.h> |
55190f88 BH |
31 | |
32 | #include <asm/machdep.h> | |
33 | #include <asm/firmware.h> | |
34 | #include <asm/xics.h> | |
daea1175 | 35 | #include <asm/opal.h> |
13906db6 | 36 | #include <asm/kexec.h> |
b2a80878 | 37 | #include <asm/smp.h> |
55190f88 BH |
38 | |
39 | #include "powernv.h" | |
40 | ||
41 | static void __init pnv_setup_arch(void) | |
42 | { | |
4817fc32 AB |
43 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
44 | ||
55190f88 BH |
45 | /* Initialize SMP */ |
46 | pnv_smp_init(); | |
47 | ||
61305a96 BH |
48 | /* Setup PCI */ |
49 | pnv_pci_init(); | |
55190f88 | 50 | |
628daa8d BH |
51 | /* Setup RTC and NVRAM callbacks */ |
52 | if (firmware_has_feature(FW_FEATURE_OPAL)) | |
53 | opal_nvram_init(); | |
55190f88 BH |
54 | |
55 | /* Enable NAP mode */ | |
56 | powersave_nap = 1; | |
57 | ||
58 | /* XXX PMCS */ | |
59 | } | |
60 | ||
61 | static void __init pnv_init_early(void) | |
62 | { | |
3fafe9c2 BH |
63 | /* |
64 | * Initialize the LPC bus now so that legacy serial | |
65 | * ports can be found on it | |
66 | */ | |
67 | opal_lpc_init(); | |
68 | ||
daea1175 BH |
69 | #ifdef CONFIG_HVC_OPAL |
70 | if (firmware_has_feature(FW_FEATURE_OPAL)) | |
71 | hvc_opal_init_early(); | |
72 | else | |
73 | #endif | |
74 | add_preferred_console("hvc", 0, NULL); | |
55190f88 BH |
75 | } |
76 | ||
77 | static void __init pnv_init_IRQ(void) | |
78 | { | |
79 | xics_init(); | |
80 | ||
81 | WARN_ON(!ppc_md.get_irq); | |
82 | } | |
83 | ||
84 | static void pnv_show_cpuinfo(struct seq_file *m) | |
85 | { | |
86 | struct device_node *root; | |
87 | const char *model = ""; | |
88 | ||
89 | root = of_find_node_by_path("/"); | |
90 | if (root) | |
91 | model = of_get_property(root, "model", NULL); | |
92 | seq_printf(m, "machine\t\t: PowerNV %s\n", model); | |
75b93da4 BH |
93 | if (firmware_has_feature(FW_FEATURE_OPALv3)) |
94 | seq_printf(m, "firmware\t: OPAL v3\n"); | |
95 | else if (firmware_has_feature(FW_FEATURE_OPALv2)) | |
14a43e69 BH |
96 | seq_printf(m, "firmware\t: OPAL v2\n"); |
97 | else if (firmware_has_feature(FW_FEATURE_OPAL)) | |
98 | seq_printf(m, "firmware\t: OPAL v1\n"); | |
99 | else | |
100 | seq_printf(m, "firmware\t: BML\n"); | |
55190f88 BH |
101 | of_node_put(root); |
102 | } | |
103 | ||
2196c6f1 VH |
104 | static void pnv_prepare_going_down(void) |
105 | { | |
106 | /* | |
107 | * Disable all notifiers from OPAL, we can't | |
108 | * service interrupts anymore anyway | |
109 | */ | |
110 | opal_notifier_disable(); | |
111 | ||
112 | /* Soft disable interrupts */ | |
113 | local_irq_disable(); | |
114 | ||
115 | /* | |
116 | * Return secondary CPUs to firwmare if a flash update | |
117 | * is pending otherwise we will get all sort of error | |
118 | * messages about CPU being stuck etc.. This will also | |
119 | * have the side effect of hard disabling interrupts so | |
120 | * past this point, the kernel is effectively dead. | |
121 | */ | |
122 | opal_flash_term_callback(); | |
123 | } | |
124 | ||
ec27329f | 125 | static void __noreturn pnv_restart(char *cmd) |
55190f88 | 126 | { |
ec27329f BH |
127 | long rc = OPAL_BUSY; |
128 | ||
2196c6f1 | 129 | pnv_prepare_going_down(); |
e8e71fa4 | 130 | |
ec27329f BH |
131 | while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { |
132 | rc = opal_cec_reboot(); | |
133 | if (rc == OPAL_BUSY_EVENT) | |
134 | opal_poll_events(NULL); | |
135 | else | |
136 | mdelay(10); | |
137 | } | |
138 | for (;;) | |
139 | opal_poll_events(NULL); | |
55190f88 BH |
140 | } |
141 | ||
ec27329f | 142 | static void __noreturn pnv_power_off(void) |
55190f88 | 143 | { |
ec27329f BH |
144 | long rc = OPAL_BUSY; |
145 | ||
2196c6f1 | 146 | pnv_prepare_going_down(); |
e8e71fa4 | 147 | |
ec27329f BH |
148 | while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { |
149 | rc = opal_cec_power_down(0); | |
150 | if (rc == OPAL_BUSY_EVENT) | |
151 | opal_poll_events(NULL); | |
152 | else | |
153 | mdelay(10); | |
154 | } | |
155 | for (;;) | |
156 | opal_poll_events(NULL); | |
55190f88 BH |
157 | } |
158 | ||
ec27329f | 159 | static void __noreturn pnv_halt(void) |
55190f88 | 160 | { |
ec27329f | 161 | pnv_power_off(); |
55190f88 BH |
162 | } |
163 | ||
628daa8d | 164 | static void pnv_progress(char *s, unsigned short hex) |
55190f88 BH |
165 | { |
166 | } | |
167 | ||
cd15b048 BH |
168 | static int pnv_dma_set_mask(struct device *dev, u64 dma_mask) |
169 | { | |
170 | if (dev_is_pci(dev)) | |
171 | return pnv_pci_dma_set_mask(to_pci_dev(dev), dma_mask); | |
172 | return __dma_set_mask(dev, dma_mask); | |
173 | } | |
174 | ||
fe7e85c6 GS |
175 | static u64 pnv_dma_get_required_mask(struct device *dev) |
176 | { | |
177 | if (dev_is_pci(dev)) | |
178 | return pnv_pci_dma_get_required_mask(to_pci_dev(dev)); | |
179 | ||
180 | return __dma_get_required_mask(dev); | |
181 | } | |
182 | ||
73ed148a BH |
183 | static void pnv_shutdown(void) |
184 | { | |
185 | /* Let the PCI code clear up IODA tables */ | |
186 | pnv_pci_shutdown(); | |
187 | ||
f7d98d18 VH |
188 | /* |
189 | * Stop OPAL activity: Unregister all OPAL interrupts so they | |
190 | * don't fire up while we kexec and make sure all potentially | |
191 | * DMA'ing ops are complete (such as dump retrieval). | |
73ed148a BH |
192 | */ |
193 | opal_shutdown(); | |
194 | } | |
195 | ||
628daa8d | 196 | #ifdef CONFIG_KEXEC |
298b34d7 BH |
197 | static void pnv_kexec_wait_secondaries_down(void) |
198 | { | |
199 | int my_cpu, i, notified = -1; | |
200 | ||
201 | my_cpu = get_cpu(); | |
202 | ||
203 | for_each_online_cpu(i) { | |
204 | uint8_t status; | |
205 | int64_t rc; | |
206 | ||
207 | if (i == my_cpu) | |
208 | continue; | |
209 | ||
210 | for (;;) { | |
211 | rc = opal_query_cpu_status(get_hard_smp_processor_id(i), | |
212 | &status); | |
213 | if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) | |
214 | break; | |
215 | barrier(); | |
216 | if (i != notified) { | |
217 | printk(KERN_INFO "kexec: waiting for cpu %d " | |
218 | "(physical %d) to enter OPAL\n", | |
219 | i, paca[i].hw_cpu_id); | |
220 | notified = i; | |
221 | } | |
222 | } | |
223 | } | |
224 | } | |
225 | ||
628daa8d | 226 | static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) |
55190f88 | 227 | { |
628daa8d | 228 | xics_kexec_teardown_cpu(secondary); |
13906db6 | 229 | |
298b34d7 BH |
230 | /* On OPAL v3, we return all CPUs to firmware */ |
231 | ||
232 | if (!firmware_has_feature(FW_FEATURE_OPALv3)) | |
233 | return; | |
234 | ||
235 | if (secondary) { | |
236 | /* Return secondary CPUs to firmware on OPAL v3 */ | |
13906db6 BH |
237 | mb(); |
238 | get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; | |
239 | mb(); | |
240 | ||
241 | /* Return the CPU to OPAL */ | |
242 | opal_return_cpu(); | |
298b34d7 BH |
243 | } else if (crash_shutdown) { |
244 | /* | |
245 | * On crash, we don't wait for secondaries to go | |
246 | * down as they might be unreachable or hung, so | |
247 | * instead we just wait a bit and move on. | |
248 | */ | |
249 | mdelay(1); | |
250 | } else { | |
251 | /* Primary waits for the secondaries to have reached OPAL */ | |
252 | pnv_kexec_wait_secondaries_down(); | |
13906db6 | 253 | } |
55190f88 | 254 | } |
628daa8d | 255 | #endif /* CONFIG_KEXEC */ |
55190f88 | 256 | |
6d97d7a2 AB |
257 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
258 | static unsigned long pnv_memory_block_size(void) | |
259 | { | |
260 | return 256UL * 1024 * 1024; | |
261 | } | |
262 | #endif | |
263 | ||
628daa8d | 264 | static void __init pnv_setup_machdep_opal(void) |
55190f88 | 265 | { |
628daa8d | 266 | ppc_md.get_boot_time = opal_get_boot_time; |
628daa8d | 267 | ppc_md.restart = pnv_restart; |
9178ba29 | 268 | pm_power_off = pnv_power_off; |
628daa8d | 269 | ppc_md.halt = pnv_halt; |
ed79ba9e | 270 | ppc_md.machine_check_exception = opal_machine_check; |
55672ecf | 271 | ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; |
0869b6fd MS |
272 | ppc_md.hmi_exception_early = opal_hmi_exception_early; |
273 | ppc_md.handle_hmi_exception = opal_handle_hmi_exception; | |
55190f88 BH |
274 | } |
275 | ||
55190f88 BH |
276 | static int __init pnv_probe(void) |
277 | { | |
278 | unsigned long root = of_get_flat_dt_root(); | |
279 | ||
280 | if (!of_flat_dt_is_compatible(root, "ibm,powernv")) | |
281 | return 0; | |
282 | ||
283 | hpte_init_native(); | |
284 | ||
628daa8d BH |
285 | if (firmware_has_feature(FW_FEATURE_OPAL)) |
286 | pnv_setup_machdep_opal(); | |
628daa8d | 287 | |
55190f88 BH |
288 | pr_debug("PowerNV detected !\n"); |
289 | ||
290 | return 1; | |
291 | } | |
292 | ||
fb5153d0 GS |
293 | /* |
294 | * Returns the cpu frequency for 'cpu' in Hz. This is used by | |
295 | * /proc/cpuinfo | |
296 | */ | |
e51df2c1 | 297 | static unsigned long pnv_get_proc_freq(unsigned int cpu) |
fb5153d0 GS |
298 | { |
299 | unsigned long ret_freq; | |
300 | ||
301 | ret_freq = cpufreq_quick_get(cpu) * 1000ul; | |
302 | ||
303 | /* | |
304 | * If the backend cpufreq driver does not exist, | |
305 | * then fallback to old way of reporting the clockrate. | |
306 | */ | |
307 | if (!ret_freq) | |
308 | ret_freq = ppc_proc_freq; | |
309 | return ret_freq; | |
310 | } | |
311 | ||
55190f88 BH |
312 | define_machine(powernv) { |
313 | .name = "PowerNV", | |
314 | .probe = pnv_probe, | |
55190f88 | 315 | .init_early = pnv_init_early, |
628daa8d | 316 | .setup_arch = pnv_setup_arch, |
55190f88 BH |
317 | .init_IRQ = pnv_init_IRQ, |
318 | .show_cpuinfo = pnv_show_cpuinfo, | |
fb5153d0 | 319 | .get_proc_freq = pnv_get_proc_freq, |
55190f88 | 320 | .progress = pnv_progress, |
73ed148a | 321 | .machine_shutdown = pnv_shutdown, |
591ac0cb | 322 | .power_save = power7_idle, |
55190f88 | 323 | .calibrate_decr = generic_calibrate_decr, |
cd15b048 | 324 | .dma_set_mask = pnv_dma_set_mask, |
fe7e85c6 | 325 | .dma_get_required_mask = pnv_dma_get_required_mask, |
55190f88 BH |
326 | #ifdef CONFIG_KEXEC |
327 | .kexec_cpu_down = pnv_kexec_cpu_down, | |
328 | #endif | |
6d97d7a2 AB |
329 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
330 | .memory_block_size = pnv_memory_block_size, | |
331 | #endif | |
55190f88 | 332 | }; |