]>
Commit | Line | Data |
---|---|---|
55190f88 BH |
1 | /* |
2 | * SMP support for PowerNV machines. | |
3 | * | |
4 | * Copyright 2011 IBM Corp. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/sched.h> | |
ef8bd77f | 15 | #include <linux/sched/hotplug.h> |
55190f88 BH |
16 | #include <linux/smp.h> |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/spinlock.h> | |
21 | #include <linux/cpu.h> | |
22 | ||
23 | #include <asm/irq.h> | |
24 | #include <asm/smp.h> | |
25 | #include <asm/paca.h> | |
26 | #include <asm/machdep.h> | |
27 | #include <asm/cputable.h> | |
28 | #include <asm/firmware.h> | |
55190f88 BH |
29 | #include <asm/vdso_datapage.h> |
30 | #include <asm/cputhreads.h> | |
31 | #include <asm/xics.h> | |
14a43e69 | 32 | #include <asm/opal.h> |
f2038911 | 33 | #include <asm/runlatch.h> |
2751b628 | 34 | #include <asm/code-patching.h> |
d4e58e59 | 35 | #include <asm/dbell.h> |
755563bc PM |
36 | #include <asm/kvm_ppc.h> |
37 | #include <asm/ppc-opcode.h> | |
55190f88 BH |
38 | |
39 | #include "powernv.h" | |
40 | ||
344eb010 BH |
41 | #ifdef DEBUG |
42 | #include <asm/udbg.h> | |
43 | #define DBG(fmt...) udbg_printf(fmt) | |
44 | #else | |
45 | #define DBG(fmt...) | |
46 | #endif | |
47 | ||
061d19f2 | 48 | static void pnv_smp_setup_cpu(int cpu) |
55190f88 BH |
49 | { |
50 | if (cpu != boot_cpuid) | |
51 | xics_setup_cpu(); | |
d4e58e59 MN |
52 | |
53 | #ifdef CONFIG_PPC_DOORBELL | |
54 | if (cpu_has_feature(CPU_FTR_DBELL)) | |
55 | doorbell_setup_this_cpu(); | |
56 | #endif | |
55190f88 BH |
57 | } |
58 | ||
e51df2c1 | 59 | static int pnv_smp_kick_cpu(int nr) |
14a43e69 BH |
60 | { |
61 | unsigned int pcpu = get_hard_smp_processor_id(nr); | |
2751b628 AB |
62 | unsigned long start_here = |
63 | __pa(ppc_function_entry(generic_secondary_smp_init)); | |
14a43e69 | 64 | long rc; |
e4d54f71 | 65 | uint8_t status; |
14a43e69 BH |
66 | |
67 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
68 | ||
b2b48584 | 69 | /* |
e4d54f71 | 70 | * If we already started or OPAL is not supported, we just |
b2b48584 | 71 | * kick the CPU via the PACA |
14a43e69 | 72 | */ |
e4d54f71 | 73 | if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPAL)) |
b2b48584 BH |
74 | goto kick; |
75 | ||
76 | /* | |
77 | * At this point, the CPU can either be spinning on the way in | |
78 | * from kexec or be inside OPAL waiting to be started for the | |
79 | * first time. OPAL v3 allows us to query OPAL to know if it | |
80 | * has the CPUs, so we do that | |
81 | */ | |
e4d54f71 SS |
82 | rc = opal_query_cpu_status(pcpu, &status); |
83 | if (rc != OPAL_SUCCESS) { | |
84 | pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr); | |
85 | return -ENODEV; | |
86 | } | |
b2b48584 | 87 | |
e4d54f71 SS |
88 | /* |
89 | * Already started, just kick it, probably coming from | |
90 | * kexec and spinning | |
91 | */ | |
92 | if (status == OPAL_THREAD_STARTED) | |
93 | goto kick; | |
b2b48584 | 94 | |
e4d54f71 SS |
95 | /* |
96 | * Available/inactive, let's kick it | |
97 | */ | |
98 | if (status == OPAL_THREAD_INACTIVE) { | |
99 | pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu); | |
100 | rc = opal_start_cpu(pcpu, start_here); | |
101 | if (rc != OPAL_SUCCESS) { | |
102 | pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr); | |
b2b48584 BH |
103 | return -ENODEV; |
104 | } | |
105 | } else { | |
106 | /* | |
e4d54f71 SS |
107 | * An unavailable CPU (or any other unknown status) |
108 | * shouldn't be started. It should also | |
109 | * not be in the possible map but currently it can | |
110 | * happen | |
b2b48584 | 111 | */ |
e4d54f71 SS |
112 | pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable" |
113 | " (status %d)...\n", nr, pcpu, status); | |
114 | return -ENODEV; | |
14a43e69 | 115 | } |
e4d54f71 SS |
116 | |
117 | kick: | |
14a43e69 BH |
118 | return smp_generic_kick_cpu(nr); |
119 | } | |
120 | ||
344eb010 BH |
121 | #ifdef CONFIG_HOTPLUG_CPU |
122 | ||
123 | static int pnv_smp_cpu_disable(void) | |
124 | { | |
125 | int cpu = smp_processor_id(); | |
126 | ||
127 | /* This is identical to pSeries... might consolidate by | |
128 | * moving migrate_irqs_away to a ppc_md with default to | |
129 | * the generic fixup_irqs. --BenH. | |
130 | */ | |
131 | set_cpu_online(cpu, false); | |
132 | vdso_data->processorCount--; | |
133 | if (cpu == boot_cpuid) | |
134 | boot_cpuid = cpumask_any(cpu_online_mask); | |
135 | xics_migrate_irqs_away(); | |
136 | return 0; | |
137 | } | |
138 | ||
139 | static void pnv_smp_cpu_kill_self(void) | |
140 | { | |
141 | unsigned int cpu; | |
755563bc | 142 | unsigned long srr1, wmask; |
8eb8ac89 | 143 | u32 idle_states; |
344eb010 | 144 | |
344eb010 BH |
145 | /* Standard hot unplug procedure */ |
146 | local_irq_disable(); | |
147 | idle_task_exit(); | |
148 | current->active_mm = NULL; /* for sanity */ | |
149 | cpu = smp_processor_id(); | |
150 | DBG("CPU%d offline\n", cpu); | |
151 | generic_set_cpu_dead(cpu); | |
152 | smp_wmb(); | |
153 | ||
755563bc PM |
154 | wmask = SRR1_WAKEMASK; |
155 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) | |
156 | wmask = SRR1_WAKEMASK_P8; | |
157 | ||
8eb8ac89 | 158 | idle_states = pnv_get_supported_cpuidle_states(); |
9b256714 | 159 | |
344eb010 | 160 | /* We don't want to take decrementer interrupts while we are offline, |
9b256714 BH |
161 | * so clear LPCR:PECE1. We keep PECE2 (and LPCR_PECE_HVEE on P9) |
162 | * enabled as to let IPIs in. | |
344eb010 BH |
163 | */ |
164 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1); | |
53c656c4 PM |
165 | |
166 | /* | |
167 | * Hard-disable interrupts, and then clear irq_happened flags | |
168 | * that we can safely ignore while off-line, since they | |
169 | * are for things for which we do no processing when off-line | |
170 | * (or in the case of HMI, all the processing we need to do | |
171 | * is done in lower-level real-mode code). | |
172 | */ | |
173 | hard_irq_disable(); | |
174 | local_paca->irq_happened &= ~(PACA_IRQ_DEC | PACA_IRQ_HMI); | |
175 | ||
344eb010 | 176 | while (!generic_check_cpu_restart(cpu)) { |
53c656c4 PM |
177 | /* |
178 | * Clear IPI flag, since we don't handle IPIs while | |
179 | * offline, except for those when changing micro-threading | |
180 | * mode, which are handled explicitly below, and those | |
181 | * for coming online, which are handled via | |
182 | * generic_check_cpu_restart() calls. | |
183 | */ | |
184 | kvmppc_set_host_ipi(cpu, 0); | |
77b54e9f | 185 | |
f2038911 | 186 | ppc64_runlatch_off(); |
77b54e9f | 187 | |
09206b60 GS |
188 | if (cpu_has_feature(CPU_FTR_ARCH_300)) { |
189 | srr1 = power9_idle_stop(pnv_deepest_stop_psscr_val, | |
190 | pnv_deepest_stop_psscr_mask); | |
191 | } else if (idle_states & OPAL_PM_WINKLE_ENABLED) { | |
77b54e9f | 192 | srr1 = power7_winkle(); |
09206b60 GS |
193 | } else if ((idle_states & OPAL_PM_SLEEP_ENABLED) || |
194 | (idle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { | |
8eb8ac89 | 195 | srr1 = power7_sleep(); |
09206b60 | 196 | } else { |
8eb8ac89 | 197 | srr1 = power7_nap(1); |
09206b60 | 198 | } |
77b54e9f | 199 | |
f2038911 | 200 | ppc64_runlatch_on(); |
e2186023 | 201 | |
56548fc0 PM |
202 | /* |
203 | * If the SRR1 value indicates that we woke up due to | |
204 | * an external interrupt, then clear the interrupt. | |
205 | * We clear the interrupt before checking for the | |
206 | * reason, so as to avoid a race where we wake up for | |
207 | * some other reason, find nothing and clear the interrupt | |
208 | * just as some other cpu is sending us an interrupt. | |
209 | * If we returned from power7_nap as a result of | |
210 | * having finished executing in a KVM guest, then srr1 | |
211 | * contains 0. | |
212 | */ | |
53c656c4 | 213 | if (((srr1 & wmask) == SRR1_WAKEEE) || |
9b256714 | 214 | ((srr1 & wmask) == SRR1_WAKEHVI) || |
53c656c4 | 215 | (local_paca->irq_happened & PACA_IRQ_EE)) { |
9b256714 BH |
216 | if (cpu_has_feature(CPU_FTR_ARCH_300)) |
217 | icp_opal_flush_interrupt(); | |
218 | else | |
219 | icp_native_flush_interrupt(); | |
755563bc PM |
220 | } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) { |
221 | unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); | |
222 | asm volatile(PPC_MSGCLR(%0) : : "r" (msg)); | |
56548fc0 | 223 | } |
53c656c4 PM |
224 | local_paca->irq_happened &= ~(PACA_IRQ_EE | PACA_IRQ_DBELL); |
225 | smp_mb(); | |
e2186023 ME |
226 | |
227 | if (cpu_core_split_required()) | |
228 | continue; | |
229 | ||
53c656c4 | 230 | if (srr1 && !generic_check_cpu_restart(cpu)) |
344eb010 | 231 | DBG("CPU%d Unexpected exit while offline !\n", cpu); |
344eb010 | 232 | } |
9b256714 BH |
233 | |
234 | /* Re-enable decrementer interrupts */ | |
344eb010 BH |
235 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1); |
236 | DBG("CPU%d coming online...\n", cpu); | |
237 | } | |
238 | ||
239 | #endif /* CONFIG_HOTPLUG_CPU */ | |
240 | ||
d70a54e2 GK |
241 | static int pnv_cpu_bootable(unsigned int nr) |
242 | { | |
243 | /* | |
244 | * Starting with POWER8, the subcore logic relies on all threads of a | |
245 | * core being booted so that they can participate in split mode | |
246 | * switches. So on those machines we ignore the smt_enabled_at_boot | |
247 | * setting (smt-enabled on the kernel command line). | |
248 | */ | |
249 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) | |
250 | return 1; | |
251 | ||
252 | return smp_generic_cpu_bootable(nr); | |
253 | } | |
254 | ||
55190f88 BH |
255 | static struct smp_ops_t pnv_smp_ops = { |
256 | .message_pass = smp_muxed_ipi_message_pass, | |
257 | .cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */ | |
258 | .probe = xics_smp_probe, | |
14a43e69 | 259 | .kick_cpu = pnv_smp_kick_cpu, |
55190f88 | 260 | .setup_cpu = pnv_smp_setup_cpu, |
d70a54e2 | 261 | .cpu_bootable = pnv_cpu_bootable, |
344eb010 BH |
262 | #ifdef CONFIG_HOTPLUG_CPU |
263 | .cpu_disable = pnv_smp_cpu_disable, | |
264 | .cpu_die = generic_cpu_die, | |
265 | #endif /* CONFIG_HOTPLUG_CPU */ | |
55190f88 BH |
266 | }; |
267 | ||
268 | /* This is called very early during platform setup_arch */ | |
269 | void __init pnv_smp_init(void) | |
270 | { | |
271 | smp_ops = &pnv_smp_ops; | |
272 | ||
344eb010 BH |
273 | #ifdef CONFIG_HOTPLUG_CPU |
274 | ppc_md.cpu_die = pnv_smp_cpu_kill_self; | |
275 | #endif | |
55190f88 | 276 | } |