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55190f88 BH |
1 | /* |
2 | * SMP support for PowerNV machines. | |
3 | * | |
4 | * Copyright 2011 IBM Corp. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/sched.h> | |
ef8bd77f | 15 | #include <linux/sched/hotplug.h> |
55190f88 BH |
16 | #include <linux/smp.h> |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/spinlock.h> | |
21 | #include <linux/cpu.h> | |
22 | ||
23 | #include <asm/irq.h> | |
24 | #include <asm/smp.h> | |
25 | #include <asm/paca.h> | |
26 | #include <asm/machdep.h> | |
27 | #include <asm/cputable.h> | |
28 | #include <asm/firmware.h> | |
55190f88 BH |
29 | #include <asm/vdso_datapage.h> |
30 | #include <asm/cputhreads.h> | |
31 | #include <asm/xics.h> | |
243e2511 | 32 | #include <asm/xive.h> |
14a43e69 | 33 | #include <asm/opal.h> |
f2038911 | 34 | #include <asm/runlatch.h> |
2751b628 | 35 | #include <asm/code-patching.h> |
d4e58e59 | 36 | #include <asm/dbell.h> |
755563bc PM |
37 | #include <asm/kvm_ppc.h> |
38 | #include <asm/ppc-opcode.h> | |
a7cd88da | 39 | #include <asm/cpuidle.h> |
55190f88 BH |
40 | |
41 | #include "powernv.h" | |
42 | ||
344eb010 BH |
43 | #ifdef DEBUG |
44 | #include <asm/udbg.h> | |
45 | #define DBG(fmt...) udbg_printf(fmt) | |
46 | #else | |
47 | #define DBG(fmt...) | |
48 | #endif | |
49 | ||
061d19f2 | 50 | static void pnv_smp_setup_cpu(int cpu) |
55190f88 | 51 | { |
243e2511 BH |
52 | if (xive_enabled()) |
53 | xive_smp_setup_cpu(); | |
54 | else if (cpu != boot_cpuid) | |
55190f88 BH |
55 | xics_setup_cpu(); |
56 | } | |
57 | ||
e51df2c1 | 58 | static int pnv_smp_kick_cpu(int nr) |
14a43e69 BH |
59 | { |
60 | unsigned int pcpu = get_hard_smp_processor_id(nr); | |
2751b628 AB |
61 | unsigned long start_here = |
62 | __pa(ppc_function_entry(generic_secondary_smp_init)); | |
14a43e69 | 63 | long rc; |
e4d54f71 | 64 | uint8_t status; |
14a43e69 BH |
65 | |
66 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
67 | ||
b2b48584 | 68 | /* |
e4d54f71 | 69 | * If we already started or OPAL is not supported, we just |
b2b48584 | 70 | * kick the CPU via the PACA |
14a43e69 | 71 | */ |
e4d54f71 | 72 | if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPAL)) |
b2b48584 BH |
73 | goto kick; |
74 | ||
75 | /* | |
76 | * At this point, the CPU can either be spinning on the way in | |
77 | * from kexec or be inside OPAL waiting to be started for the | |
78 | * first time. OPAL v3 allows us to query OPAL to know if it | |
79 | * has the CPUs, so we do that | |
80 | */ | |
e4d54f71 SS |
81 | rc = opal_query_cpu_status(pcpu, &status); |
82 | if (rc != OPAL_SUCCESS) { | |
83 | pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr); | |
84 | return -ENODEV; | |
85 | } | |
b2b48584 | 86 | |
e4d54f71 SS |
87 | /* |
88 | * Already started, just kick it, probably coming from | |
89 | * kexec and spinning | |
90 | */ | |
91 | if (status == OPAL_THREAD_STARTED) | |
92 | goto kick; | |
b2b48584 | 93 | |
e4d54f71 SS |
94 | /* |
95 | * Available/inactive, let's kick it | |
96 | */ | |
97 | if (status == OPAL_THREAD_INACTIVE) { | |
98 | pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu); | |
99 | rc = opal_start_cpu(pcpu, start_here); | |
100 | if (rc != OPAL_SUCCESS) { | |
101 | pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr); | |
b2b48584 BH |
102 | return -ENODEV; |
103 | } | |
104 | } else { | |
105 | /* | |
e4d54f71 SS |
106 | * An unavailable CPU (or any other unknown status) |
107 | * shouldn't be started. It should also | |
108 | * not be in the possible map but currently it can | |
109 | * happen | |
b2b48584 | 110 | */ |
e4d54f71 SS |
111 | pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable" |
112 | " (status %d)...\n", nr, pcpu, status); | |
113 | return -ENODEV; | |
14a43e69 | 114 | } |
e4d54f71 SS |
115 | |
116 | kick: | |
14a43e69 BH |
117 | return smp_generic_kick_cpu(nr); |
118 | } | |
119 | ||
344eb010 BH |
120 | #ifdef CONFIG_HOTPLUG_CPU |
121 | ||
122 | static int pnv_smp_cpu_disable(void) | |
123 | { | |
124 | int cpu = smp_processor_id(); | |
125 | ||
126 | /* This is identical to pSeries... might consolidate by | |
127 | * moving migrate_irqs_away to a ppc_md with default to | |
128 | * the generic fixup_irqs. --BenH. | |
129 | */ | |
130 | set_cpu_online(cpu, false); | |
131 | vdso_data->processorCount--; | |
132 | if (cpu == boot_cpuid) | |
133 | boot_cpuid = cpumask_any(cpu_online_mask); | |
243e2511 BH |
134 | if (xive_enabled()) |
135 | xive_smp_disable_cpu(); | |
136 | else | |
137 | xics_migrate_irqs_away(); | |
344eb010 BH |
138 | return 0; |
139 | } | |
140 | ||
141 | static void pnv_smp_cpu_kill_self(void) | |
142 | { | |
143 | unsigned int cpu; | |
755563bc | 144 | unsigned long srr1, wmask; |
344eb010 | 145 | |
344eb010 BH |
146 | /* Standard hot unplug procedure */ |
147 | local_irq_disable(); | |
148 | idle_task_exit(); | |
149 | current->active_mm = NULL; /* for sanity */ | |
150 | cpu = smp_processor_id(); | |
151 | DBG("CPU%d offline\n", cpu); | |
152 | generic_set_cpu_dead(cpu); | |
153 | smp_wmb(); | |
154 | ||
755563bc PM |
155 | wmask = SRR1_WAKEMASK; |
156 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) | |
157 | wmask = SRR1_WAKEMASK_P8; | |
158 | ||
344eb010 | 159 | /* We don't want to take decrementer interrupts while we are offline, |
9b256714 BH |
160 | * so clear LPCR:PECE1. We keep PECE2 (and LPCR_PECE_HVEE on P9) |
161 | * enabled as to let IPIs in. | |
344eb010 BH |
162 | */ |
163 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1); | |
53c656c4 PM |
164 | |
165 | /* | |
166 | * Hard-disable interrupts, and then clear irq_happened flags | |
167 | * that we can safely ignore while off-line, since they | |
168 | * are for things for which we do no processing when off-line | |
169 | * (or in the case of HMI, all the processing we need to do | |
170 | * is done in lower-level real-mode code). | |
171 | */ | |
172 | hard_irq_disable(); | |
173 | local_paca->irq_happened &= ~(PACA_IRQ_DEC | PACA_IRQ_HMI); | |
174 | ||
344eb010 | 175 | while (!generic_check_cpu_restart(cpu)) { |
53c656c4 PM |
176 | /* |
177 | * Clear IPI flag, since we don't handle IPIs while | |
178 | * offline, except for those when changing micro-threading | |
179 | * mode, which are handled explicitly below, and those | |
180 | * for coming online, which are handled via | |
181 | * generic_check_cpu_restart() calls. | |
182 | */ | |
183 | kvmppc_set_host_ipi(cpu, 0); | |
77b54e9f | 184 | |
f2038911 | 185 | ppc64_runlatch_off(); |
a7cd88da | 186 | srr1 = pnv_cpu_offline(cpu); |
f2038911 | 187 | ppc64_runlatch_on(); |
e2186023 | 188 | |
56548fc0 PM |
189 | /* |
190 | * If the SRR1 value indicates that we woke up due to | |
191 | * an external interrupt, then clear the interrupt. | |
192 | * We clear the interrupt before checking for the | |
193 | * reason, so as to avoid a race where we wake up for | |
194 | * some other reason, find nothing and clear the interrupt | |
195 | * just as some other cpu is sending us an interrupt. | |
196 | * If we returned from power7_nap as a result of | |
197 | * having finished executing in a KVM guest, then srr1 | |
198 | * contains 0. | |
199 | */ | |
53c656c4 | 200 | if (((srr1 & wmask) == SRR1_WAKEEE) || |
9b256714 | 201 | ((srr1 & wmask) == SRR1_WAKEHVI) || |
53c656c4 | 202 | (local_paca->irq_happened & PACA_IRQ_EE)) { |
243e2511 BH |
203 | if (cpu_has_feature(CPU_FTR_ARCH_300)) { |
204 | if (xive_enabled()) | |
205 | xive_flush_interrupt(); | |
206 | else | |
207 | icp_opal_flush_interrupt(); | |
208 | } else | |
9b256714 | 209 | icp_native_flush_interrupt(); |
755563bc PM |
210 | } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) { |
211 | unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); | |
212 | asm volatile(PPC_MSGCLR(%0) : : "r" (msg)); | |
56548fc0 | 213 | } |
53c656c4 PM |
214 | local_paca->irq_happened &= ~(PACA_IRQ_EE | PACA_IRQ_DBELL); |
215 | smp_mb(); | |
e2186023 ME |
216 | |
217 | if (cpu_core_split_required()) | |
218 | continue; | |
219 | ||
53c656c4 | 220 | if (srr1 && !generic_check_cpu_restart(cpu)) |
344eb010 | 221 | DBG("CPU%d Unexpected exit while offline !\n", cpu); |
344eb010 | 222 | } |
9b256714 BH |
223 | |
224 | /* Re-enable decrementer interrupts */ | |
344eb010 BH |
225 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1); |
226 | DBG("CPU%d coming online...\n", cpu); | |
227 | } | |
228 | ||
229 | #endif /* CONFIG_HOTPLUG_CPU */ | |
230 | ||
d70a54e2 GK |
231 | static int pnv_cpu_bootable(unsigned int nr) |
232 | { | |
233 | /* | |
234 | * Starting with POWER8, the subcore logic relies on all threads of a | |
235 | * core being booted so that they can participate in split mode | |
236 | * switches. So on those machines we ignore the smt_enabled_at_boot | |
237 | * setting (smt-enabled on the kernel command line). | |
238 | */ | |
239 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) | |
240 | return 1; | |
241 | ||
242 | return smp_generic_cpu_bootable(nr); | |
243 | } | |
244 | ||
243e2511 BH |
245 | static int pnv_smp_prepare_cpu(int cpu) |
246 | { | |
247 | if (xive_enabled()) | |
248 | return xive_smp_prepare_cpu(cpu); | |
249 | return 0; | |
250 | } | |
251 | ||
b866cc21 NP |
252 | static void pnv_cause_ipi(int cpu) |
253 | { | |
254 | if (doorbell_try_core_ipi(cpu)) | |
255 | return; | |
256 | ||
257 | icp_ops->cause_ipi(cpu); | |
258 | } | |
259 | ||
243e2511 BH |
260 | static void __init pnv_smp_probe(void) |
261 | { | |
262 | if (xive_enabled()) | |
263 | xive_smp_probe(); | |
264 | else | |
265 | xics_smp_probe(); | |
b866cc21 NP |
266 | |
267 | if (cpu_has_feature(CPU_FTR_DBELL) && !cpu_has_feature(CPU_FTR_ARCH_300)) { | |
268 | smp_ops->cause_ipi = pnv_cause_ipi; | |
269 | } else { | |
270 | smp_ops->cause_ipi = icp_ops->cause_ipi; | |
271 | } | |
243e2511 BH |
272 | } |
273 | ||
55190f88 | 274 | static struct smp_ops_t pnv_smp_ops = { |
b866cc21 NP |
275 | .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ |
276 | .cause_ipi = NULL, /* Filled at runtime by pnv_smp_probe() */ | |
243e2511 BH |
277 | .probe = pnv_smp_probe, |
278 | .prepare_cpu = pnv_smp_prepare_cpu, | |
14a43e69 | 279 | .kick_cpu = pnv_smp_kick_cpu, |
55190f88 | 280 | .setup_cpu = pnv_smp_setup_cpu, |
d70a54e2 | 281 | .cpu_bootable = pnv_cpu_bootable, |
344eb010 BH |
282 | #ifdef CONFIG_HOTPLUG_CPU |
283 | .cpu_disable = pnv_smp_cpu_disable, | |
284 | .cpu_die = generic_cpu_die, | |
285 | #endif /* CONFIG_HOTPLUG_CPU */ | |
55190f88 BH |
286 | }; |
287 | ||
288 | /* This is called very early during platform setup_arch */ | |
289 | void __init pnv_smp_init(void) | |
290 | { | |
291 | smp_ops = &pnv_smp_ops; | |
292 | ||
344eb010 BH |
293 | #ifdef CONFIG_HOTPLUG_CPU |
294 | ppc_md.cpu_die = pnv_smp_cpu_kill_self; | |
295 | #endif | |
55190f88 | 296 | } |