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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / platforms / ps3 / platform.h
CommitLineData
f58a9d17
GL		 1/*
2 * PS3 platform declarations.
3 *
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006 Sony Corp.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#if !defined(_PS3_PLATFORM_H)
22#define _PS3_PLATFORM_H
23
24#include <linux/rtc.h>
2a08ea69
GL		 25#include <scsi/scsi.h>
26
27#include <asm/ps3.h>
f58a9d17
GL		 28
29/* htab */
30
31void __init ps3_hpte_init(unsigned long htab_size);
32void __init ps3_map_htab(void);
33
34/* mm */
35
36void __init ps3_mm_init(void);
37void __init ps3_mm_vas_create(unsigned long* htab_size);
38void ps3_mm_vas_destroy(void);
39void ps3_mm_shutdown(void);
40
41/* irq */
42
43void ps3_init_IRQ(void);
9263e85a 44void ps3_shutdown_IRQ(int cpu);
f58a9d17
GL		 45void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq);
46
47/* smp */
48
49void smp_init_ps3(void);
85d02924 50#ifdef CONFIG_SMP
f58a9d17 51void ps3_smp_cleanup_cpu(int cpu);
85d02924
JK		 52#else
53static inline void ps3_smp_cleanup_cpu(int cpu) { }
54#endif
f58a9d17
GL		 55
56/* time */
57
58void __init ps3_calibrate_decr(void);
59unsigned long __init ps3_get_boot_time(void);
60void ps3_get_rtc_time(struct rtc_time *time);
61int ps3_set_rtc_time(struct rtc_time *time);
62
63/* os area */
64
01263e88 65void __init ps3_os_area_save_params(void);
7db19421 66void __init ps3_os_area_init(void);
f58a9d17 67
de91a534
GL		 68/* spu */
69
70#if defined(CONFIG_SPU_BASE)
71void ps3_spu_set_platform (void);
72#else
73static inline void ps3_spu_set_platform (void) {}
74#endif
75
2a08ea69
GL		 76/* repository bus info */
77
78enum ps3_bus_type {
79 PS3_BUS_TYPE_SB = 4,
80 PS3_BUS_TYPE_STORAGE = 5,
81};
82
83enum ps3_dev_type {
84 PS3_DEV_TYPE_STOR_DISK = TYPE_DISK, /* 0 */
85 PS3_DEV_TYPE_SB_GELIC = 3,
86 PS3_DEV_TYPE_SB_USB = 4,
87 PS3_DEV_TYPE_STOR_ROM = TYPE_ROM, /* 5 */
88 PS3_DEV_TYPE_SB_GPIO = 6,
89 PS3_DEV_TYPE_STOR_FLASH = TYPE_RBC, /* 14 */
90};
91
92int ps3_repository_read_bus_str(unsigned int bus_index, const char *bus_str,
93 u64 *value);
034e0ab5 94int ps3_repository_read_bus_id(unsigned int bus_index, u64 *bus_id);
2a08ea69
GL		 95int ps3_repository_read_bus_type(unsigned int bus_index,
96 enum ps3_bus_type *bus_type);
97int ps3_repository_read_bus_num_dev(unsigned int bus_index,
98 unsigned int *num_dev);
99
100/* repository bus device info */
101
102enum ps3_interrupt_type {
103 PS3_INTERRUPT_TYPE_EVENT_PORT = 2,
104 PS3_INTERRUPT_TYPE_SB_OHCI = 3,
105 PS3_INTERRUPT_TYPE_SB_EHCI = 4,
106 PS3_INTERRUPT_TYPE_OTHER = 5,
107};
108
109enum ps3_reg_type {
110 PS3_REG_TYPE_SB_OHCI = 3,
111 PS3_REG_TYPE_SB_EHCI = 4,
112 PS3_REG_TYPE_SB_GPIO = 5,
113};
114
115int ps3_repository_read_dev_str(unsigned int bus_index,
116 unsigned int dev_index, const char *dev_str, u64 *value);
117int ps3_repository_read_dev_id(unsigned int bus_index, unsigned int dev_index,
034e0ab5 118 u64 *dev_id);
2a08ea69
GL		 119int ps3_repository_read_dev_type(unsigned int bus_index,
120 unsigned int dev_index, enum ps3_dev_type *dev_type);
121int ps3_repository_read_dev_intr(unsigned int bus_index,
122 unsigned int dev_index, unsigned int intr_index,
123 enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id);
124int ps3_repository_read_dev_reg_type(unsigned int bus_index,
125 unsigned int dev_index, unsigned int reg_index,
126 enum ps3_reg_type *reg_type);
127int ps3_repository_read_dev_reg_addr(unsigned int bus_index,
128 unsigned int dev_index, unsigned int reg_index, u64 *bus_addr,
129 u64 *len);
130int ps3_repository_read_dev_reg(unsigned int bus_index,
131 unsigned int dev_index, unsigned int reg_index,
132 enum ps3_reg_type *reg_type, u64 *bus_addr, u64 *len);
133
134/* repository bus enumerators */
135
136struct ps3_repository_device {
137 unsigned int bus_index;
138 unsigned int dev_index;
034e0ab5
GU		 139 enum ps3_bus_type bus_type;
140 enum ps3_dev_type dev_type;
141 u64 bus_id;
142 u64 dev_id;
2a08ea69
GL		 143};
144
a3323d1a 145int ps3_repository_find_device(struct ps3_repository_device *repo);
e06bcf3c
GU		 146int ps3_repository_find_device_by_id(struct ps3_repository_device *repo,
147 u64 bus_id, u64 dev_id);
a3323d1a
GL		 148int ps3_repository_find_devices(enum ps3_bus_type bus_type,
149 int (*callback)(const struct ps3_repository_device *repo));
150int ps3_repository_find_bus(enum ps3_bus_type bus_type, unsigned int from,
151 unsigned int *bus_index);
152int ps3_repository_find_interrupt(const struct ps3_repository_device *repo,
2a08ea69 153 enum ps3_interrupt_type intr_type, unsigned int *interrupt_id);
a3323d1a 154int ps3_repository_find_reg(const struct ps3_repository_device *repo,
2a08ea69
GL		 155 enum ps3_reg_type reg_type, u64 *bus_addr, u64 *len);
156
157/* repository block device info */
158
159int ps3_repository_read_stor_dev_port(unsigned int bus_index,
160 unsigned int dev_index, u64 *port);
161int ps3_repository_read_stor_dev_blk_size(unsigned int bus_index,
162 unsigned int dev_index, u64 *blk_size);
163int ps3_repository_read_stor_dev_num_blocks(unsigned int bus_index,
164 unsigned int dev_index, u64 *num_blocks);
165int ps3_repository_read_stor_dev_num_regions(unsigned int bus_index,
166 unsigned int dev_index, unsigned int *num_regions);
167int ps3_repository_read_stor_dev_region_id(unsigned int bus_index,
168 unsigned int dev_index, unsigned int region_index,
169 unsigned int *region_id);
170int ps3_repository_read_stor_dev_region_size(unsigned int bus_index,
171 unsigned int dev_index, unsigned int region_index, u64 *region_size);
172int ps3_repository_read_stor_dev_region_start(unsigned int bus_index,
173 unsigned int dev_index, unsigned int region_index, u64 *region_start);
174int ps3_repository_read_stor_dev_info(unsigned int bus_index,
175 unsigned int dev_index, u64 *port, u64 *blk_size,
176 u64 *num_blocks, unsigned int *num_regions);
177int ps3_repository_read_stor_dev_region(unsigned int bus_index,
178 unsigned int dev_index, unsigned int region_index,
179 unsigned int *region_id, u64 *region_start, u64 *region_size);
180
c2b16e1c 181/* repository logical pu and memory info */
2a08ea69 182
c2b16e1c
TY		 183int ps3_repository_read_num_pu(u64 *num_pu);
184int ps3_repository_read_pu_id(unsigned int pu_index, u64 *pu_id);
2a08ea69
GL		 185int ps3_repository_read_rm_base(unsigned int ppe_id, u64 *rm_base);
186int ps3_repository_read_rm_size(unsigned int ppe_id, u64 *rm_size);
187int ps3_repository_read_region_total(u64 *region_total);
188int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size,
189 u64 *region_total);
190
191/* repository pme info */
192
193int ps3_repository_read_num_be(unsigned int *num_be);
194int ps3_repository_read_be_node_id(unsigned int be_index, u64 *node_id);
c2b16e1c 195int ps3_repository_read_be_id(u64 node_id, u64 *be_id);
2a08ea69
GL		 196int ps3_repository_read_tb_freq(u64 node_id, u64 *tb_freq);
197int ps3_repository_read_be_tb_freq(unsigned int be_index, u64 *tb_freq);
198
c2b16e1c
TY		 199/* repository performance monitor info */
200
201int ps3_repository_read_lpm_privileges(unsigned int be_index, u64 *lpar,
202 u64 *rights);
203
2a08ea69
GL		 204/* repository 'Other OS' area */
205
206int ps3_repository_read_boot_dat_addr(u64 *lpar_addr);
207int ps3_repository_read_boot_dat_size(unsigned int *size);
208int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size);
209
210/* repository spu info */
211
212/**
213 * enum spu_resource_type - Type of spu resource.
214 * @spu_resource_type_shared: Logical spu is shared with other partions.
215 * @spu_resource_type_exclusive: Logical spu is not shared with other partions.
216 *
217 * Returned by ps3_repository_read_spu_resource_id().
218 */
219
220enum ps3_spu_resource_type {
221 PS3_SPU_RESOURCE_TYPE_SHARED = 0,
222 PS3_SPU_RESOURCE_TYPE_EXCLUSIVE = 0x8000000000000000UL,
223};
224
225int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved);
226int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id);
227int ps3_repository_read_spu_resource_id(unsigned int res_index,
228 enum ps3_spu_resource_type* resource_type, unsigned int *resource_id);
229
a3323d1a
GL		 230/* repository vuart info */
231
232int ps3_repository_read_vuart_av_port(unsigned int *port);
233int ps3_repository_read_vuart_sysmgr_port(unsigned int *port);
234
6bb5cf10
GL		 235/* Page table entries */
236#define IOPTE_PP_W 0x8000000000000000ul /* protection: write */
237#define IOPTE_PP_R 0x4000000000000000ul /* protection: read */
238#define IOPTE_M 0x2000000000000000ul /* coherency required */
239#define IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
240#define IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
241#define IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
242#define IOPTE_H 0x0000000000000800ul /* cache hint */
243#define IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
244
f58a9d17 245#endif
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