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1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * pSeries_lpar.c
4 * Copyright (C) 2001 Todd Inglett, IBM Corporation
5 *
6 * pSeries LPAR support.
1da177e4
LT
7 */
8
f7ebf352
ME
9/* Enables debugging of low-level hash table routines - careful! */
10#undef DEBUG
65471d76 11#define pr_fmt(fmt) "lpar: " fmt
1da177e4 12
1da177e4
LT
13#include <linux/kernel.h>
14#include <linux/dma-mapping.h>
463ce0e1 15#include <linux/console.h>
66b15db6 16#include <linux/export.h>
58995a9a 17#include <linux/jump_label.h>
dbcf929c
DG
18#include <linux/delay.h>
19#include <linux/stop_machine.h>
d62c8dee
NR
20#include <linux/spinlock.h>
21#include <linux/cpuhotplug.h>
22#include <linux/workqueue.h>
23#include <linux/proc_fs.h>
65fddcfc 24#include <linux/pgtable.h>
1da177e4
LT
25#include <asm/processor.h>
26#include <asm/mmu.h>
27#include <asm/page.h>
1da177e4 28#include <asm/machdep.h>
1da177e4 29#include <asm/mmu_context.h>
1da177e4 30#include <asm/iommu.h>
1da177e4
LT
31#include <asm/tlb.h>
32#include <asm/prom.h>
1da177e4 33#include <asm/cputable.h>
dcad47fc 34#include <asm/udbg.h>
2249ca9d 35#include <asm/smp.h>
c8cd093a 36#include <asm/trace.h>
f5339277 37#include <asm/firmware.h>
212bebb4 38#include <asm/plpar_wrappers.h>
c1caae3d 39#include <asm/kexec.h>
408cddd9 40#include <asm/fadump.h>
42f5b4ca 41#include <asm/asm-prototypes.h>
c6c26fb5 42#include <asm/debugfs.h>
d6bdceb6 43#include <asm/dtl.h>
a1218720 44
21cf9133 45#include "pseries.h"
1da177e4 46
1a527286
AK
47/* Flag bits for H_BULK_REMOVE */
48#define HBR_REQUEST 0x4000000000000000UL
49#define HBR_RESPONSE 0x8000000000000000UL
50#define HBR_END 0xc000000000000000UL
51#define HBR_AVPN 0x0200000000000000UL
52#define HBR_ANDCOND 0x0100000000000000UL
53
1da177e4 54
b9377ffc 55/* in hvCall.S */
1da177e4 56EXPORT_SYMBOL(plpar_hcall);
b9377ffc 57EXPORT_SYMBOL(plpar_hcall9);
1da177e4 58EXPORT_SYMBOL(plpar_hcall_norets);
b9377ffc 59
1211ee61
LD
60/*
61 * H_BLOCK_REMOVE supported block size for this page size in segment who's base
62 * page size is that page size.
63 *
64 * The first index is the segment base page size, the second one is the actual
65 * page size.
66 */
67static int hblkrm_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT] __ro_after_init;
68
59545ebe
LD
69/*
70 * Due to the involved complexity, and that the current hypervisor is only
71 * returning this value or 0, we are limiting the support of the H_BLOCK_REMOVE
72 * buffer size to 8 size block.
73 */
74#define HBLKRM_SUPPORTED_BLOCK_SIZE 8
75
d62c8dee
NR
76#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
77static u8 dtl_mask = DTL_LOG_PREEMPT;
78#else
79static u8 dtl_mask;
80#endif
81
18a593c8 82void alloc_dtl_buffers(unsigned long *time_limit)
1c85a2a1
NR
83{
84 int cpu;
85 struct paca_struct *pp;
86 struct dtl_entry *dtl;
87
88 for_each_possible_cpu(cpu) {
89 pp = paca_ptrs[cpu];
d62c8dee
NR
90 if (pp->dispatch_log)
91 continue;
1c85a2a1
NR
92 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
93 if (!dtl) {
94 pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
95 cpu);
d62c8dee 96#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
1c85a2a1 97 pr_warn("Stolen time statistics will be unreliable\n");
d62c8dee 98#endif
1c85a2a1
NR
99 break;
100 }
101
102 pp->dtl_ridx = 0;
103 pp->dispatch_log = dtl;
104 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
105 pp->dtl_curr = dtl;
18a593c8
NR
106
107 if (time_limit && time_after(jiffies, *time_limit)) {
108 cond_resched();
109 *time_limit = jiffies + HZ;
110 }
1c85a2a1
NR
111 }
112}
113
114void register_dtl_buffer(int cpu)
115{
116 long ret;
117 struct paca_struct *pp;
118 struct dtl_entry *dtl;
119 int hwcpu = get_hard_smp_processor_id(cpu);
120
121 pp = paca_ptrs[cpu];
122 dtl = pp->dispatch_log;
d62c8dee 123 if (dtl && dtl_mask) {
1c85a2a1
NR
124 pp->dtl_ridx = 0;
125 pp->dtl_curr = dtl;
126 lppaca_of(cpu).dtl_idx = 0;
127
128 /* hypervisor reads buffer length from this field */
129 dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
130 ret = register_dtl(hwcpu, __pa(dtl));
131 if (ret)
132 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed with %ld\n",
133 cpu, hwcpu, ret);
134
d62c8dee 135 lppaca_of(cpu).dtl_enable_mask = dtl_mask;
1c85a2a1
NR
136 }
137}
138
06220d78 139#ifdef CONFIG_PPC_SPLPAR
d62c8dee
NR
140struct dtl_worker {
141 struct delayed_work work;
142 int cpu;
143};
144
145struct vcpu_dispatch_data {
146 int last_disp_cpu;
147
148 int total_disp;
149
150 int same_cpu_disp;
151 int same_chip_disp;
152 int diff_chip_disp;
153 int far_chip_disp;
154
155 int numa_home_disp;
156 int numa_remote_disp;
157 int numa_far_disp;
158};
159
160/*
161 * This represents the number of cpus in the hypervisor. Since there is no
162 * architected way to discover the number of processors in the host, we
163 * provision for dealing with NR_CPUS. This is currently 2048 by default, and
164 * is sufficient for our purposes. This will need to be tweaked if
165 * CONFIG_NR_CPUS is changed.
166 */
167#define NR_CPUS_H NR_CPUS
168
06220d78 169DEFINE_RWLOCK(dtl_access_lock);
d62c8dee
NR
170static DEFINE_PER_CPU(struct vcpu_dispatch_data, vcpu_disp_data);
171static DEFINE_PER_CPU(u64, dtl_entry_ridx);
172static DEFINE_PER_CPU(struct dtl_worker, dtl_workers);
173static enum cpuhp_state dtl_worker_state;
174static DEFINE_MUTEX(dtl_enable_mutex);
175static int vcpudispatch_stats_on __read_mostly;
176static int vcpudispatch_stats_freq = 50;
177static __be32 *vcpu_associativity, *pcpu_associativity;
178
179
18a593c8 180static void free_dtl_buffers(unsigned long *time_limit)
d62c8dee
NR
181{
182#ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
183 int cpu;
184 struct paca_struct *pp;
185
186 for_each_possible_cpu(cpu) {
187 pp = paca_ptrs[cpu];
188 if (!pp->dispatch_log)
189 continue;
190 kmem_cache_free(dtl_cache, pp->dispatch_log);
191 pp->dtl_ridx = 0;
192 pp->dispatch_log = 0;
193 pp->dispatch_log_end = 0;
194 pp->dtl_curr = 0;
18a593c8
NR
195
196 if (time_limit && time_after(jiffies, *time_limit)) {
197 cond_resched();
198 *time_limit = jiffies + HZ;
199 }
d62c8dee
NR
200 }
201#endif
202}
203
204static int init_cpu_associativity(void)
205{
206 vcpu_associativity = kcalloc(num_possible_cpus() / threads_per_core,
207 VPHN_ASSOC_BUFSIZE * sizeof(__be32), GFP_KERNEL);
208 pcpu_associativity = kcalloc(NR_CPUS_H / threads_per_core,
209 VPHN_ASSOC_BUFSIZE * sizeof(__be32), GFP_KERNEL);
210
211 if (!vcpu_associativity || !pcpu_associativity) {
212 pr_err("error allocating memory for associativity information\n");
213 return -ENOMEM;
214 }
215
216 return 0;
217}
218
219static void destroy_cpu_associativity(void)
220{
221 kfree(vcpu_associativity);
222 kfree(pcpu_associativity);
223 vcpu_associativity = pcpu_associativity = 0;
224}
225
226static __be32 *__get_cpu_associativity(int cpu, __be32 *cpu_assoc, int flag)
227{
228 __be32 *assoc;
229 int rc = 0;
230
231 assoc = &cpu_assoc[(int)(cpu / threads_per_core) * VPHN_ASSOC_BUFSIZE];
232 if (!assoc[0]) {
233 rc = hcall_vphn(cpu, flag, &assoc[0]);
234 if (rc)
235 return NULL;
236 }
237
238 return assoc;
239}
240
241static __be32 *get_pcpu_associativity(int cpu)
242{
243 return __get_cpu_associativity(cpu, pcpu_associativity, VPHN_FLAG_PCPU);
244}
245
246static __be32 *get_vcpu_associativity(int cpu)
247{
248 return __get_cpu_associativity(cpu, vcpu_associativity, VPHN_FLAG_VCPU);
249}
250
251static int cpu_relative_dispatch_distance(int last_disp_cpu, int cur_disp_cpu)
252{
253 __be32 *last_disp_cpu_assoc, *cur_disp_cpu_assoc;
254
255 if (last_disp_cpu >= NR_CPUS_H || cur_disp_cpu >= NR_CPUS_H)
256 return -EINVAL;
257
258 last_disp_cpu_assoc = get_pcpu_associativity(last_disp_cpu);
259 cur_disp_cpu_assoc = get_pcpu_associativity(cur_disp_cpu);
260
261 if (!last_disp_cpu_assoc || !cur_disp_cpu_assoc)
262 return -EIO;
263
264 return cpu_distance(last_disp_cpu_assoc, cur_disp_cpu_assoc);
265}
266
267static int cpu_home_node_dispatch_distance(int disp_cpu)
268{
269 __be32 *disp_cpu_assoc, *vcpu_assoc;
270 int vcpu_id = smp_processor_id();
271
272 if (disp_cpu >= NR_CPUS_H) {
273 pr_debug_ratelimited("vcpu dispatch cpu %d > %d\n",
274 disp_cpu, NR_CPUS_H);
275 return -EINVAL;
276 }
277
278 disp_cpu_assoc = get_pcpu_associativity(disp_cpu);
279 vcpu_assoc = get_vcpu_associativity(vcpu_id);
280
281 if (!disp_cpu_assoc || !vcpu_assoc)
282 return -EIO;
283
284 return cpu_distance(disp_cpu_assoc, vcpu_assoc);
285}
286
287static void update_vcpu_disp_stat(int disp_cpu)
288{
289 struct vcpu_dispatch_data *disp;
290 int distance;
291
292 disp = this_cpu_ptr(&vcpu_disp_data);
293 if (disp->last_disp_cpu == -1) {
294 disp->last_disp_cpu = disp_cpu;
295 return;
296 }
297
298 disp->total_disp++;
299
300 if (disp->last_disp_cpu == disp_cpu ||
301 (cpu_first_thread_sibling(disp->last_disp_cpu) ==
302 cpu_first_thread_sibling(disp_cpu)))
303 disp->same_cpu_disp++;
304 else {
305 distance = cpu_relative_dispatch_distance(disp->last_disp_cpu,
306 disp_cpu);
307 if (distance < 0)
308 pr_debug_ratelimited("vcpudispatch_stats: cpu %d: error determining associativity\n",
309 smp_processor_id());
310 else {
311 switch (distance) {
312 case 0:
313 disp->same_chip_disp++;
314 break;
315 case 1:
316 disp->diff_chip_disp++;
317 break;
318 case 2:
319 disp->far_chip_disp++;
320 break;
321 default:
322 pr_debug_ratelimited("vcpudispatch_stats: cpu %d (%d -> %d): unexpected relative dispatch distance %d\n",
323 smp_processor_id(),
324 disp->last_disp_cpu,
325 disp_cpu,
326 distance);
327 }
328 }
329 }
330
331 distance = cpu_home_node_dispatch_distance(disp_cpu);
332 if (distance < 0)
333 pr_debug_ratelimited("vcpudispatch_stats: cpu %d: error determining associativity\n",
334 smp_processor_id());
335 else {
336 switch (distance) {
337 case 0:
338 disp->numa_home_disp++;
339 break;
340 case 1:
341 disp->numa_remote_disp++;
342 break;
343 case 2:
344 disp->numa_far_disp++;
345 break;
346 default:
347 pr_debug_ratelimited("vcpudispatch_stats: cpu %d on %d: unexpected numa dispatch distance %d\n",
348 smp_processor_id(),
349 disp_cpu,
350 distance);
351 }
352 }
353
354 disp->last_disp_cpu = disp_cpu;
355}
356
357static void process_dtl_buffer(struct work_struct *work)
358{
359 struct dtl_entry dtle;
360 u64 i = __this_cpu_read(dtl_entry_ridx);
361 struct dtl_entry *dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
362 struct dtl_entry *dtl_end = local_paca->dispatch_log_end;
363 struct lppaca *vpa = local_paca->lppaca_ptr;
364 struct dtl_worker *d = container_of(work, struct dtl_worker, work.work);
365
366 if (!local_paca->dispatch_log)
367 return;
368
369 /* if we have been migrated away, we cancel ourself */
370 if (d->cpu != smp_processor_id()) {
371 pr_debug("vcpudispatch_stats: cpu %d worker migrated -- canceling worker\n",
372 smp_processor_id());
373 return;
374 }
375
376 if (i == be64_to_cpu(vpa->dtl_idx))
377 goto out;
378
379 while (i < be64_to_cpu(vpa->dtl_idx)) {
380 dtle = *dtl;
381 barrier();
382 if (i + N_DISPATCH_LOG < be64_to_cpu(vpa->dtl_idx)) {
383 /* buffer has overflowed */
384 pr_debug_ratelimited("vcpudispatch_stats: cpu %d lost %lld DTL samples\n",
385 d->cpu,
386 be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG - i);
387 i = be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG;
388 dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
389 continue;
390 }
391 update_vcpu_disp_stat(be16_to_cpu(dtle.processor_id));
392 ++i;
393 ++dtl;
394 if (dtl == dtl_end)
395 dtl = local_paca->dispatch_log;
396 }
397
398 __this_cpu_write(dtl_entry_ridx, i);
399
400out:
401 schedule_delayed_work_on(d->cpu, to_delayed_work(work),
402 HZ / vcpudispatch_stats_freq);
403}
404
405static int dtl_worker_online(unsigned int cpu)
406{
407 struct dtl_worker *d = &per_cpu(dtl_workers, cpu);
408
409 memset(d, 0, sizeof(*d));
410 INIT_DELAYED_WORK(&d->work, process_dtl_buffer);
411 d->cpu = cpu;
412
413#ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
414 per_cpu(dtl_entry_ridx, cpu) = 0;
415 register_dtl_buffer(cpu);
416#else
417 per_cpu(dtl_entry_ridx, cpu) = be64_to_cpu(lppaca_of(cpu).dtl_idx);
418#endif
419
420 schedule_delayed_work_on(cpu, &d->work, HZ / vcpudispatch_stats_freq);
421 return 0;
422}
423
424static int dtl_worker_offline(unsigned int cpu)
425{
426 struct dtl_worker *d = &per_cpu(dtl_workers, cpu);
427
428 cancel_delayed_work_sync(&d->work);
429
430#ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
431 unregister_dtl(get_hard_smp_processor_id(cpu));
432#endif
433
434 return 0;
435}
436
437static void set_global_dtl_mask(u8 mask)
438{
439 int cpu;
440
441 dtl_mask = mask;
442 for_each_present_cpu(cpu)
443 lppaca_of(cpu).dtl_enable_mask = dtl_mask;
444}
445
446static void reset_global_dtl_mask(void)
447{
448 int cpu;
449
450#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
451 dtl_mask = DTL_LOG_PREEMPT;
452#else
453 dtl_mask = 0;
454#endif
455 for_each_present_cpu(cpu)
456 lppaca_of(cpu).dtl_enable_mask = dtl_mask;
457}
458
18a593c8 459static int dtl_worker_enable(unsigned long *time_limit)
d62c8dee
NR
460{
461 int rc = 0, state;
462
463 if (!write_trylock(&dtl_access_lock)) {
464 rc = -EBUSY;
465 goto out;
466 }
467
468 set_global_dtl_mask(DTL_LOG_ALL);
469
470 /* Setup dtl buffers and register those */
18a593c8 471 alloc_dtl_buffers(time_limit);
d62c8dee
NR
472
473 state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powerpc/dtl:online",
474 dtl_worker_online, dtl_worker_offline);
475 if (state < 0) {
476 pr_err("vcpudispatch_stats: unable to setup workqueue for DTL processing\n");
18a593c8 477 free_dtl_buffers(time_limit);
d62c8dee
NR
478 reset_global_dtl_mask();
479 write_unlock(&dtl_access_lock);
480 rc = -EINVAL;
481 goto out;
482 }
483 dtl_worker_state = state;
484
485out:
486 return rc;
487}
488
18a593c8 489static void dtl_worker_disable(unsigned long *time_limit)
d62c8dee
NR
490{
491 cpuhp_remove_state(dtl_worker_state);
18a593c8 492 free_dtl_buffers(time_limit);
d62c8dee
NR
493 reset_global_dtl_mask();
494 write_unlock(&dtl_access_lock);
495}
496
497static ssize_t vcpudispatch_stats_write(struct file *file, const char __user *p,
498 size_t count, loff_t *ppos)
499{
18a593c8 500 unsigned long time_limit = jiffies + HZ;
d62c8dee
NR
501 struct vcpu_dispatch_data *disp;
502 int rc, cmd, cpu;
503 char buf[16];
504
505 if (count > 15)
506 return -EINVAL;
507
508 if (copy_from_user(buf, p, count))
509 return -EFAULT;
510
511 buf[count] = 0;
512 rc = kstrtoint(buf, 0, &cmd);
513 if (rc || cmd < 0 || cmd > 1) {
514 pr_err("vcpudispatch_stats: please use 0 to disable or 1 to enable dispatch statistics\n");
515 return rc ? rc : -EINVAL;
516 }
517
518 mutex_lock(&dtl_enable_mutex);
519
520 if ((cmd == 0 && !vcpudispatch_stats_on) ||
521 (cmd == 1 && vcpudispatch_stats_on))
522 goto out;
523
524 if (cmd) {
525 rc = init_cpu_associativity();
526 if (rc)
527 goto out;
528
529 for_each_possible_cpu(cpu) {
530 disp = per_cpu_ptr(&vcpu_disp_data, cpu);
531 memset(disp, 0, sizeof(*disp));
532 disp->last_disp_cpu = -1;
533 }
534
18a593c8 535 rc = dtl_worker_enable(&time_limit);
d62c8dee
NR
536 if (rc) {
537 destroy_cpu_associativity();
538 goto out;
539 }
540 } else {
18a593c8 541 dtl_worker_disable(&time_limit);
d62c8dee
NR
542 destroy_cpu_associativity();
543 }
544
545 vcpudispatch_stats_on = cmd;
546
547out:
548 mutex_unlock(&dtl_enable_mutex);
549 if (rc)
550 return rc;
551 return count;
552}
553
554static int vcpudispatch_stats_display(struct seq_file *p, void *v)
555{
556 int cpu;
557 struct vcpu_dispatch_data *disp;
558
559 if (!vcpudispatch_stats_on) {
560 seq_puts(p, "off\n");
561 return 0;
562 }
563
564 for_each_online_cpu(cpu) {
565 disp = per_cpu_ptr(&vcpu_disp_data, cpu);
566 seq_printf(p, "cpu%d", cpu);
567 seq_put_decimal_ull(p, " ", disp->total_disp);
568 seq_put_decimal_ull(p, " ", disp->same_cpu_disp);
569 seq_put_decimal_ull(p, " ", disp->same_chip_disp);
570 seq_put_decimal_ull(p, " ", disp->diff_chip_disp);
571 seq_put_decimal_ull(p, " ", disp->far_chip_disp);
572 seq_put_decimal_ull(p, " ", disp->numa_home_disp);
573 seq_put_decimal_ull(p, " ", disp->numa_remote_disp);
574 seq_put_decimal_ull(p, " ", disp->numa_far_disp);
575 seq_puts(p, "\n");
576 }
577
578 return 0;
579}
580
581static int vcpudispatch_stats_open(struct inode *inode, struct file *file)
582{
583 return single_open(file, vcpudispatch_stats_display, NULL);
584}
585
97a32539
AD
586static const struct proc_ops vcpudispatch_stats_proc_ops = {
587 .proc_open = vcpudispatch_stats_open,
588 .proc_read = seq_read,
589 .proc_write = vcpudispatch_stats_write,
590 .proc_lseek = seq_lseek,
591 .proc_release = single_release,
d62c8dee
NR
592};
593
594static ssize_t vcpudispatch_stats_freq_write(struct file *file,
595 const char __user *p, size_t count, loff_t *ppos)
596{
597 int rc, freq;
598 char buf[16];
599
600 if (count > 15)
601 return -EINVAL;
602
603 if (copy_from_user(buf, p, count))
604 return -EFAULT;
605
606 buf[count] = 0;
607 rc = kstrtoint(buf, 0, &freq);
608 if (rc || freq < 1 || freq > HZ) {
609 pr_err("vcpudispatch_stats_freq: please specify a frequency between 1 and %d\n",
610 HZ);
611 return rc ? rc : -EINVAL;
612 }
613
614 vcpudispatch_stats_freq = freq;
615
616 return count;
617}
618
619static int vcpudispatch_stats_freq_display(struct seq_file *p, void *v)
620{
621 seq_printf(p, "%d\n", vcpudispatch_stats_freq);
622 return 0;
623}
624
625static int vcpudispatch_stats_freq_open(struct inode *inode, struct file *file)
626{
627 return single_open(file, vcpudispatch_stats_freq_display, NULL);
628}
629
97a32539
AD
630static const struct proc_ops vcpudispatch_stats_freq_proc_ops = {
631 .proc_open = vcpudispatch_stats_freq_open,
632 .proc_read = seq_read,
633 .proc_write = vcpudispatch_stats_freq_write,
634 .proc_lseek = seq_lseek,
635 .proc_release = single_release,
d62c8dee
NR
636};
637
638static int __init vcpudispatch_stats_procfs_init(void)
639{
adde8715
NP
640 /*
641 * Avoid smp_processor_id while preemptible. All CPUs should have
642 * the same value for lppaca_shared_proc.
643 */
644 preempt_disable();
645 if (!lppaca_shared_proc(get_lppaca())) {
646 preempt_enable();
d62c8dee 647 return 0;
adde8715
NP
648 }
649 preempt_enable();
d62c8dee
NR
650
651 if (!proc_create("powerpc/vcpudispatch_stats", 0600, NULL,
652 &vcpudispatch_stats_proc_ops))
653 pr_err("vcpudispatch_stats: error creating procfs file\n");
654 else if (!proc_create("powerpc/vcpudispatch_stats_freq", 0600, NULL,
655 &vcpudispatch_stats_freq_proc_ops))
656 pr_err("vcpudispatch_stats_freq: error creating procfs file\n");
657
658 return 0;
659}
660
661machine_device_initcall(pseries, vcpudispatch_stats_procfs_init);
06220d78
NR
662#endif /* CONFIG_PPC_SPLPAR */
663
1da177e4
LT
664void vpa_init(int cpu)
665{
666 int hwcpu = get_hard_smp_processor_id(cpu);
2f6093c8 667 unsigned long addr;
1da177e4 668 long ret;
233ccd0d 669
b89bdfb8
ME
670 /*
671 * The spec says it "may be problematic" if CPU x registers the VPA of
672 * CPU y. We should never do that, but wail if we ever do.
673 */
674 WARN_ON(cpu != smp_processor_id());
675
233ccd0d 676 if (cpu_has_feature(CPU_FTR_ALTIVEC))
8154c5d2 677 lppaca_of(cpu).vmxregs_in_use = 1;
233ccd0d 678
6e0b8bc9
ME
679 if (cpu_has_feature(CPU_FTR_ARCH_207S))
680 lppaca_of(cpu).ebb_regs_in_use = 1;
681
8154c5d2 682 addr = __pa(&lppaca_of(cpu));
2f6093c8 683 ret = register_vpa(hwcpu, addr);
1da177e4 684
2f6093c8 685 if (ret) {
711ef84e
AB
686 pr_err("WARNING: VPA registration for cpu %d (hw %d) of area "
687 "%lx failed with %ld\n", cpu, hwcpu, addr, ret);
2f6093c8
MN
688 return;
689 }
d8c476ee 690
4e003747 691#ifdef CONFIG_PPC_BOOK3S_64
2f6093c8
MN
692 /*
693 * PAPR says this feature is SLB-Buffer but firmware never
694 * reports that. All SPLPAR support SLB shadow buffer.
695 */
d8c476ee 696 if (!radix_enabled() && firmware_has_feature(FW_FEATURE_SPLPAR)) {
d2e60075 697 addr = __pa(paca_ptrs[cpu]->slb_shadow_ptr);
2f6093c8
MN
698 ret = register_slb_shadow(hwcpu, addr);
699 if (ret)
711ef84e
AB
700 pr_err("WARNING: SLB shadow buffer registration for "
701 "cpu %d (hw %d) of area %lx failed with %ld\n",
702 cpu, hwcpu, addr, ret);
2f6093c8 703 }
4e003747 704#endif /* CONFIG_PPC_BOOK3S_64 */
cf9efce0
PM
705
706 /*
707 * Register dispatch trace log, if one has been allocated.
708 */
1c85a2a1 709 register_dtl_buffer(cpu);
1da177e4
LT
710}
711
4e003747 712#ifdef CONFIG_PPC_BOOK3S_64
d8c476ee 713
035223fb 714static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
5524a27d
AK
715 unsigned long vpn, unsigned long pa,
716 unsigned long rflags, unsigned long vflags,
b1022fbd 717 int psize, int apsize, int ssize)
1da177e4 718{
1da177e4
LT
719 unsigned long lpar_rc;
720 unsigned long flags;
721 unsigned long slot;
96e28449 722 unsigned long hpte_v, hpte_r;
1da177e4 723
3c726f8d 724 if (!(vflags & HPTE_V_BOLTED))
5524a27d
AK
725 pr_devel("hpte_insert(group=%lx, vpn=%016lx, "
726 "pa=%016lx, rflags=%lx, vflags=%lx, psize=%d)\n",
727 hpte_group, vpn, pa, rflags, vflags, psize);
3c726f8d 728
b1022fbd 729 hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID;
6b243fcf 730 hpte_r = hpte_encode_r(pa, psize, apsize) | rflags;
3c726f8d
BH
731
732 if (!(vflags & HPTE_V_BOLTED))
551a232c 733 pr_devel(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
3c726f8d 734
1da177e4
LT
735 /* Now fill in the actual HPTE */
736 /* Set CEC cookie to 0 */
737 /* Zero page = 0 */
738 /* I-cache Invalidate = 0 */
739 /* I-cache synchronize = 0 */
740 /* Exact = 0 */
741 flags = 0;
742
9ee820fa
BK
743 if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
744 flags |= H_COALESCE_CAND;
1da177e4 745
b9377ffc 746 lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
706c8c93 747 if (unlikely(lpar_rc == H_PTEG_FULL)) {
ca42d8d2 748 pr_devel("Hash table group is full\n");
1da177e4 749 return -1;
3c726f8d 750 }
1da177e4
LT
751
752 /*
753 * Since we try and ioremap PHBs we don't own, the pte insert
754 * will fail. However we must catch the failure in hash_page
755 * or we will loop forever, so return -2 in this case.
756 */
706c8c93 757 if (unlikely(lpar_rc != H_SUCCESS)) {
ca42d8d2 758 pr_err("Failed hash pte insert with error %ld\n", lpar_rc);
1da177e4 759 return -2;
3c726f8d
BH
760 }
761 if (!(vflags & HPTE_V_BOLTED))
551a232c 762 pr_devel(" -> slot: %lu\n", slot & 7);
1da177e4
LT
763
764 /* Because of iSeries, we have to pass down the secondary
765 * bucket bit here as well
766 */
96e28449 767 return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);
1da177e4
LT
768}
769
770static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock);
771
772static long pSeries_lpar_hpte_remove(unsigned long hpte_group)
773{
774 unsigned long slot_offset;
775 unsigned long lpar_rc;
776 int i;
777 unsigned long dummy1, dummy2;
778
779 /* pick a random slot to start at */
780 slot_offset = mftb() & 0x7;
781
782 for (i = 0; i < HPTES_PER_GROUP; i++) {
783
784 /* don't remove a bolted entry */
785 lpar_rc = plpar_pte_remove(H_ANDCOND, hpte_group + slot_offset,
82ce028a 786 HPTE_V_BOLTED, &dummy1, &dummy2);
706c8c93 787 if (lpar_rc == H_SUCCESS)
1da177e4 788 return i;
9fb26401
MW
789
790 /*
791 * The test for adjunct partition is performed before the
792 * ANDCOND test. H_RESOURCE may be returned, so we need to
793 * check for that as well.
794 */
795 BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
1da177e4
LT
796
797 slot_offset++;
798 slot_offset &= 0x7;
799 }
800
801 return -1;
802}
803
8119cefd
HB
804/* Called during kexec sequence with MMU off */
805static notrace void manual_hpte_clear_all(void)
1da177e4
LT
806{
807 unsigned long size_bytes = 1UL << ppc64_pft_size;
808 unsigned long hpte_count = size_bytes >> 4;
d504bed6
MN
809 struct {
810 unsigned long pteh;
811 unsigned long ptel;
812 } ptes[4];
b7abc5c5 813 long lpar_rc;
bed9a315 814 unsigned long i, j;
d504bed6
MN
815
816 /* Read in batches of 4,
817 * invalidate only valid entries not in the VRMA
818 * hpte_count will be a multiple of 4
819 */
820 for (i = 0; i < hpte_count; i += 4) {
821 lpar_rc = plpar_pte_read_4_raw(0, i, (void *)ptes);
ca42d8d2
AK
822 if (lpar_rc != H_SUCCESS) {
823 pr_info("Failed to read hash page table at %ld err %ld\n",
824 i, lpar_rc);
d504bed6 825 continue;
ca42d8d2 826 }
d504bed6
MN
827 for (j = 0; j < 4; j++){
828 if ((ptes[j].pteh & HPTE_V_VRMA_MASK) ==
829 HPTE_V_VRMA_MASK)
830 continue;
831 if (ptes[j].pteh & HPTE_V_VALID)
832 plpar_pte_remove_raw(0, i + j, 0,
833 &(ptes[j].pteh), &(ptes[j].ptel));
b7abc5c5
SS
834 }
835 }
5246adec
AB
836}
837
8119cefd
HB
838/* Called during kexec sequence with MMU off */
839static notrace int hcall_hpte_clear_all(void)
5246adec
AB
840{
841 int rc;
842
843 do {
844 rc = plpar_hcall_norets(H_CLEAR_HPT);
845 } while (rc == H_CONTINUE);
846
847 return rc;
848}
849
8119cefd
HB
850/* Called during kexec sequence with MMU off */
851static notrace void pseries_hpte_clear_all(void)
5246adec
AB
852{
853 int rc;
854
855 rc = hcall_hpte_clear_all();
856 if (rc != H_SUCCESS)
857 manual_hpte_clear_all();
e844b1ee
AB
858
859#ifdef __LITTLE_ENDIAN__
408cddd9
HB
860 /*
861 * Reset exceptions to big endian.
862 *
863 * FIXME this is a hack for kexec, we need to reset the exception
864 * endian before starting the new kernel and this is a convenient place
865 * to do it.
866 *
867 * This is also called on boot when a fadump happens. In that case we
868 * must not change the exception endian mode.
869 */
d3cbff1b
BH
870 if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active())
871 pseries_big_endian_exceptions();
e844b1ee 872#endif
1da177e4
LT
873}
874
875/*
876 * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
877 * the low 3 bits of flags happen to line up. So no transform is needed.
878 * We can probably optimize here and assume the high bits of newpp are
879 * already zero. For now I am paranoid.
880 */
3c726f8d
BH
881static long pSeries_lpar_hpte_updatepp(unsigned long slot,
882 unsigned long newpp,
5524a27d 883 unsigned long vpn,
db3d8534 884 int psize, int apsize,
aefa5688 885 int ssize, unsigned long inv_flags)
1da177e4
LT
886{
887 unsigned long lpar_rc;
e71ff982 888 unsigned long flags;
3c726f8d 889 unsigned long want_v;
1da177e4 890
5524a27d 891 want_v = hpte_encode_avpn(vpn, psize, ssize);
1da177e4 892
53f1d317
AK
893 flags = (newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO)) | H_AVPN;
894 flags |= (newpp & HPTE_R_KEY_HI) >> 48;
e71ff982
BS
895 if (mmu_has_feature(MMU_FTR_KERNEL_RO))
896 /* Move pp0 into bit 8 (IBM 55) */
897 flags |= (newpp & HPTE_R_PP0) >> 55;
898
a8c0bf3c
AK
899 pr_devel(" update: avpnv=%016lx, hash=%016lx, f=%lx, psize: %d ...",
900 want_v, slot, flags, psize);
901
1189be65 902 lpar_rc = plpar_pte_protect(flags, slot, want_v);
3c726f8d 903
706c8c93 904 if (lpar_rc == H_NOT_FOUND) {
551a232c 905 pr_devel("not found !\n");
1da177e4 906 return -1;
3c726f8d
BH
907 }
908
551a232c 909 pr_devel("ok\n");
1da177e4 910
706c8c93 911 BUG_ON(lpar_rc != H_SUCCESS);
1da177e4
LT
912
913 return 0;
914}
915
4ad90c86 916static long __pSeries_lpar_hpte_find(unsigned long want_v, unsigned long hpte_group)
1da177e4 917{
4ad90c86
AK
918 long lpar_rc;
919 unsigned long i, j;
920 struct {
921 unsigned long pteh;
922 unsigned long ptel;
923 } ptes[4];
1da177e4 924
4ad90c86 925 for (i = 0; i < HPTES_PER_GROUP; i += 4, hpte_group += 4) {
1da177e4 926
4ad90c86 927 lpar_rc = plpar_pte_read_4(0, hpte_group, (void *)ptes);
ca42d8d2
AK
928 if (lpar_rc != H_SUCCESS) {
929 pr_info("Failed to read hash page table at %ld err %ld\n",
930 hpte_group, lpar_rc);
4ad90c86 931 continue;
ca42d8d2 932 }
1da177e4 933
4ad90c86
AK
934 for (j = 0; j < 4; j++) {
935 if (HPTE_V_COMPARE(ptes[j].pteh, want_v) &&
936 (ptes[j].pteh & HPTE_V_VALID))
937 return i + j;
938 }
939 }
1da177e4 940
4ad90c86 941 return -1;
1da177e4
LT
942}
943
5524a27d 944static long pSeries_lpar_hpte_find(unsigned long vpn, int psize, int ssize)
1da177e4 945{
1da177e4 946 long slot;
4ad90c86
AK
947 unsigned long hash;
948 unsigned long want_v;
949 unsigned long hpte_group;
1da177e4 950
5524a27d
AK
951 hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize);
952 want_v = hpte_encode_avpn(vpn, psize, ssize);
1189be65 953
d78d5dac
AK
954 /*
955 * We try to keep bolted entries always in primary hash
956 * But in some case we can find them in secondary too.
957 */
4ad90c86
AK
958 hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP;
959 slot = __pSeries_lpar_hpte_find(want_v, hpte_group);
d78d5dac
AK
960 if (slot < 0) {
961 /* Try in secondary */
962 hpte_group = (~hash & htab_hash_mask) * HPTES_PER_GROUP;
963 slot = __pSeries_lpar_hpte_find(want_v, hpte_group);
964 if (slot < 0)
965 return -1;
966 }
4ad90c86
AK
967 return hpte_group + slot;
968}
1da177e4
LT
969
970static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,
3c726f8d 971 unsigned long ea,
1189be65 972 int psize, int ssize)
1da177e4 973{
5524a27d
AK
974 unsigned long vpn;
975 unsigned long lpar_rc, slot, vsid, flags;
1da177e4 976
1189be65 977 vsid = get_kernel_vsid(ea, ssize);
5524a27d 978 vpn = hpt_vpn(ea, vsid, ssize);
1da177e4 979
5524a27d 980 slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
1da177e4
LT
981 BUG_ON(slot == -1);
982
b56d55a5 983 flags = newpp & (HPTE_R_PP | HPTE_R_N);
e71ff982
BS
984 if (mmu_has_feature(MMU_FTR_KERNEL_RO))
985 /* Move pp0 into bit 8 (IBM 55) */
986 flags |= (newpp & HPTE_R_PP0) >> 55;
987
b56d55a5
ME
988 flags |= ((newpp & HPTE_R_KEY_HI) >> 48) | (newpp & HPTE_R_KEY_LO);
989
1da177e4
LT
990 lpar_rc = plpar_pte_protect(flags, slot, 0);
991
706c8c93 992 BUG_ON(lpar_rc != H_SUCCESS);
1da177e4
LT
993}
994
5524a27d 995static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long vpn,
db3d8534
AK
996 int psize, int apsize,
997 int ssize, int local)
1da177e4 998{
3c726f8d 999 unsigned long want_v;
1da177e4
LT
1000 unsigned long lpar_rc;
1001 unsigned long dummy1, dummy2;
1002
5524a27d
AK
1003 pr_devel(" inval : slot=%lx, vpn=%016lx, psize: %d, local: %d\n",
1004 slot, vpn, psize, local);
1da177e4 1005
5524a27d 1006 want_v = hpte_encode_avpn(vpn, psize, ssize);
1189be65 1007 lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v, &dummy1, &dummy2);
706c8c93 1008 if (lpar_rc == H_NOT_FOUND)
1da177e4
LT
1009 return;
1010
706c8c93 1011 BUG_ON(lpar_rc != H_SUCCESS);
1da177e4
LT
1012}
1013
ba2dd8a2
LD
1014
1015/*
1016 * As defined in the PAPR's section 14.5.4.1.8
1017 * The control mask doesn't include the returned reference and change bit from
1018 * the processed PTE.
1019 */
1020#define HBLKR_AVPN 0x0100000000000000UL
1021#define HBLKR_CTRL_MASK 0xf800000000000000UL
1022#define HBLKR_CTRL_SUCCESS 0x8000000000000000UL
1023#define HBLKR_CTRL_ERRNOTFOUND 0x8800000000000000UL
1024#define HBLKR_CTRL_ERRBUSY 0xa000000000000000UL
1025
59545ebe
LD
1026/*
1027 * Returned true if we are supporting this block size for the specified segment
1028 * base page size and actual page size.
1029 *
1030 * Currently, we only support 8 size block.
1031 */
1032static inline bool is_supported_hlbkrm(int bpsize, int psize)
1033{
1034 return (hblkrm_size[bpsize][psize] == HBLKRM_SUPPORTED_BLOCK_SIZE);
1035}
1036
ba2dd8a2
LD
1037/**
1038 * H_BLOCK_REMOVE caller.
1039 * @idx should point to the latest @param entry set with a PTEX.
1040 * If PTE cannot be processed because another CPUs has already locked that
1041 * group, those entries are put back in @param starting at index 1.
1042 * If entries has to be retried and @retry_busy is set to true, these entries
1043 * are retried until success. If @retry_busy is set to false, the returned
1044 * is the number of entries yet to process.
1045 */
1046static unsigned long call_block_remove(unsigned long idx, unsigned long *param,
1047 bool retry_busy)
1048{
1049 unsigned long i, rc, new_idx;
1050 unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
1051
1052 if (idx < 2) {
1053 pr_warn("Unexpected empty call to H_BLOCK_REMOVE");
1054 return 0;
1055 }
1056again:
1057 new_idx = 0;
1058 if (idx > PLPAR_HCALL9_BUFSIZE) {
1059 pr_err("Too many PTEs (%lu) for H_BLOCK_REMOVE", idx);
1060 idx = PLPAR_HCALL9_BUFSIZE;
1061 } else if (idx < PLPAR_HCALL9_BUFSIZE)
1062 param[idx] = HBR_END;
1063
1064 rc = plpar_hcall9(H_BLOCK_REMOVE, retbuf,
1065 param[0], /* AVA */
1066 param[1], param[2], param[3], param[4], /* TS0-7 */
1067 param[5], param[6], param[7], param[8]);
1068 if (rc == H_SUCCESS)
1069 return 0;
1070
1071 BUG_ON(rc != H_PARTIAL);
1072
1073 /* Check that the unprocessed entries were 'not found' or 'busy' */
1074 for (i = 0; i < idx-1; i++) {
1075 unsigned long ctrl = retbuf[i] & HBLKR_CTRL_MASK;
1076
1077 if (ctrl == HBLKR_CTRL_ERRBUSY) {
1078 param[++new_idx] = param[i+1];
1079 continue;
1080 }
1081
1082 BUG_ON(ctrl != HBLKR_CTRL_SUCCESS
1083 && ctrl != HBLKR_CTRL_ERRNOTFOUND);
1084 }
1085
1086 /*
1087 * If there were entries found busy, retry these entries if requested,
1088 * of if all the entries have to be retried.
1089 */
1090 if (new_idx && (retry_busy || new_idx == (PLPAR_HCALL9_BUFSIZE-1))) {
1091 idx = new_idx + 1;
1092 goto again;
1093 }
1094
1095 return new_idx;
1096}
1097
e34aa03c 1098#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1a527286
AK
1099/*
1100 * Limit iterations holding pSeries_lpar_tlbie_lock to 3. We also need
1101 * to make sure that we avoid bouncing the hypervisor tlbie lock.
1102 */
1103#define PPC64_HUGE_HPTE_BATCH 12
1104
ba2dd8a2
LD
1105static void hugepage_block_invalidate(unsigned long *slot, unsigned long *vpn,
1106 int count, int psize, int ssize)
1a527286 1107{
05af40e8 1108 unsigned long param[PLPAR_HCALL9_BUFSIZE];
ba2dd8a2
LD
1109 unsigned long shift, current_vpgb, vpgb;
1110 int i, pix = 0;
1a527286 1111
ba2dd8a2
LD
1112 shift = mmu_psize_defs[psize].shift;
1113
1114 for (i = 0; i < count; i++) {
1115 /*
1116 * Shifting 3 bits more on the right to get a
1117 * 8 pages aligned virtual addresse.
1118 */
1119 vpgb = (vpn[i] >> (shift - VPN_SHIFT + 3));
1120 if (!pix || vpgb != current_vpgb) {
1121 /*
1122 * Need to start a new 8 pages block, flush
1123 * the current one if needed.
1124 */
1125 if (pix)
1126 (void)call_block_remove(pix, param, true);
1127 current_vpgb = vpgb;
1128 param[0] = hpte_encode_avpn(vpn[i], psize, ssize);
1129 pix = 1;
1130 }
1131
1132 param[pix++] = HBR_REQUEST | HBLKR_AVPN | slot[i];
1133 if (pix == PLPAR_HCALL9_BUFSIZE) {
1134 pix = call_block_remove(pix, param, false);
1135 /*
1136 * pix = 0 means that all the entries were
1137 * removed, we can start a new block.
1138 * Otherwise, this means that there are entries
1139 * to retry, and pix points to latest one, so
1140 * we should increment it and try to continue
1141 * the same block.
1142 */
1143 if (pix)
1144 pix++;
1145 }
1146 }
1147 if (pix)
1148 (void)call_block_remove(pix, param, true);
1149}
1150
1151static void hugepage_bulk_invalidate(unsigned long *slot, unsigned long *vpn,
1152 int count, int psize, int ssize)
1153{
1154 unsigned long param[PLPAR_HCALL9_BUFSIZE];
1155 int i = 0, pix = 0, rc;
1a527286
AK
1156
1157 for (i = 0; i < count; i++) {
1158
1159 if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
1160 pSeries_lpar_hpte_invalidate(slot[i], vpn[i], psize, 0,
1161 ssize, 0);
1162 } else {
1163 param[pix] = HBR_REQUEST | HBR_AVPN | slot[i];
1164 param[pix+1] = hpte_encode_avpn(vpn[i], psize, ssize);
1165 pix += 2;
1166 if (pix == 8) {
1167 rc = plpar_hcall9(H_BULK_REMOVE, param,
1168 param[0], param[1], param[2],
1169 param[3], param[4], param[5],
1170 param[6], param[7]);
1171 BUG_ON(rc != H_SUCCESS);
1172 pix = 0;
1173 }
1174 }
1175 }
1176 if (pix) {
1177 param[pix] = HBR_END;
1178 rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
1179 param[2], param[3], param[4], param[5],
1180 param[6], param[7]);
1181 BUG_ON(rc != H_SUCCESS);
1182 }
ba2dd8a2
LD
1183}
1184
1185static inline void __pSeries_lpar_hugepage_invalidate(unsigned long *slot,
1186 unsigned long *vpn,
1187 int count, int psize,
1188 int ssize)
1189{
1190 unsigned long flags = 0;
1191 int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
1192
1193 if (lock_tlbie)
1194 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
1195
59545ebe
LD
1196 /* Assuming THP size is 16M */
1197 if (is_supported_hlbkrm(psize, MMU_PAGE_16M))
ba2dd8a2
LD
1198 hugepage_block_invalidate(slot, vpn, count, psize, ssize);
1199 else
1200 hugepage_bulk_invalidate(slot, vpn, count, psize, ssize);
1a527286
AK
1201
1202 if (lock_tlbie)
1203 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
1204}
1205
fa1f8ae8
AK
1206static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
1207 unsigned long addr,
1208 unsigned char *hpte_slot_array,
d557b098 1209 int psize, int ssize, int local)
1a527286 1210{
fa1f8ae8 1211 int i, index = 0;
1a527286
AK
1212 unsigned long s_addr = addr;
1213 unsigned int max_hpte_count, valid;
1214 unsigned long vpn_array[PPC64_HUGE_HPTE_BATCH];
1215 unsigned long slot_array[PPC64_HUGE_HPTE_BATCH];
fa1f8ae8 1216 unsigned long shift, hidx, vpn = 0, hash, slot;
1a527286
AK
1217
1218 shift = mmu_psize_defs[psize].shift;
1219 max_hpte_count = 1U << (PMD_SHIFT - shift);
1220
1221 for (i = 0; i < max_hpte_count; i++) {
1222 valid = hpte_valid(hpte_slot_array, i);
1223 if (!valid)
1224 continue;
1225 hidx = hpte_hash_index(hpte_slot_array, i);
1226
1227 /* get the vpn */
1228 addr = s_addr + (i * (1ul << shift));
1a527286
AK
1229 vpn = hpt_vpn(addr, vsid, ssize);
1230 hash = hpt_hash(vpn, shift, ssize);
1231 if (hidx & _PTEIDX_SECONDARY)
1232 hash = ~hash;
1233
1234 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
1235 slot += hidx & _PTEIDX_GROUP_IX;
1236
1237 slot_array[index] = slot;
1238 vpn_array[index] = vpn;
1239 if (index == PPC64_HUGE_HPTE_BATCH - 1) {
1240 /*
1241 * Now do a bluk invalidate
1242 */
1243 __pSeries_lpar_hugepage_invalidate(slot_array,
1244 vpn_array,
1245 PPC64_HUGE_HPTE_BATCH,
1246 psize, ssize);
1247 index = 0;
1248 } else
1249 index++;
1250 }
1251 if (index)
1252 __pSeries_lpar_hugepage_invalidate(slot_array, vpn_array,
1253 index, psize, ssize);
1254}
e34aa03c
AK
1255#else
1256static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
1257 unsigned long addr,
1258 unsigned char *hpte_slot_array,
1259 int psize, int ssize, int local)
1260{
1261 WARN(1, "%s called without THP support\n", __func__);
1262}
1263#endif
1a527286 1264
27828f98
DG
1265static int pSeries_lpar_hpte_removebolted(unsigned long ea,
1266 int psize, int ssize)
f8c8803b 1267{
5524a27d
AK
1268 unsigned long vpn;
1269 unsigned long slot, vsid;
f8c8803b
BP
1270
1271 vsid = get_kernel_vsid(ea, ssize);
5524a27d 1272 vpn = hpt_vpn(ea, vsid, ssize);
f8c8803b 1273
5524a27d 1274 slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
27828f98
DG
1275 if (slot == -1)
1276 return -ENOENT;
1277
db3d8534
AK
1278 /*
1279 * lpar doesn't use the passed actual page size
1280 */
1281 pSeries_lpar_hpte_invalidate(slot, vpn, psize, 0, ssize, 0);
27828f98 1282 return 0;
f8c8803b
BP
1283}
1284
0effa488
LD
1285
1286static inline unsigned long compute_slot(real_pte_t pte,
1287 unsigned long vpn,
1288 unsigned long index,
1289 unsigned long shift,
1290 int ssize)
1291{
1292 unsigned long slot, hash, hidx;
1293
1294 hash = hpt_hash(vpn, shift, ssize);
1295 hidx = __rpte_to_hidx(pte, index);
1296 if (hidx & _PTEIDX_SECONDARY)
1297 hash = ~hash;
1298 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
1299 slot += hidx & _PTEIDX_GROUP_IX;
1300 return slot;
1301}
1302
ba2dd8a2
LD
1303/**
1304 * The hcall H_BLOCK_REMOVE implies that the virtual pages to processed are
1305 * "all within the same naturally aligned 8 page virtual address block".
1306 */
1307static void do_block_remove(unsigned long number, struct ppc64_tlb_batch *batch,
1308 unsigned long *param)
1309{
1310 unsigned long vpn;
1311 unsigned long i, pix = 0;
1312 unsigned long index, shift, slot, current_vpgb, vpgb;
1313 real_pte_t pte;
1314 int psize, ssize;
1315
1316 psize = batch->psize;
1317 ssize = batch->ssize;
1318
1319 for (i = 0; i < number; i++) {
1320 vpn = batch->vpn[i];
1321 pte = batch->pte[i];
1322 pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
1323 /*
1324 * Shifting 3 bits more on the right to get a
1325 * 8 pages aligned virtual addresse.
1326 */
1327 vpgb = (vpn >> (shift - VPN_SHIFT + 3));
1328 if (!pix || vpgb != current_vpgb) {
1329 /*
1330 * Need to start a new 8 pages block, flush
1331 * the current one if needed.
1332 */
1333 if (pix)
1334 (void)call_block_remove(pix, param,
1335 true);
1336 current_vpgb = vpgb;
1337 param[0] = hpte_encode_avpn(vpn, psize,
1338 ssize);
1339 pix = 1;
1340 }
1341
1342 slot = compute_slot(pte, vpn, index, shift, ssize);
1343 param[pix++] = HBR_REQUEST | HBLKR_AVPN | slot;
1344
1345 if (pix == PLPAR_HCALL9_BUFSIZE) {
1346 pix = call_block_remove(pix, param, false);
1347 /*
1348 * pix = 0 means that all the entries were
1349 * removed, we can start a new block.
1350 * Otherwise, this means that there are entries
1351 * to retry, and pix points to latest one, so
1352 * we should increment it and try to continue
1353 * the same block.
1354 */
1355 if (pix)
1356 pix++;
1357 }
1358 } pte_iterate_hashed_end();
1359 }
1360
1361 if (pix)
1362 (void)call_block_remove(pix, param, true);
1363}
1364
1211ee61
LD
1365/*
1366 * TLB Block Invalidate Characteristics
1367 *
1368 * These characteristics define the size of the block the hcall H_BLOCK_REMOVE
1369 * is able to process for each couple segment base page size, actual page size.
1370 *
1371 * The ibm,get-system-parameter properties is returning a buffer with the
1372 * following layout:
1373 *
1374 * [ 2 bytes size of the RTAS buffer (excluding these 2 bytes) ]
1375 * -----------------
1376 * TLB Block Invalidate Specifiers:
1377 * [ 1 byte LOG base 2 of the TLB invalidate block size being specified ]
1378 * [ 1 byte Number of page sizes (N) that are supported for the specified
1379 * TLB invalidate block size ]
1380 * [ 1 byte Encoded segment base page size and actual page size
1381 * MSB=0 means 4k segment base page size and actual page size
1382 * MSB=1 the penc value in mmu_psize_def ]
1383 * ...
1384 * -----------------
1385 * Next TLB Block Invalidate Specifiers...
1386 * -----------------
1387 * [ 0 ]
1388 */
1389static inline void set_hblkrm_bloc_size(int bpsize, int psize,
1390 unsigned int block_size)
1391{
1392 if (block_size > hblkrm_size[bpsize][psize])
1393 hblkrm_size[bpsize][psize] = block_size;
1394}
1395
1396/*
1397 * Decode the Encoded segment base page size and actual page size.
1398 * PAPR specifies:
1399 * - bit 7 is the L bit
1400 * - bits 0-5 are the penc value
1401 * If the L bit is 0, this means 4K segment base page size and actual page size
1402 * otherwise the penc value should be read.
1403 */
1404#define HBLKRM_L_MASK 0x80
1405#define HBLKRM_PENC_MASK 0x3f
1406static inline void __init check_lp_set_hblkrm(unsigned int lp,
1407 unsigned int block_size)
1408{
1409 unsigned int bpsize, psize;
1410
1411 /* First, check the L bit, if not set, this means 4K */
1412 if ((lp & HBLKRM_L_MASK) == 0) {
1413 set_hblkrm_bloc_size(MMU_PAGE_4K, MMU_PAGE_4K, block_size);
1414 return;
1415 }
1416
1417 lp &= HBLKRM_PENC_MASK;
1418 for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++) {
1419 struct mmu_psize_def *def = &mmu_psize_defs[bpsize];
1420
1421 for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
1422 if (def->penc[psize] == lp) {
1423 set_hblkrm_bloc_size(bpsize, psize, block_size);
1424 return;
1425 }
1426 }
1427 }
1428}
1429
1430#define SPLPAR_TLB_BIC_TOKEN 50
1431
1432/*
1433 * The size of the TLB Block Invalidate Characteristics is variable. But at the
1434 * maximum it will be the number of possible page sizes *2 + 10 bytes.
1435 * Currently MMU_PAGE_COUNT is 16, which means 42 bytes. Use a cache line size
1436 * (128 bytes) for the buffer to get plenty of space.
1437 */
1438#define SPLPAR_TLB_BIC_MAXLENGTH 128
1439
1440void __init pseries_lpar_read_hblkrm_characteristics(void)
1441{
1442 unsigned char local_buffer[SPLPAR_TLB_BIC_MAXLENGTH];
1443 int call_status, len, idx, bpsize;
1444
4ab8a485
LD
1445 if (!firmware_has_feature(FW_FEATURE_BLOCK_REMOVE))
1446 return;
1447
1211ee61
LD
1448 spin_lock(&rtas_data_buf_lock);
1449 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
1450 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
1451 NULL,
1452 SPLPAR_TLB_BIC_TOKEN,
1453 __pa(rtas_data_buf),
1454 RTAS_DATA_BUF_SIZE);
1455 memcpy(local_buffer, rtas_data_buf, SPLPAR_TLB_BIC_MAXLENGTH);
1456 local_buffer[SPLPAR_TLB_BIC_MAXLENGTH - 1] = '\0';
1457 spin_unlock(&rtas_data_buf_lock);
1458
1459 if (call_status != 0) {
1460 pr_warn("%s %s Error calling get-system-parameter (0x%x)\n",
1461 __FILE__, __func__, call_status);
1462 return;
1463 }
1464
1465 /*
1466 * The first two (2) bytes of the data in the buffer are the length of
1467 * the returned data, not counting these first two (2) bytes.
1468 */
1469 len = be16_to_cpu(*((u16 *)local_buffer)) + 2;
1470 if (len > SPLPAR_TLB_BIC_MAXLENGTH) {
1471 pr_warn("%s too large returned buffer %d", __func__, len);
1472 return;
1473 }
1474
1475 idx = 2;
1476 while (idx < len) {
1477 u8 block_shift = local_buffer[idx++];
1478 u32 block_size;
1479 unsigned int npsize;
1480
1481 if (!block_shift)
1482 break;
1483
1484 block_size = 1 << block_shift;
1485
1486 for (npsize = local_buffer[idx++];
1487 npsize > 0 && idx < len; npsize--)
1488 check_lp_set_hblkrm((unsigned int) local_buffer[idx++],
1489 block_size);
1490 }
1491
1492 for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++)
1493 for (idx = 0; idx < MMU_PAGE_COUNT; idx++)
1494 if (hblkrm_size[bpsize][idx])
1495 pr_info("H_BLOCK_REMOVE supports base psize:%d psize:%d block size:%d",
1496 bpsize, idx, hblkrm_size[bpsize][idx]);
1497}
1498
1da177e4
LT
1499/*
1500 * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
1501 * lock.
1502 */
035223fb 1503static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
1da177e4 1504{
5524a27d 1505 unsigned long vpn;
f03e64f2 1506 unsigned long i, pix, rc;
12e86f92 1507 unsigned long flags = 0;
69111bac 1508 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
44ae3ab3 1509 int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
05af40e8 1510 unsigned long param[PLPAR_HCALL9_BUFSIZE];
0effa488 1511 unsigned long index, shift, slot;
f03e64f2 1512 real_pte_t pte;
1189be65 1513 int psize, ssize;
1da177e4
LT
1514
1515 if (lock_tlbie)
1516 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
1517
59545ebe 1518 if (is_supported_hlbkrm(batch->psize, batch->psize)) {
ba2dd8a2
LD
1519 do_block_remove(number, batch, param);
1520 goto out;
1521 }
1522
f03e64f2 1523 psize = batch->psize;
1189be65 1524 ssize = batch->ssize;
f03e64f2
PM
1525 pix = 0;
1526 for (i = 0; i < number; i++) {
5524a27d 1527 vpn = batch->vpn[i];
f03e64f2 1528 pte = batch->pte[i];
5524a27d 1529 pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
0effa488 1530 slot = compute_slot(pte, vpn, index, shift, ssize);
12e86f92 1531 if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
db3d8534
AK
1532 /*
1533 * lpar doesn't use the passed actual page size
1534 */
5524a27d 1535 pSeries_lpar_hpte_invalidate(slot, vpn, psize,
db3d8534 1536 0, ssize, local);
12e86f92
PM
1537 } else {
1538 param[pix] = HBR_REQUEST | HBR_AVPN | slot;
5524a27d 1539 param[pix+1] = hpte_encode_avpn(vpn, psize,
1189be65 1540 ssize);
12e86f92
PM
1541 pix += 2;
1542 if (pix == 8) {
1543 rc = plpar_hcall9(H_BULK_REMOVE, param,
f03e64f2
PM
1544 param[0], param[1], param[2],
1545 param[3], param[4], param[5],
1546 param[6], param[7]);
12e86f92
PM
1547 BUG_ON(rc != H_SUCCESS);
1548 pix = 0;
1549 }
f03e64f2
PM
1550 }
1551 } pte_iterate_hashed_end();
1552 }
1553 if (pix) {
1554 param[pix] = HBR_END;
1555 rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
1556 param[2], param[3], param[4], param[5],
1557 param[6], param[7]);
1558 BUG_ON(rc != H_SUCCESS);
1559 }
1da177e4 1560
ba2dd8a2 1561out:
1da177e4
LT
1562 if (lock_tlbie)
1563 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
1564}
1565
4e89a2d8
WS
1566static int __init disable_bulk_remove(char *str)
1567{
1568 if (strcmp(str, "off") == 0 &&
1569 firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
65471d76
AK
1570 pr_info("Disabling BULK_REMOVE firmware feature");
1571 powerpc_firmware_features &= ~FW_FEATURE_BULK_REMOVE;
4e89a2d8
WS
1572 }
1573 return 1;
1574}
1575
1576__setup("bulk_remove=", disable_bulk_remove);
1577
dbcf929c
DG
1578#define HPT_RESIZE_TIMEOUT 10000 /* ms */
1579
1580struct hpt_resize_state {
1581 unsigned long shift;
1582 int commit_rc;
1583};
1584
1585static int pseries_lpar_resize_hpt_commit(void *data)
1586{
1587 struct hpt_resize_state *state = data;
1588
1589 state->commit_rc = plpar_resize_hpt_commit(0, state->shift);
1590 if (state->commit_rc != H_SUCCESS)
1591 return -EIO;
1592
1593 /* Hypervisor has transitioned the HTAB, update our globals */
1594 ppc64_pft_size = state->shift;
1595 htab_size_bytes = 1UL << ppc64_pft_size;
1596 htab_hash_mask = (htab_size_bytes >> 7) - 1;
1597
1598 return 0;
1599}
1600
c784be43
GS
1601/*
1602 * Must be called in process context. The caller must hold the
1603 * cpus_lock.
1604 */
dbcf929c
DG
1605static int pseries_lpar_resize_hpt(unsigned long shift)
1606{
1607 struct hpt_resize_state state = {
1608 .shift = shift,
1609 .commit_rc = H_FUNCTION,
1610 };
1611 unsigned int delay, total_delay = 0;
1612 int rc;
1613 ktime_t t0, t1, t2;
1614
1615 might_sleep();
1616
1617 if (!firmware_has_feature(FW_FEATURE_HPT_RESIZE))
1618 return -ENODEV;
1619
65471d76 1620 pr_info("Attempting to resize HPT to shift %lu\n", shift);
dbcf929c
DG
1621
1622 t0 = ktime_get();
1623
1624 rc = plpar_resize_hpt_prepare(0, shift);
1625 while (H_IS_LONG_BUSY(rc)) {
1626 delay = get_longbusy_msecs(rc);
1627 total_delay += delay;
1628 if (total_delay > HPT_RESIZE_TIMEOUT) {
1629 /* prepare with shift==0 cancels an in-progress resize */
1630 rc = plpar_resize_hpt_prepare(0, 0);
1631 if (rc != H_SUCCESS)
65471d76 1632 pr_warn("Unexpected error %d cancelling timed out HPT resize\n",
dbcf929c
DG
1633 rc);
1634 return -ETIMEDOUT;
1635 }
1636 msleep(delay);
1637 rc = plpar_resize_hpt_prepare(0, shift);
01ed0510 1638 }
dbcf929c
DG
1639
1640 switch (rc) {
1641 case H_SUCCESS:
1642 /* Continue on */
1643 break;
1644
1645 case H_PARAMETER:
f172acbf 1646 pr_warn("Invalid argument from H_RESIZE_HPT_PREPARE\n");
dbcf929c
DG
1647 return -EINVAL;
1648 case H_RESOURCE:
f172acbf 1649 pr_warn("Operation not permitted from H_RESIZE_HPT_PREPARE\n");
dbcf929c
DG
1650 return -EPERM;
1651 default:
65471d76 1652 pr_warn("Unexpected error %d from H_RESIZE_HPT_PREPARE\n", rc);
dbcf929c
DG
1653 return -EIO;
1654 }
1655
1656 t1 = ktime_get();
1657
c784be43
GS
1658 rc = stop_machine_cpuslocked(pseries_lpar_resize_hpt_commit,
1659 &state, NULL);
dbcf929c
DG
1660
1661 t2 = ktime_get();
1662
1663 if (rc != 0) {
1664 switch (state.commit_rc) {
1665 case H_PTEG_FULL:
dbcf929c
DG
1666 return -ENOSPC;
1667
1668 default:
65471d76
AK
1669 pr_warn("Unexpected error %d from H_RESIZE_HPT_COMMIT\n",
1670 state.commit_rc);
dbcf929c
DG
1671 return -EIO;
1672 };
1673 }
1674
65471d76
AK
1675 pr_info("HPT resize to shift %lu complete (%lld ms / %lld ms)\n",
1676 shift, (long long) ktime_ms_delta(t1, t0),
1677 (long long) ktime_ms_delta(t2, t1));
dbcf929c
DG
1678
1679 return 0;
1680}
1681
cc3d2940
PM
1682static int pseries_lpar_register_process_table(unsigned long base,
1683 unsigned long page_size, unsigned long table_size)
1684{
1685 long rc;
dbfcf3cb 1686 unsigned long flags = 0;
cc3d2940 1687
dbfcf3cb
PM
1688 if (table_size)
1689 flags |= PROC_TABLE_NEW;
b6c84175
BR
1690 if (radix_enabled()) {
1691 flags |= PROC_TABLE_RADIX;
1692 if (mmu_has_feature(MMU_FTR_GTSE))
1693 flags |= PROC_TABLE_GTSE;
1694 } else
dbfcf3cb 1695 flags |= PROC_TABLE_HPT_SLB;
cc3d2940
PM
1696 for (;;) {
1697 rc = plpar_hcall_norets(H_REGISTER_PROC_TBL, flags, base,
1698 page_size, table_size);
1699 if (!H_IS_LONG_BUSY(rc))
1700 break;
1701 mdelay(get_longbusy_msecs(rc));
1702 }
1703 if (rc != H_SUCCESS) {
1704 pr_err("Failed to register process table (rc=%ld)\n", rc);
1705 BUG();
1706 }
1707 return rc;
1708}
1709
6364e84e 1710void __init hpte_init_pseries(void)
1da177e4 1711{
7025776e
BH
1712 mmu_hash_ops.hpte_invalidate = pSeries_lpar_hpte_invalidate;
1713 mmu_hash_ops.hpte_updatepp = pSeries_lpar_hpte_updatepp;
1714 mmu_hash_ops.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp;
1715 mmu_hash_ops.hpte_insert = pSeries_lpar_hpte_insert;
1716 mmu_hash_ops.hpte_remove = pSeries_lpar_hpte_remove;
1717 mmu_hash_ops.hpte_removebolted = pSeries_lpar_hpte_removebolted;
1718 mmu_hash_ops.flush_hash_range = pSeries_lpar_flush_hash_range;
5246adec 1719 mmu_hash_ops.hpte_clear_all = pseries_hpte_clear_all;
7025776e 1720 mmu_hash_ops.hugepage_invalidate = pSeries_lpar_hugepage_invalidate;
8971e1c7
ME
1721
1722 if (firmware_has_feature(FW_FEATURE_HPT_RESIZE))
1723 mmu_hash_ops.resize_hpt = pseries_lpar_resize_hpt;
ed6546bd
NP
1724
1725 /*
1726 * On POWER9, we need to do a H_REGISTER_PROC_TBL hcall
1727 * to inform the hypervisor that we wish to use the HPT.
1728 */
1729 if (cpu_has_feature(CPU_FTR_ARCH_300))
1730 pseries_lpar_register_process_table(0, 0, 0);
1da177e4 1731}
14f966e7 1732
bda7673d 1733#ifdef CONFIG_PPC_RADIX_MMU
cc3d2940
PM
1734void radix_init_pseries(void)
1735{
1736 pr_info("Using radix MMU under hypervisor\n");
ed6546bd
NP
1737
1738 pseries_lpar_register_process_table(__pa(process_tb),
1739 0, PRTB_SIZE_SHIFT - 12);
cc3d2940 1740}
bda7673d 1741#endif
cc3d2940 1742
14f966e7
RJ
1743#ifdef CONFIG_PPC_SMLPAR
1744#define CMO_FREE_HINT_DEFAULT 1
1745static int cmo_free_hint_flag = CMO_FREE_HINT_DEFAULT;
1746
1747static int __init cmo_free_hint(char *str)
1748{
1749 char *parm;
1750 parm = strstrip(str);
1751
1752 if (strcasecmp(parm, "no") == 0 || strcasecmp(parm, "off") == 0) {
65471d76 1753 pr_info("%s: CMO free page hinting is not active.\n", __func__);
14f966e7
RJ
1754 cmo_free_hint_flag = 0;
1755 return 1;
1756 }
1757
1758 cmo_free_hint_flag = 1;
65471d76 1759 pr_info("%s: CMO free page hinting is active.\n", __func__);
14f966e7
RJ
1760
1761 if (strcasecmp(parm, "yes") == 0 || strcasecmp(parm, "on") == 0)
1762 return 1;
1763
1764 return 0;
1765}
1766
1767__setup("cmo_free_hint=", cmo_free_hint);
1768
1769static void pSeries_set_page_state(struct page *page, int order,
1770 unsigned long state)
1771{
1772 int i, j;
1773 unsigned long cmo_page_sz, addr;
1774
1775 cmo_page_sz = cmo_get_page_size();
1776 addr = __pa((unsigned long)page_address(page));
1777
1778 for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) {
1779 for (j = 0; j < PAGE_SIZE; j += cmo_page_sz)
1780 plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0);
1781 }
1782}
1783
1784void arch_free_page(struct page *page, int order)
1785{
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1786 if (radix_enabled())
1787 return;
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RJ
1788 if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO))
1789 return;
1790
1791 pSeries_set_page_state(page, order, H_PAGE_SET_UNUSED);
1792}
1793EXPORT_SYMBOL(arch_free_page);
1794
d8c476ee 1795#endif /* CONFIG_PPC_SMLPAR */
4e003747 1796#endif /* CONFIG_PPC_BOOK3S_64 */
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1797
1798#ifdef CONFIG_TRACEPOINTS
e9666d10 1799#ifdef CONFIG_JUMP_LABEL
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1800struct static_key hcall_tracepoint_key = STATIC_KEY_INIT;
1801
8cf868af 1802int hcall_tracepoint_regfunc(void)
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AB
1803{
1804 static_key_slow_inc(&hcall_tracepoint_key);
8cf868af 1805 return 0;
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AB
1806}
1807
1808void hcall_tracepoint_unregfunc(void)
1809{
1810 static_key_slow_dec(&hcall_tracepoint_key);
1811}
1812#else
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1813/*
1814 * We optimise our hcall path by placing hcall_tracepoint_refcount
1815 * directly in the TOC so we can check if the hcall tracepoints are
1816 * enabled via a single load.
1817 */
1818
1819/* NB: reg/unreg are called while guarded with the tracepoints_mutex */
1820extern long hcall_tracepoint_refcount;
1821
8cf868af 1822int hcall_tracepoint_regfunc(void)
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AB
1823{
1824 hcall_tracepoint_refcount++;
8cf868af 1825 return 0;
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AB
1826}
1827
1828void hcall_tracepoint_unregfunc(void)
1829{
1830 hcall_tracepoint_refcount--;
1831}
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1832#endif
1833
1834/*
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NP
1835 * Keep track of hcall tracing depth and prevent recursion. Warn if any is
1836 * detected because it may indicate a problem. This will not catch all
1837 * problems with tracing code making hcalls, because the tracing might have
1838 * been invoked from a non-hcall, so the first hcall could recurse into it
1839 * without warning here, but this better than nothing.
1840 *
1841 * Hcalls with specific problems being traced should use the _notrace
1842 * plpar_hcall variants.
cc1adb5f
AB
1843 */
1844static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
1845
c8cd093a 1846
a3f1a39a 1847notrace void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
c8cd093a 1848{
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AB
1849 unsigned long flags;
1850 unsigned int *depth;
1851
1852 local_irq_save(flags);
1853
69111bac 1854 depth = this_cpu_ptr(&hcall_trace_depth);
57cdfdf8 1855
4f242fc5 1856 if (WARN_ON_ONCE(*depth))
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1857 goto out;
1858
1859 (*depth)++;
e4f387d8 1860 preempt_disable();
6f26353c 1861 trace_hcall_entry(opcode, args);
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1862 (*depth)--;
1863
1864out:
1865 local_irq_restore(flags);
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AB
1866}
1867
a3f1a39a 1868notrace void __trace_hcall_exit(long opcode, long retval, unsigned long *retbuf)
c8cd093a 1869{
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AB
1870 unsigned long flags;
1871 unsigned int *depth;
1872
1873 local_irq_save(flags);
1874
69111bac 1875 depth = this_cpu_ptr(&hcall_trace_depth);
57cdfdf8 1876
4f242fc5 1877 if (*depth) /* Don't warn again on the way out */
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AB
1878 goto out;
1879
1880 (*depth)++;
6f26353c 1881 trace_hcall_exit(opcode, retval, retbuf);
e4f387d8 1882 preempt_enable();
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AB
1883 (*depth)--;
1884
1885out:
1886 local_irq_restore(flags);
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AB
1887}
1888#endif
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1889
1890/**
1891 * h_get_mpp
1892 * H_GET_MPP hcall returns info in 7 parms
1893 */
1894int h_get_mpp(struct hvcall_mpp_data *mpp_data)
1895{
1896 int rc;
1897 unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
1898
1899 rc = plpar_hcall9(H_GET_MPP, retbuf);
1900
1901 mpp_data->entitled_mem = retbuf[0];
1902 mpp_data->mapped_mem = retbuf[1];
1903
1904 mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff;
1905 mpp_data->pool_num = retbuf[2] & 0xffff;
1906
1907 mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
1908 mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
b0d436c7 1909 mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffffUL;
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1910
1911 mpp_data->pool_size = retbuf[4];
1912 mpp_data->loan_request = retbuf[5];
1913 mpp_data->backing_mem = retbuf[6];
1914
1915 return rc;
1916}
1917EXPORT_SYMBOL(h_get_mpp);
1918
1919int h_get_mpp_x(struct hvcall_mpp_x_data *mpp_x_data)
1920{
1921 int rc;
1922 unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = { 0 };
1923
1924 rc = plpar_hcall9(H_GET_MPP_X, retbuf);
1925
1926 mpp_x_data->coalesced_bytes = retbuf[0];
1927 mpp_x_data->pool_coalesced_bytes = retbuf[1];
1928 mpp_x_data->pool_purr_cycles = retbuf[2];
1929 mpp_x_data->pool_spurr_cycles = retbuf[3];
1930
1931 return rc;
1932}
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1933
1934static unsigned long vsid_unscramble(unsigned long vsid, int ssize)
1935{
1936 unsigned long protovsid;
1937 unsigned long va_bits = VA_BITS;
1938 unsigned long modinv, vsid_modulus;
1939 unsigned long max_mod_inv, tmp_modinv;
1940
1941 if (!mmu_has_feature(MMU_FTR_68_BIT_VA))
1942 va_bits = 65;
1943
1944 if (ssize == MMU_SEGSIZE_256M) {
1945 modinv = VSID_MULINV_256M;
1946 vsid_modulus = ((1UL << (va_bits - SID_SHIFT)) - 1);
1947 } else {
1948 modinv = VSID_MULINV_1T;
1949 vsid_modulus = ((1UL << (va_bits - SID_SHIFT_1T)) - 1);
1950 }
1951
1952 /*
1953 * vsid outside our range.
1954 */
1955 if (vsid >= vsid_modulus)
1956 return 0;
1957
1958 /*
1959 * If modinv is the modular multiplicate inverse of (x % vsid_modulus)
1960 * and vsid = (protovsid * x) % vsid_modulus, then we say:
1961 * protovsid = (vsid * modinv) % vsid_modulus
1962 */
1963
1964 /* Check if (vsid * modinv) overflow (63 bits) */
1965 max_mod_inv = 0x7fffffffffffffffull / vsid;
1966 if (modinv < max_mod_inv)
1967 return (vsid * modinv) % vsid_modulus;
1968
1969 tmp_modinv = modinv/max_mod_inv;
1970 modinv %= max_mod_inv;
1971
1972 protovsid = (((vsid * max_mod_inv) % vsid_modulus) * tmp_modinv) % vsid_modulus;
1973 protovsid = (protovsid + vsid * modinv) % vsid_modulus;
1974
1975 return protovsid;
1976}
1977
1978static int __init reserve_vrma_context_id(void)
1979{
1980 unsigned long protovsid;
1981
1982 /*
1983 * Reserve context ids which map to reserved virtual addresses. For now
1984 * we only reserve the context id which maps to the VRMA VSID. We ignore
1985 * the addresses in "ibm,adjunct-virtual-addresses" because we don't
1986 * enable adjunct support via the "ibm,client-architecture-support"
1987 * interface.
1988 */
1989 protovsid = vsid_unscramble(VRMA_VSID, MMU_SEGSIZE_1T);
1990 hash__reserve_context_id(protovsid >> ESID_BITS_1T);
1991 return 0;
1992}
1993machine_device_initcall(pseries, reserve_vrma_context_id);
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AP
1994
1995#ifdef CONFIG_DEBUG_FS
1996/* debugfs file interface for vpa data */
1997static ssize_t vpa_file_read(struct file *filp, char __user *buf, size_t len,
1998 loff_t *pos)
1999{
2000 int cpu = (long)filp->private_data;
2001 struct lppaca *lppaca = &lppaca_of(cpu);
2002
2003 return simple_read_from_buffer(buf, len, pos, lppaca,
2004 sizeof(struct lppaca));
2005}
2006
2007static const struct file_operations vpa_fops = {
2008 .open = simple_open,
2009 .read = vpa_file_read,
2010 .llseek = default_llseek,
2011};
2012
2013static int __init vpa_debugfs_init(void)
2014{
2015 char name[16];
2016 long i;
11dd34f3 2017 struct dentry *vpa_dir;
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AP
2018
2019 if (!firmware_has_feature(FW_FEATURE_SPLPAR))
2020 return 0;
2021
2022 vpa_dir = debugfs_create_dir("vpa", powerpc_debugfs_root);
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AP
2023
2024 /* set up the per-cpu vpa file*/
2025 for_each_possible_cpu(i) {
c6c26fb5 2026 sprintf(name, "cpu-%ld", i);
ff229319 2027 debugfs_create_file(name, 0400, vpa_dir, (void *)i, &vpa_fops);
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AP
2028 }
2029
2030 return 0;
2031}
2032machine_arch_initcall(pseries, vpa_debugfs_init);
2033#endif /* CONFIG_DEBUG_FS */