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1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 2001 Dave Engebretsen IBM Corporation |
d9953105 | 3 | * |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
d9953105 | 8 | * |
1da177e4 LT |
9 | * This program is distributed in the hope that it will be useful, |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
d9953105 | 13 | * |
1da177e4 LT |
14 | * You should have received a copy of the GNU General Public License |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | /* Change Activity: | |
20 | * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support. | |
d9953105 | 21 | * End Change Activity |
1da177e4 LT |
22 | */ |
23 | ||
24 | #include <linux/errno.h> | |
25 | #include <linux/threads.h> | |
26 | #include <linux/kernel_stat.h> | |
27 | #include <linux/signal.h> | |
28 | #include <linux/sched.h> | |
29 | #include <linux/ioport.h> | |
30 | #include <linux/interrupt.h> | |
31 | #include <linux/timex.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/irq.h> | |
37 | #include <linux/random.h> | |
38 | #include <linux/sysrq.h> | |
39 | #include <linux/bitops.h> | |
40 | ||
41 | #include <asm/uaccess.h> | |
42 | #include <asm/system.h> | |
43 | #include <asm/io.h> | |
44 | #include <asm/pgtable.h> | |
45 | #include <asm/irq.h> | |
46 | #include <asm/cache.h> | |
47 | #include <asm/prom.h> | |
48 | #include <asm/ptrace.h> | |
1da177e4 LT |
49 | #include <asm/machdep.h> |
50 | #include <asm/rtas.h> | |
dcad47fc | 51 | #include <asm/udbg.h> |
8c4f1f29 | 52 | #include <asm/firmware.h> |
1da177e4 | 53 | |
c902be71 AB |
54 | #include "ras.h" |
55 | ||
1da177e4 LT |
56 | static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; |
57 | static DEFINE_SPINLOCK(ras_log_buf_lock); | |
58 | ||
8c4f1f29 | 59 | char mce_data_buf[RTAS_ERROR_LOG_MAX]; |
1da177e4 | 60 | |
1da177e4 LT |
61 | static int ras_get_sensor_state_token; |
62 | static int ras_check_exception_token; | |
63 | ||
64 | #define EPOW_SENSOR_TOKEN 9 | |
65 | #define EPOW_SENSOR_INDEX 0 | |
66 | #define RAS_VECTOR_OFFSET 0x500 | |
67 | ||
7d12e780 DH |
68 | static irqreturn_t ras_epow_interrupt(int irq, void *dev_id); |
69 | static irqreturn_t ras_error_interrupt(int irq, void *dev_id); | |
1da177e4 LT |
70 | |
71 | /* #define DEBUG */ | |
72 | ||
0ebfff14 BH |
73 | |
74 | static void request_ras_irqs(struct device_node *np, | |
7d12e780 | 75 | irq_handler_t handler, |
1da177e4 LT |
76 | const char *name) |
77 | { | |
0ebfff14 BH |
78 | int i, index, count = 0; |
79 | struct of_irq oirq; | |
954a46e2 | 80 | const u32 *opicprop; |
0ebfff14 BH |
81 | unsigned int opicplen; |
82 | unsigned int virqs[16]; | |
83 | ||
84 | /* Check for obsolete "open-pic-interrupt" property. If present, then | |
85 | * map those interrupts using the default interrupt host and default | |
86 | * trigger | |
87 | */ | |
954a46e2 | 88 | opicprop = get_property(np, "open-pic-interrupt", &opicplen); |
0ebfff14 BH |
89 | if (opicprop) { |
90 | opicplen /= sizeof(u32); | |
91 | for (i = 0; i < opicplen; i++) { | |
92 | if (count > 15) | |
93 | break; | |
6e99e458 | 94 | virqs[count] = irq_create_mapping(NULL, *(opicprop++)); |
0ebfff14 BH |
95 | if (virqs[count] == NO_IRQ) |
96 | printk(KERN_ERR "Unable to allocate interrupt " | |
97 | "number for %s\n", np->full_name); | |
98 | else | |
99 | count++; | |
100 | ||
1da177e4 | 101 | } |
0ebfff14 BH |
102 | } |
103 | /* Else use normal interrupt tree parsing */ | |
104 | else { | |
105 | /* First try to do a proper OF tree parsing */ | |
106 | for (index = 0; of_irq_map_one(np, index, &oirq) == 0; | |
107 | index++) { | |
108 | if (count > 15) | |
109 | break; | |
110 | virqs[count] = irq_create_of_mapping(oirq.controller, | |
111 | oirq.specifier, | |
112 | oirq.size); | |
113 | if (virqs[count] == NO_IRQ) | |
114 | printk(KERN_ERR "Unable to allocate interrupt " | |
115 | "number for %s\n", np->full_name); | |
116 | else | |
117 | count++; | |
118 | } | |
119 | } | |
120 | ||
121 | /* Now request them */ | |
122 | for (i = 0; i < count; i++) { | |
123 | if (request_irq(virqs[i], handler, 0, name, NULL)) { | |
1da177e4 | 124 | printk(KERN_ERR "Unable to request interrupt %d for " |
0ebfff14 | 125 | "%s\n", virqs[i], np->full_name); |
1da177e4 LT |
126 | return; |
127 | } | |
1da177e4 LT |
128 | } |
129 | } | |
130 | ||
131 | /* | |
132 | * Initialize handlers for the set of interrupts caused by hardware errors | |
133 | * and power system events. | |
134 | */ | |
135 | static int __init init_ras_IRQ(void) | |
136 | { | |
137 | struct device_node *np; | |
138 | ||
139 | ras_get_sensor_state_token = rtas_token("get-sensor-state"); | |
140 | ras_check_exception_token = rtas_token("check-exception"); | |
141 | ||
142 | /* Internal Errors */ | |
143 | np = of_find_node_by_path("/event-sources/internal-errors"); | |
144 | if (np != NULL) { | |
0ebfff14 | 145 | request_ras_irqs(np, ras_error_interrupt, "RAS_ERROR"); |
1da177e4 LT |
146 | of_node_put(np); |
147 | } | |
148 | ||
149 | /* EPOW Events */ | |
150 | np = of_find_node_by_path("/event-sources/epow-events"); | |
151 | if (np != NULL) { | |
0ebfff14 | 152 | request_ras_irqs(np, ras_epow_interrupt, "RAS_EPOW"); |
1da177e4 LT |
153 | of_node_put(np); |
154 | } | |
155 | ||
69ed3324 | 156 | return 0; |
1da177e4 LT |
157 | } |
158 | __initcall(init_ras_IRQ); | |
159 | ||
160 | /* | |
161 | * Handle power subsystem events (EPOW). | |
162 | * | |
163 | * Presently we just log the event has occurred. This should be fixed | |
164 | * to examine the type of power failure and take appropriate action where | |
165 | * the time horizon permits something useful to be done. | |
166 | */ | |
7d12e780 | 167 | static irqreturn_t ras_epow_interrupt(int irq, void *dev_id) |
1da177e4 LT |
168 | { |
169 | int status = 0xdeadbeef; | |
170 | int state = 0; | |
171 | int critical; | |
172 | ||
173 | status = rtas_call(ras_get_sensor_state_token, 2, 2, &state, | |
174 | EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX); | |
175 | ||
176 | if (state > 3) | |
177 | critical = 1; /* Time Critical */ | |
178 | else | |
179 | critical = 0; | |
180 | ||
181 | spin_lock(&ras_log_buf_lock); | |
182 | ||
183 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, | |
184 | RAS_VECTOR_OFFSET, | |
0ebfff14 | 185 | irq_map[irq].hwirq, |
1da177e4 LT |
186 | RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS, |
187 | critical, __pa(&ras_log_buf), | |
188 | rtas_get_error_log_max()); | |
189 | ||
190 | udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n", | |
191 | *((unsigned long *)&ras_log_buf), status, state); | |
192 | printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n", | |
193 | *((unsigned long *)&ras_log_buf), status, state); | |
194 | ||
195 | /* format and print the extended information */ | |
196 | log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0); | |
197 | ||
198 | spin_unlock(&ras_log_buf_lock); | |
199 | return IRQ_HANDLED; | |
200 | } | |
201 | ||
202 | /* | |
203 | * Handle hardware error interrupts. | |
204 | * | |
205 | * RTAS check-exception is called to collect data on the exception. If | |
206 | * the error is deemed recoverable, we log a warning and return. | |
207 | * For nonrecoverable errors, an error is logged and we stop all processing | |
208 | * as quickly as possible in order to prevent propagation of the failure. | |
209 | */ | |
7d12e780 | 210 | static irqreturn_t ras_error_interrupt(int irq, void *dev_id) |
1da177e4 LT |
211 | { |
212 | struct rtas_error_log *rtas_elog; | |
213 | int status = 0xdeadbeef; | |
214 | int fatal; | |
215 | ||
216 | spin_lock(&ras_log_buf_lock); | |
217 | ||
218 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, | |
219 | RAS_VECTOR_OFFSET, | |
0ebfff14 | 220 | irq_map[irq].hwirq, |
1da177e4 LT |
221 | RTAS_INTERNAL_ERROR, 1 /*Time Critical */, |
222 | __pa(&ras_log_buf), | |
223 | rtas_get_error_log_max()); | |
224 | ||
225 | rtas_elog = (struct rtas_error_log *)ras_log_buf; | |
226 | ||
227 | if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC)) | |
228 | fatal = 1; | |
229 | else | |
230 | fatal = 0; | |
231 | ||
232 | /* format and print the extended information */ | |
233 | log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal); | |
234 | ||
235 | if (fatal) { | |
236 | udbg_printf("Fatal HW Error <0x%lx 0x%x>\n", | |
237 | *((unsigned long *)&ras_log_buf), status); | |
238 | printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n", | |
239 | *((unsigned long *)&ras_log_buf), status); | |
240 | ||
241 | #ifndef DEBUG | |
242 | /* Don't actually power off when debugging so we can test | |
243 | * without actually failing while injecting errors. | |
244 | * Error data will not be logged to syslog. | |
245 | */ | |
246 | ppc_md.power_off(); | |
247 | #endif | |
248 | } else { | |
249 | udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n", | |
250 | *((unsigned long *)&ras_log_buf), status); | |
251 | printk(KERN_WARNING | |
252 | "Warning: Recoverable hardware error <0x%lx 0x%x>\n", | |
253 | *((unsigned long *)&ras_log_buf), status); | |
254 | } | |
255 | ||
256 | spin_unlock(&ras_log_buf_lock); | |
257 | return IRQ_HANDLED; | |
258 | } | |
259 | ||
260 | /* Get the error information for errors coming through the | |
261 | * FWNMI vectors. The pt_regs' r3 will be updated to reflect | |
262 | * the actual r3 if possible, and a ptr to the error log entry | |
263 | * will be returned if found. | |
264 | * | |
265 | * The mce_data_buf does not have any locks or protection around it, | |
266 | * if a second machine check comes in, or a system reset is done | |
267 | * before we have logged the error, then we will get corruption in the | |
268 | * error log. This is preferable over holding off on calling | |
269 | * ibm,nmi-interlock which would result in us checkstopping if a | |
270 | * second machine check did come in. | |
271 | */ | |
272 | static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs) | |
273 | { | |
274 | unsigned long errdata = regs->gpr[3]; | |
275 | struct rtas_error_log *errhdr = NULL; | |
276 | unsigned long *savep; | |
277 | ||
278 | if ((errdata >= 0x7000 && errdata < 0x7fff0) || | |
279 | (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) { | |
280 | savep = __va(errdata); | |
281 | regs->gpr[3] = savep[0]; /* restore original r3 */ | |
282 | memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX); | |
283 | memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX); | |
284 | errhdr = (struct rtas_error_log *)mce_data_buf; | |
285 | } else { | |
286 | printk("FWNMI: corrupt r3\n"); | |
287 | } | |
288 | return errhdr; | |
289 | } | |
290 | ||
291 | /* Call this when done with the data returned by FWNMI_get_errinfo. | |
292 | * It will release the saved data area for other CPUs in the | |
293 | * partition to receive FWNMI errors. | |
294 | */ | |
295 | static void fwnmi_release_errinfo(void) | |
296 | { | |
297 | int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL); | |
298 | if (ret != 0) | |
299 | printk("FWNMI: nmi-interlock failed: %d\n", ret); | |
300 | } | |
301 | ||
c902be71 | 302 | int pSeries_system_reset_exception(struct pt_regs *regs) |
1da177e4 LT |
303 | { |
304 | if (fwnmi_active) { | |
305 | struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs); | |
306 | if (errhdr) { | |
307 | /* XXX Should look at FWNMI information */ | |
308 | } | |
309 | fwnmi_release_errinfo(); | |
310 | } | |
c902be71 | 311 | return 0; /* need to perform reset */ |
1da177e4 LT |
312 | } |
313 | ||
314 | /* | |
315 | * See if we can recover from a machine check exception. | |
316 | * This is only called on power4 (or above) and only via | |
317 | * the Firmware Non-Maskable Interrupts (fwnmi) handler | |
318 | * which provides the error analysis for us. | |
319 | * | |
320 | * Return 1 if corrected (or delivered a signal). | |
321 | * Return 0 if there is nothing we can do. | |
322 | */ | |
323 | static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err) | |
324 | { | |
325 | int nonfatal = 0; | |
326 | ||
327 | if (err->disposition == RTAS_DISP_FULLY_RECOVERED) { | |
328 | /* Platform corrected itself */ | |
329 | nonfatal = 1; | |
330 | } else if ((regs->msr & MSR_RI) && | |
331 | user_mode(regs) && | |
332 | err->severity == RTAS_SEVERITY_ERROR_SYNC && | |
333 | err->disposition == RTAS_DISP_NOT_RECOVERED && | |
334 | err->target == RTAS_TARGET_MEMORY && | |
335 | err->type == RTAS_TYPE_ECC_UNCORR && | |
f400e198 | 336 | !(current->pid == 0 || is_init(current))) { |
1da177e4 LT |
337 | /* Kill off a user process with an ECC error */ |
338 | printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n", | |
339 | current->pid); | |
340 | /* XXX something better for ECC error? */ | |
341 | _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); | |
342 | nonfatal = 1; | |
343 | } | |
344 | ||
d9953105 | 345 | log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal); |
1da177e4 LT |
346 | |
347 | return nonfatal; | |
348 | } | |
349 | ||
350 | /* | |
351 | * Handle a machine check. | |
352 | * | |
353 | * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi) | |
354 | * should be present. If so the handler which called us tells us if the | |
355 | * error was recovered (never true if RI=0). | |
356 | * | |
357 | * On hardware prior to Power 4 these exceptions were asynchronous which | |
358 | * means we can't tell exactly where it occurred and so we can't recover. | |
359 | */ | |
360 | int pSeries_machine_check_exception(struct pt_regs *regs) | |
361 | { | |
362 | struct rtas_error_log *errp; | |
363 | ||
364 | if (fwnmi_active) { | |
365 | errp = fwnmi_get_errinfo(regs); | |
366 | fwnmi_release_errinfo(); | |
367 | if (errp && recover_mce(regs, errp)) | |
368 | return 1; | |
369 | } | |
370 | ||
371 | return 0; | |
372 | } |