]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - arch/powerpc/platforms/pseries/setup.c
[PATCH] powerpc: Add CONFIG_CRASH_DUMP
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / platforms / pseries / setup.c
CommitLineData
1da177e4 1/*
033ef338 2 * 64-bit pSeries and RS/6000 setup code.
1da177e4
LT
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * bootup setup stuff..
17 */
18
19#undef DEBUG
20
21#include <linux/config.h>
62d60e9f 22#include <linux/cpu.h>
1da177e4
LT
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/unistd.h>
29#include <linux/slab.h>
30#include <linux/user.h>
31#include <linux/a.out.h>
32#include <linux/tty.h>
33#include <linux/major.h>
34#include <linux/interrupt.h>
35#include <linux/reboot.h>
36#include <linux/init.h>
37#include <linux/ioport.h>
38#include <linux/console.h>
39#include <linux/pci.h>
cebb2b15 40#include <linux/utsname.h>
1da177e4
LT
41#include <linux/adb.h>
42#include <linux/module.h>
43#include <linux/delay.h>
44#include <linux/irq.h>
45#include <linux/seq_file.h>
46#include <linux/root_dev.h>
47
48#include <asm/mmu.h>
49#include <asm/processor.h>
50#include <asm/io.h>
51#include <asm/pgtable.h>
52#include <asm/prom.h>
53#include <asm/rtas.h>
54#include <asm/pci-bridge.h>
55#include <asm/iommu.h>
56#include <asm/dma.h>
57#include <asm/machdep.h>
58#include <asm/irq.h>
3d1229d6 59#include <asm/kexec.h>
1da177e4
LT
60#include <asm/time.h>
61#include <asm/nvram.h>
007e8f51 62#include "xics.h"
1ababe11 63#include <asm/firmware.h>
180a3362 64#include <asm/pmc.h>
bbeb3f4c 65#include <asm/mpic.h>
d387899f 66#include <asm/ppc-pci.h>
69a80d3f
PM
67#include <asm/i8259.h>
68#include <asm/udbg.h>
2249ca9d 69#include <asm/smp.h>
1da177e4 70
a1218720
ME
71#include "plpar_wrappers.h"
72
1da177e4
LT
73#ifdef DEBUG
74#define DBG(fmt...) udbg_printf(fmt)
75#else
76#define DBG(fmt...)
77#endif
78
1da177e4
LT
79extern void find_udbg_vterm(void);
80extern void system_reset_fwnmi(void); /* from head.S */
81extern void machine_check_fwnmi(void); /* from head.S */
1da177e4
LT
82
83int fwnmi_active; /* TRUE if an FWNMI handler is present */
84
1da177e4
LT
85extern void pSeries_system_reset_exception(struct pt_regs *regs);
86extern int pSeries_machine_check_exception(struct pt_regs *regs);
87
143a1dec
PM
88static void pseries_shared_idle(void);
89static void pseries_dedicated_idle(void);
62d60e9f 90
1da177e4
LT
91struct mpic *pSeries_mpic;
92
0dd194d0 93void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT
94{
95 struct device_node *root;
96 const char *model = "";
97
98 root = of_find_node_by_path("/");
99 if (root)
100 model = get_property(root, "model", NULL);
101 seq_printf(m, "machine\t\t: CHRP %s\n", model);
102 of_node_put(root);
103}
104
105/* Initialize firmware assisted non-maskable interrupts if
106 * the firmware supports this feature.
107 *
108 */
109static void __init fwnmi_init(void)
110{
111 int ret;
112 int ibm_nmi_register = rtas_token("ibm,nmi-register");
113 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
114 return;
115 ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
116 __pa((unsigned long)system_reset_fwnmi),
117 __pa((unsigned long)machine_check_fwnmi));
118 if (ret == 0)
119 fwnmi_active = 1;
120}
121
1da177e4
LT
122static void __init pSeries_init_mpic(void)
123{
124 unsigned int *addrp;
125 struct device_node *np;
f9bd170a 126 unsigned long intack = 0;
1da177e4
LT
127
128 /* All ISUs are setup, complete initialization */
129 mpic_init(pSeries_mpic);
130
131 /* Check what kind of cascade ACK we have */
132 if (!(np = of_find_node_by_name(NULL, "pci"))
133 || !(addrp = (unsigned int *)
134 get_property(np, "8259-interrupt-acknowledge", NULL)))
135 printk(KERN_ERR "Cannot find pci to get ack address\n");
136 else
f9bd170a 137 intack = addrp[prom_n_addr_cells(np)-1];
1da177e4
LT
138 of_node_put(np);
139
140 /* Setup the legacy interrupts & controller */
f9bd170a 141 i8259_init(intack, 0);
1da177e4
LT
142
143 /* Hook cascade to mpic */
f9bd170a 144 mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
1da177e4
LT
145}
146
147static void __init pSeries_setup_mpic(void)
148{
149 unsigned int *opprop;
150 unsigned long openpic_addr = 0;
151 unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
152 struct device_node *root;
153 int irq_count;
154
155 /* Find the Open PIC if present */
156 root = of_find_node_by_path("/");
157 opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
158 if (opprop != 0) {
159 int n = prom_n_addr_cells(root);
160
161 for (openpic_addr = 0; n > 0; --n)
162 openpic_addr = (openpic_addr << 32) + *opprop++;
163 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
164 }
165 of_node_put(root);
166
167 BUG_ON(openpic_addr == 0);
168
169 /* Get the sense values from OF */
170 prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
171
172 /* Setup the openpic driver */
173 irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
174 pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
175 16, 16, irq_count, /* isu size, irq offset, irq count */
176 NR_IRQS - 4, /* ipi offset */
177 senses, irq_count, /* sense & sense size */
178 " MPIC ");
179}
180
180a3362
ME
181static void pseries_lpar_enable_pmcs(void)
182{
183 unsigned long set, reset;
184
185 power4_enable_pmcs();
186
187 set = 1UL << 63;
188 reset = 0;
189 plpar_hcall_norets(H_PERFMON, set, reset);
190
191 /* instruct hypervisor to maintain PMCs */
192 if (firmware_has_feature(FW_FEATURE_SPLPAR))
193 get_paca()->lppaca.pmcregs_in_use = 1;
194}
195
1da177e4
LT
196static void __init pSeries_setup_arch(void)
197{
198 /* Fixup ppc_md depending on the type of interrupt controller */
199 if (ppc64_interrupt_controller == IC_OPEN_PIC) {
fce0d574 200 ppc_md.init_IRQ = pSeries_init_mpic;
1da177e4
LT
201 ppc_md.get_irq = mpic_get_irq;
202 /* Allocate the mpic now, so that find_and_init_phbs() can
203 * fill the ISUs */
204 pSeries_setup_mpic();
205 } else {
206 ppc_md.init_IRQ = xics_init_IRQ;
207 ppc_md.get_irq = xics_get_irq;
208 }
209
210#ifdef CONFIG_SMP
211 smp_init_pSeries();
212#endif
213 /* openpic global configuration register (64-bit format). */
214 /* openpic Interrupt Source Unit pointer (64-bit format). */
215 /* python0 facility area (mmio) (64-bit format) REAL address. */
216
217 /* init to some ~sane value until calibrate_delay() runs */
218 loops_per_jiffy = 50000000;
219
220 if (ROOT_DEV == 0) {
221 printk("No ramdisk, default root is /dev/sda2\n");
222 ROOT_DEV = Root_SDA2;
223 }
224
225 fwnmi_init();
226
227 /* Find and initialize PCI host bridges */
228 init_pci_config_tokens();
1da177e4 229 find_and_init_phbs();
0160f53e 230 eeh_init();
1da177e4 231
1da177e4
LT
232 pSeries_nvram_init();
233
62d60e9f 234 /* Choose an idle loop */
1ababe11 235 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
8d15a3e5 236 vpa_init(boot_cpuid);
62d60e9f
ME
237 if (get_paca()->lppaca.shared_proc) {
238 printk(KERN_INFO "Using shared processor idle loop\n");
050a0938 239 ppc_md.idle_loop = pseries_shared_idle;
62d60e9f
ME
240 } else {
241 printk(KERN_INFO "Using dedicated idle loop\n");
050a0938 242 ppc_md.idle_loop = pseries_dedicated_idle;
62d60e9f
ME
243 }
244 } else {
245 printk(KERN_INFO "Using default idle loop\n");
246 ppc_md.idle_loop = default_idle;
247 }
180a3362 248
799d6046 249 if (platform_is_lpar())
180a3362
ME
250 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
251 else
252 ppc_md.enable_pmcs = power4_enable_pmcs;
1da177e4
LT
253}
254
255static int __init pSeries_init_panel(void)
256{
257 /* Manually leave the kernel version on the panel. */
258 ppc_md.progress("Linux ppc64\n", 0);
cebb2b15 259 ppc_md.progress(system_utsname.version, 0);
1da177e4
LT
260
261 return 0;
262}
263arch_initcall(pSeries_init_panel);
264
265
7a6af5e3 266/* Build up the ppc64_firmware_features bitmask field
1da177e4
LT
267 * using contents of device-tree/ibm,hypertas-functions.
268 * Ultimately this functionality may be moved into prom.c prom_init().
269 */
aed31351 270static void __init fw_feature_init(void)
1da177e4
LT
271{
272 struct device_node * dn;
273 char * hypertas;
274 unsigned int len;
275
276 DBG(" -> fw_feature_init()\n");
277
7a6af5e3 278 ppc64_firmware_features = 0;
1da177e4
LT
279 dn = of_find_node_by_path("/rtas");
280 if (dn == NULL) {
281 printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
282 goto no_rtas;
283 }
284
285 hypertas = get_property(dn, "ibm,hypertas-functions", &len);
286 if (hypertas) {
287 while (len > 0){
288 int i, hypertas_len;
289 /* check value against table of strings */
290 for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
291 if ((firmware_features_table[i].name) &&
292 (strcmp(firmware_features_table[i].name,hypertas))==0) {
293 /* we have a match */
7a6af5e3 294 ppc64_firmware_features |=
1da177e4
LT
295 (firmware_features_table[i].val);
296 break;
297 }
298 }
299 hypertas_len = strlen(hypertas);
300 len -= hypertas_len +1;
301 hypertas+= hypertas_len +1;
302 }
303 }
304
305 of_node_put(dn);
50bcfec1 306no_rtas:
1da177e4
LT
307
308 DBG(" <- fw_feature_init()\n");
309}
310
311
312static void __init pSeries_discover_pic(void)
313{
314 struct device_node *np;
315 char *typep;
316
317 /*
318 * Setup interrupt mapping options that are needed for finish_device_tree
319 * to properly parse the OF interrupt tree & do the virtual irq mapping
320 */
321 __irq_offset_value = NUM_ISA_INTERRUPTS;
322 ppc64_interrupt_controller = IC_INVALID;
323 for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
324 typep = (char *)get_property(np, "compatible", NULL);
325 if (strstr(typep, "open-pic"))
326 ppc64_interrupt_controller = IC_OPEN_PIC;
327 else if (strstr(typep, "ppc-xicp"))
328 ppc64_interrupt_controller = IC_PPC_XIC;
329 else
330 printk("pSeries_discover_pic: failed to recognize"
331 " interrupt-controller\n");
332 break;
333 }
334}
335
336static void pSeries_mach_cpu_die(void)
337{
338 local_irq_disable();
339 idle_task_exit();
340 /* Some hardware requires clearing the CPPR, while other hardware does not
341 * it is safe either way
342 */
343 pSeriesLP_cppr_info(0, 0);
344 rtas_stop_self();
345 /* Should never get here... */
346 BUG();
347 for(;;);
348}
349
cab0af98
ME
350static int pseries_set_dabr(unsigned long dabr)
351{
76032de8 352 return plpar_hcall_norets(H_SET_DABR, dabr);
cab0af98
ME
353}
354
76032de8
ME
355static int pseries_set_xdabr(unsigned long dabr)
356{
357 /* We want to catch accesses from kernel and userspace */
358 return plpar_hcall_norets(H_SET_XDABR, dabr,
359 H_DABRX_KERNEL | H_DABRX_USER);
360}
1da177e4
LT
361
362/*
363 * Early initialization. Relocation is on but do not reference unbolted pages
364 */
365static void __init pSeries_init_early(void)
366{
1da177e4 367 int iommu_off = 0;
1da177e4
LT
368
369 DBG(" -> pSeries_init_early()\n");
370
371 fw_feature_init();
372
799d6046 373 if (platform_is_lpar())
1da177e4
LT
374 hpte_init_lpar();
375 else {
376 hpte_init_native();
377 iommu_off = (of_chosen &&
378 get_property(of_chosen, "linux,iommu-off", NULL));
379 }
380
799d6046 381 if (platform_is_lpar())
1da177e4 382 find_udbg_vterm();
1da177e4 383
76032de8 384 if (firmware_has_feature(FW_FEATURE_DABR))
cab0af98 385 ppc_md.set_dabr = pseries_set_dabr;
76032de8
ME
386 else if (firmware_has_feature(FW_FEATURE_XDABR))
387 ppc_md.set_dabr = pseries_set_xdabr;
1da177e4
LT
388
389 iommu_init_early_pSeries();
390
391 pSeries_discover_pic();
392
393 DBG(" <- pSeries_init_early()\n");
394}
395
396
1da177e4
LT
397static int pSeries_check_legacy_ioport(unsigned int baseport)
398{
399 struct device_node *np;
400
401#define I8042_DATA_REG 0x60
402#define FDC_BASE 0x3f0
403
404
405 switch(baseport) {
406 case I8042_DATA_REG:
407 np = of_find_node_by_type(NULL, "8042");
408 if (np == NULL)
409 return -ENODEV;
410 of_node_put(np);
411 break;
412 case FDC_BASE:
413 np = of_find_node_by_type(NULL, "fdc");
414 if (np == NULL)
415 return -ENODEV;
416 of_node_put(np);
417 break;
418 }
419 return 0;
420}
421
422/*
423 * Called very early, MMU is off, device-tree isn't unflattened
424 */
425extern struct machdep_calls pSeries_md;
426
427static int __init pSeries_probe(int platform)
428{
429 if (platform != PLATFORM_PSERIES &&
430 platform != PLATFORM_PSERIES_LPAR)
431 return 0;
432
433 /* if we have some ppc_md fixups for LPAR to do, do
434 * it here ...
435 */
436
437 return 1;
438}
439
c66d5dd6
ME
440DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
441
050a0938
AB
442static inline void dedicated_idle_sleep(unsigned int cpu)
443{
444 struct paca_struct *ppaca = &paca[cpu ^ 1];
445
446 /* Only sleep if the other thread is not idle */
447 if (!(ppaca->lppaca.idle)) {
448 local_irq_disable();
449
450 /*
451 * We are about to sleep the thread and so wont be polling any
452 * more.
453 */
454 clear_thread_flag(TIF_POLLING_NRFLAG);
64c7c8f8 455 smp_mb__after_clear_bit();
050a0938
AB
456
457 /*
458 * SMT dynamic mode. Cede will result in this thread going
459 * dormant, if the partner thread is still doing work. Thread
460 * wakes up if partner goes idle, an interrupt is presented, or
461 * a prod occurs. Returning from the cede enables external
462 * interrupts.
463 */
464 if (!need_resched())
465 cede_processor();
466 else
467 local_irq_enable();
64c7c8f8 468 set_thread_flag(TIF_POLLING_NRFLAG);
050a0938
AB
469 } else {
470 /*
471 * Give the HV an opportunity at the processor, since we are
472 * not doing any work.
473 */
474 poll_pending();
475 }
476}
477
143a1dec
PM
478static void pseries_dedicated_idle(void)
479{
050a0938
AB
480 struct paca_struct *lpaca = get_paca();
481 unsigned int cpu = smp_processor_id();
c66d5dd6
ME
482 unsigned long start_snooze;
483 unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
64c7c8f8 484 set_thread_flag(TIF_POLLING_NRFLAG);
c66d5dd6
ME
485
486 while (1) {
487 /*
488 * Indicate to the HV that we are idle. Now would be
489 * a good time to find other work to dispatch.
490 */
491 lpaca->lppaca.idle = 1;
492
64c7c8f8 493 if (!need_resched()) {
6146eed1 494 start_snooze = get_tb() +
c66d5dd6 495 *smt_snooze_delay * tb_ticks_per_usec;
050a0938 496
c66d5dd6 497 while (!need_resched() && !cpu_is_offline(cpu)) {
050a0938
AB
498 ppc64_runlatch_off();
499
c66d5dd6
ME
500 /*
501 * Go into low thread priority and possibly
502 * low power mode.
503 */
504 HMT_low();
505 HMT_very_low();
506
050a0938 507 if (*smt_snooze_delay != 0 &&
6146eed1 508 get_tb() > start_snooze) {
050a0938
AB
509 HMT_medium();
510 dedicated_idle_sleep(cpu);
c66d5dd6 511 }
050a0938 512
c66d5dd6
ME
513 }
514
050a0938 515 HMT_medium();
c66d5dd6
ME
516 }
517
c66d5dd6 518 lpaca->lppaca.idle = 0;
050a0938
AB
519 ppc64_runlatch_on();
520
5bfb5d69 521 preempt_enable_no_resched();
c66d5dd6 522 schedule();
5bfb5d69 523 preempt_disable();
050a0938 524
c66d5dd6
ME
525 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
526 cpu_die();
527 }
c66d5dd6
ME
528}
529
143a1dec 530static void pseries_shared_idle(void)
c66d5dd6
ME
531{
532 struct paca_struct *lpaca = get_paca();
533 unsigned int cpu = smp_processor_id();
534
535 while (1) {
536 /*
537 * Indicate to the HV that we are idle. Now would be
538 * a good time to find other work to dispatch.
539 */
540 lpaca->lppaca.idle = 1;
541
542 while (!need_resched() && !cpu_is_offline(cpu)) {
543 local_irq_disable();
050a0938 544 ppc64_runlatch_off();
c66d5dd6
ME
545
546 /*
547 * Yield the processor to the hypervisor. We return if
548 * an external interrupt occurs (which are driven prior
549 * to returning here) or if a prod occurs from another
550 * processor. When returning here, external interrupts
551 * are enabled.
552 *
553 * Check need_resched() again with interrupts disabled
554 * to avoid a race.
555 */
556 if (!need_resched())
557 cede_processor();
558 else
559 local_irq_enable();
050a0938
AB
560
561 HMT_medium();
c66d5dd6
ME
562 }
563
c66d5dd6 564 lpaca->lppaca.idle = 0;
050a0938
AB
565 ppc64_runlatch_on();
566
5bfb5d69 567 preempt_enable_no_resched();
c66d5dd6 568 schedule();
5bfb5d69 569 preempt_disable();
050a0938
AB
570
571 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
c66d5dd6
ME
572 cpu_die();
573 }
c66d5dd6
ME
574}
575
4267292b
PM
576static int pSeries_pci_probe_mode(struct pci_bus *bus)
577{
799d6046 578 if (platform_is_lpar())
4267292b
PM
579 return PCI_PROBE_DEVTREE;
580 return PCI_PROBE_NORMAL;
581}
582
c5e24354
ME
583#ifdef CONFIG_KEXEC
584static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
585{
586 /* Don't risk a hypervisor call if we're crashing */
587 if (!crash_shutdown) {
588 unsigned long vpa = __pa(&get_paca()->lppaca);
589
590 if (unregister_vpa(hard_smp_processor_id(), vpa)) {
591 printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
592 "failed\n", smp_processor_id(),
593 hard_smp_processor_id());
594 }
595 }
596
597 if (ppc64_interrupt_controller == IC_OPEN_PIC)
598 mpic_teardown_this_cpu(secondary);
599 else
600 xics_teardown_cpu(secondary);
601}
602#endif
603
1da177e4
LT
604struct machdep_calls __initdata pSeries_md = {
605 .probe = pSeries_probe,
606 .setup_arch = pSeries_setup_arch,
607 .init_early = pSeries_init_early,
0dd194d0 608 .show_cpuinfo = pSeries_show_cpuinfo,
1da177e4
LT
609 .log_error = pSeries_log_error,
610 .pcibios_fixup = pSeries_final_fixup,
4267292b 611 .pci_probe_mode = pSeries_pci_probe_mode,
dad32bbf 612 .irq_bus_setup = pSeries_irq_bus_setup,
f4fcbbe9
PM
613 .restart = rtas_restart,
614 .power_off = rtas_power_off,
615 .halt = rtas_halt,
1da177e4
LT
616 .panic = rtas_os_term,
617 .cpu_die = pSeries_mach_cpu_die,
773bf9c4
AB
618 .get_boot_time = rtas_get_boot_time,
619 .get_rtc_time = rtas_get_rtc_time,
620 .set_rtc_time = rtas_set_rtc_time,
10f7e7c1 621 .calibrate_decr = generic_calibrate_decr,
6566c6f1 622 .progress = rtas_progress,
1da177e4
LT
623 .check_legacy_ioport = pSeries_check_legacy_ioport,
624 .system_reset_exception = pSeries_system_reset_exception,
625 .machine_check_exception = pSeries_machine_check_exception,
c5e24354
ME
626#ifdef CONFIG_KEXEC
627 .kexec_cpu_down = pseries_kexec_cpu_down,
3d1229d6
ME
628 .machine_kexec = default_machine_kexec,
629 .machine_kexec_prepare = default_machine_kexec_prepare,
c5e24354 630#endif
1da177e4 631};